Liquid crystal display panel and liquid crystal display device including the same
By dividing multiple pixel areas in the liquid crystal display panel and optimizing the light transmittance, the problem of the reduction of the transmittance caused by the improvement of viewing angle characteristics in the prior art is solved, and excellent viewing angle characteristics and high light transmittance are achieved.
Patent Information
- Application Number
- CN201910859878.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-09-12
- Filing Date
- 2019-09-11
- Publication Date
- 2025-04-08
- Estimated Expiration
- 2039-09-11
AI Technical Summary
When improving viewing angle characteristics, existing liquid crystal display panels require a large number of transistors and capacitors, resulting in a decrease in transmittance.
A plurality of pixel regions (first pixel region, second pixel region and third pixel region) are adopted and the light transmittance of the display panel is optimized by light transmittance of different wavelengths, and the light transmittance of the third pixel region is smaller than that of the first and second pixel regions.
Excellent viewing angle characteristics and visibility characteristics are achieved, while improving the light transmittance of the display panel, avoiding the problem of decreased transmittance.
Smart Images

Figure CN110895376B_ABST
Abstract
Description
[0001] This patent application claims priority to and all benefits of Korean Patent Application No. 10-2018-0109052, filed on September 12, 2018, which is hereby incorporated by reference in its entirety. Technical Field
[0002] The present disclosure herein relates to a liquid crystal display panel having excellent viewing angle characteristics and light transmittance and a display device including the liquid crystal display panel. Background Art
[0003] The liquid crystal display device includes: a liquid crystal display panel having two substrates facing each other; and a liquid crystal layer disposed between the substrates. The liquid crystal display device applies a voltage to the electric field generating electrodes to apply an electric field to the liquid crystal layer. Thus, the orientation direction of the liquid crystal molecules in the liquid crystal layer is determined, and an image is displayed by controlling the polarization of incident light.
[0004] Among liquid crystal display devices, there is a vertical alignment mode liquid crystal display device in which the long axes of liquid crystal molecules are arranged perpendicular to two substrates in the absence of an electric field, so that the contrast is large and a wide reference viewing angle is easily achieved.
[0005] In order to improve the viewing angle characteristics of a liquid crystal display, a technology for dividing a pixel area into a plurality of domains and controlling the plurality of domains has been developed Examples of such technology include a charge sharing (CS) method and a resistivity division (RD) method.
[0006] In order to improve the viewing angle characteristics using the plurality of domains as described above, a large number of transistors and a large number of capacitors are required, thereby reducing the transmittance of the liquid crystal display panel. Summary of the invention
[0007] The present disclosure is to provide a liquid crystal display panel having excellent visibility characteristics and viewing angle characteristics and high light transmittance, and a liquid crystal display device including the liquid crystal display panel.
[0008] An embodiment of the inventive concept provides a liquid crystal display device, comprising: a display panel including a liquid crystal layer, wherein a first pixel region, a second pixel region, and a third pixel region are defined in the display panel; and a backlight unit configured to provide light to the display panel, wherein each of a wavelength of a first color light generated by transmitting light through the first pixel region and a wavelength of a second color light generated by transmitting light through the second pixel region is longer than a wavelength of a third color light generated by transmitting light through the third pixel region, and wherein a first ratio of light passing through the first pixel region and a second ratio of light passing through the second pixel region are greater than a third ratio of light passing through the third pixel region.
[0009] In an embodiment, the first color light may have a red color, the second color light may have a green color, and the third color light may have a blue color.
[0010] In an embodiment, the third pixel region may include a high grayscale region and a low grayscale region, wherein the grayscale of light of the third color light emitted from the high grayscale region may be higher than the grayscale of light of the third color light emitted from the low grayscale region.
[0011] In an embodiment, the display panel may include a plurality of transistors, wherein a number of transistors among the plurality of transistors arranged in a first pixel region may be equal to a number of transistors among the plurality of transistors arranged in a second pixel region, wherein a number of transistors among the plurality of transistors arranged in a third pixel region may be greater than a number of transistors among the plurality of transistors arranged in the first pixel region.
[0012] In an embodiment, the number of transistors disposed in the first pixel region may be one, and the number of transistors disposed in the third pixel region may be three.
[0013] In an embodiment, the display panel may further include: a first color filter overlapping the first pixel region and configured to transmit light having a wavelength between 640nm and 730nm; a second color filter overlapping the second pixel region and configured to transmit light having a wavelength between 492nm and 580nm; and a third color filter overlapping the third pixel region and configured to transmit light having a wavelength between 420nm and 490nm.
[0014] In an embodiment, the display panel may further include: a plurality of pixel electrodes; and a common electrode overlapped with the plurality of pixel electrodes, wherein the liquid crystal layer may be disposed between the plurality of pixel electrodes and the common electrode.
[0015] In an embodiment, the number of pixel electrodes among the plurality of pixel electrodes arranged in the first pixel region may be equal to the number of pixel electrodes among the plurality of pixel electrodes arranged in the second pixel region, wherein the number of pixel electrodes among the plurality of pixel electrodes arranged in the third pixel region may be greater than the number of pixel electrodes arranged in the first pixel region.
[0016] In an embodiment, the number of pixel electrodes disposed in the first pixel region may be one, and the number of pixel electrodes disposed in the third pixel region may be two.
[0017] In an embodiment of the inventive concept, a liquid crystal display panel includes: a first substrate, which defines a first pixel area, a second pixel area and a third pixel area; a second substrate, which is arranged opposite to the first substrate; and a liquid crystal layer, which is arranged between the first substrate and the second substrate, wherein a first color light emitted from the first pixel area has a red color, a second color light emitted from the second pixel area has a green color, and a third color light emitted from the third pixel area has a blue color, wherein a transmittance of the third pixel area is less than a transmittance of the first pixel area and a transmittance of the second pixel area.
[0018] In an embodiment, the third pixel region may include a high grayscale region and a low grayscale region, wherein the grayscale of light emitted from the high grayscale region in the third color light may be higher than the grayscale of light emitted from the low grayscale region in the third color light.
[0019] In an embodiment, the liquid crystal display panel may further include a plurality of transistors disposed on the first substrate, wherein the number of transistors disposed in the first pixel region among the plurality of transistors may be equal to the number of transistors disposed in the second pixel region among the plurality of transistors. The number of transistors disposed in the third pixel region among the plurality of transistors may be greater than the number of transistors disposed in the first pixel region among the plurality of transistors.
[0020] In an embodiment, the number of transistors disposed in the first pixel region may be one, and the number of transistors disposed in the third pixel region may be three.
[0021] In an embodiment, the liquid crystal display panel may further include: a plurality of pixel electrodes, each pixel electrode electrically connected to a plurality of transistors; and a common electrode overlapping the plurality of pixel electrodes, wherein the liquid crystal layer may be disposed between the plurality of pixel electrodes and the common electrode.
[0022] In an embodiment, the number of pixel electrodes among the plurality of pixel electrodes arranged in the first pixel region may be equal to the number of pixel electrodes among the plurality of pixel electrodes arranged in the second pixel region, wherein the number of pixel electrodes among the plurality of pixel electrodes arranged in the third pixel region may be greater than the number of pixel electrodes arranged in the first pixel region.
[0023] In an embodiment, the number of pixel electrodes disposed in the first pixel region may be one, and the number of pixel electrodes disposed in the third pixel region may be two.
[0024] In an embodiment of the inventive concept, a liquid crystal display device includes: a display panel including a liquid crystal layer, wherein a first pixel region, a second pixel region, and a third pixel region are defined in the display panel; and a backlight unit configured to provide light to the display panel, wherein each of the first pixel region and the second pixel region includes only one transistor, and the third pixel region includes three transistors, wherein each of a wavelength of a first color light generated by transmitting light through the first pixel region and a wavelength of a second color light generated by transmitting light through the second pixel region is longer than a wavelength of a third color light generated by transmitting light through the third pixel region.
[0025] In an embodiment, the first color light may have a red color, the second color light may have a green color, and the third color light may have a blue color.
[0026] In an embodiment, the third pixel region may include a high grayscale region and a low grayscale region, wherein the grayscale of light of the third color light emitted from the high grayscale region may be higher than the grayscale of light of the third color light emitted from the low grayscale region.
[0027] In an embodiment, a first ratio of light passing through the first pixel region and a second ratio of light passing through the second pixel region may be greater than a third ratio of light passing through the third pixel region. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification. The accompanying drawings illustrate exemplary embodiments of the inventive concept and, together with the detailed description, are used to explain the principles of the inventive concept. In the accompanying drawings:
[0029] Figure 1 is a plan view of a display device according to an embodiment of the inventive concept;
[0030] Figure 2 is an equivalent circuit diagram of a pixel according to an embodiment of the inventive concept;
[0031] Figure 3A Shown with Figure 2 An exemplary layout of a first pixel region corresponding to the first pixel shown in FIG.
[0032] Figure 3B Shown with Figure 2 An exemplary layout of a second pixel region corresponding to a second pixel shown in FIG.
[0033] Figure 3C Shown with Figure 2 An exemplary layout of a third pixel area corresponding to the third pixel shown in FIG.
[0034] Figure 4 The example shows Figure 2 A cross-sectional view corresponding to a portion of an assembly of a first pixel shown in ;
[0035] Figure 5 An example is shown in which a first pixel region, a second pixel region, and a third pixel region are set;
[0036] Figure 6 The exemplary embodiment shows a method for driving a Figure 5 A method for controlling brightness of a display panel of a pixel area shown in ; and
[0037] Figure 7 and Figure 8 An example is shown in which a first pixel region, a second pixel region, and a third pixel region are set. DETAILED DESCRIPTION
[0038] Hereinafter, another embodiment of the inventive concept will be described with reference to the accompanying drawings.
[0039] Furthermore, in the drawings, the thickness, ratio, and size of components are exaggerated for effective description. “And (and), and) / or (or)” includes all of one or more combinations defined by the relevant components.
[0040] In various embodiments of the inventive concept, the terms "comprises", "includes" or their variations indicate the existence of properties, regions, fixed numbers, steps, processes, elements and / or components but do not exclude other properties, regions, fixed numbers, steps, processes, elements and / or components.
[0041] Figure 1 is a plan view of a display device DD according to an embodiment of the inventive concept. Figure 2 is an equivalent circuit diagram of pixels PX1 to PX3 according to an embodiment of the inventive concept. Figure 3A Shown with Figure 2 An example layout of the first pixel area PXA1 corresponding to the first pixel PX1 is shown in FIG. Figure 3B Shown with Figure 2 An example layout of the second pixel area PXA2 corresponding to the second pixel PX2 is shown in FIG. Figure 3C Shown with Figure 2 An example layout of a third pixel area PXA3 corresponding to the third pixel PX3 is shown in FIG. Figure 4 Shown with Figure 2 1 corresponds to a cross-sectional view of a portion of components of the first pixel PX1 shown in FIG.
[0042] like Figure 1As shown, the display device DD according to an embodiment of the inventive concept includes a display panel DP, a gate driving circuit 100 , a data driving circuit 200 , a signal control unit 300 , a power management circuit 400 , and a backlight unit 500 .
[0043] In this embodiment, the display panel DP is described as a liquid crystal display panel. On the other hand, the liquid crystal display device including the liquid crystal display panel may further include a polarizer (not shown).
[0044] The display panel DP includes a first substrate DS1, a second substrate DS2 spaced apart from the first substrate DS1, and a liquid crystal layer LCL (see FIG. 1 ) disposed between the first substrate DS1 and the second substrate DS2. Figure 4 ). The second substrate DS2 faces the first substrate DS1. On a plane defined by the first direction DR1 and the second direction DR2, the display panel DP includes a display area DA in which a plurality of pixels PX are arranged and a non-display area NDA surrounding the display area DA.
[0045] The display panel DP includes a plurality of gate lines GL1 to GLn disposed on a first substrate DS1 and a plurality of data lines DL1 to DLm crossing the plurality of gate lines GL1 to GLn. The plurality of gate lines GL1 to GLn are connected to a gate driving circuit 100. The plurality of data lines DL1 to DLm are connected to a data driving circuit 200. Figure 1 , only some of the plurality of gate lines GL1 to GLn and only some of the plurality of data lines DL1 to DLm are shown in FIG. In addition, the display panel DP may further include a dummy gate line GLd disposed in the display area DA of the first substrate DS1. However, exemplary embodiments are not limited thereto, and for example, the dummy gate line GLd may be disposed in the non-display area NDA instead of in the display area DA.
[0046] Figure 1 2. Only some of the plurality of pixels PX are shown in FIG. The plurality of pixels PX are respectively connected to corresponding gate lines among the plurality of gate lines GL1 to GLn and corresponding data lines among the plurality of data lines DL1 to DLm. However, the dummy gate line GLd is not connected to the plurality of pixels PX.
[0047] According to the displayed color, the plurality of pixels PX may be divided into a plurality of groups. The plurality of pixels PX may display one of a plurality of primary colors. The primary colors may include red, green, blue, and white. However, the embodiments of the inventive concept are not limited thereto, and the primary colors may also include various colors such as yellow, cyan, magenta, etc.
[0048] The gate driving circuit 100 and the data driving circuit 200 receive control signals from a signal control unit (e.g., a timing controller) 300. The signal control unit 300 may be mounted on a first circuit board PBA-C and may receive power from a power management circuit 400. The first circuit board PBA-C may be a printed board assembly (PBA). The power management circuit 400 may be a power management IC (PMIC).
[0049] The signal control unit 300 receives image data and control signals from an external graphics control unit (not shown). The control signals may include a vertical synchronization signal, a horizontal synchronization signal, a data enable signal, and a clock signal. The vertical synchronization signal is a signal for distinguishing frame segments, the horizontal synchronization signal is a signal for distinguishing horizontal segments (i.e., a line distinguishing signal), and the data enable signal is at a high level only during the segment in which data is output to display the data input area.
[0050] The gate driving circuit 100 generates a gate signal based on a control signal (hereinafter referred to as a gate control signal) received from the signal control unit 300 , and outputs the generated gate signal to the gate lines GL1 to GLn.
[0051] Figure 1 One gate driving circuit 100 connected to the left end of the plurality of gate lines GL1 to GLn is shown. In an embodiment of the inventive concept, the display device may include two gate driving circuits. One of the two gate driving circuits may be connected to the left end of the plurality of gate lines GL1 to GLn, and the other may be connected to the right end of the plurality of gate lines GL1 to GLn. In addition, one of the two gate driving circuits may be connected to the odd-numbered gate lines, and the other may be connected to the even-numbered gate lines.
[0052] The data driving circuit 200 generates a gradation voltage according to image data provided from the signal control unit 300 based on a control signal (hereinafter referred to as a data control signal) received from the signal control unit 300. The data driving circuit 200 outputs the gradation voltage to the plurality of data lines DL1 to DLm as a data voltage.
[0053] In this specification, signals transmitted from the external graphics control unit and transmitted to the signal control unit 300, the data driving circuit 200, and the pixel PX may be collectively referred to as data signals. The form of the data signal from the external graphics control unit to the pixel PX may be changed or processed, and the data signal is a signal including data for displaying an image in the display area DA.
[0054] The data driving circuit 200 includes a driving chip 210 and a flexible circuit board 220 on which the driving chip 210 is mounted. Each of the driving chip 210 and the flexible circuit board 220 may be provided in plural. The flexible circuit board 220 may electrically connect the second circuit board PBA-S and the first substrate DS1.
[0055] Two adjacent second circuit boards PBA-S may be connected to each other through another flexible circuit board FPC.
[0056] The second circuit board PBA-S may be connected to the first circuit board PBA-C through a flexible flat cable FFC.
[0057] The plurality of driving chips 210 provide data signals corresponding to corresponding data lines among the plurality of data lines DL1 to DLm.
[0058] The signal control unit 300 and the driving chip 210 may be connected via an interface USI. The interface USI includes a central interface USI-C for connecting the signal control unit 300 to the near driving chip 210 and a side interface USI-S for connecting the signal control unit 300 to the far driving chip 210.
[0059] Figure 1 A tape carrier package (TCP) type data driving circuit 200 is shown as an example. According to an embodiment of the inventive concept, the data driving circuit 200 may be disposed in the non-display area NDA of the first substrate DS1 by a chip on glass (COG) method.
[0060] In a plane, the backlight unit 500 may be disposed below the display panel DP. The backlight unit 500 may include a plurality of light sources (not shown). The backlight unit 500 may provide light to the display panel DP, and the light emitted from the backlight unit 500 may pass through the display panel DP and be visible to a user of the display device DD.
[0061] Figure 2 Shown with Figure 1 1 and 2 , and an equivalent circuit diagram corresponding to pixels PX1 , PX2 , and PX3 connected to the first to third data lines DL1 to DL3 and the i-th gate line GLi in the pixel PX.
[0062] Reference Figure 2 , the first pixel PX1 includes a first transistor TR1, a first liquid crystal capacitor Clc1, and a first storage capacitor Cst1. In this specification, a transistor refers to a thin film transistor. According to an embodiment of the inventive concept, the first storage capacitor Cst1 may be omitted.
[0063] The first transistor TR1 is electrically connected to the i-th gate line GLi and the first data line DL1. The first transistor TR1 outputs a pixel voltage corresponding to a data signal received from the first data line DL1 in response to a gate signal received from the i-th gate line GLi.
[0064] The first liquid crystal capacitor Clc1 is charged with a pixel voltage output from the first transistor TR1. Figure 4 ) is changed according to the amount of charge charged in the first liquid crystal capacitor Clc1. According to the arrangement of the liquid crystal directors, light incident to the liquid crystal layer LCL may be transmitted or blocked.
[0065] Light emitted in the region corresponding to the first pixel PX1 may have a red color. In an embodiment of the inventive concept, when light emitted from the backlight unit 500 passes through the region corresponding to the first pixel PX1, light having a red color may be generated. In an embodiment of the inventive concept, when light emitted from the backlight unit 500 passes through the region corresponding to the first pixel PX1, only light having a wavelength of 640 nm or more and 730 nm or less may be transmitted.
[0066] The first storage capacitor Cst1 is connected in parallel with the first liquid crystal capacitor Clc1. The first storage capacitor Cst1 maintains the arrangement of the liquid crystal director during a predetermined period.
[0067] The second pixel PX2 includes a second transistor TR2, a second liquid crystal capacitor Clc2, and a second storage capacitor Cst2. According to an embodiment of the inventive concept, the second storage capacitor Cst2 may be omitted.
[0068] The second transistor TR2 is electrically connected to the i-th gate line GLi and the second data line DL2. The second transistor TR2 outputs a pixel voltage corresponding to a data signal received from the second data line DL2 in response to a gate signal received from the i-th gate line GLi.
[0069] The second liquid crystal capacitor Clc2 is charged with the pixel voltage output from the second transistor TR2. Figure 4 ) is changed according to the amount of charge charged in the second liquid crystal capacitor Clc2. According to the arrangement of the liquid crystal directors, light incident to the liquid crystal layer LCL may be transmitted or blocked.
[0070] The light emitted in the region corresponding to the second pixel PX2 may have a green color. In an embodiment of the inventive concept, when the light emitted from the backlight unit 500 passes through the region corresponding to the second pixel PX2, light having a green color may be generated. In an embodiment of the inventive concept, when the light emitted from the backlight unit 500 passes through the region corresponding to the second pixel PX2, only light having a wavelength of 492 nm or more and 580 nm or less may be transmitted.
[0071] The second storage capacitor Cst2 is connected in parallel with the second liquid crystal capacitor Clc2. The second storage capacitor Cst2 maintains the arrangement of the liquid crystal director during a predetermined period.
[0072] The third pixel PX3 may include a first subpixel PX-S1 and a second subpixel PX-S2.
[0073] The first subpixel PX-S1 may include a third transistor TR3, a third liquid crystal capacitor Clc3, and a third storage capacitor Cst3. The second subpixel PX-S2 may include a fourth transistor TR4, a fifth transistor TR5, a fourth liquid crystal capacitor Clc4, and a fourth storage capacitor Cst4.
[0074] A control electrode of the third transistor TR3 is connected to the i-th gate line GLi, an input electrode of the third transistor TR3 is connected to the third data line DL3, and an output electrode of the third transistor TR3 is connected to the third liquid crystal capacitor Clc3 and the third storage capacitor Cst3.
[0075] A first electrode of the third liquid crystal capacitor Clc3 is connected to the output electrode of the third transistor TR3, and a second electrode of the third liquid crystal capacitor Clc3 receives a common voltage Vcom. A first electrode of the third storage capacitor Cst3 is connected to the output electrode of the third transistor TR3, and a second electrode of the third storage capacitor Cst3 receives a storage voltage Vcst.
[0076] A control electrode of the fourth transistor TR4 is connected to the i-th gate line GLi, an input electrode of the fourth transistor TR4 is connected to the third data line DL3, and an output electrode of the fourth transistor TR4 is connected to the fourth liquid crystal capacitor Clc4 and the fourth storage capacitor Cst4.
[0077] A control electrode of the fifth transistor TR5 is connected to the i-th gate line GLi, an input electrode of the fifth transistor TR5 receives the storage voltage Vcst, and an output electrode of the fifth transistor TR5 is connected to the output electrode of the fourth transistor TR4.
[0078] A first electrode of the fourth liquid crystal capacitor Clc4 is connected to the output electrode of the fourth transistor TR4, and a second electrode of the fourth liquid crystal capacitor Clc4 receives the common voltage Vcom. A first electrode of the fourth storage capacitor Cst4 is connected to the output electrode of the fourth transistor TR4, and a second electrode of the fourth storage capacitor Cst4 receives the storage voltage Vcst.
[0079] The common voltage Vcom and the storage voltage Vcst may have substantially the same voltage.
[0080] The third transistor TR3 , the fourth transistor TR4 , and the fifth transistor TR5 are turned on by a gate signal supplied through the i-th gate line GLi.
[0081] The data voltage of the third data line DL3 is supplied to the first subpixel PX-S1 through the turned-on third transistor TR3. The third liquid crystal capacitor Clc3 is charged with a pixel voltage (hereinafter referred to as a first pixel voltage) corresponding to the level difference between the provided data voltage and the common voltage Vcom. The arrangement of the liquid crystal directors included in the liquid crystal layer LCL changes according to the amount of charge charged in the third liquid crystal capacitor Clc3. According to the arrangement of the liquid crystal directors, light incident to the liquid crystal layer LCL can be transmitted or blocked. The third storage capacitor Cst3 is connected in parallel to the third liquid crystal capacitor Clc3 to maintain the arrangement of the liquid crystal directors for a predetermined period of time.
[0082] The data voltage of the third data line DL3 is supplied to the second sub-pixel PX-S2 through the turned-on fourth transistor TR4. In addition, the storage voltage Vcst is supplied to the second sub-pixel PX-S2 through the turned-on fifth transistor TR5.
[0083] When each of the fourth transistor TR4 and the fifth transistor TR5 is turned on, a voltage at the contact node CN to which the fourth transistor TR4 and the fifth transistor TR5 are connected (hereinafter referred to as a distribution voltage) has a value distributed according to a ratio of resistance values. That is, the distribution voltage has a value between the data voltage supplied through the turned-on fourth transistor TR4 and the storage voltage Vcst provided through the turned-on fifth transistor TR5.
[0084] Therefore, the fourth liquid crystal capacitor Clc4 is charged with a pixel voltage (hereinafter referred to as a second pixel voltage) corresponding to the level difference between the distribution voltage and the common voltage Vcom. The arrangement of the liquid crystal directors included in the liquid crystal layer LCL changes according to the amount of charge charged in the fourth liquid crystal capacitor Clc4. According to the arrangement of the liquid crystal directors, light incident to the liquid crystal layer LCL can be transmitted or blocked. The fourth storage capacitor Cst4 is connected in parallel with the fourth liquid crystal capacitor Clc4 to maintain the arrangement of the liquid crystal directors for a predetermined period of time.
[0085] Since the first pixel voltage charged in the third liquid crystal capacitor Clc3 and the second pixel voltage charged in the fourth liquid crystal capacitor Clc4 are different from each other, the grayscale displayed in the first subpixel PX-S1 is different from the grayscale displayed in the second subpixel PX-S2. Therefore, the visibility of the third pixel PX3 can be improved by displaying images of different grayscales in the first subpixel PX-S1 and the second subpixel PX-S2.
[0086] The light emitted in the region corresponding to the third pixel PX3 may have a blue color. In an embodiment of the inventive concept, when the light emitted from the backlight unit 500 passes through the region corresponding to the third pixel PX3, light having a blue color may be generated. In an embodiment of the inventive concept, when the light emitted from the backlight unit 500 passes through the region corresponding to the third pixel PX3, only light having a wavelength of 420 nm or more and 490 nm or less may be transmitted.
[0087] Figure 2 The equivalent circuit diagram of the third pixel PX3 shown in FIG. 1 is schematically illustrated, but is not limited thereto. In other embodiments of the inventive concept, the third storage capacitor Cst3 and the fourth storage capacitor Cst4 may be omitted.
[0088] Reference FIG. 3A to FIG. 3C , the display area DA may include a first pixel area PXA1 , a second pixel area PXA2 , and a third pixel area PXA3 .
[0089] Reference Figure 3A , a first pixel electrode PE1, a first transistor TR1, a portion of a first data line DL1, and a portion of an i-th gate line GLi may be disposed in the first pixel area PXA1.
[0090] The first pixel electrode PE1 includes a vertical electrode VP, a horizontal electrode HP, a first branch electrode B1, a second branch electrode B2, a third branch electrode B3 and a fourth branch electrode B4. The vertical electrode VP, the horizontal electrode HP, the first branch electrode B1, the second branch electrode B2, the third branch electrode B3 and the fourth branch electrode B4 are connected to form one first pixel electrode PE1.
[0091] The vertical electrode VP extends in the second direction DR2 , and the horizontal electrode HP extends in the first direction DR1 . Each of the first branch electrode B1 , the second branch electrode B2 , the third branch electrode B3 , and the fourth branch electrode B4 extends from the vertical electrode VP or the horizontal electrode HP. Figure 3A The configuration and shape of the first pixel electrode PE1 shown in FIG. 1 are examples, and the configuration and shape of the first pixel electrode PE1 may be changed.
[0092] Reference Figure 3B, the second pixel electrode PE2, the second transistor TR2, a portion of the second data line DL2, and a portion of the i-th gate line GLi may be disposed in the second pixel area PXA2.
[0093] The description of the second pixel area PXA2 is substantially the same as that of the first pixel area PXA1 and thus is omitted.
[0094] Reference Figure 3C , the third pixel electrode PE3, the third transistor TR3, the fourth transistor TR4, the fifth transistor TR5, a portion of the third data line DL3, and a portion of the i-th gate line GLi may be disposed in the third pixel area PXA3.
[0095] The third pixel electrode PE3 may include a first sub-pixel electrode PE31 and a second sub-pixel electrode PE32. In an embodiment of the inventive concept, an area of the second sub-pixel electrode PE32 may be greater than an area of the first sub-pixel electrode PE31.
[0096] The structure and shape of each of the first sub-pixel electrode PE31 and the second sub-pixel electrode PE32 may be the same as that of the reference Figure 3A The structure and shape of the first pixel electrode PE1 described are basically similar.
[0097] The third pixel region PXA3 may include a high grayscale region PXA3-H and a low grayscale region PXA3-L. The high grayscale region PXA3-H is defined as a region where the first sub-pixel electrode PE31 is disposed, and the low grayscale region PXA3-L is defined as a region where the second sub-pixel electrode PE32 is disposed. The high grayscale region PXA3-H corresponds to Figure 2 The first sub-pixel PX-S1 in the low grayscale area PXA3-L corresponds to Figure 2 The second sub-pixel PX-S2 in.
[0098] In this specification, the first sub-pixel electrode PE31 and the second sub-pixel electrode PE32 may be understood as different sub-pixel electrodes. In this case, it may be understood that one pixel electrode is provided in each of the first pixel region PXA1 and the second pixel region PXA2, and two pixel electrodes are provided in the third pixel region PXA3.
[0099] The grayscale of light emitted from the high-grayscale area PXA3 -H may be higher than the grayscale of light emitted from the low-grayscale area PXA3 -L.
[0100] exist Figure 4, a portion of the cross section of the first pixel PX1 is shown. Since the cross sections of the second pixel PX2 and the third pixel PX3 are substantially the same as the cross section of the first pixel PX1, in this specification, the stacked structure of the display panel DP will be described with reference to the cross section of the first pixel PX1.
[0101] like Figure 3A and Figure 4 As shown, the first transistor TR1 includes a control electrode CTE connected to an i-th gate line GLi, an active layer AL overlapping the control electrode CTE, an input electrode IE connected to a first data line DL1, and an output electrode OE disposed separately from the input electrode IE.
[0102] The first liquid crystal capacitor Clc1 may be formed by the first pixel electrode PE1 and the common electrode CE. The first storage capacitor Cst1 may be formed by the first pixel electrode PE1 and a storage line STL overlapping the first pixel electrode PE1.
[0103] The i-th gate line GLi and the storage line STL are disposed on one surface of the first substrate DS1. The control electrode CTE branches out from the i-th gate line GLi. The i-th gate line GLi and the storage line STL may include a metal (e.g., Al, Ag, Cu, Mo, Cr, Ta, Ti, etc.) or an alloy of a metal. The i-th gate line GLi and the storage line STL may have a multilayer structure, for example, may include a Ti layer and a Cu layer.
[0104] A first insulating layer 10 covering the control electrode CTE and the storage line STL is disposed on one surface of the first substrate DS1. The first insulating layer 10 may include at least one of an inorganic material and an organic material. The first insulating layer 10 may be an organic layer or an inorganic layer. The first insulating layer 10 may have a multi-layer structure, for example, may include a silicon nitride layer and a silicon oxide layer.
[0105] The active layer AL overlapping the control electrode CTE is disposed on the first insulating layer 10. The active layer AL may include a semiconductor layer (not shown) and an ohmic contact layer (not shown).
[0106] The active layer AL may include amorphous silicon, polycrystalline silicon, or a metal oxide semiconductor.
[0107] The output electrode OE and the input electrode IE are disposed on the active layer AL.
[0108] Despite Figure 4 2 shows the first transistor TR1 having a staggered structure as an example, but the structure of the first transistor TR1 is not limited thereto. The first transistor TR1 may have a planar structure.
[0109] The second insulating layer 20 covering the active layer AL, the output electrode OE, and the input electrode IE is disposed on the first insulating layer 10. The second insulating layer 20 provides a flat surface. The second insulating layer 20 may include an organic material.
[0110] The first pixel electrode PE1 is disposed on the second insulating layer 20. The first pixel electrode PE1 is connected to the output electrode OE through a first contact hole CH1 penetrating the second insulating layer 20. Figure 3B The second contact hole CH2 shown in FIG. Figure 3C The third contact hole CH3 and the fourth contact hole CH4 shown in FIG. 1 may also function as the first contact hole CH1 .
[0111] An alignment film 30 covering the first pixel electrode PE1 may be disposed on the second insulating layer 20 .
[0112] The first color filter CF1 is disposed on one surface of the second substrate DS2. The first color filter CF1 is disposed to overlap the first pixel electrode PE1. A common voltage is applied to the common electrode CE. The common voltage and the pixel voltage have different values. An orientation film (not shown) covering the common electrode CE may be disposed on the common electrode CE. Another insulating layer (not shown) may be disposed between the first color filter CF1 and the common electrode CE.
[0113] The first color filter CF1 may transmit light having a wavelength of 640 nm or more and 730 nm or less among incident light. In an embodiment of the inventive concept, the first color filter CF1 may transmit only light of a specific wavelength band among incident light, thereby generating light having a red color.
[0114] Although not shown in the drawings, the display panel DP may further include a second color filter (not shown) disposed in the second pixel area PXA2 and overlapping the second pixel electrode PE2. The second color filter may transmit light having a wavelength of 492 nm or more and 580 nm or less in the incident light. In an embodiment of the inventive concept, the second color filter may transmit only light of a specific wavelength band in the incident light, thereby generating light having a green color.
[0115] Although not shown in the drawings, the display panel DP may further include a third color filter (not shown) disposed in the third pixel area PXA3 and overlapping the third pixel electrode PE3. The third color filter may transmit light having a wavelength of 420 nm or more and 490 nm or less in the incident light. In an embodiment of the inventive concept, the third color filter may transmit only light of a specific wavelength band in the incident light, thereby generating light having a blue color.
[0116] on the other hand, Figure 4The cross section of the pixel PX1 shown in FIG is only an example. In another exemplary embodiment, at least one of the first color filter CF1 and the common electrode CE may be disposed on the first substrate DS1. That is, the liquid crystal display panel according to this embodiment of the inventive concept may include pixels in a vertical alignment (VA) mode, a patterned vertical alignment (PVA) mode, an in-plane switching (IPS) mode, a fringe field switching (FFS) mode, or a plane line switching (PLS) mode.
[0117] In having Figure 3C In the case of the layout structure of the third pixel area PXA3 shown in FIG. Figure 3A The first pixel area PXA1 and Figure 3B Compared with the layout structure of the second pixel area PXA2 shown in FIG. , the visibility characteristic or the viewing angle characteristic is improved. Figure 3C In the case of the layout structure of the third pixel area PXA3 shown in FIG. Figure 3A The first pixel area PXA1 and Figure 3B Compared with the layout structure of the second pixel region PXA2 shown in , more transistors are arranged, and thus, the transmittance of the third pixel region PXA3 becomes lower than the transmittances of the first pixel region PXA1 and the second pixel region PXA2.
[0118] That is, a ratio of light emitted from the backlight unit 500 to the first pixel area PXA1 (hereinafter referred to as a first ratio) may be substantially the same as a ratio of light emitted from the backlight unit 500 passing through the second pixel area PXA2 (hereinafter referred to as a second ratio). However, a ratio of light emitted from the backlight unit 500 to the third pixel area PXA3 (hereinafter referred to as a third ratio) may be less than the first ratio or the second ratio.
[0119] Therefore, the visibility characteristic and the viewing angle characteristic are in a trade-off relationship with the light transmittance characteristic.
[0120] When assuming that red light, green light, and blue light having the same area are emitted, the ratio of red light to the total brightness is about 15%, the ratio of green light to the total brightness is about 80%, and the ratio of blue light to the total brightness is about 5%. Therefore, when the amount of green light among red light, green light, and blue light decreases, it greatly affects the overall brightness, but when the amount of blue light decreases, it does not significantly affect the overall brightness.
[0121] Therefore, if Figure 2As shown in , the structure for improving visibility characteristics and viewing angle characteristics can be applied only to the third pixel PX3 emitting blue light, and the structure for ensuring high transmittance can be applied to the first pixel PX1 and the second pixel PX2. By combining the first pixel PX1 to the third pixel PX3, the viewing angle characteristics and visibility characteristics are improved, and a display panel DP with high transmittance can be provided.
[0122] Figure 5 An example is shown in which the first pixel area PXA1, the second pixel area PXA2, and the third pixel area PXA3 are provided. Figure 6 The exemplary embodiment shows a method for driving a Figure 5 1 and 2. The brightness control method of the display panel DP of the pixel areas PXA1 to PXA3 shown in FIG.
[0123] Reference Figure 5 , horizontal lengths of the first pixel area PXA1 , the second pixel area PXA2 , and the third pixel area PXA3 measured in the first direction DR1 may be shorter than a specific vertical length in the second direction DR2 .
[0124] The first pixel region PXA1 , the second pixel region PXA2 , and the third pixel region PXA3 may be sequentially arranged in the first direction DR1 .
[0125] Reference Figure 6 , since the third pixel region PXA3 emitting blue light B has a lower transmittance than the first pixel region PXA1 emitting red light R and the second pixel region PXA2 emitting green light G, the maximum brightness Bmaxbrightness that the blue light B can have is lower than the maximum brightness R / Gmaxbrightness that the red light R and the green light G can have. Therefore, if the brightness of light emitted from each of the first pixel region PXA1 to the third pixel region PXA3 is not adjusted, the red light R, the green light G, and the blue light B are not combined at the originally expected ratio, resulting in a problem that the desired color is not emitted.
[0126] Therefore, when the brightness of the red light R and the green light G is reduced corresponding to the maximum brightness Bmax that the blue light B can have, a desired color can be achieved by a combination of these lights.
[0127] Figure 7 An example is shown in which a first pixel region PXA1-1, a second pixel region PXA2-1, and a third pixel region PXA3-1 are provided. The third pixel region PXA3-1 includes a high grayscale region PXA3-1H and a low grayscale region PXA3-1L.
[0128] A horizontal length of the first pixel region PXA1 - 1 , the second pixel region PXA2 - 1 , and the third pixel region PXA3 - 1 measured in the first direction DR1 may be longer than a certain vertical length in the second direction DR2 .
[0129] The first pixel region PXA1 - 1 , the second pixel region PXA2 - 1 , and the third pixel region PXA3 - 1 may be sequentially arranged in the second direction DR2 .
[0130] In addition, the description of each of the first pixel area PXA1-1, the second pixel area PXA2-1, and the third pixel area PXA3-1 is substantially the same as the description of each of the first pixel area PXA1, the second pixel area PXA2, and the third pixel area PXA3 described above, and thus a description thereof will be omitted.
[0131] Figure 8 An example is shown in which a first pixel area PXA1 - 2 , a second pixel area PXA2 , and a third pixel area PXA3 are provided. Figure 8 yes Figure 5 A view in which the first pixel area PXA1 is changed into the first pixel area PXA1-2.
[0132] The first pixel area PXA1-2 may include a high-grayscale area PXA1-2H and a low-grayscale area PXA-2L.
[0133] Although the first pixel region PXA1-2 is a region emitting light having a red color, it may have a structure for improving visibility characteristics and viewing angle characteristics such as Figure 3C As described above, since the ratio of red light to the total brightness is about 15% and this ratio is smaller than the ratio of green light to the total brightness, by Figure 8 The arrangement of the pixel areas PXA1 - 2 , PXA2 , and PXA3 shown in can provide a display panel DP having good visibility characteristics and viewing angle characteristics and excellent light transmittance.
[0134] According to embodiments of the inventive concept, a liquid crystal display panel having excellent visibility characteristics and viewing angle characteristics and a liquid crystal display device including the same may be provided.
[0135] Furthermore, according to embodiments of the inventive concept, a liquid crystal display panel having excellent light transmittance at a high resolution and a liquid crystal display device including the same may be provided.
[0136] Although exemplary embodiments of the inventive concept have been described, it is understood that the inventive concept should not be limited to these exemplary embodiments, and a person skilled in the art may make various changes and modifications within the spirit and scope of the inventive concept as claimed.
Claims
1. A liquid crystal display device, comprising: A display panel comprising a liquid crystal layer, wherein a first pixel region, a second pixel region and a third pixel region are defined in the display panel; and a backlight unit configured to provide light to the display panel, wherein each of a wavelength of a first color light generated by transmitting the light through the first pixel region and a wavelength of a second color light generated by transmitting the light through the second pixel region is longer than a wavelength of a third color light generated by transmitting the light through the third pixel region, wherein a first ratio of the light passing through the first pixel region and a second ratio of the light passing through the second pixel region are greater than a third ratio of the light passing through the third pixel region, The first pixel region and the third pixel region both include a low grayscale region and a high grayscale region, and the high grayscale region is located above the low grayscale region in a plane. The area of the low grayscale region is greater than the area of the high grayscale region, and The first color light has a red color, the second color light has a green color, and the third color light has a blue color.
2. The liquid crystal display device according to claim 1, wherein: The grayscale of the light of the third color emitted from the high grayscale area is higher than the grayscale of the light of the third color emitted from the low grayscale area, and The grayscale of the light of the first color light emitted from the high grayscale region is higher than the grayscale of the light of the first color light emitted from the low grayscale region.
3. The liquid crystal display device according to claim 1, wherein: The display panel includes a plurality of transistors. wherein the number of transistors disposed in the first pixel region among the plurality of transistors is equal to the number of transistors disposed in the third pixel region among the plurality of transistors, The number of transistors in the plurality of transistors disposed in the third pixel region is greater than the number of transistors in the plurality of transistors disposed in the second pixel region.
4. The liquid crystal display device according to claim 3, wherein: The number of the transistors provided in the second pixel region is one, and the number of the transistors provided in the third pixel region is three.
5. The liquid crystal display device according to claim 1, wherein: The display panel further includes: a first color filter overlapping the first pixel region and configured to transmit light having a wavelength between 640 nm and 730 nm among the light; a second color filter overlapping the second pixel region and configured to transmit light having a wavelength between 492 nm and 580 nm among the light; and A third color filter overlaps the third pixel region and is configured to transmit light having a wavelength between 420 nm and 490 nm among the light.
6. The liquid crystal display device according to claim 1, wherein: The display panel further includes: a plurality of pixel electrodes; and a common electrode, overlapping the plurality of pixel electrodes, Wherein, the liquid crystal layer is arranged between the plurality of pixel electrodes and the common electrode.
7. The liquid crystal display device according to claim 6, wherein: The number of pixel electrodes disposed in the first pixel region among the plurality of pixel electrodes is equal to the number of pixel electrodes disposed in the third pixel region among the plurality of pixel electrodes, Among the plurality of pixel electrodes, the number of pixel electrodes arranged in the third pixel region is greater than the number of pixel electrodes arranged in the second pixel region.
8. The liquid crystal display device according to claim 7, wherein: The number of the pixel electrodes disposed in the second pixel region is one, and the number of the pixel electrodes disposed in the third pixel region is two.
9. A liquid crystal display panel, comprising: a first substrate, defining a first pixel region, a second pixel region, and a third pixel region on the first substrate; a second substrate, facing the first substrate; as well as a liquid crystal layer disposed between the first substrate and the second substrate, wherein the first color light emitted from the first pixel region has red color, the second color light emitted from the second pixel region has green color, and the third color light emitted from the third pixel region has blue color, The light transmittance of the third pixel region is smaller than the light transmittance of the first pixel region and the light transmittance of the second pixel region. Wherein, the first pixel region and the third pixel region each include a low grayscale region and a high grayscale region, the high grayscale region is located above the low grayscale region in a plane, and The area of the low grayscale region is greater than the area of the high grayscale region.
Citation Information
Patent Citations
Light-emitting element, light-emitting device, electronic device, and lighting device
KR1020180109052A
LCD Pixel Design Varying by Color
US20100207858A1
Liquid-crystal display device having paired sub-pixel electrodes
US20170261819A1