Display device and method for manufacturing the same

By filling the interior of the lower opening in the inorganic film of the display device, overlapping alignment between the upper opening and the lower opening is achieved, and the problem of difficulty in controlling the opening size caused by the reduction of pixel size is solved, and the stability and straightness of the layer are improved.

CN110957345BActive Publication Date: 2025-05-13SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN201910923756.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-09-27
Filing Date
2019-09-27
Publication Date
2025-05-13
Estimated Expiration
2039-09-27

AI Technical Summary

Technical Problem

In the process of improving resolution and density, the pixel size of existing display devices decreases, resulting in a decrease in the opening size, making it difficult to achieve the target line width, affecting the stability and straightness of the subsequent layer.

Method used

By filling the interior of the lower opening in the inorganic film of the display device, overlapping alignment of the upper opening and the lower opening is facilitated, opening size is reduced, and steps between layers are reduced by planarizing the upper surface of the inorganic film.

Benefits of technology

The pixel area is reduced, the stability and straightness of the subsequent layers are improved, and the tolerance in the process and design is ensured.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a display device and a method for manufacturing the display device. An exemplary embodiment of the present invention provides a display device including: a substrate; a semiconductor layer; a first inorganic insulating film arranged on the semiconductor layer and including a first opening; a first conductive film arranged on the first inorganic insulating film; a second inorganic insulating film arranged on the first inorganic insulating film to fill a recessed portion on the first conductive film; a second conductive film arranged on the second inorganic insulating film; a third inorganic insulating film arranged on the second conductive film and including a second opening; and a third conductive film arranged on the third inorganic insulating film and connected to the second conductive film, wherein the first opening and the second opening may overlap each other.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2018-0114880 filed in the Korean Intellectual Property Office on September 27, 2018, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The inventive concept relates to a display device and a method of manufacturing the same, and more particularly, to a display device including an opening and a method of manufacturing the same. Background Art

[0004] Currently known display devices include liquid crystal displays (LCDs), plasma display panels (PDPs), organic light emitting diode devices (OLED devices), field effect displays (FEDs), electrophoretic display devices, etc. The display device may include a substrate and a plurality of thin film layers stacked on the substrate.

[0005] Recently, as the resolution of a display panel increases, the size of one pixel is smaller, and the density of patterns forming a thin film layer increases.

[0006] The above information disclosed in this Background section is only for enhancement of understanding of the background of the inventive concept and therefore it may contain information that does not form the prior art that is already known in this country to a person of ordinary skill in the art. Summary of the invention

[0007] The present invention is conceived to provide a display device and a method for manufacturing the display device, which can promote the overlapping alignment of upper and lower openings by filling an inorganic film in the lower opening, reduce the size of the opening to reduce the area occupied by the pixel, and improve the stability and flatness of subsequent layers by reducing the steps between layers through flattening.

[0008] An exemplary embodiment of the present invention provides a display device, including: a substrate; a semiconductor layer arranged on the substrate; a first inorganic insulating film arranged on the semiconductor layer and including a first opening; a first conductive film arranged on the first inorganic insulating film, the first conductive film being arranged on the side surface and the lower surface of the first opening; a second inorganic insulating film arranged on the first inorganic insulating film, the second inorganic insulating film filling a recessed portion on the first conductive film; a second conductive film arranged on the second inorganic insulating film and connected to the first conductive film; a third inorganic insulating film arranged on the second conductive film and the second inorganic insulating film exposed by the second conductive film, the third inorganic insulating film including a second opening; and a third conductive film arranged on the third inorganic insulating film and connected to the second conductive film, wherein the first opening and the second opening overlap each other in a plan view.

[0009] The lower end portion of each of the first opening and the second opening may be narrower than the upper end portion thereof, and when the width of the lower end portion of the first opening is referred to as a first line width and the width of the lower end portion of the second opening is referred to as a second line width, the second line width may be greater than or equal to the first line width.

[0010] The first line width may be 1.3 μm or less.

[0011] The first opening and the second opening may overlap so that the center of the first line width, the center of the second conductive film, and the center of the second line width are on a straight line.

[0012] The second inorganic insulating film may be planarized so that an upper surface of the second inorganic insulating film may be in contact with an upper surface of the first conductive film formed on the first inorganic insulating film.

[0013] The second conductive film and the third conductive film may contact each other in a predetermined region within the closed edge.

[0014] Another exemplary embodiment of the present invention provides a display device, including: a substrate; a semiconductor layer arranged on the substrate; a first inorganic insulating film arranged on the semiconductor layer and including a first opening; a first conductive film arranged on the first inorganic insulating film, the first conductive film being arranged on side surfaces and a lower surface of the first opening; a second inorganic insulating film arranged on the first conductive film, the second inorganic insulating film filling a recessed portion on the first conductive film, the second inorganic insulating film including a second opening; and a second conductive film arranged on the second inorganic insulating film, the second conductive film being formed on side surfaces and a lower surface of the second opening and being connected to the first conductive film in a plan view.

[0015] The lower end portion of each of the first opening and the second opening may be narrower than the upper end portion thereof, and when the width of the lower end portion of the first opening is referred to as a first line width and the width of the lower end portion of the second opening is referred to as a second line width, the second line width may be greater than or equal to the first line width.

[0016] The first line width may be 1.3 μm or less.

[0017] The first opening and the second opening may overlap such that a center of the first line width and a center of the second line width are on a straight line.

[0018] A contact region of the first conductive film and the second conductive film has a ring shape in a plan view.

[0019] Another exemplary embodiment of the present invention provides a method for manufacturing a display device, including: forming a semiconductor layer on a substrate; forming an insulating film on the substrate and forming a first inorganic insulating film on the insulating film; forming a first opening in the first inorganic insulating film to expose the semiconductor layer; forming a first conductive film on the first inorganic insulating film and on the side surface and the lower surface of the first opening; forming a second inorganic insulating film on the first inorganic insulating film and on a recessed portion formed on the first conductive film; planarizing the second inorganic insulating film to form an isolation filling portion filling the recessed portion on the first conductive film; forming a second conductive film on the planarized second inorganic insulating film; forming a third inorganic insulating film on the second conductive film and the second inorganic insulating film exposed by the second conductive film; forming a second opening in the third inorganic insulating film to expose the second conductive film at a position overlapping with the first opening in a plan view; and forming a third conductive film, the third conductive film being arranged on the third inorganic insulating film and on the side surface and the lower surface of the second opening.

[0020] In the planarization of the second inorganic insulating film, an upper surface of the second inorganic insulating film may be planarized so that the upper surface of the second inorganic insulating film may be in contact with an upper surface of the first conductive film formed on the first inorganic insulating film.

[0021] The lower end portion of each of the first opening and the second opening is narrower than the upper end portion thereof, and when the width of the lower end portion of the first opening is referred to as a first line width and the width of the lower end portion of the second opening is referred to as a second line width, the second line width may be greater than or equal to the first line width.

[0022] The first line width may be 1.3 μm or less.

[0023] The first opening and the second opening may overlap so that the center of the first line width, the center of the second conductive film, and the center of the second line width may be on a straight line.

[0024] Another exemplary embodiment of the present invention provides a method for manufacturing a display device, including: forming a semiconductor layer on a substrate; forming an insulating film on the substrate; forming a first inorganic insulating film on the insulating film; forming a first opening in the first inorganic insulating film to expose the semiconductor layer; forming a first conductive film on the first inorganic insulating film and on the side surface and the lower surface of the first opening; forming a second inorganic insulating film on the first conductive film and on the first inorganic insulating film exposed by the first conductive film to fill a recessed portion formed on the first conductive film; partially flattening the upper surface of the second inorganic insulating film; forming a second opening, the second opening exposing the first conductive film and the second inorganic insulating film filling the recessed portion formed on the first conductive film to overlap with the first opening in a plan view; and forming a second conductive film, the second conductive film being arranged on the second inorganic insulating film and on the side surface and the lower surface of the second opening.

[0025] In the planarization of the upper surface of the second inorganic insulating film, the upper surface of the second inorganic insulating film may be planarized so that the upper surface of the second inorganic insulating film may be higher than an upper surface of the first conductive film formed on the first inorganic insulating film.

[0026] The lower end portion of each of the first opening and the second opening may be narrower than the upper end portion thereof, and when the width of the lower end portion of the first opening is referred to as a first line width and the width of the lower end portion of the second opening is referred to as a second line width, the second line width may be greater than or equal to the first line width.

[0027] The first line width may be 1.3 μm or less.

[0028] According to the display device and the method for manufacturing the display device according to the embodiment, the target line width of the upper opening can be achieved by filling the inside of the lower opening with an inorganic film, and the area occupied by the pixel can be reduced by making the upper opening and the lower opening overlap accurately. In addition, the step between layers can be reduced by making the inorganic film flat, thereby improving the stability and flatness of subsequent layers to ensure the tolerance in the process and design. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 A cross-sectional view of a display device according to an embodiment is illustrated.

[0030] Figure 2 Pictured Figure 1 A top plan view of an embodiment of the present invention.

[0031] Figures 3 to 7 The diagram is used to illustrate the manufacturing Figure 1 A cross-sectional view of a method of displaying an embodiment of a device.

[0032] Figure 8 A cross-sectional view of a display device according to an embodiment is illustrated.

[0033] Fig. 9 A cross-sectional view of a display device according to an embodiment is illustrated.

[0034] Fig.10 Pictured Fig. 9 A top plan view of an embodiment of the present invention.

[0035] Figures 11 to 14 The diagram is used to illustrate the manufacturing Figure 2 A cross-sectional view of a method of displaying an embodiment of a device.

[0036] Fig.15 A cross-sectional view of a display device according to an embodiment is illustrated.

[0037] Fig.16 Pictured Fig.15An enlarged cross-sectional view of a portion of. DETAILED DESCRIPTION

[0038] The inventive concept will be described more fully hereinafter with reference to the accompanying drawings in which exemplary embodiments of the inventive concept are shown. As those skilled in the art will appreciate, the described embodiments can be modified in various different ways, all without departing from the spirit or scope of the present disclosure.

[0039] To clearly describe the present disclosure, parts irrelevant to the description will be omitted, and the same reference numerals refer to the same elements throughout the specification.

[0040] In addition, in the drawings, the size and thickness of each element are arbitrarily illustrated for ease of description, and the present disclosure is not necessarily limited to those illustrated in the drawings. In the drawings, the thickness of layers, films, panels, regions, etc. are exaggerated for clarity. In the drawings, the thickness of some layers and regions are exaggerated for ease of description.

[0041] It will be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" another element, it can be directly on the other element, or there can be intervening elements. Conversely, when an element is referred to as being "directly" "on" another element, there are no intervening elements. In addition, in the specification, the words "on" or "above" refer to being placed on or below an object part, and do not necessarily refer to being placed on the upper side of the object part based on the direction of gravity.

[0042] In addition, unless explicitly described to the contrary, the word “comprise” and variations thereof such as “comprises” or “comprising” will be understood to imply the inclusion of stated elements but not the exclusion of any other elements.

[0043] Furthermore, throughout the specification, the phrase "on a plane" refers to observing a target portion from the top, and the phrase "on a cross section" refers to observing a cross section formed by vertically cutting the target portion from the side.

[0044] Hereinafter, exemplary embodiments of the inventive concept will be described in detail with reference to the accompanying drawings.

[0045] In the following, reference will be made to Figure 1 and Figure 2 An opening overlapping portion according to an embodiment is described. Figure 1 illustrates a cross-sectional view of a display device according to an embodiment, and Figure 2 Pictured Figure 1 A top plan view of an embodiment of the present invention.

[0046] refer to Figure 1, the display device according to the embodiment includes a substrate 100 , a semiconductor layer 110 , a gate insulating film 120 , first to third inorganic insulating films 211 , 212 , and 213 , and first to third conductive films 221 , 222 , and 223 .

[0047] A buffer layer (not shown) may be included on the insulating substrate 100 made of transparent glass or plastic, and the buffer layer may be formed when the substrate 100 is plastic.

[0048] The semiconductor layer 110 may be disposed on the substrate 100. The semiconductor layer 110 may be formed as a polycrystalline silicon (poly-Si) layer or an oxide semiconductor layer. The oxide semiconductor may be based on at least one of an oxide of titanium (Ti), hafnium (Hf), zirconium (Zr), aluminum (Al), tantalum (Ta), germanium (Ge), zinc (Zn), gallium (Ga), tin (Sn) or indium (In) and a composite oxide thereof. When the semiconductor layer 110 is formed of an oxide semiconductor, a separate protective layer (not shown) may be added to protect the oxide semiconductor that is susceptible to an external environment such as high temperature.

[0049] In addition, the semiconductor layer 110 may include a channel region, and a source region and a drain region doped with n-type impurities or p-type impurities at respective sides of the channel region.

[0050] The gate insulating film 120 may be disposed on the semiconductor layer 110. The gate insulating film 120 may include a layer such as silicon nitride (SiN x ) or silicon oxide (SiO x ). The insulating film may have a multilayer structure including at least two insulating films including different materials. The insulating film may be a gate insulating film that insulates the gate electrode from the semiconductor layer 110.

[0051] The first inorganic insulating film 211 may be arranged on the gate insulating film 120. A first opening 301 exposing a portion of the semiconductor layer 110 is formed in the gate insulating film 120 and the first inorganic insulating film 211. The lower end portion of the first opening 301 may be narrower than the upper end portion thereof. In this case, in the cross-sectional view, the width of the lower end portion of the first opening 301 is referred to as the first line width x1. That is, the first opening 301 may expose the semiconductor layer 110 by a first line width x1. The first line width x1 is a small size that can achieve a resolution limit. The first line width x1 may be less than or equal to 1.5 μm, and may be, for example, less than or equal to 1.3 μm. In some embodiments, the gate insulating film 120 and the first inorganic insulating film 211 may be formed as a single layer.

[0052] The first conductive film 221 may be disposed on an upper portion of the first inorganic insulating film 211. The first conductive film 221 may contact the semiconductor layer 110 through the first opening 301. The first conductive film 221 may be a component of a circuit for transmitting a signal for driving a pixel of the display device according to the embodiment, and may be, for example, a source electrode or a drain electrode.

[0053] In this case, the first conductive film 221 may be formed on the side and lower surfaces of the first opening 301. The first conductive film 221 may include a first portion 221a disposed on an upper portion of the first inorganic insulating film 211 and a second portion 221b disposed on the side and lower surfaces of the first opening 301.

[0054] The second inorganic insulating film 212 may be arranged on the upper portion of the first inorganic insulating film 211 and fill the recessed portion on the first conductive film 221 formed on the first opening 301. The second inorganic insulating film 212 may include a filling portion 212a that fills the recessed portion formed on the first conductive film 221. The filling portion 212a may be formed to fill the recessed portion on the first conductive film 221 formed on the first opening 301, and the second portion 221b of the first conductive film 221 is arranged in the first opening 301. In this case, the upper surface of the second inorganic insulating film 212 may be planarized by a chemical mechanical polishing (CMP) process so as to be in contact with the upper surface of the first portion 221a of the first conductive film 221. That is, since the second inorganic insulating film 212 is formed of an inorganic material, when there is no planarization process, the height of the upper surface of the second inorganic insulating film 212 is not uniform, and thus the wiring to be deposited later may not be uniformly arranged. However, when the planarization process is performed, the arrangement of the wirings becomes uniform, so the space occupied by the wirings themselves can be reduced.

[0055] The second conductive film 222 may be disposed on the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221. The second conductive film 222 may be formed to cover the filling portion 212a of the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221. Unlike the first conductive film 221, the second conductive film 222 may have a uniform height without a step. This is because the upper surface of the second inorganic insulating film 212 is planarized.

[0056] The third inorganic insulating film 213 may be arranged on the second inorganic insulating film 212 and the second conductive film 222 exposed by the second conductive film 222. A second opening 302 exposing a portion of the second conductive film 222 is formed in the third inorganic insulating film 213. As with the first opening 301, the lower end portion of the second opening 302 may be narrower than the upper end portion thereof. In this case, in the cross-sectional view, the width of the lower end portion of the second opening 302 is referred to as the second line width x2. That is, the second opening 302 may expose the second conductive film 222 to a second line width x2. The second line width x2 may be greater than or equal to the first line width x1, which is the target line width of the second opening 302. The second line width x2 may be less than or equal to 1.5 μm, and may be, for example, less than or equal to 1.3 μm.

[0057] In this case, the upper surface of the third inorganic insulating film 213 may also be planarized by the planarization process, so that the interlayer step may be reduced.

[0058] The third conductive film 223 may be disposed on the third inorganic insulating film 213. The third conductive film 223 may contact the second conductive film 222 through the second opening 302. The third conductive film 223 may be a component of a circuit for transmitting a signal for driving a pixel of the display device according to the embodiment, and may be, for example, a data line or a data electrode for transmitting a data signal.

[0059] In this case, the third conductive film 223 may be formed on the side and lower surfaces of the second opening 302. The third conductive film 223 may include a third portion 223a disposed on the upper portion of the third inorganic insulating film 213 and a fourth portion 223b disposed on the side and lower surfaces of the second opening 302.

[0060] According to the present embodiment, the first opening 301 and the second opening 302 may overlap each other vertically, and the second conductive film 222 is arranged between the first opening 301 and the second opening 302. In this case, the first conductive film 221 and the third conductive film 223 are respectively formed on the side surface and the lower surface of each of the first opening 301 and the second opening 302. That is, the third conductive film 223 may be electrically connected to the semiconductor layer 110 in contact with the first conductive film 221 through the second conductive film 222.

[0061] The first to third inorganic insulating films 211, 212, and 213 may include, for example, silicon nitride (SiN x ) or silicon oxide (SiO x ) of inorganic insulating materials.

[0062] When the interior of the opening is filled with an organic film instead of an inorganic film, it is difficult to fill the surface neatly like an inorganic film because the organic film has fluidity. In addition, it is difficult to control the height of the organic layer in the process of forming the organic layer, so it is not easy to flatten it. Therefore, in the concept of the present invention, the interior of the opening (the first opening 301 in this embodiment) arranged at the lower part is filled with an inorganic film, so that the upper opening can be formed into a smaller size.

[0063] refer to Figure 2 , showing a first contact surface 311 between the first to third conductive films 221 , 222 , and 223 .

[0064] The third conductive film 223 may contact the second conductive film 222 disposed below the third conductive film 223 in an area contact manner, wherein the third conductive film 223 and the second conductive film 222 contact each other in a predetermined area of ​​the entire inner portion of the closed edge. Figure 2 As disclosed in FIG. 2 , since the circumference of the third conductive film 223 forming the first contact surface 311 coincides with the circumference of the first conductive film 221 forming the first contact surface 311, it is shown that the first opening 301 and the second opening 302 completely overlap each other. However, the circumference of the third conductive film 223 forming the first contact surface 311 may be greater than the circumference of the first conductive film 221. In the present embodiment, the first contact surface 311 is shown as a circle, but the inventive concept is not limited thereto.

[0065] Although not shown, the display device according to the present embodiment may further include a passivation film, a partition wall, and an organic light emitting diode (OLED) stacked on the third conductive film 223 .

[0066] In the following, reference will be made to Figures 3 to 7 as well as Figure 1 The method of manufacturing the display device according to the embodiment is described in sequence. Figures 3 to 7 The diagram is used to illustrate the manufacturing Figure 1 A cross-sectional view of a method of displaying an embodiment of a device.

[0067] refer to Figure 3 , the substrate 100 may be prepared, and a buffer layer (not shown) may be formed. The semiconductor layer 110 is formed on the substrate 100 , and then the gate insulating film 120 and the first inorganic insulating film 211 are sequentially formed on the semiconductor layer 110 .

[0068] The first opening 301 is formed by performing an etching process using a pattern mask to penetrate the gate insulating film 120 and the first inorganic insulating film 211 and expose a portion of the semiconductor layer 110. The lower end portion of the first opening 301 may be narrower than the upper end portion thereof. When the width of the lower end portion of the first opening 301 in the cross-sectional view is the first line width x1, the lower end portion of the first opening 301 may be formed so that the first line width x1 may be 1.5 μm or less.

[0069] Next, the first conductive film 221 is formed on the upper surface of the first inorganic insulating film 211 and the side and lower surfaces of the first opening 301. The first conductive film 221 includes a first portion 221a disposed on the upper portion of the first inorganic insulating film 211 and a second portion 221b disposed on the side and lower surfaces of the first opening 301. The first conductive film 221 may be directly connected to the semiconductor layer 110 through the first opening 301.

[0070] refer to Figure 4 , a second inorganic insulating film 212p is formed on the first inorganic insulating film 211 and the first conductive film 221. The second inorganic insulating film 212p is formed to fill the concave portion formed on the first conductive film 221. In this case, a step may be formed in the second inorganic insulating film 212p due to the concave portion formed on the first conductive film 221.

[0071] refer to Figure 5 , Figure 4 The second inorganic insulating film 212p formed in the first conductive film 221 is planarized by a planarization process to complete the second inorganic insulating film 212 including the filling portion 212a. The filling portion 212a is a portion that fills the recessed portion formed on the first conductive film 221. That is, when a planarization process such as a chemical mechanical polishing (CMP) process is performed using the first conductive film 221 as an etch barrier, the filling portion 212a having the same height as the first conductive film 221 is formed. That is, as a result of the planarization, the second inorganic insulating film 212 may be formed so that the upper surface of the first portion 221a of the first conductive film 221 and the upper surface of the second inorganic insulating film 212 are in contact with each other. The filling portion 212a is formed of the same material as the second inorganic insulating film 212.

[0072] refer to Figure 6 The second conductive film 222 is formed on the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221. The second conductive film 222 may be formed to cover the filling portion 212a of the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221.

[0073] Since the upper surface of the second inorganic insulating film 212 is planarized, the second conductive film 222 may have a constant height without a step, unlike the first conductive film 221 .

[0074] exist Figure 6 In the cross-sectional view of , the second conductive film 222 may be formed so that the center of the second conductive film 222 and the center of the first line width x1 of the first opening 301 may be on a straight line l.

[0075] refer to Figure 7 , the third inorganic insulating film 213 may be formed to cover the second inorganic insulating film 212 and the second conductive film 222. Next, the second opening 302 is formed to penetrate the third inorganic insulating film 213 and expose a portion of the second conductive film 222 by an etching process using a pattern mask. The pattern mask used to form the second opening 302 may be the same mask as the pattern mask used to form the first opening 301. The lower end portion of the second opening 302 may be narrower than the upper end portion thereof.

[0076] In this case, when the width of the lower end portion of the second opening 302 in the cross-sectional view is the second line width x2, the lower end portion of the second opening 302 may be formed so that the second line width x2 may be 1.5 μm or less. The second line width x2 may be equal to or greater than the first line width x1.

[0077] In addition, the center of the first line width x1, the center of the second conductive film 222, and the center of the second line width x2 may be formed on the straight line 1. That is, the lower opening and the upper opening (as the first opening 301 and the second opening 302 in this embodiment) may be formed to accurately and vertically overlap each other.

[0078] Next, refer to Figure 1 , the third conductive film 223 is formed on the side surface and the lower surface of the second opening 302 on the third inorganic insulating film 213. The third conductive film 223 includes a third portion 223a arranged on the upper portion of the third inorganic insulating film 213 and a fourth portion 223b arranged on the side surface and the lower surface of the second opening 302. The third conductive film 223 may be directly connected to the second conductive film 222 through the second opening 302 to be electrically connected to the semiconductor layer 110 contacting the first conductive film 221 through the second conductive film 222.

[0079] On the other hand, by planarizing the upper surface of the third inorganic insulating film 213 through a planarization process, it is possible to promote overlap between the above-mentioned openings by reducing interlayer steps and ensure stability of patterns of subsequent layers and stability of light passing through the substrate 100 .

[0080] In the following, reference will be made to Figure 8 A display device according to the embodiment is described. Figure 8 Illustration of the application Figure 1 A cross-sectional view of a display device of an embodiment.

[0081] exist Figure 8 In the embodiment of FIG. 1 , since the second gate insulating film 122, the first gate electrode 131, the storage electrode 132, and the second storage electrode 224 are added, there is a difference in forming the lower portion of the first opening 301. Figure 1 Features of different features and added to Figure 1 The same components as those in the above-described embodiment and the same elements and methods as those in the above-described embodiment will have the same reference numerals.

[0082] refer to Figure 8 The display device according to the embodiment includes a substrate 100 , first and second gate insulating films 121 and 122 , a semiconductor layer 110 , first to third inorganic insulating films 211 , 212 and 213 , and first to fourth conductive films 221 , 222 , 223 and 224 .

[0083] The semiconductor layer 110 may be disposed on the insulating substrate 100. Although not shown, the semiconductor layer 110 may include a channel region and source and drain regions at respective sides of the channel region.

[0084] The first gate insulating film 121 may be disposed on the semiconductor layer 110, and the first gate electrode 131 may be disposed on the first gate insulating film 121. The first gate electrode 131 may overlap a channel region of the semiconductor layer 110.

[0085] The second gate insulating film 122 for protecting the first gate electrode 131 may be disposed on the first gate electrode 131 .

[0086] The storage electrode 132 may be disposed on the second gate insulating film 122. The storage electrode 132 may be electrically insulated from the first gate electrode 131 by the second gate insulating film 122 interposed therebetween.

[0087] The first inorganic insulating film 211 may be disposed on the storage electrode 132 .

[0088] The first opening 301 is formed in the first gate insulating film 121, the second gate insulating film 122, and the first inorganic insulating film 211 to expose a portion of the semiconductor layer 110. Since the first opening 301 has a first line width x1 at a lower end portion, the first opening 301 may expose the semiconductor layer 110 by the first line width x1. The first line width x1 may be less than or equal to 1.5 μm, and may be, for example, less than or equal to 1.3 μm.

[0089] In addition, the 1a-th opening 301a penetrating the second gate insulating film 122 and the first inorganic insulating film 211 may be formed simultaneously when the first opening 301 is formed. In this case, the 1a-th opening 301a may expose a portion of the first gate electrode 131 at a lower end portion.

[0090] However, the parts exposed by the first opening 301 and the 1a-th opening 301 a are not limited to the semiconductor layer 110 or the first gate electrode 131 .

[0091] The first conductive film 221 may be disposed on an upper portion of the first inorganic insulating film 211. The first conductive film 221 may be formed on side surfaces and a lower surface of the first opening 301 and the 1a-th opening 301a. The first conductive film 221 may include a first portion 221a disposed on an upper portion of the first inorganic insulating film 211 and a second portion 221b disposed on side surfaces and a lower surface of the first opening 301 and the 1a-th opening 301a.

[0092] The second inorganic insulating film 212 may be disposed on an upper portion of the first inorganic insulating film 211 and a recessed portion of the first conductive film 221. The second inorganic insulating film 212 may include a filling portion 212a filling the recessed portion of the first conductive film 221. The filling portion 212a may be formed to fill the recessed portions of the first opening 301 and the 1a-th opening 301a, and the second portion 221b of the first conductive film 221 is disposed in the first opening 301 and the 1a-th opening 301a.

[0093] In this case, the upper surface of the second inorganic insulating film 212 may be planarized through a planarization process so as to be in contact with the upper surface of the first portion 221 a of the first conductive film 221 .

[0094] The second conductive film 222 may be disposed on the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221. The second conductive film 222 may be formed to cover the filling portion 212a of the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221. In this case, since the upper surface of the second inorganic insulating film 212 is planarized, the second conductive film 222 may have a uniform height without a step, unlike the first conductive film 221.

[0095] On the other hand, the second storage electrode 224 may be disposed on the second inorganic insulating film 212. The second storage electrode 224 may be a component of a circuit for transmitting a signal for driving a pixel of the display device according to the embodiment, and may be, for example, a data line or a data electrode for transmitting a data signal.

[0096] The third inorganic insulating film 213 may be disposed on the second conductive film 222, the second inorganic insulating film 212 exposed by the second conductive film 222, and the second storage electrode 224. A second opening 302 exposing a portion of the second conductive film 222 is formed in the third inorganic insulating film 213. Since the second opening 302 has a second line width x2 at a lower end portion, the second opening 302 may expose the second conductive film 222 by a second line width x2. The second line width x2 may be less than or equal to 1.5 μm, and may be, for example, less than or equal to 1.3 μm.

[0097] In this case, the upper surface of the third inorganic insulating film 213 may be planarized through a planarization process, so an interlayer step may be reduced.

[0098] The third conductive film 223 may be disposed on the planarized third inorganic insulating film 213 . The third conductive film 223 may contact the second conductive film 222 through the second opening 302 .

[0099] In this case, the third conductive film 223 may be formed on the side and lower surfaces of the second opening 302. The third conductive film 223 may include a third portion 223a disposed on the upper portion of the third inorganic insulating film 213 and a fourth portion 223b disposed on the side and lower surfaces of the second opening 302.

[0100] According to the present embodiment, the first opening 301 and the second opening 302 may overlap each other vertically, and the second conductive film 222 is arranged between the first opening 301 and the second opening 302. In this case, the first conductive film 221 and the third conductive film 223 are respectively formed on the side surface and the lower surface of each of the first opening 301 and the second opening 302. That is, the third conductive film 223 may be electrically connected to the semiconductor layer 110 in contact with the first conductive film 221 through the second conductive film 222.

[0101] Alternatively, the third conductive film 223 may be electrically connected to the first gate electrode 131 contacting the first conductive film 221 through the second conductive film 222 .

[0102] Although not shown, the display device according to the present embodiment may further include a passivation film, a partition wall, and an organic light emitting diode (OLED) stacked on the third conductive film 223 .

[0103] The alignment of various patterns stacked vertically in the process of forming the pattern of the display device is important. In particular, in order to increase the resolution, the density of the pattern in the predetermined area is increased, resulting in a reduction in the size of each pixel. In this case, it is necessary that the openings with the target line width for achieving the resolution limit are formed to overlap each other. However, when the openings of small size overlap each other, it may be difficult to achieve the target line width.

[0104] In an embodiment of the present inventive concept, the second inorganic insulating film 212 fills the inside of the first opening 301 so that the second conductive film 222 and the second opening 302 can easily overlap on the first opening 301. Compared with a structure in which the openings do not overlap each other, when the first opening 301 and the second opening 302 are formed to overlap each other, the aperture ratio can be improved by minimizing the non-opening area where the image is not displayed due to the opening. Therefore, a high-resolution display device with a relatively small size of one pixel can be realized.

[0105] Specifically, the center of the second conductive film 222 and the center of the first line width x1 can be aligned on a straight line. Therefore, the second opening 302 formed on the second conductive film 222 can also be aligned so that the center of the second line width x2 and the center of the first line width x1 can be aligned on a straight line. That is, the alignment of the overlapping openings can be facilitated when forming a pattern on the substrate 100, and further, the third conductive film 223 can be stably formed on the side surface and the lower surface of the second opening 302.

[0106] In addition, since the first line width x1 of the first opening 301 is less than or equal to the second line width x2 of the second opening 302 and the first and second line widths x1 and x2 may be 1.3 μm or less for achieving a resolution limit, a non-opening area where an image is not displayed due to the opening can be minimized.

[0107] On the other hand, since the second inorganic insulating film 212 not only fills the inside of the first opening 301 but also is planarized to reduce the interlayer step, the second conductive film 222 can be formed flatly on the second inorganic insulating film 212 and the first conductive film 221, compared with a structure that is not planarized. Therefore, it is possible to ensure that the third conductive film 223 contacts the region of the second conductive film 222 through the second opening 302 overlapping the first opening 301. That is, the area of ​​the first contact surface 311 can be widened, thereby effectively transmitting a signal.

[0108] In addition, by reducing interlayer steps through the planarization process, when multiple thin film layers overlap each other in a high-resolution display device, the stability of the pattern of the subsequent layer and the uniformity of the process distribution can be improved, and the straightness of light passing through the substrate 100 can be improved.

[0109] In the following, reference will be made to Fig. 9 and Fig.10 An opening overlapping portion according to an embodiment is described. Fig. 9 illustrates a cross-sectional view of a display device according to an embodiment, and Fig.10 Pictured Fig. 9 A top plan view of an embodiment of the present invention.

[0110] In the following, the features different from the above-described embodiment will be mainly described, and the features not described follow the above-described exemplary embodiment. For better understanding and ease of description, the same elements and methods as in the above-described embodiment will have the same reference numerals.

[0111] refer to Fig. 9 , the display device according to the embodiment includes a substrate 100 , a semiconductor layer 110 , a gate insulating film 120 , a first inorganic insulating film 211 , a second inorganic insulating film 212 ′, a first conductive film 221 , and a second conductive film 222 ′.

[0112] The semiconductor layer 110 may be disposed on the insulating substrate 100 . The gate insulating film 120 may be disposed on the semiconductor layer 110 , and the first inorganic insulating film 211 may be disposed on the gate insulating film 120 .

[0113] A first opening 301 exposing a portion of the semiconductor layer 110 is formed in the gate insulating film 120 and the first inorganic insulating film 211. The lower end portion of the first opening 301 may be narrower than the upper end portion thereof, and the width of the lower end portion is referred to as a first line width x1. That is, the first opening 301 may expose the semiconductor layer 110 by a first line width x1. The first line width x1 may be a fine size capable of achieving a resolution limit, and may be 1.5 μm or less, for example, 1.3 μm or less. In some embodiments, the gate insulating film 120 and the first inorganic insulating film 211 may be formed as a single layer.

[0114] The first conductive film 221 may be disposed on an upper portion of the first inorganic insulating film 211. The first conductive film 221 may contact the semiconductor layer 110 through the first opening 301. In this case, the first conductive film 221 may be formed on the side surface and the lower surface of the first opening 301. The first conductive film 221 includes a first portion 221a disposed on an upper portion of the first inorganic insulating film 211, a second portion 221b disposed on the side surface and the lower surface of the first opening 301, and a third portion 221c as a connection portion connecting the first portion 221a and the second portion 221b.

[0115] The second inorganic insulating film 212' may be arranged on the first conductive film 221, and on the first inorganic insulating film 211 exposed by the first conductive film 221 and the recessed portion of the first conductive film 221. The second inorganic insulating film 212' may include a filling portion 212a' that fills the recessed portion of the first conductive film 221. The filling portion 212a' may be formed to fill the recessed portion of the first conductive film 221. In this case, the upper surface of the second inorganic insulating film 212' and the upper surface of the filling portion 212a' may be planarized by a planarization process. That is, since the second inorganic insulating film 212' is formed of an inorganic material, when there is no planarization process, the height of the upper surface of the second inorganic insulating film 212' is not uniform, so the wiring to be deposited thereafter may not be uniformly arranged. However, when the planarization process is performed, the arrangement of the wiring becomes uniform, so the space occupied by the wiring itself can be reduced.

[0116] A second opening 302' exposing the third portion 221c of the first conductive film 221 is formed in the second inorganic insulating film 212'. Like the first opening 301, the lower end portion of the second opening 302' may be narrower than the upper end portion thereof, and the width of the lower end portion is referred to as a second line width x2'. The second line width x2' may be greater than or equal to the first line width x1, which is a target line width of the second opening 302'. The second line width x2' may be less than or equal to 1.5 μm, and may be, for example, less than or equal to 1.3 μm.

[0117] The second conductive film 222' may be disposed on the second inorganic insulating film 212'. The second conductive film 222' may be formed to cover the filling portion 212a' of the second inorganic insulating film 212' and to contact the third portion 221c of the first conductive film 221. The second conductive film 222' may contact the first conductive film 221 through the second opening 302'. In this case, in the process of forming the second opening 302' to expose the third portion 221c of the first conductive film 221, since the second inorganic insulating film 212' is planarized to reduce the step, the inorganic insulating films 211 and 212' around the third portion 221c may be prevented from being damaged.

[0118] The second conductive film 222 ′ may be a component of a circuit for transmitting a signal for driving a pixel of the display device according to the embodiment, and may be, for example, a data line or a data electrode for transmitting a data signal.

[0119] In this case, the second conductive film 222' may be formed on the side and lower surfaces of the second opening 302'. The second conductive film 222' may include a fifth portion 222a' disposed on the upper portion of the second inorganic insulating film 212' and a sixth portion 222b' disposed on the side and lower surfaces of the second opening 302'.

[0120] According to the present embodiment, the first opening 301 and the second opening 302' may overlap vertically. In this case, the first conductive film 221 and the second conductive film 222' are formed on the side surface and the lower surface of each of the first opening 301 and the second opening 302'. That is, the second conductive film 222' may be electrically connected to the semiconductor layer 110 contacting the first conductive film 221 by contacting a portion (the third portion 221c in the present embodiment) of the first conductive film 221 via the second opening 302'.

[0121] refer to Fig.10 , the second contact surface 312 is shown between the first conductive film 221, the second conductive film 222' and the filling portion 212a' of the second inorganic insulating film 212'.

[0122] The second conductive film 222' can be in annular contact with the first conductive film 221 arranged below the second conductive film 222', and only contact with the edge portion of the predetermined area. Specifically, it is shown that in a state where the first conductive film 221 is arranged, the circumference of the first opening 301 and the circumference of the second opening 302' are consistent with each other, so that the first opening 301 and the second opening 302' completely overlap vertically. The circumference of the filling portion 212a' of the second inorganic insulating film 212' can be arranged inside the circumference of the opening. Therefore, the second conductive film 222' and the first conductive film 221 can be in annular contact through an area other than the area occupied by the filling portion 212a'.

[0123] In the present embodiment, the second contact surface 312 between the first conductive film 221 and the second conductive film 222 ′ is shown as a circle, but the inventive concept is not limited thereto.

[0124] Although not shown, the display device according to the present embodiment may further include a passivation film, a partition wall, and an organic light emitting diode stacked on the second conductive film 222 ′.

[0125] In the following, the Figure 1 Examples and Fig. 9 Comparison of embodiments.

[0126] First, in Figure 1 In the embodiment, the second inorganic insulating film 212 filling the first opening 301 and the third inorganic insulating film 213 penetrated by the second opening 302 may be formed of different layers. That is, the third inorganic insulating film 213 may be made of a material different from that of the second inorganic insulating film 212. However, the third inorganic insulating film 213 may be made of the same material as the first inorganic insulating film 211.

[0127] On the contrary, Fig. 9In the embodiment, the inorganic insulating film 212 a ′ filling the first opening 301 and the inorganic insulating film 212 ′ penetrated by the second opening 302 ′ may be formed of the same layer as the second inorganic insulating film 212 ′.

[0128] In addition, according to Figure 1 In the embodiment of the present invention, the second conductive film 222 is additionally arranged between the first conductive film 221 and the third conductive film 223. The second conductive film 222 may be arranged on the inorganic film that evenly fills the first opening 301 at the lower portion, thereby facilitating alignment of the upper opening and the lower opening and superposition of patterns more than when the second conductive film 222 does not exist.

[0129] That is, when a plurality of thin film layer patterns are formed on the substrate 100, the contact area may be reduced due to misalignment of the mask. In this case, an area contact is made instead of a ring contact. Figure 1 Embodiments of may be advantageous.

[0130] In the following, reference will be made to Figure 3 , Figure 4 , Figures 11 to 14 as well as Fig. 9 The method of manufacturing the display device according to the embodiment is described in sequence. Figures 11 to 14 The diagram is used to illustrate the manufacturing Fig. 9 A cross-sectional view of a method of displaying an embodiment of a device.

[0131] In the following, the above Figures 3 to 7 The different features of the embodiment of the present invention are described in detail, and the features not described follow the above exemplary embodiments. For better understanding and ease of description, the same elements and methods as in the above embodiments will have the same reference numerals.

[0132] Can be used with Figure 3 and Figure 4 The contents of the examples are applied in the same way Fig.11 of previous process.

[0133] refer to Fig.11 , Figure 4 The second inorganic insulating film 212p formed in the above embodiment can be planarized by a planarization process to form a second inorganic insulating film 212' having a reduced step. Figure 5 Unlike the embodiment of the present invention, the second inorganic insulating film 212p may be planarized so that some of the second inorganic insulating film 212p remains on the first portion 221a of the first conductive film 221. However, the second inorganic insulating film 212' may be formed so that the upper surface of the first portion 221a of the first conductive film 221 and the upper surface of the second inorganic insulating film 212' are in contact with each other.

[0134] The second inorganic insulating film 212' is planarized to reduce the step, thereby preventing the inorganic insulating films 211 and 212' from being damaged in the process of forming the second opening 302' to expose the Fig.13 The third portion 221c of the first conductive film 221 in FIG.

[0135] refer to Fig.12 , a photoresist (PR) may be coated on the second inorganic insulating film 212'. The PR may be exposed and developed to form a PR pattern for the second opening 302'.

[0136] In this case, the photoresist PR may be positive in which an exposed portion is removed by a developer, or may be negative in which an unexposed portion is removed by a developer. Hereinafter, a positive photoresist will be exemplarily described.

[0137] refer to Fig.13 , after forming the PR pattern, a second opening 302' is formed by etching the second inorganic insulating film 212' exposed by the PR pattern to expose the third portion 221c of the first conductive film 221. The lower end portion of the second opening 302' may be narrower than the upper end portion thereof. In this case, in the process of forming the second opening 302', the second inorganic insulating film 212' including the filling portion 212a' is completed. The filling portion 212a' is a recessed portion formed on the first conductive film 221 and is filled with the second inorganic insulating film 212'. As a result of forming the second opening 302', the upper surface of the filling portion 212a' may be connected to the upper surface of the first inorganic insulating film 211. The filling portion 212a' is made of the same material as the second inorganic insulating film 212'.

[0138] In this case, when the width of the lower end portion of the second opening 302' in the cross-sectional view is the second line width x2', the lower end portion of the second opening 302' may be formed so that the second line width x2' may be 1.5 μm or less. The second line width x2' may be greater than or equal to the first line width x1 of the first opening 301.

[0139] The center of the first line width x1 and the center of the second line width x2' may be formed on the straight line 1. That is, the upper opening and the lower opening (the first opening 301 and the second opening 302' in this embodiment) may be formed to precisely and vertically overlap each other.

[0140] Next, refer to Fig. 9, the second conductive film 222' is formed on the side surface and the lower surface of the second opening 302' on the second inorganic insulating film 212'. The second conductive film 222' includes a fifth portion 222a' arranged on the upper portion of the second inorganic insulating film 212' and a sixth portion 222b' arranged on the side surface and the lower surface of the second opening 302'. The second conductive film 222' may be directly connected to the third portion 221c of the first conductive film 221 through the second opening 302' to be electrically connected to the semiconductor layer 110 in contact with the first conductive film 221.

[0141] On the other hand, by planarizing the upper surface of the second inorganic insulating film 212 ′ through a planarization process, it is possible to promote overlap between the openings by reducing interlayer steps and ensure stability of patterns of subsequent layers and stability of light passing through the substrate 100 .

[0142] In the following, reference will be made to Fig.14 A display device according to the embodiment is described. Fig.14 Illustration of the application Fig. 9 A cross-sectional view of a display device of an embodiment.

[0143] exist Fig.14 In the embodiment, instead of Figure 8 In the embodiment of Figure 1 The opening overlaps, apply Fig. 9 The opening overlaps the portion, and therefore, the undescribed features follow the above-described embodiments, and the same elements and methods as the above-described embodiments will have the same reference numerals.

[0144] refer to Fig.14 The display device according to the embodiment includes a substrate 100, first and second gate insulating films 121 and 122, a semiconductor layer 110, first, second and third inorganic insulating films 211, 212' and 213, first and second conductive films 221 and 222', and a second storage electrode 224.

[0145] The second inorganic insulating film 212' may be disposed on an upper portion of the first inorganic insulating film 211 and the first conductive film 221. The second inorganic insulating film 212' may include a filling portion 212a' filling a recessed portion on the first conductive film 221. The filling portion 212a' may be formed to fill the recessed portion on the second portion 221b of the first conductive film 221.

[0146] In this case, the upper surface of the second inorganic insulating film 212 ′ may be planarized through a planarization process to reduce the step.

[0147] The second storage electrode 224 may be disposed on the second inorganic insulating film 212 ′. The third inorganic insulating film 213 may be disposed on the second inorganic insulating film 212 ′ on which the second storage electrode 224 is disposed.

[0148] The second opening 302' is formed in the second inorganic insulating film 212' and the third inorganic insulating film 213 to expose a portion (third portion 221c) of the first conductive film 221. Since the second opening 302' has a second line width x2' at the lower end portion, the second opening 302' can expose the first conductive film 221 by the second line width x2'. In this case, the second line width x2' may be less than or equal to 1.5 μm, and may be, for example, less than or equal to 1.3 μm.

[0149] In addition, a second opening 302 ′ for exposing a portion of the first conductive film 221 is formed in the third inorganic insulating film 213 .

[0150] In this case, the upper surface of the third inorganic insulating film 213 may be planarized through a planarization process, so an interlayer step may be reduced.

[0151] The second conductive film 222' may be disposed on the planarized third inorganic insulating film 213. The second conductive film 222' may contact the first conductive film 221 through the second opening 302'. In this case, the second conductive film 222' may be formed on the side surface and the lower surface of the second opening 302'. The second conductive film 222' may include a fifth portion 222a' disposed on the upper portion of the third inorganic insulating film 213 and a sixth portion 222b' disposed on the side surface and the lower surface of the second opening 302'.

[0152] According to the present embodiment, the first opening 301 and the second opening 302' may overlap vertically. In this case, the first conductive film 221 and the second conductive film 222' are formed on the side surface and the lower surface of each of the first opening 301 and the second opening 302'. That is, the second conductive film 222' may be electrically connected to the semiconductor layer 110 or the first gate electrode 131 in contact with the first conductive film 221 through the second opening 302' contacting the third portion 221c of the first conductive film 221.

[0153] Although not shown, the display device according to the present embodiment may further include a passivation film, a partition wall, and an organic light emitting diode stacked on the second conductive film 222 ′.

[0154] In the following, reference will be made to Fig.15 and Fig.16 A display device according to the embodiment is described. Fig.15 illustrates a cross-sectional view of a display device according to an embodiment, and Fig.16 Pictured Fig.15 An enlarged cross-sectional view of a portion of.

[0155] Fig.15 Illustration of the application Figure 1 A cross-sectional view of a display device of an embodiment of the present invention. Figure 8 compared to, Fig.15 The embodiment further includes second semiconductor layers 112 a and 112 b , second gate electrodes 133 a and 133 b , a fourth conductive film 225 , a third gate insulating film 123 , a fourth gate insulating film 124 , a passivation film 180 , and partition walls 350 .

[0156] In the following, we will mainly describe Figure 1 and Figure 8 Features of different features and added to Figure 1 and Figure 8 Elements not described follow the above-described embodiments, and the same elements and methods as those of the above-described embodiments will have the same reference numerals.

[0157] refer to Fig.15 The display device according to the embodiment may include a substrate 100, first to fourth gate insulating films 121, 122, 123 and 124, a first semiconductor layer 111 and a second semiconductor layer 112, first to third insulating films 211, 212 and 213, first to fourth conductive films 221, 222, 223 and 225, a passivation film 180 and a partition wall 350.

[0158] The first semiconductor layer 111 is disposed on the insulating substrate 100. The first semiconductor layer 111 may include a channel region 111c and a source region 111s and a drain region 111d, the channel region 111c being located between the source region 111s and the drain region 111d. The first semiconductor layer 111 may be formed of a polycrystalline semiconductor, and a portion of the first semiconductor layer 111 may be doped to form a conductive source region 111s and a drain region 111d.

[0159] The first gate insulating film 121 may be disposed on the first semiconductor layer 111, and a gate line (not shown) including the first gate electrode 131 may extend in one direction on the first gate insulating film 121. The first gate electrode 131 overlaps the channel region 111c of the first semiconductor layer 111. Fig.15 The first semiconductor layer 111 and the first gate electrode 131 shown may form a driving transistor of a pixel. Fig.15 In the embodiment, each of the source region 111s and the drain region 111d of the first semiconductor layer 111 has a structure connected to another layer through a deep contact hole. In addition, according to the embodiment, the terminal to which the driving transistor is connected may be variously changed.

[0160] The second gate insulating film 122 for protecting the first gate electrode 131 may be disposed on the first gate electrode 131. The storage electrode 132 may be disposed on the second gate insulating film 122. In this case, the storage electrode 132 may be formed with a step corresponding to the stack of a plurality of thin film layers. Fig.15 In the embodiment of FIG. 1 , the storage electrode 132 may receive a voltage from the outside through the contact hole, and the voltage may be a driving voltage.

[0161] The first inorganic insulating film 211 may be disposed on the storage electrode 132 .

[0162] A plurality of openings may be formed in the first inorganic insulating film 211. The plurality of openings may include, for example, a third opening 303 that penetrates the first gate insulating film 121, the second gate insulating film 122, and the first inorganic insulating film 211 and exposes a portion of the first semiconductor layer 111. In addition, an opening that penetrates the second gate insulating film 122 and the first inorganic insulating film 211 and exposes a portion of the first gate electrode 131, or an opening that penetrates only the first inorganic insulating film 211 and exposes a portion of the storage electrode 132 may be further included.

[0163] The fourth conductive film 225 may be disposed on an upper portion of the first inorganic insulating film 211. The fourth conductive film 225 may be formed on side surfaces and a lower surface of the third opening 303. The fourth conductive film 225 may be formed to be wider than the third opening 303, and may include a portion disposed on an upper portion of the first inorganic insulating film 211 and a portion disposed on side surfaces and a lower surface of the third opening 303.

[0164] The buffer layer 140 may be disposed on an upper portion of the first inorganic insulating film 211 and the fourth conductive film 225. The second semiconductor layer 112 is disposed on the buffer layer 140.

[0165] exist Fig.15 , the second semiconductor layer 112 is divided into two parts, and the two parts are a second semiconductor layer 112a for a second transistor and a second semiconductor layer 112b for a third transistor. The second semiconductor layer 112a for the second transistor includes a channel region 112ac, a source region 112as, and a drain region 112ad of the second transistor, and the second semiconductor layer 112b for the third transistor includes a channel region 112bc, a source region 112bs, and a drain region 112bd of the third transistor.

[0166] The third gate insulating film 123 may be disposed on the second semiconductor layer 112. A plurality of openings may be formed in the third gate insulating film 123. The plurality of openings may include, for example, a first opening 301 penetrating the third gate insulating film 123 and the buffer layer 140 and contacting the fourth conductive film 225.

[0167] The first conductive film 221 and the second gate electrode 133 may be disposed on the third gate insulating film 123 .

[0168] The first conductive film 221 may be formed on side and lower surfaces of the first opening 301. The first conductive film 221 may include a portion disposed on an upper portion of the third gate insulating film 123 and portions disposed on side and lower surfaces of the first opening 301.

[0169] The second gate electrode 133 includes a second gate electrode 133a for the second transistor and a second gate electrode 133b for the third transistor. The second gate electrode 133a for the second transistor and the second semiconductor layer 112a for the second transistor form the second transistor, and the second gate electrode 133b for the third transistor and the second semiconductor layer 112b for the third transistor form the third transistor.

[0170] The second inorganic insulating film 212 may be disposed on the third gate insulating film 123, the first conductive film 221, and the second gate electrode 133. In this case, the upper surface of the second inorganic insulating film 212 may be planarized by a planarization process so as to be in contact with the upper surfaces of the first conductive film 221 and the second gate electrode 133.

[0171] When the second inorganic insulating film 212 is stacked, the second inorganic insulating film 212 is also formed on the first conductive film 221, and the portion of the second inorganic insulating film 212 formed on the first conductive film 221 is retained in the planarization process to form a filling portion 212a that fills the recessed portion formed on the first conductive film 221.

[0172] The second conductive film 222 may be disposed on the first conductive film 221. The second conductive film 222 is formed to cover the filling portion 212a of the second inorganic insulating film 212 and a portion of the first conductive film 221, and has a structure that can easily contact the first conductive film 221 and other layers. In this case, the second conductive film 222 is formed with the filling portion 212a at its lower portion, and thus is formed flat without a step, unlike the first conductive film 221. Therefore, it is possible to provide a structure in which the second opening 302 having a small size can be easily overlapped on the first opening 301, thereby achieving a resolution limit in a high-resolution display device.

[0173] The third inorganic insulating film 213 may be disposed on the second inorganic insulating film 212, the second conductive film 222, and the second gate electrode 133. The second storage electrode 224 may be disposed on the third inorganic insulating film 213. The second storage electrode 224 may be used to constantly maintain a voltage of one electrode of the organic light emitting diode.

[0174] The fourth gate insulating film 124 may be disposed on the third inorganic insulating film 213 and the second storage electrode 224 .

[0175] The third inorganic insulating film 213 and the fourth gate insulating film 124 may be planarized through a planarization process to reduce interlayer steps.

[0176] A plurality of openings may be formed in the fourth gate insulating film 124. The plurality of openings may include, for example, a second opening 302 that penetrates the third inorganic insulating film 213 and the fourth gate insulating film 124 and exposes a portion of the second conductive film 222. Alternatively, an opening that penetrates the third gate insulating film 123, the second inorganic insulating film 212, the third inorganic insulating film 213, and the fourth gate insulating film 124 and exposes a portion of the second semiconductor layer 112 may be included.

[0177] The third conductive film 223, 223a, and 223b may be arranged on the planarized fourth gate insulating film 124. The third conductive film 223 may contact the second conductive film 222 through the second opening 302, and may contact the second semiconductor layer 112a of the second transistor or the second semiconductor layer 112b of the third transistor through another opening. The third conductive film 223a may contact the second conductive film 222 through the second opening 302, and may contact the second semiconductor layer 112a of the second transistor through another opening. The third conductive film 223b may contact the second conductive film 222 through the second opening 302.

[0178] In this case, the third conductive film 223 may be formed on the side surface and the lower surface of the second opening 302. The third conductive film 223, 223a, and 223b may include a portion disposed on the upper portion of the fourth gate insulating film 124 and a portion disposed on the side surface and the lower surface of the second opening 302 or a portion formed to fill the second opening 302.

[0179] The passivation film 180 may be disposed on the fourth gate insulating film 124 and the third conductive films 223, 223a, and 223b. The passivation film 180 may include, for example, silicon nitride (SiN x ) or silicon oxide (SiO x ) of an inorganic insulating material or an organic material. The partition wall 350 may be disposed on the passivation film 180. The partition wall 350 forms a region where an organic light emitting layer (not shown) may be formed, and an organic light emitting element (not shown) may be disposed in the partition wall 350.

[0180] Next, the pixel opening 305 may be formed by patterning the passivation layer 180 and the partition wall 350 through an etching process using a pattern mask.

[0181] According to the present embodiment, the first opening 301 and the second opening 302 may overlap each other vertically, and the second conductive film 222 is arranged between the first opening 301 and the second opening 302. In this case, the first conductive film 221 and the third conductive films 223, 223a and 223b are formed on the side surface and the lower surface of each of the first opening 301 and the second opening 302. That is, the third conductive films 223, 223a and 223b may be electrically connected to the layer in contact with the first conductive film 221 through the second conductive film 222.

[0182] The first to third transistors described above have a top gate structure in which gate electrodes 131 and 133 are arranged on semiconductor layers 111 and 112, but the present invention is not limited thereto and may have various structures, such as a bottom gate structure in which gate electrodes 131 and 133 are arranged below semiconductor layers 111 and 112.

[0183] In accordance with Fig.15 In the display device of the embodiment of the present invention, the first semiconductor layer 111 and the second semiconductor layer 112 are arranged on different planes. Therefore, by vertically overlapping different transistors, the area occupied by one pixel can be reduced to achieve high resolution. In this case, the opening overlap portion according to the above embodiment can be applied to the electrical connection between the vertically overlapping layers.

[0184] According to the above-described embodiment, in a display device in which openings of a fine size are vertically overlapped, it is possible to ensure the target line widths x2 and x2' for achieving the resolution limit of the opening at the upper portion by filling the recessed portion on the conductive film with an inorganic insulating film. In other words, due to the filling portions 212a and 212a' of the inorganic insulating film, the inside of the lower opening becomes flat, so that the upper opening can be formed by overlapping the openings of a fine size like the lower opening.

[0185] In addition, by forming an insulating film with an inorganic film whose height is easily controlled in processes such as deposition and etching, a planarization process can be easily performed. Through the planarization process, interlayer steps can be reduced to reduce process dispersion, the stability of pattern formation of subsequent layers can be improved, and interlayer flatness can be improved by eliminating steps in the lower layer.

[0186] In the following, reference will be made to Fig.16 A display device according to the embodiment is described. Fig.16 Pictured Fig.15 FIG. 1 is an enlarged cross-sectional view of an overlapping portion A of a lower third opening 303 and an upper first opening 301 among the three openings.

[0187] refer to Fig.16The display device according to the embodiment includes a substrate 100, a first semiconductor layer 111, first to third gate insulating films 121, 122 and 123, first and second inorganic insulating films 211 and 212, first, second and fourth conductive films 221, 222 and 225, and a buffer layer 140.

[0188] The first semiconductor layer 111 may be disposed on the insulating substrate 100. The first gate insulating film 121, the second gate insulating film 122, and the first inorganic insulating film 211 may be sequentially disposed on the first semiconductor layer 111.

[0189] The third opening 303 is formed in the first gate insulating film 121, the second gate insulating film 122, and the first inorganic insulating film 211 to expose a portion of the first semiconductor layer 111. A lower end portion of the third opening 303 may be narrower than an upper end portion thereof.

[0190] The fourth conductive film 225 may be disposed on an upper portion of the first inorganic insulating film 211. The fourth conductive film 225 may contact the first semiconductor layer 111 through the third opening 303. The fourth conductive film 225 may be a component of a circuit for transmitting a signal for driving a pixel of the display device according to the embodiment, and may be, for example, a data line or a data electrode for transmitting a data signal.

[0191] In this case, the fourth conductive film 225 may be formed on the side and lower surfaces of the third opening 303. The fourth conductive film 225 may include a seventh portion 225a disposed on the upper portion of the first inorganic insulating film 211 and an eighth portion 225b disposed on the side and lower surfaces of the third opening 303.

[0192] The buffer layer 140 may be disposed on an upper portion of the first inorganic insulating film 211 on which the seventh portion 225a of the fourth conductive film 225 is formed. The second semiconductor layer 112 may be disposed on the buffer layer 140, and the third gate insulating film 123 may be disposed.

[0193] In this case, the first opening 301 overlapping the third opening 303 below may be formed in the first inorganic insulating film 211, the buffer layer 140, and the third gate insulating film 123. The lower end portion of the first opening 301 may be narrower than the upper end portion thereof. The width of the lower end portion of the first opening 301 may be smaller than the width of the lower end portion of the third opening 303. Fig.16 As shown, the first opening 301 may be arranged inside the third opening 303 .

[0194] The first conductive film 221 may be disposed on the third gate insulating film 123. The first conductive film 221 may contact the fourth conductive film 225 through the first opening 301, and the fourth conductive film 225 contacts the first semiconductor layer 111. In this case, the first conductive film 221 may be formed on the side surface and the lower surface of the first opening 301. The first conductive film 221 may include a first portion 221a disposed on the upper portion of the third gate insulating film 123 and a second portion 221b disposed on the side surface and the lower surface of the first opening 301.

[0195] The second inorganic insulating film 212 may be disposed on an upper portion of the third gate insulating film 123 and the first conductive film 221. The second inorganic insulating film 212 may include a filling portion 212a filling a recessed portion on the first conductive film 221. The filling portion 212a may be formed to fill the recessed portion on the first conductive film 221. In this case, an upper surface of the second inorganic insulating film 212 may be planarized by a planarization process so as to be in contact with an upper surface of the first portion 221a of the first conductive film 221.

[0196] The second conductive film 222 may be disposed on the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221. The second conductive film 222 may be formed to cover the filling portion 212a of the second inorganic insulating film 212 and the first portion 221a of the first conductive film 221.

[0197] While the inventive concept has been described in connection with what are presently considered to be exemplary embodiments that can be implemented, it is to be understood that the inventive concept is not limited to the disclosed embodiments, but on the contrary is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims

1. A display device, comprising: substrate; a semiconductor layer disposed on the substrate; a first inorganic insulating film disposed on the semiconductor layer and including a first opening; a first conductive film disposed on the first inorganic insulating film, the first conductive film being disposed on side surfaces and a lower surface of the first opening; a second inorganic insulating film disposed on the first inorganic insulating film, the second inorganic insulating film filling a recessed portion on the first conductive film; a second conductive film disposed on the second inorganic insulating film and connected to the first conductive film; a third inorganic insulating film disposed on the second conductive film and the second inorganic insulating film exposed by the second conductive film, the third inorganic insulating film including a second opening exposing the second conductive film; as well as a third conductive film disposed on the third inorganic insulating film and connected to the second conductive film, The first opening and the second opening overlap each other in a plan view.

2. The display device according to claim 1, wherein: A lower end portion of each of the first opening and the second opening is narrower than an upper end portion thereof, and When the width of the lower end portion of the first opening is referred to as a first line width and the width of the lower end portion of the second opening is referred to as a second line width, the second line width is greater than or equal to the first line width.

3. The display device according to claim 2, wherein: The first line width is 1.3 μm or less.

4. The display device according to claim 2, wherein: The first opening and the second opening overlap so that a center of the first line width, a center of the second conductive film, and a center of the second line width are on a straight line.

5. The display device according to claim 1, wherein: The second inorganic insulating film is planarized so that an upper surface of the second inorganic insulating film is in contact with an upper surface of the first conductive film formed on the first inorganic insulating film.

6. The display device according to claim 1, wherein: The second conductive film and the third conductive film are in contact with each other in a predetermined region within the closed edge.

7. A method for manufacturing a display device, comprising: forming a semiconductor layer on a substrate; forming an insulating film on the substrate; forming a first inorganic insulating film on the insulating film; forming a first opening in the first inorganic insulating film exposing the semiconductor layer; forming a first conductive film on the first inorganic insulating film and on side surfaces and a lower surface of the first opening; forming a second inorganic insulating film on the first inorganic insulating film and the recessed portion formed on the first conductive film; planarizing the second inorganic insulating film to form an isolation filling portion filling the recessed portion on the first conductive film; forming a second conductive film on the planarized second inorganic insulating film; forming a third inorganic insulating film on the second conductive film and the second inorganic insulating film exposed by the second conductive film; forming a second opening exposing the second conductive film in the third inorganic insulating film at a position overlapping with the first opening in a plan view; as well as A third conductive film is formed, the third conductive film being arranged on the third inorganic insulating film and on the side surface and the lower surface of the second opening and being connected to the second conductive film.

8. The method for manufacturing a display device according to claim 7, wherein: In the planarization of the second inorganic insulating film, an upper surface of the second inorganic insulating film is planarized so that the upper surface of the second inorganic insulating film is in contact with an upper surface of the first conductive film formed on the first inorganic insulating film.

9. The method for manufacturing a display device according to claim 7, wherein: A lower end portion of each of the first opening and the second opening is narrower than an upper end portion thereof, and When the width of the lower end portion of the first opening is referred to as a first line width and the width of the lower end portion of the second opening is referred to as a second line width, the second line width is greater than or equal to the first line width.

10. The method for manufacturing a display device according to claim 9, wherein: The first line width is 1.3 μm or less.

Citation Information

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