Method for forming semiconductor device structure and pad structure
By forming holes in the opening area of the protective layer and performing thermal reflow to form an inclined surface, the problem of high lead stress is solved, and the reliability and yield of the semiconductor device are improved.
Patent Information
- Application Number
- CN201811260458.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2018-10-26
- Publication Date
- 2025-09-05
- Estimated Expiration
- 2038-10-26
AI Technical Summary
In the existing wire bonding process, the vertical formation of the passivation layer on both sides of the wire solder joint leads to high wire stress, resulting in low reliability, prone to short circuits, and affecting product yield.
Holes are formed around the opening area of the protective layer, and the holes are collapsed and shrunk by the thermal reflow method to form a slope to reduce the stress of the lead. The slope design allows the lead to smoothly pass over the protective layer.
By forming a slope on the side wall of the protective layer, the stress of the lead is reduced, the reliability of the product is improved, the risk of short circuit is reduced, and the product yield is improved.
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Figure CN111106086B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of semiconductor manufacturing, and in particular to a method for forming a semiconductor device structure and a pad structure. Background Art
[0002] Wire bonding is a process technology that uses metal wires to connect the soldering area of a semiconductor bare chip (Die) to the I / O leads of a microelectronic package or the metal wiring soldering area (Pad) on a substrate. It is usually performed using heat, pressure, or ultrasonic energy and is widely used in the field of semiconductor packaging.
[0003] In current wire bonding processes, a passivation layer is typically placed on both sides of the wire solder joints to act as a protective barrier during packaging and wafer dicing, blocking moisture, damage, alpha particles, and stress to achieve good product reliability. The wires must bend as they pass over the passivation layer to avoid contact with it. However, the passivation layer on both sides of the wire solder joints is typically formed perpendicular to the metal layer. This creates a near-vertical bend in the wires, resulting in high stress and low reliability. This can cause short circuits during use, leading to low product yields.
[0004] It should be noted that the information disclosed in the aforementioned background technology section is only used to enhance the background understanding of the present invention, and therefore it may include information that does not constitute the prior art known to ordinary technicians in this field. Summary of the Invention
[0005] The present invention aims to provide a method for forming a semiconductor device structure and a pad structure, so as to solve the problem of low reliability caused by high lead stress.
[0006] In order to achieve the above object, the present invention adopts the following technical solutions:
[0007] A method for forming a semiconductor device structure, comprising:
[0008] providing a metal layer;
[0009] forming a protective layer on the metal layer, and forming an opening in the protective layer to expose a portion of the metal layer, wherein the exposed portion of the metal layer serves as a pad;
[0010] A slope is formed on a side wall of the protective layer close to the opening, and an extension surface of the slope forms a first angle with a plane where the metal layer is located;
[0011] Wherein, while forming the opening, a plurality of holes are formed around the opening area of the protective layer, and then the holes are collapsed and shrunk by a thermal reflow method, thereby forming a slope on the side wall of the opening;
[0012] A solder ball is formed on the pad and a lead is extended outward.
[0013] According to one embodiment of the present invention, the length and width of the opening are in the range of 5-20 um, and the length and width of the hole are in the range of 0.3-0.6 um.
[0014] According to one embodiment of the present invention, the metal layer material is copper, aluminum, tungsten or an alloy containing at least one of these three metal elements.
[0015] According to one embodiment of the present invention, the protective layer includes a passivation layer and an isolation layer located above the passivation layer; the passivation layer is a combination of a silicon oxide layer and a silicon nitride layer, the silicon oxide layer is formed above the metal layer, and the silicon nitride layer is formed above the silicon oxide layer; the isolation layer is a polyimide film.
[0016] According to one embodiment of the present invention, the solder balls and the leads are made of the same material: gold, silver or aluminum.
[0017] According to one embodiment of the present invention, the first angle ranges from 30 to 60 degrees.
[0018] According to one embodiment of the present invention, the method of forming the opening and the hole adopts dry etching.
[0019] According to one embodiment of the present invention, the heat reflow method adopts a heating temperature range of 200 degrees to 400 degrees.
[0020] On the other hand, the present invention also provides a pad structure, comprising:
[0021] Metal layer;
[0022] a protective layer, located on the metal layer and having an opening to expose a portion of the metal layer, wherein the exposed portion of the metal layer serves as a pad;
[0023] The protective layer has a plurality of holes in a peripheral area close to the opening.
[0024] According to one embodiment of the present invention, the length and width of the opening are in the range of 5-20 um, and the length and width of the hole are in the range of 0.3-0.6 um.
[0025] According to one embodiment of the present invention, the metal layer material includes copper, aluminum, tungsten or an alloy of these three metal materials.
[0026] According to one embodiment of the present invention, the protective layer includes a passivation layer and an isolation layer located above the passivation layer; the passivation layer is a combination of a silicon oxide layer and a silicon nitride layer, the silicon oxide layer is located above the metal layer, and the silicon nitride layer is located above the silicon oxide layer; the isolation layer is a polyimide film.
[0027] The present invention forms an inclined surface on the side wall of the protection layer close to the opening, so that the lead can smoothly pass over the protection layer, thereby reducing the stress of the lead and further improving the reliability of the product. BRIEF DESCRIPTION OF THE DRAWINGS
[0028] Figure 1 A schematic diagram of a protective layer structure in the prior art;
[0029] Figure 2 Schematic diagram of a pad structure according to an embodiment of the present invention.
[0030] Figure 3 for Figure 2 Schematic diagram of the structure formed after the pad structure in FIG is thermally reflowed;
[0031] Figure 4 To utilize Figure 3 The structure shown is a schematic diagram of the structure of the semiconductor device finally produced.
[0032] The description of the accompanying drawings is as follows:
[0033] 100, 200: Metal layer
[0034] 110, 210: protective layer
[0035] 120, 220: solder balls
[0036] 130, 230: Lead
[0037] 211: Hole DETAILED DESCRIPTION
[0038] The technical solution of the present invention is further described below based on specific embodiments. The protection scope of the present invention is not limited to the following embodiments, which are listed for illustrative purposes only and do not limit the present invention in any way.
[0039] In the present invention, except for the contents explicitly described, any matters or issues not mentioned are directly applicable to those known in the art without any changes. Moreover, any embodiment described herein can be freely combined with one or more other embodiments described herein, and the technical solutions or technical ideas formed thereby are considered part of the original disclosure or original description of the present invention and should not be regarded as new content not disclosed or anticipated herein, unless a person skilled in the art considers that the combination is obviously unreasonable.
[0040] All features disclosed in this invention may be combined in any combination, and such combinations should be understood as disclosed or described in this invention, unless a person skilled in the art deems such combinations to be obviously unreasonable. The numerical values disclosed in this specification include not only those specifically disclosed in the examples, but also the endpoints of the numerical ranges in this specification. Any combination of these numerical values should be considered as the disclosed or described range of this invention.
[0041] Figure 1 Schematic diagram of a protective layer structure in the prior art, such as Figure 1 As shown, the protective layer 110 is formed on the metal layer 100 and has an opening to expose a portion of the metal layer 100. The solder ball 120 is located in the opening and contacts the metal layer 100. One end of the lead 130 is connected to the solder ball 120, and the other end extends outward to the lead frame (not shown in the figure).
[0042] Since the lead frame is located on the outside of the protective layer 110, the lead 130 needs to cross the surface of the protective layer 110 and avoid contact with the protective layer 110. The side walls of the protective layer 110 on both sides of the opening are formed vertically on the metal layer 100. The lead 130 needs to form a nearly vertical curved shape when crossing the protective layer 110. Such a curved lead 130 has high stress and low reliability, and may cause a circuit break during use, resulting in a low product yield.
[0043] To this end, the present invention provides a method for forming a semiconductor device structure, comprising:
[0044] Providing a metal layer, wherein the metal layer is copper, aluminum, tungsten or an alloy containing at least one of these three metal elements, and can be used as a top metal layer in a semiconductor device;
[0045] forming a protective layer on the metal layer, the protective layer comprising a passivation layer and an isolation layer located above the passivation layer, wherein the passivation layer is a combination of a silicon oxide layer and a silicon nitride layer, the silicon oxide layer being formed above the metal layer, the silicon nitride layer being formed above the silicon oxide layer, and the isolation layer being a polyimide film. forming an opening in the protective layer to expose a portion of the metal layer, the exposed portion of the metal layer serving as a bonding pad;
[0046] At the same time as the opening is formed, several holes are formed around the opening area of the protective layer. The method of forming the opening and the holes can be dry etching. The length and width of the opening range from 5 to 20 μm, the length and width of the hole diameter range from 0.3 to 0.6 μm, and the depth of the hole is not less than 1 / 2 of the thickness of the protective layer.
[0047] Then, the hole is collapsed and shrunk by a heat reflow method, wherein the heat reflow method adopts a heating temperature range of 200 degrees to 400 degrees; thereby, a slope is formed on the sidewall of the opening of the protective layer. The slope can be a whole slope, that is, extending from the top of the protective layer to the surface of the metal layer, or a partial slope, that is, extending from the top of the protective layer to a portion of the sidewall of the protective layer; the slope or its extended surface forms a first angle with the plane of the metal layer; and
[0048] A solder ball is formed on the pad and a lead is extended outward; the solder ball and the lead are made of the same material, such as gold, silver or aluminum, to provide good electrical conductivity.
[0049] In this embodiment, the angle range of the first angle is 30-60 degrees, which is similar to the angle between the bent part of the lead and the metal layer. If the angle is too large, the protective layer will still cause more obstacles to the bending of the lead, resulting in high stress and easy breakage of the lead. If the angle is too small, the protective layer will be missing more on the inclined part, and the protective function of the protective layer cannot be fully realized.
[0050] After the sidewall of the protective layer close to the opening is formed into an inclined surface, the lead can pass over the top of the protective layer more smoothly, reducing the stress generated when it is bent and reducing the risk of lead breakage.
[0051] The present invention also provides a pad structure, such as Figure 2 As shown, the pad structure includes: a metal layer 200 and a protection layer 210 having an opening.
[0052] The metal layer 200 is generally a top metal layer in a semiconductor device, and its material may include copper, aluminum, tungsten, or an alloy including at least one of these three metal elements.
[0053] Protective layer 210 is positioned over metal layer 200 and has an opening exposing a portion of metal layer 200. The exposed portion of the metal layer serves as a solder pad. Protective layer 210 has several holes 211 near the opening. The length and width of the opening range from 5 to 20 μm, while the length and width of holes 211 range from 0.3 to 0.6 μm. The depth of holes 211 is no less than half the thickness of the protective layer. The depth of each hole 211 can be uniform or decrease from the opening to the sides. However, by controlling the thermal reflow process, a bevel can be formed.
[0054] The protective layer 210 may include a passivation layer and an isolation layer located above the passivation layer, wherein the passivation layer is a combination of a silicon oxide layer and a silicon nitride layer, the silicon oxide layer is located above the metal layer, the silicon nitride layer is located above the silicon oxide layer, and the isolation layer is a polyimide film.
[0055] The protective layer 210 serves as a protective barrier during packaging and wafer dicing to block moisture, damage, alpha particles, and stress, thereby achieving good product reliability.
[0056] Figure 3 for Figure 2 The schematic diagram of the structure formed after the pad structure in the thermal reflow is as follows Figure 3 As shown, after the protective layer 210 in the pad structure is reflowed, a slope is formed on the sidewall close to the opening, thereby providing a relatively smooth channel for subsequent leads.
[0057] Figure 4 To utilize Figure 3 The structure shown in the figure is finally used to make a semiconductor device. Figure 4 As shown, the semiconductor device structure includes: a metal layer 200, a protection layer 210 with an opening, a solder ball 220 and a lead 230, wherein the metal layer portion exposed by the opening serves as a pad, the solder ball 220 is located on the pad and the lead 230 extends outward.
[0058] The sidewall of the protection layer 210 close to the opening forms an inclined surface, thereby reducing the stress generated when the lead 230 is bent and reducing the risk of the lead 230 being broken.
[0059] In summary, the present invention forms the protective layer near the sidewall of the opening, so that the lead can smoothly pass over the protective layer, thereby reducing the stress of the lead and further improving the reliability of the product.
[0060] Those skilled in the art should note that the embodiments described in the present invention are merely exemplary and that various other substitutions, changes, and improvements may be made within the scope of the present invention. Therefore, the present invention is not limited to the above embodiments, but is only limited by the claims.
Claims
1. A method for forming a semiconductor device structure, comprising: providing a metal layer; forming a protective layer on the metal layer, forming an opening in the protective layer to expose a portion of the metal layer, wherein the exposed portion of the metal layer serves as a pad, the protective layer comprising a passivation layer and an isolation layer located above the passivation layer; The passivation layer is a combination of a silicon oxide layer and a silicon nitride layer, wherein the silicon oxide layer is formed on the metal layer, and the silicon nitride layer is formed on the silicon oxide layer; the isolation layer is a polyimide film; A slope is formed on a side wall of the protective layer close to the opening, and an extension surface of the slope forms a first angle with a plane where the metal layer is located; Wherein, while forming the opening, a plurality of holes are formed around the opening area of the protective layer, the depth of the holes being the same or decreasing from the opening to both sides, and the depth of the holes being not less than 1 / 2 of the thickness of the protective layer, and then the holes are collapsed and shrunk by a thermal reflow method, thereby forming a slope on the sidewall of the opening; A solder ball is formed on the pad and a lead is extended outward. 2 . The forming method according to claim 1 , wherein the length and width of the opening are in the range of 5-20 μm, and the length and width of the hole are in the range of 0.3-0.6 μm. 3 . The formation method according to claim 1 , wherein the metal layer is made of copper, aluminum, tungsten, or an alloy containing at least one of these three metal elements. The forming method according to claim 1 , wherein the solder balls and the leads are made of the same material: gold, silver, or aluminum. The forming method according to claim 1 , wherein the first angle is in a range of 30-60 degrees. The forming method according to claim 1 , wherein the opening and the hole are formed by dry etching.
7. The forming method according to claim 1, wherein the heat reflow method adopts a heating temperature ranging from 200 degrees to 400 degrees.
8. A pad structure comprising: Metal layer; a protective layer, located on the metal layer and having an opening to expose a portion of the metal layer, wherein the exposed portion of the metal layer serves as a pad, the protective layer comprising a passivation layer and an isolation layer located on the passivation layer; The passivation layer is a combination of a silicon oxide layer and a silicon nitride layer, wherein the silicon oxide layer is formed on the metal layer, and the silicon nitride layer is formed on the silicon oxide layer; the isolation layer is a polyimide film; The protective layer has a plurality of holes in the surrounding area near the opening, the depth of the holes is the same or decreases from the opening to both sides, the depth of the holes is not less than 1 / 2 of the thickness of the protective layer, and the holes collapse and shrink through the thermal reflow method, thereby forming a slope on the side wall of the opening. 9 . The pad structure according to claim 8 , wherein the length and width of the opening are in the range of 5-20 um, and the length and width of the hole are in the range of 0.3-0.6 um. 10 . The pad structure according to claim 8 , wherein the metal layer material comprises copper, aluminum, tungsten, or an alloy comprising at least one of these three metal elements.
Citation Information
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