Display device
By setting an input detection layer on the display panel and using a conductive layer and an insulating layer to form a ring-shaped detection electrode, the integration problem of the input detection layer and the display area in the display device is solved, and the balance between input detection sensitivity and display effect is improved.
Patent Information
- Application Number
- CN201910776154.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2018-10-26
- Filing Date
- 2019-08-22
- Publication Date
- 2025-12-16
- Estimated Expiration
- 2039-08-22
AI Technical Summary
Existing display devices are difficult to integrate the input detection layer and the display area effectively in their design, resulting in a poor balance between input detection sensitivity and display effect.
An input detection layer is set on the display panel, including a first line and a second line, which are connected by a connecting line, and a ring-shaped detection electrode is formed by a conductive layer and an insulating layer to realize the integration of the input detection layer.
It improves the balance between input detection sensitivity and display effect, and enhances the input detection capability of the display device.
Smart Images

Figure CN111106143B_ABST
Abstract
Description
[0001] Korean Patent Application No. 10-2018-0129358, filed on October 26, 2018, in the Korean Intellectual Property Office and entitled "Display Device" is incorporated herein by reference in its entirety. TECHNICAL FIELD
[0002] Embodiments relate to a display device, and more particularly, to a display device including an opening area or an opening. BACKGROUND
[0003] In recent years, the use of display devices has diversified. In addition, as the thickness and weight of display devices are decreasing, the range of use of display devices is expanding. SUMMARY
[0004] Embodiments relate to a display device including a display panel including an opening penetrating the display panel, a display area surrounding the opening, a first non-display area between the opening and the display area, and a second non-display area surrounding the display area, and an input detection layer on the display panel. The input detection layer can include a first line in the first non-display area, a second line in the second non-display area, and a connection line connecting the first line to the second line.
[0005] The second line can have a voltage level of a constant voltage.
[0006] The first line can have a ring shape surrounding the opening.
[0007] The input detection layer can include a first detection electrode arranged in a first direction and a second detection electrode arranged in a second direction crossing the first direction, the first detection electrode and the second detection electrode being in the display area.
[0008] The input detection layer can include a first conductive layer, a first insulating layer on the first conductive layer, a second conductive layer on the first insulating layer, and including the first detection electrode and the second detection electrode, and a second insulating layer on the second conductive layer.
[0009] The first conductive layer or the second conductive layer can include the connection line.
[0010] The connection line can include the same material as that of the first detection electrode and the second detection electrode.
[0011] The first conductive layer can include at least one of the first line and the second line, and the connection line can be connected to at least one of the first line and the second line via a contact hole of the first insulating layer.
[0012] The connection line can be located below the first and second detection electrodes, and the first insulating layer can be located between the connection line and the first and second detection electrodes.
[0013] The connection line can be located in a gap between adjacent detection electrodes among the first and second detection electrodes.
[0014] The connection line can be superposed with at least one of the first and second detection electrodes.
[0015] The display device can further include a connection electrode sector connecting adjacent first detection electrodes among the first detection electrodes or adjacent second detection electrodes among the second detection electrodes, the connection electrode sector being located in the first non-display area.
[0016] Embodiments also relate to a display device including a substrate including an opening penetrating the substrate, a display area, a first non-display area located between the opening and the display area, and a second non-display area spaced apart from the first non-display area, the display area being located between the first non-display area and the second non-display area; a plurality of display elements arranged in the display area; an encapsulation member covering the plurality of display elements; a first detection electrode arranged on the encapsulation member in a first direction; a second detection electrode arranged on the encapsulation member in a second direction crossing the first direction; and a first line arranged on the encapsulation member in the first non-display area and surrounding the opening.
[0017] The first line can have a voltage level of a constant voltage.
[0018] The display device can further include a second line located in the second non-display area, and a connection line connecting the first line to the second line.
[0019] The connection line can be located on the same layer as the first detection electrode.
[0020] The display device can further include an insulating layer provided between any one of the first and second lines and the connection line. The connection line can be connected to any one of the first and second lines via a contact hole of the insulating layer.
[0021] The connection line can be located on the same layer as any one of the first and second lines.
[0022] The connection line can include a metal layer.
[0023] The connection line can be located in a gap between adjacent detection electrodes among the first and second detection electrodes.
[0024] The connection line can be superposed with at least one of the first and second detection electrodes.
[0025] The first and second detection electrodes can each include a transparent conductive layer.
[0026] The first line can include a material different from a material of the first and second detection electrodes.
[0027] The first and second detection electrodes can each include a metal layer.
[0028] The display apparatus can further include a connection electrode sector connecting adjacent ones of the first detection electrodes or adjacent ones of the second detection electrodes. BRIEF DESCRIPTION OF DRAWINGS
[0029] Features will become apparent to those of ordinary skill in the art upon examination of the following details description of example embodiments in conjunction with the accompanying drawings, of which:
[0030] Figure 1 A perspective view of a display apparatus according to an example embodiment is shown;
[0031] Figure 2 A cross-sectional view of a display apparatus according to an example embodiment is shown;
[0032] Figures 3A-3C A cross-sectional view of a display panel according to an example embodiment is shown;
[0033] Figures 4A-4C A cross-sectional view of a display panel according to other embodiments is shown;
[0034] Figure 5 A plan view of a display panel according to an example embodiment is shown;
[0035] Figure 6 An equivalent circuit diagram of one pixel of a display panel is shown;
[0036] Figure 7 A plan view of a portion of a display panel according to an example embodiment is shown;
[0037] Figure 8 A cross-sectional view of one pixel according to an example embodiment is shown;
[0038] Figure 9 A plan view of an input detection layer on a display panel according to an example embodiment is shown;
[0039] Figure 10 A cross-sectional view of an input detection layer according to an example embodiment is shown;
[0040] Figure 11A A plan view of a first conductive layer in an input detection layer according to an example embodiment is shown;
[0041] Figure 11BA plan view of the second conductive layer in the input detection layer according to an example embodiment is shown;
[0042] Figure 12A A plan view of the first conductive layer in the input detection layer according to another example embodiment is shown;
[0043] Figure 12B A plan view of the second conductive layer in the input detection layer according to another example embodiment is shown;
[0044] Figure 13 A partial plan view of the periphery of an open region as an input detection layer according to an example embodiment is shown;
[0045] Figure 14 A plan view of the structure around the first line in the input detection layer according to an example embodiment is shown;
[0046] Figure 15A A cross-sectional view taken in the extension direction of the connection line of Figure 14 is shown;
[0047] Figure 15B and Figure 15C A modified embodiment of Figure 15A is shown;
[0048] Figure 16 A plan view of the structure around the first line in the input detection layer according to another example embodiment is shown;
[0049] Figure 17 A cross-sectional view taken in the extension direction of the connection line of Figure 16 is shown;
[0050] Figure 18 A plan view of the structure around the first line in the input detection layer according to another example embodiment is shown;
[0051] Figure 19 A cross-sectional view taken in the extension direction of the connection line of Figure 18 is shown;
[0052] Figure 20 A plan view of the structure around the first line in the input detection layer according to another example embodiment is shown;
[0053] Figure 21 A cross-sectional view taken in the extension direction of the connection line of Figure 20 is shown;
[0054] Figure 22 A plan view of the input detection layer on a display panel according to another example embodiment is shown;
[0055] Figure 23a plan view showing a structure around a first line in an input detection layer according to another example embodiment; and
[0056] Figure 24 a cross-sectional view taken along an extension direction of a connection line of Figure 23 the first line. DETAILED DESCRIPTION
[0057] Example embodiments now will be described more fully hereinafter with reference to the accompanying drawings; however, they can be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the example embodiments to those skilled in the art. In the drawings, the dimensions or the shapes of layers and regions can be exaggerated for the sake of clarity. Like reference numerals refer to like elements throughout.
[0058] Although terms such as "first", "second", or the like can be used to describe various components, these components must not be limited by the above terms. The above terms are used only to distinguish one component from another component.
[0059] An expression used in the singular encompasses the expression used in the plural, unless it has a plainly different meaning in the context.
[0060] In this specification, it will be understood that terms such as "include" or "has" are intended to indicate existence of a certain feature or component, and not to exclude the possibility of additional features or components being present or being added.
[0061] It will be understood that when a component or layer is referred to as being "on" another component or layer, it can be directly on the other component or layer or intervening components or layers can also be present.
[0062] When a specific embodiment can be implemented differently, a specific process sequence can be performed differently from the described sequence. For example, two continuously described processes can be performed substantially simultaneously or in an order opposite to the described sequence.
[0063] It will be understood that when a layer, region or component is referred to as being connected to another layer, region or component, the layer, region or component can be directly connected to the other layer, region or component or indirectly connected via another layer, region or component therebetween. For example, in the specification, when a layer, region or component is electrically connected to another layer, region or component, the layer, region or component can be directly electrically connected or indirectly electrically connected via another layer, region or component therebetween.
[0064] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression "at least one of a, b, and c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.
[0065] Figure 1 is a perspective view of a display device 1 according to an example embodiment.
[0066] Referring to Figure 1 , the display device 1 includes a display area DA that emits light and a non-display area NDA that does not emit light, the non-display area NDA being adjacent to the display area DA. The display device 1 can provide an image by using light emitted from a plurality of pixels arranged in the display area DA.
[0067] The display device 1 can include an open area (or a first area) OA at least partially surrounded by a display area (or a second area) DA. Referring to Figure 1 , in an example embodiment, the open area OA can be completely surrounded by the display area DA. The open area OA can be defined or surrounded by a plurality of pixels arranged in the display area DA. The non-display area NDA can include a first non-display area (or an intermediate area, a third area) NDA1 surrounding the open area OA and a second non-display area (or a peripheral area, a fourth area) NDA2 surrounding the outside of the display area DA. The first non-display area NDA1 between the open area OA and the display area DA can completely surround the open area OA, the display area DA can completely surround the first non-display area NDA1, and the second non-display area NDA2 can completely surround the display area DA.
[0068] Hereinafter, an organic light emitting display device is described as an example of the display device 1 according to an example embodiment. As another example, various types of display devices such as an inorganic light emitting display device (or an inorganic electroluminescent (EL) display device), a quantum dot light emitting display, a liquid crystal display, etc. can be used.
[0069] Figure 2 is a cross-sectional view of the display device 1 according to an example embodiment taken along a line II-II' of Figure 1 .
[0070] Referring to Figure 2 , the display device 1 can include a display panel 10, an input detection layer 40 arranged on the display panel 10, and an optical function layer 50, all of which can be covered by a window 60. The display device 1 can be any one of various electronic devices such as a mobile phone, a laptop, and a smart watch.
[0071] The display panel 10 can display an image. The display panel 10 can include pixels arranged in a display area DA, each pixel including a display element and a pixel circuit connected to the display element. The display element can include an organic light emitting diode, an inorganic light emitting diode, a quantum dot light emitting diode, etc.
[0072] The input detection (sensing) layer 40 can obtain an external input (e.g., coordinate information according to a touch event). The input detection layer 40 can include a detection electrode (sensing electrode or touch electrode) and a trace connected to the detection electrode. The input detection layer 40 can be arranged on the display panel 10. The input detection layer 40 can detect an external input via, for example, a mutual capacitance method and / or a self-capacitance method.
[0073] The input detection layer 40 can be directly formed on the display panel 10, or can be separately formed and then bonded to the display panel 10 via an adhesive layer such as an optical clear adhesive (OCA). For example, the input detection layer 40 can be continuously formed after a process of forming the display panel 10, and in this case, the adhesive layer can not be disposed between the input detection layer 40 and the display panel 10. In another example embodiment, the input detection layer 40 can be formed on the display panel 10, and in this case, the adhesive layer can be disposed between the input detection layer 40 and the display panel 10. Figure 2 In the example embodiment, the input detection layer 40 is disposed between the display panel 10 and the optical functional layer 50, but in another example embodiment, the input detection layer 40 can be arranged on the optical functional layer 50.
[0074] The optical functional layer 50 can include an anti-reflection layer. The anti-reflection layer can reduce the reflectance of light (external light) incident from the outside of the display device 1 toward the display panel 10 through the window 60. The anti-reflection layer can include, for example, a retarder and a polarizer. The retarder can be of a film type or a liquid crystal coating type, and can include a λ / 2 retarder and / or a λ / 4 retarder. The polarizer can also be of a film type or a liquid crystal coating type. The film type polarizer can include a stretched synthetic resin film, and the liquid crystal coating type polarizer can include liquid crystals arranged in a specific orientation. The retarder and the polarizer can further include a protective film. The retarder itself and the polarizer itself or the protective film can be defined as a base layer of the anti-reflection layer.
[0075] In another example embodiment, the anti-reflection layer can include a black matrix and a color filter. The color filter can be arranged in consideration of the color of light emitted from each pixel of the display panel 10. In another example embodiment, the anti-reflection layer can include a destructive interference structure. The destructive interference structure can include a first reflection layer and a second reflection layer arranged on different layers. First reflected light and second reflected light respectively reflected from the first reflection layer and the second reflection layer can generate destructive interference, and thus the external light reflectance can be reduced.
[0076] The optical functional layer 50 can include a lens layer. The lens layer can improve light output efficiency of light emitted from the display panel 10, or reduce color deviation. The lens layer can include a layer having a convex lens shape or a concave lens shape and / or a plurality of layers having different refractive indexes. The optical functional layer 50 can include both or any one of the anti-reflection layer and the lens layer described above.
[0077] The display panel 10, the input detection layer 40, and / or the optical functional layer 50 can include an opening through which the display panel 10, the input detection layer 40, and / or the optical functional layer 50 can be completely penetrated. In this regard, Figure 2 An example embodiment in which the display panel 10, the input detection layer 40, and the optical functional layer 50 include first, second, and third openings 10H, 40H, and 50H, respectively, is illustrated. The display panel 10 includes the first opening 10H through or penetrated from a top surface of the display panel 10 to a bottom surface of the display panel 10. The input detection layer 40 includes the second opening 40H through or penetrated from a top surface of the input detection layer 40 to a bottom surface of the input detection layer 40. The optical functional layer 50 includes the third opening 50H through or penetrated from a top surface of the optical functional layer 50 to a bottom surface of the optical functional layer 50. The first, second, and third openings 10H, 40H, and 50H can be stacked on each other. The first, second, and third openings 10H, 40H, and 50H are positioned to correspond to the opening area OA. In another example embodiment, at least one of the display panel 10, the input detection layer 40, and the optical functional layer 50 can not include an opening. For example, one or more components selected among the display panel 10, the input detection layer 40, and the optical functional layer 50 can not include an opening.
[0078] The component 20 can correspond to the opening area OA. The component 20 can be located in the first, second, and / or third openings 10H, 40H, and 50H as shown by solid lines in FIG. 10A, or can be arranged under the display panel 10 as shown by dotted lines in FIG. 10B. Figure 2 Figure 2
[0079] The component 20 can include an electronic element. For example, the component 20 can be an electronic component using light or sound. For example, the electronic element can include a sensor that receives and uses light (such as an infrared sensor), a camera that captures an image by receiving light, a sensor that measures a distance by outputting and detecting light or sound, or a sensor that recognizes a fingerprint, a small lamp that outputs light, or a speaker that outputs sound. When the electronic element uses light, the electronic element can use light of various wavelength bands such as visible light, infrared light, ultraviolet light, etc. According to some embodiments, the opening area OA can be understood as a transmissive area through which light and / or sound output from the component 20 or traveling toward the electronic element can be transmitted.
[0080] In another example embodiment, when the display device 1 is used as a smart watch or a dashboard, the component 20 can be a member including a clock hand or a pointer indicating determined information (e.g., a vehicle speed). When the display device 1 includes a clock hand or a dashboard, the component 20 can be externally exposed through the window 60, and the window 60 can include an opening corresponding to the opening area OA.
[0081] The component 20 can include a component related to a function of the display panel 10 as described above, or can include a component such as an ornament for increasing the aesthetic of the display panel 10. Although not shown in Figure 2 A layer including an optically transparent adhesive or the like can be located between the window 60 and the optical functional layer 50, although not shown in
[0082] Figures 3A-3C is a cross-sectional view of the display panel 10 according to an example embodiment.
[0083] In the example embodiment shown in Figures 3A-3C , the display panel 10 includes a display element layer 200 arranged on the substrate 100 and positioned to correspond to the display area DA and including a plurality of pixels. The substrate 100 can include a glass material or a polymer resin. For example, the substrate 100 can include a glass material including mainly SiO2or a resin such as reinforced plastic.
[0084] The display element layer 200 can include a pixel circuit corresponding to each pixel and a display element electrically connected to the pixel circuit. The pixel circuit can include a thin film transistor and a storage capacitor. The display element can include an organic light emitting diode.
[0085] The display panel 10 can include an encapsulation substrate 340 as an encapsulation member 300 facing the substrate 100. A sealing material 350 can be disposed between the substrate 100 and the encapsulation substrate 340. The sealing material 350 can surround the display element layer 200 between the substrate 100 and the encapsulation substrate 340. For example, a portion of the sealing material 350 located in the first non-display area NDA1may surround a first edge (inner edge) of the display element layer 200. Another portion of the sealing material 350 located in the second non-display area NDA2may surround a second edge (outer edge) of the display element layer 200. The opening area OA can be completely surrounded by the portion of the sealing material 350, and the second edge of the display element layer 200 can be completely surrounded by the other portion of the sealing material 350 when viewed from a direction perpendicular to the main surface.
[0086] The display panel 10 can include a first opening 10H corresponding to the opening area OA. In this regard, Figure 3AThe base 100 and the package base 340 are shown to include through-holes 100H and 340H, respectively, corresponding to the opening region OA. The display element layer 200 can also include a through-hole corresponding to the opening region OA.
[0087] In another example embodiment, as shown in Figure 3B , the package base 340 includes a through-hole 340H corresponding to the opening region OA, while the base 100 can not include a through-hole. The display element layer 200 can also include a through-hole corresponding to the opening region OA. In another example embodiment, as shown in Figure 3C , the base 100 and the package base 340 can not include a through-hole corresponding to the opening region OA. The display element layer 200 can include a through-hole corresponding to the opening region OA. Further, as another example embodiment, the sealing material 350 disposed in the first non-display region NDA1 in the display panel 10 of Figure 3C may be omitted. Further, the display element layer 200 can not include a through-hole corresponding to the opening region OA, Figure 2 The component 20 that does not require high transmittance of Figure 6 may be disposed in the opening region OA so that the opening region OA can serve as a transmissive region through which light of the component 20 penetrates. Even when the display element layer 200 does not include a through-hole corresponding to the opening region OA, the region of the display element layer 200 corresponding to the opening region OA can ensure transmittance by components (e.g., transistors, storage capacitors, and wiring) that do not include pixel circuits (e.g.,
[0088] Figures 4A-4C is a cross-sectional view of a display panel 10' according to other example embodiments.
[0089] In the example embodiment shown in Figure 4A , the display element layer 200 is on the base 100. The display element layer 200 can be covered by a package member 300' that is a thin film encapsulation layer. The package member 300' that is a thin film encapsulation layer can include at least one inorganic encapsulation layer and at least one organic encapsulation layer. In the example embodiment shown in Figure 4A , the package member 300' includes a first inorganic encapsulation layer 310' and a second inorganic encapsulation layer 330' and an organic encapsulation layer 320' between the first inorganic encapsulation layer 310' and the second inorganic encapsulation layer 330'.
[0090] The first inorganic encapsulation layer 310' and the second inorganic encapsulation layer 330' can each include at least one inorganic insulating material. The inorganic insulating material can include, for example, aluminum oxide, titanium oxide, tantalum oxide, hafnium oxide, zinc oxide, silicon oxide, silicon nitride, and / or silicon oxynitride. The organic encapsulation layer 320' can include, for example, a polymer-based material such as an acrylic resin, an epoxy resin, a polyimide, a polyethylene, and / or the like.
[0091] The substrate 100 can include a polymer resin. The substrate 100 can be multilayered. For example, the substrate 100 can include a first base layer 101, a first barrier layer 102, a second base layer 103, and a second barrier layer 104, which are sequentially stacked in the order stated below.
[0092] The first base layer 101 and the second base layer 103 can each include a polymer resin. For example, the first base layer 101 and the second base layer 103 can each include a polymer resin such as polyether sulfone (PES), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), triacetyl cellulose (TAC), cellulose acetate propionate (CAP), or the like. The polymer resin can be transparent.
[0093] The first barrier layer 102 and the second barrier layer 104 can each be a barrier layer that prevents the penetration of external impurities, and can be a single layer or a multilayer including, for example, silicon nitride (SiN x ) and / or silicon oxide (SiO x ).
[0094] When the display panel 10' includes a substrate 100 that is multilayered and an encapsulation member 300' that is a thin film encapsulation layer, the flexibility of the display panel 10' can be improved.
[0095] In the example embodiment shown in Figure 4A , the through-holes 100H and 300H' that penetrate the substrate 100 and the encapsulation member 300' (thin film encapsulation layer), respectively, are provided in correspondence with the first opening 10H of the display panel 10'. The display element layer 200 can also include a through-hole in correspondence with the opening region OA.
[0096] In another example embodiment, as shown in Figure 4B , the organic encapsulation layer 320' in the encapsulation member 300' (thin film encapsulation layer) includes a through-hole 320H' in correspondence with the opening region OA, and the substrate 100 and the first inorganic encapsulation layer 310' and the second inorganic encapsulation layer 330' can not include through-holes. In another example embodiment, as shown in Figure 4C , the layers in the encapsulation member 300' (thin film encapsulation layer) can not include a through-hole in correspondence with the opening region OA. Thus, the first inorganic encapsulation layer 310' and the second inorganic encapsulation layer 330' and the organic encapsulation layer 320' can cover the opening region OA. In another example embodiment, when the opening region OA is used as a transmissive region through which light penetrates, for example, when the component 20 that does not require high transmittance of the display panel 10 is disposed in the opening region OA, the through-hole in the encapsulation member 300' (thin film encapsulation layer) is not required. Figure 2 Figures 4A-4C In contrast to what is shown in FIG. 1, the display element layer 200 can not include a through-hole corresponding to the opening region OA. Even when the display element layer 200 does not include the through-hole corresponding to the opening region OA, the region of the display element layer 200 corresponding to the opening region OA can ensure the transmittance by not including components (e.g., transistors, storage capacitors, and wirings) of the pixel circuit PC that form the display element layer 200. Figure 6
[0097] Figure 5 is a plan view of the display panel 10 according to an example embodiment, Figure 6 is an equivalent circuit diagram of one pixel P of the display panel 10.
[0098] Referring to Figure 5 , the display panel 10 includes an opening region OA, a display region DA, and first and second non-display regions NDA1 and NDA2. Figure 5 It can be understood that the substrate 100 in the display panel 10 is a view. For example, it can be understood that the substrate 100 includes the opening region OA, the display region DA, and the first and second non-display regions NDA1 and NDA2.
[0099] The display panel 10 includes a plurality of pixels P arranged in the display region DA. As shown in Figure 6 , each pixel P includes a pixel circuit PC and an organic light emitting diode OLED as a display component connected to the pixel circuit PC. The pixel circuit PC can include a first thin film transistor T1, a second thin film transistor T2, and a storage capacitor Cst. Each pixel P can emit, for example, red light, green light, or blue light from the organic light emitting diode OLED or can emit red light, green light, blue light, or white light.
[0100] In the example embodiment shown in Figure 6 , the second thin film transistor T2 is a switching thin film transistor connected to a scan line SL and a data line DL and can transmit a data voltage input from the data line DL to the first thin film transistor T1 according to a switching voltage input from the scan line SL. The storage capacitor Cst can be connected to the second thin film transistor T2 and a driving voltage line PL and can store a voltage corresponding to a difference between a voltage received from the second thin film transistor T2 and a first power voltage ELVDD supplied to the driving voltage line PL.
[0101] In the example embodiment shown in Figure 6 In the example embodiment shown in FIG. 1, the first thin-film transistor T1 is a driving thin-film transistor connected to a driving voltage line PL and a storage capacitor Cst, and can control a driving current flowing from the driving voltage line PL to the organic light-emitting diode OLED based on a voltage value stored in the storage capacitor Cst. The organic light-emitting diode OLED can emit light having a certain brightness according to the driving voltage. A counter electrode (e.g., a cathode) of the organic light-emitting diode OLED can receive a second power voltage ELVSS.
[0102] In Figure 6 , the pixel circuit PC includes two thin-film transistors and one storage capacitor, but the number of thin-film transistors and the number of storage capacitors can vary according to the design of the pixel circuit PC.
[0103] Referring back to Figure 5 , the first non-display area NDA1 can surround the opening area OA. In the present example embodiment, the first non-display area NDA1 is an area in which no display element such as an organic light-emitting diode emitting light is disposed, and a signal line providing a signal to the pixels P disposed around the opening area OA can be located in the first non-display area NDA1. A scan driver 1100 providing a scan signal to each of the pixels P, a data driver 1200 providing a data signal to each of the pixels P, a main power line (not shown) for providing a first power voltage and a second power voltage, etc. can be disposed in the second non-display area NDA2. In Figure 5 , the data driver 1200 is disposed adjacent to one side surface of the substrate 100, but according to another example embodiment, the data driver 1200 can be disposed on a flexible printed circuit board (FPCB) electrically connected to pads disposed at one side of the display panel 10.
[0104] Figure 7 is a plan view of a portion of the display panel 10 according to an example embodiment, and shows signal lines located in the first non-display area NDA1.
[0105] Referring to Figure 7 , the pixels P are disposed in the display area DA around the opening area OA, and the first non-display area NDA1 can be located between the opening area OA and the display area DA.
[0106] The pixels P can be spaced apart from each other around the opening area OA. In a plan view, the pixels P can be disposed at an upper portion and a lower portion based on the opening area OA, and the pixels P can be disposed at a left side and a right side based on the opening area OA. The opening area OA can be located between the pixels P.
[0107] Among the signal lines that supply signals to the pixels P, the signal lines adjacent to the opening region OA can be meandering or detouring around the opening region OA. Some of the data lines DL that pass through the display region DA can extend in the y direction while meandering or detouring along the edges of the opening region OA surrounded by the first non-display region NDA1 to supply data signals to the pixels P arranged at the upper and lower portions of the opening region OA. Some of the scan lines SL that pass through the display region DA can extend in the x direction while meandering or detouring along the edges of the opening region OA surrounded by the first non-display region NDA1 to supply scan signals to the pixels P arranged at the left and right sides of the opening region OA.
[0108] Figure 8 is a cross-sectional view of one pixel P according to an example embodiment taken along the line VIII-VIII' of Figure 7
[0109] Referring to Figure 8 , the pixel circuit PC can be arranged on the substrate 100, and the organic light emitting diode OLED electrically connected to the pixel circuit PC can be arranged on the pixel circuit PC. As described above with reference to Figures 3A-3C and Figures 4A-4C , the substrate 100 can include, for example, a glass material or a polymer resin, and can be a single layer or multiple layers.
[0110] A buffer layer 201 can be formed on the substrate 100 to prevent impurities from penetrating into a semiconductor layer Act of a thin film transistor TFT. The buffer layer 201 can include an inorganic insulating material such as silicon nitride or silicon oxide, and can be a single layer or multiple layers including the above-described inorganic insulating material.
[0111] The pixel circuit PC can be arranged on the buffer layer 201. The pixel circuit PC can include a thin film transistor TFT and a storage capacitor Cst. The thin film transistor TFT can include a semiconductor layer Act, a gate electrode GE, a source electrode SE, and a drain electrode DE. Figure 8 The thin film transistor TFT shown in FIG. 1 can correspond to the driving thin film transistor described with reference to Figure 6 In the present example embodiment, a top gate type in which the gate electrode GE is arranged on the semiconductor layer Act with the gate insulating layer 203 positioned between the gate electrode GE and the semiconductor layer Act is shown, but according to another example embodiment, the thin film transistor TFT can be a bottom gate type.
[0112] The semiconductor layer Act can include polysilicon. In another embodiment, the semiconductor layer Act can include amorphous silicon, oxide semiconductor, or organic semiconductor. The gate electrode GE can include a low-resistance metal material. The gate electrode GE can include, for example, a conductive material including molybdenum (Mo), aluminum (Al), copper (Cu), or titanium (Ti), and can be a single layer or a multi-layer including such a material.
[0113] The gate insulating layer 203 between the semiconductor layer Act and the gate electrode GE can include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide. The gate insulating layer 203 can be a single layer or a multi-layer including such a material.
[0114] The source electrode SE and the drain electrode DE can include a material having good conductivity. The source electrode SE and the drain electrode DE can each include, for example, a conductive material including Mo, Al, Cu, or Ti, and can be a single layer or a multi-layer including such a material. According to an example embodiment, the source electrode SE and the drain electrode DE can be a multi-layer of Ti / Al / Ti.
[0115] The storage capacitor Cst can include a lower electrode CE1 and an upper electrode CE2 stacked with a first interlayer insulating layer 205 therebetween. The storage capacitor Cst can be stacked with the thin film transistor TFT. In this regard, Figure 8 It is shown that the gate electrode GE of the thin film transistor TFT is the lower electrode CE1 of the storage capacitor Cst. In another example embodiment, the storage capacitor Cst and the thin film transistor TFT can not be stacked with each other. The storage capacitor Cst can be covered with a second interlayer insulating layer 207.
[0116] The first interlayer insulating layer 205 and the second interlayer insulating layer 207 can include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, titanium oxide, tantalum oxide, or hafnium oxide. The first interlayer insulating layer 205 and the second interlayer insulating layer 207 can be a single layer or a multi-layer including such a material.
[0117] The pixel circuit PC including the thin film transistor TFT and the storage capacitor Cst can be covered with an insulating layer (planarization insulating layer) 209. The planarization insulating layer 209 can include a surface whose top surface is substantially flat. The planarization insulating layer 209 can include an organic insulating material such as a general-purpose polymer, a polymer derivative having a phenol group, an acrylic polymer, an imide polymer, an arylether polymer, an amide polymer, a fluorine polymer, a p-xylene polymer, a vinyl alcohol polymer, or a blend thereof. According to an example embodiment, the planarization insulating layer 209 can include polyimide. The planarization insulating layer 209 can include an inorganic insulating material or can include an inorganic insulating material and an organic insulating material.
[0118] The pixel electrode 221 can be disposed on the planarization insulating layer 209. The pixel electrode 221 can include a conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), or aluminum zinc oxide (AZO). In another example embodiment, the pixel electrode 221 can include a reflective film including silver (Ag), magnesium (Mg), Al, platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), or a mixture thereof. In another example embodiment, the pixel electrode 221 can further include a film including ITO, IZO, ZnO, or In2O3 positioned above and / or below the reflective film.
[0119] An insulating layer can be disposed on the pixel electrode 221 as a pixel defining layer 211. The pixel defining layer 211 can include an opening exposing a top surface of the pixel electrode 221 while covering edges of the pixel electrode 221. The pixel defining layer 211 can include an organic insulating material. In another implementation, the pixel defining layer 211 can include an inorganic insulating material such as silicon nitride, silicon oxynitride, or silicon oxide. In another implementation, the pixel defining layer 211 can include an organic insulating material and an inorganic insulating material.
[0120] The intermediate layer 222 can include a first functional layer 222a disposed below an emission layer 222b and / or a second functional layer 222c disposed on the emission layer 222b. The emission layer 222b can include a high molecular weight organic material or a low molecular weight organic material that emits light of a specific color.
[0121] The first functional layer 222a can be a single layer or multiple layers. For example, when the first functional layer 222a includes a high molecular weight organic material, the first functional layer 222a can include a hole transport layer (HTL) having a single layer structure, and can include poly(3,4-ethylenedioxythiophene) (PEDOT) or polyaniline (PANI). When the first functional layer 222a includes a low molecular weight organic material, the first functional layer 222a can include a hole injection layer (HIL) and an HTL.
[0122] The second functional layer 222c can be disposed when the first functional layer 222a and the emission layer 222b include a high molecular weight organic material. The second functional layer 222c can be a single layer or multiple layers. The second functional layer 222c can include an electron transport layer (ETL) and / or an electron injection layer (EIL).
[0123] The emission layer 222b of the intermediate layer 222 can be provided for each pixel in the display region DA. The emission layer 222b can contact a top surface of the pixel electrode 221 exposed by the opening of the pixel-defining layer 211. Each of the first functional layer 222a and the second functional layer 222c of the intermediate layer 222 can be a single body, and can extend toward the first non-display region NDA1 (see FIG. 1) to be positioned in the first non-display region NDA1 and the display region DA. Figure 5 ) to be positioned in the first non-display region NDA1 and the display region DA.
[0124] The counter electrode 223 can include a conductive material having a low work function. For example, the counter electrode 223 can include a (semi-)transparent layer including Ag, Mg, Al, Pt, Pd, Au, Ni, Nd, Ir, Cr, Li, calcium (Ca), or an alloy thereof. In another embodiment, the counter electrode 223 can further include a layer including ITO, IZO, ZnO, or In2O3 positioned on the (semi-)transparent layer including the above-described material. The counter electrode 223 as a single body can be provided not only in the display region DA but also in the first non-display region NDA1. The intermediate layer 222 and the counter electrode 223 can be provided via, for example, a thermal deposition method.
[0125] The spacer 213 can be provided on the pixel-defining layer 211. The spacer 213 can include, for example, an organic insulating material such as polyimide. In another embodiment, the spacer 213 can include an inorganic insulating material such as silicon nitride or silicon oxide, or can include an organic insulating material and an inorganic insulating material.
[0126] The spacer 213 can include a material different from that of the pixel-defining layer 211. In another embodiment, the spacer 213 can include the same material as that of the pixel-defining layer 211, and in this case, the pixel-defining layer 211 and the spacer 213 can be formed together, for example, via a mask process using a half-tone mask. According to an example embodiment, the pixel-defining layer 211 and the spacer 213 can include polyimide.
[0127] The cap layer 230 can be disposed on the counter electrode 223. The cap layer 230 can include an inorganic material and / or an organic material, for example, LiF.
[0128] Figure 9 is a plan view of an input detection layer 40 on a display panel 10 according to an example embodiment.
[0129] Referring to Figure 9 , the input detection layer 40 can include a first detection electrode 410, first traces 415-1 to 415-4 connected to the first detection electrode 410, a second detection electrode 420, and second traces 425-1 to 425-5 connected to the second detection electrode 420.
[0130] The first detection electrodes 410 can be arranged in a y direction, and the second detection electrodes 420 can be arranged in an x direction crossing the y direction. The first detection electrodes 410 arranged in the y direction can be connected to each other via first connection electrodes 411 therebetween, and can form first detection lines 410C1 to 410C4. The second detection electrodes 420 arranged in the x direction can be connected to each other via second connection electrodes 421 therebetween, and can form second detection lines 420R1 to 420R5. The first detection lines 410C1 to 410C4 and the second detection lines 420R1 to 420R5 can cross each other. For example, the first detection lines 410C1 to 410C4 can be perpendicular to the second detection lines 420R1 to 420R5.
[0131] The first detection lines 410C1 to 410C4 can be connected to pads of the detection signal pad unit 440 through first traces 415-1 to 415-4 disposed in the second non-display area NDA2. For example, the first traces 415-1 to 415-4 can have a dual routing structure connected to the top and bottom of the first detection lines 410C1 to 410C4, respectively. The first traces 415-1 to 415-4 connected to the top and bottom of the first detection lines 410C1 to 410C4, respectively, can be connected to corresponding first pads 441C1 and 441C2.
[0132] The second detection lines 420R1 to 420R5 can be connected to pads of the detection signal pad unit 440 through second traces 425-1 to 425-5 disposed in the second non-display area NDA2. For example, the second traces 425-1 to 425-5 can be connected to corresponding second pads 442R.
[0133] Ground lines can be arranged in the second non-display area NDA2, which can help prevent external electrostatic discharge (ESD) (e.g., ESD introduced through the second non-display area NDA2) from being introduced to the input detection layer 40. For example, Figure 9 A first ground line 461 extending along the left and top sides of the second non-display area NDA2 and a second ground line 462 extending along the right side of the second non-display area NDA2 are shown. The first ground line 461 and the second ground line 462 can be spaced apart from each other by a certain distance. In this regard, Figure 9A first ground line 461 and a second ground line 462, spaced apart from each other, are shown in the area adjacent to the upper right side of the display area DA in the second non-display area NDA2. The first ground line 461 and the second ground line 462 can be connected to pads 446a and 446b, respectively. Both the first ground line 461 and the second ground line 462 can have a constant voltage level (e.g., constant zero voltage, constant negative DC voltage, or constant positive DC voltage). The first ground line 461 and the second ground line 462 can have constant voltages of different levels or the same level.
[0134] Protective lines can be placed around the group of first traces 415-1 to 415-4 and the group of second traces 425-1 to 425-5, which can help prevent interference between adjacent lines or wiring. For example, as Figure 9 As shown, the first protective wire 451 can be located between the upper group of the first ground wire 461 and the first traces 415-1 to 415-4, which are respectively connected to the upper side of the first detection lines 410C1 to 410C4. The second protective wire 452 can be located between the second ground wire 462 and the group of the second traces 425-1 to 425-5. The third protective wire 453 can be located between the upper group of the first traces 415-1 to 415-4 and the lower group of the first traces 415-1 to 415-4, which are respectively connected to the lower side of the first detection lines 410C1 to 410C4. The fourth protective wire 454 can be located between the lower group of the first traces 415-1 to 415-4 and the group of the second traces 425-1 to 425-5. The first protective wire 451 to the fourth protective wire 454 can be connected to pads 445a to 445d, respectively. The first protective line 451 to the fourth protective line 454 can all have a constant voltage level. For example, the first protective line 451 to the fourth protective line 454 can have constant voltage levels that are different from each other, or they can have the same constant voltage level.
[0135] The first line 470 can be arranged in the first non-display area NDA1, which helps prevent damage caused by external ESD introduced into the input detection layer 40 (e.g., ESD introduced through the periphery of the opening area OA). Figure 9 As shown, the first line 470 may have an annular shape surrounding the opening region OA. According to another example embodiment, the first line 470 may have a shape that partially (e.g., at least 90%) surrounds the opening region OA. According to an example embodiment, the first line 470 may have a continuous, completely surrounding annular shape.
[0136] The first line 470 may have a constant voltage level. According to an example embodiment, the first line 470 may be electrically connected to a third ground line 430 arranged in a second non-display area NDA2 via a connection line 480 passing through the display area DA.
[0137] The third ground line 430 can be located between, for example, the display area DA and the upper group of the first traces 415-1 to 415-4. The third ground line 430 can be connected to the pad 443 included in the detection signal pad unit 440. The first line 470 of the first non-display area NDA1, the third ground line 430 of the second non-display area NDA2, and the connection line 480 connected to the first line 470 and the third ground line 430 can have the same voltage level (constant voltage).
[0138] Figure 9 A dual routing structure in which the first traces 415-1 to 415-4 are connected to the upper and lower portions of the first detection lines 410C1 to 410C4, respectively, is illustrated. In another example embodiment, the first traces 415-1 to 415-4 can be connected to only the upper or lower portions of the first detection lines 410C1 to 410C4.
[0139] Figure 10 is a cross-sectional view of an input detection layer 40 according to an example embodiment, and corresponds to a cross-sectional view taken along a line X-X' of Figure 9 .
[0140] Referring to Figure 10 , the input detection layer 40 can include a first conductive layer CML1 and a second conductive layer CML2 disposed on the display panel 10. A first insulating layer 43 can be disposed between the first conductive layer CML1 and the second conductive layer CML2, and a second insulating layer 45 can be disposed on the second conductive layer CML2.
[0141] The first conductive layer CML1 and the second conductive layer CML2 can include, for example, a metal layer or a transparent conductive layer. The metal layer can include Mo, Ag, Ti, Cu, Al, or an alloy thereof. The transparent conductive layer can include a transparent conductive oxide such as ITO, IZO, ZnO, or ITZO. In addition, the transparent conductive layer can include a conductive polymer such as PEDOT, a metal nanowire, or graphene.
[0142] The first conductive layer CML1 and the second conductive layer CML2 can include a single layer or multiple layers. The single layer of the first conductive layer CML1 and the second conductive layer CML2 can include a metal layer or a transparent conductive layer, which can be as described above. The multiple layers of the first conductive layer CML1 and the second conductive layer CML2 can include multiple layers of metal layers. The multiple layers of metal layers can include, for example, 3 layers of Ti / Al / Ti. In another embodiment, the multiple layers of metal layers can include a metal layer and a transparent conductive layer. The first conductive layer CML1 and the second conductive layer CML2 can have different or the same stack structure. For example, the first conductive layer CML1 can include a metal layer, and the second conductive layer CML2 can include a transparent conductive layer. In another embodiment, the first conductive layer CML1 and the second conductive layer CML2 can include the same multiple layers of metal layers.
[0143] The first insulating layer 43 and the second insulating layer 45 can include an inorganic material such as silicon oxide, silicon nitride, or silicon oxynitride. In another embodiment, the first insulating layer 43 and the second insulating layer 45 can include an organic material.
[0144] The first detection electrode 410 and the second detection electrode 420 and the first connection electrode 411 and the second connection electrode 421 described above with reference to Figure 9 some of them can be included in the first conductive layer CML1, and the rest of them can be included in the second conductive layer CML2. For example, as shown in Figure 10 , the first conductive layer CML1 can include the first connection electrode 411, and the second conductive layer CML2 can include the first detection electrode 410 and the second detection electrode 420 (see Figure 9 and Figure 10 ) and the second connection electrode 421. Adjacent second detection electrodes 420 can be electrically connected through the second connection electrodes 421 located on the same layer. Adjacent first detection electrodes 410 can be electrically connected through the first connection electrodes 411 while being connected to the first connection electrodes 411 through the contact holes CNT penetrating the first insulating layer 43.
[0145] In the example embodiment shown in Figure 10 , the input detection layer 40 includes the first conductive layer CML1, the first insulating layer 43, the second conductive layer CML2, and the second insulating layer 45. According to another example embodiment, an insulating layer including an inorganic material or an organic material can also be arranged below the first conductive layer CML1.
[0146] The stack structure and the material of the first conductive layer CML1 and the second conductive layer CML2 can be determined in consideration of sensitivity, for example, the first detection electrode 410 and the second detection electrode 420 (see Figure 9) the stack structure and material of the first connection electrode 411 and the second connection electrode 421. RC delay can affect sensing sensitivity. In some embodiments, a detection electrode including a metal layer can have a low resistance compared to a transparent conductive layer, so that the RC value can be reduced. Accordingly, the charging time of a capacitor defined between the detection electrodes can be reduced. In some embodiments, a detection electrode including a transparent conductive layer can be invisible to a user and can have a high input area compared to a metal layer, thereby increasing capacitance.
[0147] Figure 11A is a plan view of a first conductive layer CML1 in an input detection layer 40 according to an example embodiment, Figure 11B is a plan view of a second conductive layer CML2 in an input detection layer 40 according to an example embodiment.
[0148] Referring to Figure 10 , Figure 11A and Figure 11B , the first conductive layer CML1 can include a first connection electrode 411, and the second conductive layer CML2 can include a first detection electrode 410, a second detection electrode 420, and a second connection electrode 421.
[0149] The second detection electrodes 420 can be connected to each other through the second connection electrodes 421 disposed on the same layer as the second detection electrodes 420. The first connection electrodes 411 electrically connecting adjacent first detection electrodes 410 can be connected to the adjacent first detection electrodes 410 through contact holes CNT disposed in the first insulating layer 43.
[0150] When the first detection electrodes 410 and the second detection electrodes 420 include transparent conductive layers, the first detection electrodes 410 and the second detection electrodes 420 can have a rectangular shape or a diamond shape as shown in Figure 11B , and can have an area corresponding to the above-described shapes, and thus can have a relatively large input area and have high capacitance compared to the grid type detection electrodes described below.
[0151] Figure 12A is a plan view of a first conductive layer CML1 in an input detection layer 40 according to another example embodiment, Figure 12B is a plan view of a second conductive layer CML2 in an input detection layer 40 according to another example embodiment.
[0152] Referring to Figure 10 , Figure 12A and Figure 12BThe first and second detection electrodes 410 and 420 and the first and second connection electrodes 411 and 421 can have a mesh (or lattice or grid) shape. When the first and second detection electrodes 410 and 420 include metal layers, the first and second detection electrodes 410 and 420 can have a mesh shape as shown in FIGS. 4A and 4B, which can reduce visibility to a user. Figure 12A and Figure 12B .
[0153] The first and second connection electrodes 411 and 421 can include holes 410H and 420H between the metal layers of the mesh shape, respectively. The holes 410H and 420H can be disposed to overlap the emission area P-E of the pixel of the display panel 10 of Figure 10 .
[0154] The second detection electrodes 420 can be connected to each other through the second connection electrodes 421 disposed on the same layer as the second detection electrodes 420. The first detection electrodes 410 can be connected to each other through the first connection electrodes 411 disposed on different layers from the first detection electrodes 410.
[0155] Figure 13 is a partial plan view of a periphery of an opening area OA of the input detection layer 40 according to an example embodiment.
[0156] In the example embodiment shown in Figure 13 , the first lines 470 described above with reference to Figure 9 are located around the opening area OA, e.g., in the first non-display area NDA1. The first and second connection electrode sectors 491 and 492 can be arranged around the first lines 470.
[0157] Some of the first and second detection electrodes 410 and 420 can be spaced apart from each other with respect to the opening area OA. For example, as shown in Figure 13 , the first detection electrodes 410 arranged at the upper right and lower right of the opening area OA can be spaced apart from each other and electrically connected to each other through the first connection electrode sector 491. Similarly, the second detection electrodes 420 arranged at the lower left and lower right of the opening area OA can be spaced apart from each other and electrically connected to each other through the second connection electrode sector 492.
[0158] Figure 13 Two connection electrode sectors are shown as an example. The number of connection electrode sectors can vary, e.g., according to the size and location of the opening area OA, based on the number and type of detection electrodes spaced apart from each other among the first and second detection electrodes 410 and 420 around the opening area OA. The first and second connection electrode sectors 491 and 492 can be located around the first lines 470 described above with reference to Figure 10The first conductive layer CML1 is described above. In another embodiment, the first connection electrode sector 491 and the second connection electrode sector 492 can be located on the second conductive layer CML2 (see Figure 10 ) above. In another embodiment, some of the first connection electrode sector 491 and the second connection electrode sector 492 can be located on the first conductive layer CML1, and others can be located on the second conductive layer CML2, while including a region connected to the region of the first conductive layer CML1 described above.
[0159] Figure 14 is a plan view of a structure around the first line 470 in the input detection layer 40 according to an example embodiment, Figure 15A is a cross-sectional view taken along an extension direction of the connection line 480 of Figure 14 , and Figure 15B and Figure 15C are modified embodiments of Figure 15A . For convenience, in Figure 14 , the connection electrode sectors described above with reference to Figure 13 are omitted.
[0160] With reference to Figure 14 and Figure 15A , the connection line 480 (connecting the first line 470 located in the first non-display region NDA1 to the third ground line 430 located in the second non-display region NDA2) can pass between the first detection electrode 410 and the second detection electrode 420. The connection line 480 can be connected to the third ground line 430 and the first line 470 through the first contact hole CNT1 and the second contact hole CNT2, respectively.
[0161] The first detection electrode 410 and the second detection electrode 420 can be located on the same layer as described above with reference to Figure 10 , Figure 11B and Figure 12B , and can be spaced apart from each other. The second detection electrode 420 of the second conductive layer CML2 can be connected to the second connection electrode 421 of the second conductive layer CML2, and the first detection electrode 410 of the second conductive layer CML2 can be connected to the first connection electrode 411 of the first conductive layer CML1. According to an example embodiment, as shown in Figure 14 , the first connection electrode 411 (connecting the first detection electrode 410) can be connected to an intermediate electrode 411C located in the second conductive layer CML2. In this way, adjacent first detection electrodes 410 can each be connected to the intermediate electrode 411C via the first connection electrode 411, where the intermediate electrode 411C can function as a connection electrode. The intermediate electrode 411C can be located on the same layer as the first detection electrode 410.
[0162] According to an example embodiment, the first dummy electrode 410D and the second dummy electrode 420D can be located between the first detection electrode 410 and the second detection electrode 420. The first dummy electrode 410D and the second dummy electrode 420D can be spaced apart from the adjacent electrodes. The first dummy electrode 410D and the second dummy electrode 420D can be in an electrically floating state. The first dummy electrode 410D and the second dummy electrode 420D can help prevent a moire pattern or a pattern of the first detection electrode 410 and the second detection electrode 420 from being visible to a user by a gap between the first detection electrode 410 and the second detection electrode 420. The gap between the first detection electrode 410 and the second detection electrode 420 can be sufficiently separated by the first dummy electrode 410D and the second dummy electrode 420D. Accordingly, touch sensing can be improved. The first dummy electrode 410D and the second dummy electrode 420D can be located on the same layer as the first detection electrode 410 and the second detection electrode 420. For example, the second conductive layer CML2 can include the first detection electrode 410 and the second detection electrode 420 and the first dummy electrode 410D and the second dummy electrode 420D.
[0163] The connection line 480 can be located in a gap between the first detection electrode 410 and the second detection electrode 420 and / or in a gap between the first dummy electrode 410D and the second dummy electrode 420D. Referring to Figure 15A , the first conductive layer CML1 can include the third ground line 430 and the first line 470, and the second conductive layer CML2 can include the connection line 480. The connection line 480 can be connected to the third ground line 430 and the first line 470 through the first contact hole CNT1 and the second contact hole CNT2 provided in the first insulating layer 43 between the first conductive layer CML1 and the second conductive layer CML2, respectively. According to an example embodiment, the connection line 480 can include the same material as that of the first detection electrode 410 and the second detection electrode 420, and the first line 470 can include a different material from that of the first detection electrode 410 and the second detection electrode 420.
[0164] The first conductive layer CML1 can include a metal layer, and the metal layer can include Mo, Mg, Ag, Ti, Cu, Al, or an alloy thereof. The second conductive layer CML2 can include a transparent conductive layer of ITO, and the first detection electrode 410 and the second detection electrode 420 including the transparent conductive layer can have a rectangular shape or a diamond shape having a certain area as shown in Figure 14 and Figure 11B .
[0165] According to another example embodiment, the first conductive layer CML1 and the second conductive layer CML2 can include a metal layer, and the first detection electrode 410 and the second detection electrode 420 including the metal layer can have a rectangular shape or a diamond shape having a certain area as shown inFigure 12B When the first conductive layer CML1 and the second conductive layer CML2 include metal layers, one of the first line 470 and the third ground line 430 can be included in the first conductive layer CML1, and the other can be included in the second conductive layer CML2. In this regard, Figure 15B The third ground line 430 is shown as included in the first conductive layer CML1 and the first line 470 is shown as included in the second conductive layer CML2. According to another example embodiment, the third ground line 430 can be included in the second conductive layer CML2 and the first line 470 can be included in the first conductive layer CML1. According to another example embodiment, as Figure 15C The first line 470 and the third ground line 430 can be included in the second conductive layer CML2, as shown in FIG. 4B.
[0166] Figure 16 is a plan view of a structure around the first line 470 in the input detection layer 40 according to another example embodiment, Figure 17 is a cross-sectional view taken along an extension direction of the connection line 480 of FIG. 4A. For convenience, in Figure 16 , the connection electrode sectors described above with reference to Figure 16 are omitted. Figure 13 Referring to
[0167] and Figure 16 , features are the same as those described above with reference to Figure 17 and Figure 14 except that the connection line 480 is located on the same layer as the third ground line 430 and the first line 470 (included in the first conductive layer CML1). Hereinafter, differences will be mainly described below. Figure 15C The first conductive layer CML1 can include the third ground line 430, the first line 470, and the connection line 480. The third ground line 430, the first line 470, and the connection line 480 can be monolithic, and thus the first insulating layer 43 can not include contact holes for connecting the third ground line 430 and the connection line 480 and connecting the first line 470 and the connection line 480.
[0168]
[0169] is a plan view of a structure around the first line 470 in the input detection layer 40 according to another example embodiment, Figure 18 is a cross-sectional view taken along an extension direction of the connection line 480 of FIG. 4A. For convenience, in Figure 19 , the connection electrode sectors described above with reference to Figure 18 are omitted. Figure 18 Figure 13 Referring to and
[0170] , features are the same as those described above with reference to Figure 18 and Figure 19except that the connection line 480 is superposed on at least one of the first detection electrode 410 and the second detection electrode 420, the features are the same as those described above with reference to FIGS. 1A and 1B. Figure 14 and Figure 15C The differences will be mainly described below.
[0171] In the present example embodiment, the first conductive layer CML1 includes the third ground line 430, the first line 470, and the connection line 480. The connection line 480 can form a single body with the third ground line 430 and the first line 470. A first portion of the connection line 480 passing through the display area DA can be superposed on the second detection electrode 420 arranged in the display area DA, and a second portion of the connection line 480 can be superposed on the first detection electrode 410 arranged in the display area DA.
[0172] The first conductive layer CML1 can include the first connection electrode 411 and the connection line 480. The second portion of the connection line 480 can be superposed on the first detection electrode 410 while meandering or detouring around the first connection electrode 411. According to another example embodiment, when the first connection electrode 411 is included in a third conductive layer different from the first conductive layer CML1, the connection line 480 can be superposed on the first connection electrode 411, and a portion of the connection line 480 passing through the display area DA can be superposed on only one of the first detection electrode 410 and the second detection electrode 420.
[0173] Figure 20 is a plan view of a structure around the first line 470 in the input detection layer 40 according to another example embodiment, Figure 21 is a cross-sectional view taken along an extension direction of the connection line 480 of Figure 20 . For convenience, in Figure 20 , the connection electrode sectors described above with reference to Figure 13 are omitted.
[0174] Referring to Figure 20 and Figure 21 , the connection line 480 can be located between sub-detection electrodes of the second detection electrode 420. For example, the second detection electrode 420 can include a first sub-detection electrode 420A and a second sub-detection electrode 420B, and the connection line 480 can be located between the first sub-detection electrode 420A and the second sub-detection electrode 420B.
[0175] The first conductive layer CML1 can include the third ground line 430, the first line 470, the first connection electrode 411, and the sub-connection electrode 421S. The second conductive layer CML2 can include the first detection electrode 410, the intermediate electrode 411C, the first and second sub-detection electrodes 420A and 420B, the first and second dummy electrodes 410D and 420D, and the connection line 480. The first and second sub-detection electrodes 420A and 420B can be electrically connected to each other via the sub-connection electrode 421S.
[0176] The connection line 480 can be connected to the third ground line 430 and the first line 470 through the first and second contact holes CNT1 and CNT2 of the first insulating layer 43, respectively, and a portion of the connection line 480 can overlap the sub-connection electrode 421S in the display area DA.
[0177] Figure 22 is a plan view of the input detection layer 40 on the display panel 10 according to another example embodiment. Except that the third ground line 430 and the corresponding pad 443 are omitted, Figure 22 The input detection layer 40 of Figure 9 has the same configuration as that described above with reference to
[0178] With reference to Figure 22 , the first line 470 arranged in the first non-display area NDA1 while surrounding the opening area OA is electrically connected to the second wiring arranged in the second non-display area NDA2, for example, to the third guard line 453. The first line 470 and the third guard line 453 can be electrically connected to each other via the connection line 480. In the present example embodiment, the third guard line 453 has a voltage level of a constant voltage. The first line 470 can have the same voltage level as the third guard line 453.
[0179] Figure 23 is a plan view of a structure around the first line 470 in the input detection layer 40 according to another example embodiment, Figure 24 is a cross-sectional view taken along an extension direction of the connection line 480 of Figure 23 Although not shown in Figure 23 , the connection electrode sector described above with reference to Figure 13 may be arranged in the first non-display area NDA1.
[0180] With reference to Figure 23 and Figure 24 , except that the first line 470 is connected to the third guard line 453 through the connection line 480, the features of the first line 470 are the same as those described above with reference to Figure 14 and Figure 15CThe described features are the same. The first line 470 is located in the first non-display area NDA1 while surrounding the opening area OA, and the third guard line 453 is located in the second non-display area NDA2.
[0181] For example, the first conductive layer CML1 can include the third guard line 453, the first line 470, and the first connection electrode 411. The second conductive layer CML2 can include the first and second detection electrodes 410 and 420, the first and second dummy electrodes 410D and 420D, the intermediate electrode 411C, the second connection electrode 421, and the connection line 480. The connection line 480 can be connected to the third guard line 453 and the first line 470 through the first and second contact holes CNT1 and CNT2 provided in the first insulating layer 43 (provided between the first and second conductive layers CML1 and CML2), respectively.
[0182] In Figure 23 , as an example, the connection line 480 is included in the second conductive layer CML2. According to another example embodiment, the connection line 480 can be included in the first conductive layer CML1 as described above with reference to Figure 16 , the connection line 480, the third guard line 453, and the first line 470 can be provided as a single body. According to another example embodiment, the connection line 480 can be included in the first conductive layer CML1 while being overlapped with at least one of the first and second detection electrodes 410 and 420 as described above with reference to Figure 18 , the connection line 480, the third guard line 453, and the first line 470 can be provided as a single body. According to another example embodiment, the connection line 480 can be included in the first conductive layer CML1 while being overlapped with at least one of the first and second detection electrodes 410 and 420 as described above with reference to Figure 20 , the connection line 480, the third guard line 453, and the first line 470 can be provided as a single body. According to another example embodiment, the connection line 480 can be included in the second conductive layer CML2 and can pass between the first and second sub-detection electrodes 420A and 420B.
[0183] By summarizing and reviewing, various functions connected or linked to a display device are added while expanding an area occupied by a display area in a display device. In expanding the area while adding various functions, it has been considered to form an opening in the display area.
[0184] In a display device including an opening or an opening area, electrostatic discharge (ESD) from the outside can be introduced through the opening or the opening area, and in this case, an electrode or a wiring (or a line) for detecting a touch input applied to the display device can be damaged by the ESD.
[0185] As described above, an embodiment can provide a display device configured to help prevent an input detection layer and components around the input detection layer from being damaged by ESD introduced through an opening area or an opening.
[0186] Example embodiments have been disclosed herein and, although a particular order thereof can have been shown, or described herein, these particular orders are merely examples and are not intended to limit the described embodiments. In some instances, well-known structures have not been described in detail in order to avoid obscuring the described embodiments. Thus, it will be appreciated that the scope of the disclosed embodiments is not limited to any specific embodiments described herein. In the drawings and specification, there have been disclosed embodiments and examples. It is explicitly contemplated that combinations of these embodiments and examples can be made and still be within the scope of the application. Modifications can be made to these general and specific embodiments and still be within the scope of the application.
Claims
1. A display device comprising: a display panel including an opening penetrating the display panel, a display area adjacent to the opening, a first non-display area between the opening and the display area, and a second non-display area surrounding the display area; and an input detection layer on the display panel, the input detection layer including: first detection electrodes arranged in a first direction; second detection electrodes arranged in a second direction intersecting the first direction; first dummy electrodes and second dummy electrodes between and spaced apart from adjacent detection electrodes among the first detection electrodes and the second detection electrodes; a first line in the first non-display area having a shape at least partially surrounding the opening; a second line in the second non-display area having a voltage level of a constant voltage; and a connection line connecting the first line to the second line, wherein the first detection electrodes and the second detection electrodes are in the display area, and wherein the connection line is in a gap between the first dummy electrodes and the second dummy electrodes. The first line has a ring shape completely surrounding the opening.
2. The display device according to claim 1, wherein The input detection layer further includes:
3. The display device according to claim 1, wherein a first conductive layer; a first insulating layer on the first conductive layer; a second conductive layer on the first insulating layer and including the first detection electrodes and the second detection electrodes; and a second insulating layer on the second conductive layer. The first conductive layer or the second conductive layer includes the connection line.
4. The display device according to claim 3, wherein The connection line includes a same material as materials of the first detection electrodes and the second detection electrodes.
5. The display device of claim 4, wherein, 6.The display device of claim 5, wherein: the first conductive layer includes at least one of the first line and the second line, and the connection line is connected to at least one of the first line and the second line via a contact hole of the first insulating layer. The first conductive layer includes the connection line, and the connection line is under the first detection electrodes and the second detection electrodes, the first insulating layer is between the connection line and the first detection electrodes and the second detection electrodes.
7. The display device according to claim 3, wherein The first conductive layer includes the connection line, and the connection line is superposed with at least one of the first detection electrodes and the second detection electrodes.
8. The display device according to claim 4, wherein 9.The display device of claim 1, further comprising a connection electrode sector connecting adjacent first detection electrodes among the first detection electrodes or adjacent second detection electrodes among the second detection electrodes, the connection electrode sector being in the first non-display area. 10.A display device comprising: a substrate including an opening penetrating the substrate, a display area, a first non-display area between the opening and the display area, and a second non-display area spaced apart from the first non-display area, the display area being between the first non-display area and the second non-display area; a plurality of display elements arranged in the display area; and an input detection layer on the substrate, the input detection layer including: first detection electrodes arranged in a first direction; second detection electrodes arranged in a second direction intersecting the first direction; first dummy electrodes and second dummy electrodes between and spaced apart from adjacent detection electrodes among the first detection electrodes and the second detection electrodes; a first line in the first non-display area having a shape at least partially surrounding the opening; a second line in the second non-display area having a voltage level of a constant voltage; and a connection line connecting the first line to the second line, wherein the first detection electrodes and the second detection electrodes are in the display area, and wherein the connection line is in a gap between the first dummy electrodes and the second dummy electrodes. a sealing member over the plurality of display elements, the sealing member covering the display region and the first non-display region; a plurality of first detection electrodes arranged on the sealing member in a first direction; a plurality of second detection electrodes arranged on the sealing member in a second direction intersecting the first direction; first dummy electrodes and second dummy electrodes between and spaced apart from adjacent detection electrodes among the plurality of first detection electrodes and the plurality of second detection electrodes; a first line disposed on the sealing member and made of a conductive material, the first line having a shape at least partially surrounding the opening in a plan view between the opening and the display region in the first non-display region; a second line of conductive material in the second non-display region having a constant voltage level; and a connection line connecting the first line to the second line, wherein the connection line is in a gap between the first dummy electrodes and the second dummy electrodes. The first line has a constant voltage level.
11. The display device of claim 10, wherein, The connection line is on the same layer as the first detection electrodes.
12. The display device of claim 10, wherein, 13. The display device according to claim 12, further comprising an insulating layer provided between the connection line and either of the first line and the second line, wherein the connection line is connected to the either of the first line and the second line via a contact hole of the insulating layer. The connection line is on the same layer as either of the first line and the second line.
14. The display device of claim 10, wherein, The connection line includes a metal layer.
15. The display device of claim 14, wherein, The connection line is superposed with at least one of the first detection electrodes and the second detection electrodes.
16. The display device of claim 10, wherein, The first detection electrodes and the second detection electrodes each include a transparent conductive layer.
17. The display device of claim 10, wherein, The first line includes a material different from materials of the first detection electrodes and the second detection electrodes.
18. The display device of claim 17, wherein, The first detection electrodes and the second detection electrodes each include a metal layer.
19. The display device of claim 10, wherein, 20. The display device according to claim 10, further comprising a connection electrode sector connecting adjacent ones of the first detection electrodes or adjacent ones of the second detection electrodes.
21. The display device according to claim 10, wherein: the opening includes a first arc shape, and the first line has a second arc shape parallel to the first arc shape of the opening when the first line passes around the opening. The first line passes around more than half of the opening.
22. The display device of claim 10, wherein, The first line completely passes around the opening.
23. The display device of claim 22, wherein, The first non-display region includes:
24. The display device of claim 23, wherein, a first connection electrode sector electrically connecting adjacent ones of the first detection electrodes, and a second connection electrode sector electrically connecting adjacent ones of the second detection electrodes. The first connection electrode sector and the second connection electrode sector are each arranged around and passing the first line.
25. The display device of claim 24, wherein, The component includes a sensor, a camera, a speaker, a clock hand, or a hand indicator.
26. A display device according to any one of claims 1 to 25, further comprising an assembly corresponding to the opening, wherein,
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