Display device with light-emitting stacked structure

Abstract

The display device includes a plurality of pixel blocks spaced apart from each other, each pixel block includes a substrate and a plurality of light-emitting stacked structures arranged on the substrate, wherein a distance between two adjacent light-emitting stacked structures in the same pixel block is substantially equal to a shortest distance between two adjacent light-emitting stacked structures in different pixel blocks.

Description

[0001] This application is a divisional application of application No. 201980002745.2, filed on January 2, 2019, entitled “Display device with light-emitting stacked structure”. Technical Field

[0002] Exemplary embodiments of the invention generally relate to a light emitting stack structure and a display device including the light emitting stack structure, and more particularly, to a micro light emitting diode having a stack structure and a display device having the micro light emitting diode. Background Art

[0003] As an inorganic light source, light emitting diodes have been used in various technical fields such as displays, car lights, general lighting, etc. With the advantages of long life, low power consumption and high response speed, light emitting diodes have rapidly replaced existing light sources.

[0004] Light emitting diodes have been mainly used as backlight light sources in display devices. However, recently, micro LED displays have been developed as next-generation displays capable of directly using light emitting diodes to generate images.

[0005] Generally, a display device emits light of various colors by using mixed color light of blue light, green light, and red light. The display device includes pixels each having sub-pixels corresponding to blue, green, and red, and the color of a specific pixel can be determined based on the color of the sub-pixels therein, and an image can be displayed by a combination of pixels.

[0006] In a micro-LED display, the micro-LEDs corresponding to each sub-pixel are arranged on a two-dimensional plane. Therefore, a large number of micro-LEDs need to be arranged on one substrate. Specifically, since different types of micro-LEDs correspond to blue sub-pixels, green sub-pixels, and red sub-pixels, respectively, micro-LEDs grown on different substrates can be mounted on one display panel.

[0007] The above information disclosed in this Background section is only for understanding the background of the inventive concept and therefore it may contain information that does not constitute the prior art. Summary of the invention

[0008]

Technical issues

[0009] Micro LEDs have very small sizes (having a surface area of ​​about 10,000 square micrometers (μm) or less), and therefore, there are various problems due to such small sizes. Specifically, it is difficult to mount micro LEDs (especially, more than hundreds of thousands or millions are required) on a display panel due to their small sizes, and it is also difficult to replace defective micro LEDs with good quality micro LEDs.

[0010]

Technical solution

[0011] According to an exemplary embodiment, a display device includes a plurality of pixel blocks spaced apart from each other, each pixel block includes a substrate and a plurality of light-emitting stacked structures arranged on the substrate, wherein a distance between two adjacent light-emitting stacked structures in the same pixel block is substantially equal to a shortest distance between two adjacent light-emitting stacked structures in different pixel blocks.

[0012] Each pixel block may have substantially the same shape.

[0013] The substrate may have a substantially polygonal shape, and the light emitting stacked structure may be disposed at vertices of the polygonal shape.

[0014] The substrate may have a substantially triangular shape, and the light emitting stacked structure may be disposed at vertices of the triangular shape.

[0015] The light emitting stack structures may be substantially regularly arranged in at least one of a first direction and a second direction crossing the first direction.

[0016] The pixel blocks may have shapes different from each other.

[0017] The substrate may include a silicon substrate.

[0018] The substrate may include a penetrating electrode penetrating an upper surface and a lower surface of the substrate and electrically connected to the light emitting stack structure.

[0019] Each light emitting stack structure may include a plurality of epitaxial subunits sequentially disposed one above another, the plurality of epitaxial subunits emitting light of different colors and having overlapping light emitting regions, and at least one of the epitaxial subunits may have an area different from that of another epitaxial subunit.

[0020] The area of ​​the epitaxial subunit may gradually decrease along the first direction.

[0021] The upper epitaxial subunit may completely overlap the lower epitaxial subunit.

[0022] Light emitted from each epitaxial subunit may have a different energy band, and the energy band of the light may gradually increase along the first direction.

[0023] Each epitaxial subunit may be independently drivable.

[0024] Light emitted from the lower epitaxial sub-unit may be configured to be emitted to the outside of the display device through the epitaxial sub-unit disposed thereon.

[0025] The epitaxial sub-unit disposed on the lower epitaxial sub-unit may be configured to transmit about 80% or more of light emitted from the lower epitaxial sub-unit.

[0026] The epitaxial subunit may include: a first epitaxial stack configured to emit a first color light; a second epitaxial stack arranged on the first epitaxial stack to emit a second color light having a band different from that of the first color light; and a third epitaxial stack arranged on the second epitaxial stack to emit a third color light having a band different from that of the first color light and the second color light.

[0027] The first color light, the second color light, and the third color light may be red light, green light, and blue light, respectively.

[0028] Each of the first epitaxial stack, the second epitaxial stack, and the third epitaxial stack may include a p-type semiconductor layer, an active layer disposed on the p-type semiconductor layer, and an n-type semiconductor layer disposed on the active layer.

[0029] The display device may be configured to be driven in one of a passive matrix method and an active matrix method.

[0030] At least one of the light emitting stack structures may include a micro-LED having a surface area of ​​less than about 10,000 μm 2 .

[0031] According to an exemplary embodiment, a display device includes a supporting substrate and a plurality of pixel areas arranged on the supporting substrate, each pixel area includes a plurality of light-emitting stacked structures, and each light-emitting stacked structure includes: a first epitaxial subunit arranged on the supporting substrate; a second epitaxial subunit arranged on the first epitaxial subunit; and a third epitaxial subunit arranged on the second epitaxial subunit, wherein light generated from the first epitaxial subunit is configured to pass through the second epitaxial subunit and the third epitaxial subunit to be emitted to the outside of the display device, and light generated from the second epitaxial subunit is configured to pass through the third epitaxial subunit to be emitted to the outside of the display device.

[0032] One of the light emitting stack structures in each pixel region may be configured to be selected and driven independently of the other light emitting stack structures in the pixel region.

[0033] The first, second, and third epitaxial subunits of the selected light emitting stack structure may include first, second, and third epitaxial stacks configured to emit red, green, and blue light, respectively.

[0034] The display device may further include a data line and a scan line, wherein the first epitaxial subunit, the second epitaxial subunit and the third epitaxial subunit of the selected light emitting stack structure may be commonly connected to the same data line and to different scan lines.

[0035] The remaining first epitaxial subunit, second epitaxial subunit and third epitaxial subunit of the unselected light-emitting stack structure in each pixel region can be connected to the data line and the scan line, and the remaining first epitaxial subunit, second epitaxial subunit and third epitaxial subunit of the unselected light-emitting stack structure in each pixel region can be constructed to be inactive during operation.

[0036] The remaining first epitaxial subunits, second epitaxial subunits and third epitaxial subunits of the unselected light emitting stacked structure in each pixel region may be disconnected from the data line and the scan line, respectively.

[0037] Multiple pixel areas can be basically arranged in a matrix form, the first epitaxial subunit, the second epitaxial subunit and the third epitaxial subunit of the selected light-emitting stack structure in the same column can be connected to the same data line, and the first epitaxial subunit, the second epitaxial subunit and the third epitaxial subunit of the selected light-emitting stack structure in the same row can be connected to different scan lines, respectively.

[0038] The light emitting stacked structure may be arranged along at least two columns and two rows in each pixel region.

[0039] The at least one light emitting stacked structure may further include a reflective electrode disposed between the first epitaxial subunit and the supporting substrate and in ohmic contact with the first epitaxial subunit.

[0040] The reflective electrode may be commonly electrically connected to the first epitaxial subunit, the second epitaxial subunit, and the third epitaxial subunit.

[0041] The reflective electrode may be disposed over at least two pixel regions.

[0042] The reflective electrode may include a data line.

[0043] At least one of the light emitting stacked structures may further include an ohmic electrode disposed between the first epitaxial subunit and the second epitaxial subunit and in ohmic contact with the first epitaxial subunit.

[0044] At least one of the light emitting stacked structures may further include a second p transparent electrode in ohmic contact with the p-type semiconductor layer of the second epitaxial subunit, and a third p transparent electrode in ohmic contact with the p-type semiconductor layer of the third epitaxial subunit.

[0045] The display device may also include: a first color filter, placed between the first epitaxial subunit and the second epitaxial subunit to transmit light generated from the first epitaxial subunit and reflect light generated from the second epitaxial subunit; and a second color filter, placed between the second epitaxial subunit and the third epitaxial subunit to transmit light generated from the first epitaxial subunit and the second epitaxial subunit and reflect light generated from the third epitaxial subunit.

[0046] Each of the first color filter and the second color filter may include at least one of a low pass filter, a band pass filter, and a band stop filter.

[0047] The display device may also include: a first bonding layer, disposed between the supporting substrate and the first epitaxial subunit; a second bonding layer, disposed between the first epitaxial subunit and the second epitaxial subunit; and a third bonding layer, disposed between the second epitaxial subunit and the third epitaxial subunit, wherein the second bonding layer may be configured to transmit light generated from the first epitaxial subunit, and the third bonding layer may be configured to transmit light generated from the first epitaxial subunit and the second epitaxial subunit.

[0048] The display device may further include a lower insulating layer covering at least a portion of a side surface of the first epitaxial subunit, a side surface of the second epitaxial subunit, and a side surface of the third epitaxial subunit.

[0049] The lower insulating layer may be configured to block light generated from the first epitaxial sub-unit, the second epitaxial sub-unit, and the third epitaxial sub-unit.

[0050] The light emitting stack structure in each pixel region may have substantially the same stack structure.

[0051] At least one of the light emitting stack structures may include a micro-LED having a surface area of ​​less than about 10,000 μm 2 .

[0052] The first epitaxial subunit may be configured to emit any one of red, green and blue light, the second epitaxial subunit may be configured to emit one of red, green and blue light different from the light emitted from the first epitaxial subunit, and the third epitaxial subunit may be configured to emit one of red, green and blue light different from the light emitted from the first and second epitaxial subunits.

[0053] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.

[0054]

Beneficial Effects

[0055] The light emitting stack structure constructed according to the principles of the invention and some exemplary embodiments has a structure that can be manufactured in a simplified method. For example, pixels according to exemplary embodiments can be manufactured at the same time to omit the process of separately mounting LEDs.

[0056] Light emitting diodes and display devices using the same (eg, micro LEDs) constructed according to the principles of the invention and some exemplary embodiments can provide a high level of color purity and color reproducibility.

[0057] Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts. BRIEF DESCRIPTION OF THE DRAWINGS

[0058] The accompanying drawings illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept, wherein the accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification.

[0059] Figure 1 is a cross-sectional view of a light emitting stack structure according to an exemplary embodiment.

[0060] Figure 2 is a cross-sectional view of a light emitting stack structure according to an exemplary embodiment.

[0061] Figure 3 is a cross-sectional view of a light emitting stack structure according to an exemplary embodiment.

[0062] Figure 4 is a block diagram of a display device according to an exemplary embodiment.

[0063] Figure 5 is a circuit diagram of one pixel of a passive matrix type display device according to an exemplary embodiment.

[0064] Figure 6 is a circuit diagram of one pixel of an active matrix type display device according to an exemplary embodiment.

[0065] Figure 7 is a plan view illustrating a portion of a display device according to an exemplary embodiment.

[0066] Fig. 8A According to an exemplary embodiment, Figure 7 A cross-sectional view taken along line AA'.

[0067] Figure 8B According to another exemplary embodiment, Figure 7 A cross-sectional view taken along line AA'.

[0068] Fig. 9 is a plan view of a portion of a display device according to an exemplary embodiment.

[0069] Fig.10 According to an exemplary embodiment Figure 7 A plan view of a pixel block in the pixel blocks.

[0070] Fig.11 According to an exemplary embodiment Fig.10 A plan view of part P2 and part P3.

[0071] Fig.12 is along Fig.11 A cross-sectional view taken along line II'.

[0072] Fig.13A , Fig. 13B , Fig. 13C , Fig.13D and Fig.13E is a cross-sectional view illustrating a method of manufacturing a substrate according to an exemplary embodiment.

[0073] Fig.14A , Fig.15A , Fig.16A , Fig.17A , Fig.18A , Fig.19A , Fig. 20A , Fig.21A , Fig.22A , Fig.23A , Fig.24A and Fig.25A is a plan view illustrating a method of stacking first to third epitaxial stacks on a substrate to form a pixel according to an exemplary embodiment.

[0074] Fig. 14B , Fig. 15B , Fig. 16B , Fig. 17B , Fig.18B , Fig.19B , Fig. 20B , Fig.21B , Fig. 22B , Fig. 23B , Fig. 24B and Fig.25B Along Fig.14A , Fig.15A , Fig.16A , Fig.17A , Fig.18A , Fig.19A , Fig. 20A , Fig.21A , Fig.22A , Fig.23A , Fig.24A and Fig.25A A cross-sectional view taken along line II'.

[0075] Fig.26A and Fig.26B is a plan view illustrating a pixel block and a display device according to an exemplary embodiment.

[0076] Fig.27A and Fig.27B is a plan view illustrating a pixel block and a display device according to an exemplary embodiment.

[0077] Fig.28is a schematic cross-sectional view of a light emitting stack structure according to an exemplary embodiment.

[0078] Fig.29A , Fig.29B , Fig.29C , Fig.29D and Fig.29E is a schematic cross-sectional view illustrating a method of manufacturing a light emitting stacked structure.

[0079] Fig.30 is a schematic plan view of a display device according to an exemplary embodiment.

[0080] Fig.31 According to an exemplary embodiment Fig.30 A circuit diagram of a display device.

[0081] Fig.32 yes Fig.30 An enlarged plan view of a light-emitting stacked structure of a display device.

[0082] Fig.33 is along Fig.32 A schematic cross-sectional view taken along line AA.

[0083] Fig.34 is along Fig.32 A schematic cross-sectional view taken along line BB of FIG.

[0084] Fig.35A , Fig.35B , Fig.35C , Fig.35D , Fig.35E , Fig.35F , Figure 35G , Fig.35H , Fig.35I , Fig.35J and Figure 35K is a schematic plan view illustrating a method of manufacturing a display device according to an exemplary embodiment.

[0085] Fig.36 is a circuit diagram of a display device according to another exemplary embodiment.

[0086] Fig.37 is a circuit diagram of a display device according to another exemplary embodiment. DETAILED DESCRIPTION

[0087] In the following description, for the purpose of explanation, many specific details are set forth to provide a thorough understanding of various exemplary embodiments or implementations of the invention. "Embodiment" and "implementation" as used herein are interchangeable words as non-limiting examples of devices or methods using one or more inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments may be implemented without these specific details or in the case of one or more equivalent arrangements. In other cases, in order to avoid making various exemplary embodiments unnecessarily obscure, known structures and devices are shown in block diagram form. In addition, various exemplary embodiments may be different, but need not be exclusive. For example, without departing from the inventive concept, the specific shape, construction and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0088] Unless otherwise specified, the exemplary embodiments shown will be understood as providing exemplary features of the details of the changes in some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter, individually or collectively referred to as "elements") of the various embodiments may be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0089] The use of cross hatching and / or shadows is usually provided in the drawings to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence and absence of cross hatching or shadows do not express or represent any preference or requirement for the specific material, material properties, size, ratio, commonality between the elements shown and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements can be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiment can be implemented differently, a specific process sequence can be performed in a different order than described. For example, two processes described in succession can be performed substantially simultaneously or in an order opposite to the described order. In addition, the same reference numerals represent the same elements.

[0090] When an element such as a layer is referred to as being "on" another element or layer, "connected to" or "bonded to" another element or layer, the element or layer may be directly on, directly connected to or directly bonded to the other element or layer, or there may be an intermediate element or layer. However, when an element or layer is referred to as being "directly on" another element, "directly connected to" or "directly bonded to" another element or layer, there is no intermediate element or layer. For this reason, the term "connection" may refer to a physical connection, an electrical connection and / or a fluid connection with or without an intermediate element. In addition, the D1 axis, the D2 axis and the D3 axis are not limited to the three axes of a rectangular coordinate system (such as, the x-axis, the y-axis and the z-axis), but may be interpreted in a broader sense. For example, the D1 axis, the D2 axis and the D3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as any combination of only X, only Y, only Z, or two or more of X, Y, and Z, such as, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the relevant listed items.

[0091] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, the first element discussed below may be named as the second element without departing from the disclosed teachings.

[0092] For descriptive purposes, spatially relative terms such as "under," "below," "under," "down," "above," "up," "above," "higher," "side" (e.g., as in "sidewall"), etc., may be used herein to describe the relationship of one element to another element as shown in the accompanying drawings. The spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, an element described as "under" or "beneath" other elements or features would subsequently be positioned as "above" the other elements or features. Thus, the exemplary term "under" can include both above and below orientations. In addition, the device can be positioned otherwise (e.g., rotated 90 degrees or at other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.

[0093] The terms used herein are for the purpose of describing specific embodiments, and are not intended to be limited. As used herein, unless the context clearly indicates otherwise, the singular forms "one", "one (kind / person)" and "said (the)" are also intended to include plural forms. In addition, when the terms "comprise" and / or "include" and their variations are used in this specification, it is explained that there are stated features, integral bodies, steps, operations, elements, components and / or their groups, but it is not excluded that there are or add one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It should also be noted that, as used herein, the terms "substantially (substantially)", "approximately" and other similar terms are used as approximate terms and are not used as degree terms, so that they are used to explain the inherent deviations of measured values, calculated values ​​and / or provided values ​​that will be recognized by those of ordinary skill in the art.

[0094] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations as a result of, for example, manufacturing techniques and / or tolerances will be expected. Therefore, the exemplary embodiments disclosed herein should not necessarily be construed as being limited to the shapes of the specifically illustrated regions, but will include deviations in shape caused by, for example, manufacturing. In this manner, the regions illustrated in the accompanying drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and thus are not necessarily intended to be limiting.

[0095] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by a person of ordinary skill in the art to which this disclosure is a part. Terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an ideal or overly formal sense unless expressly so defined herein.

[0096] The light emitting stacked structure constructed according to the principles of the invention can be applied as a light source in various devices. As used herein, the light emitting stacked structure or light emitting diode according to the exemplary embodiment may include a micro-LED having a surface area of ​​less than about 10,000 square μm as known in the art. In other exemplary embodiments, the micro-LCD may have a surface area of ​​less than about 4,000 square μm or less than about 2,500 square μm depending on the specific application.

[0097] Figure 1 is a cross-sectional view of a light emitting stack structure according to an exemplary embodiment.

[0098] Reference Figure 1The light emitting stack structure according to the exemplary embodiment includes a plurality of epitaxial stacks stacked one on top of another. The epitaxial stacks are disposed on a substrate 10 .

[0099] The substrate 10 has a substantially flat shape with a front surface and a rear surface. The substrate 10 may have various shapes with a front surface on which an epitaxial stack is mounted. The substrate 10 may include an insulating material. For example, the substrate 10 may include glass, quartz, silicon, an organic polymer, or an organic-inorganic composite material, but is not limited thereto. The material forming the substrate 10 is not particularly limited as long as the substrate has insulating properties. In some exemplary embodiments, a line portion may also be provided on the substrate 10 to apply a light emitting signal and a common voltage to each epitaxial stack. In an exemplary embodiment, in addition to the line portion, a driving device including a thin film transistor may also be provided on the substrate 10 to drive each epitaxial stack in an active matrix method. To this end, the substrate 10 may be provided as a printed circuit board or a composite substrate, and a printed circuit board or a composite substrate may be formed by forming a line portion and / or a driving device on glass, quartz, silicon, an organic polymer, or an organic-inorganic composite material.

[0100] Epitaxial stacks are sequentially stacked on the front surface of substrate 10 , and each epitaxial stack may emit light.

[0101] Two or more epitaxial stacks may be disposed on the substrate 10 to emit light having wavelength bands different from each other. However, the inventive concept is not limited to a specific number of epitaxial stacks, and the epitaxial stacks may have energy bands different from each other.

[0102] Each epitaxial stack may have various sizes. In an exemplary embodiment, at least one of the epitaxial stacks may have a different area than the other epitaxial stacks.

[0103] When the epitaxial stacks are sequentially stacked in an upward direction from the bottom, the area of ​​the epitaxial stacks may become smaller and smaller in the upward direction. Among two adjacent epitaxial stacks, at least a portion of the upper epitaxial stack may overlap with the lower epitaxial stack. In some exemplary embodiments, the upper epitaxial stack may completely overlap with the lower epitaxial stack, in which case, in a plan view, the upper epitaxial stack may be disposed within the region of the lower epitaxial stack.

[0104] like Figure 1 As shown in FIG. 1 , the light emitting stack structure according to the exemplary embodiment includes three epitaxial stacks sequentially stacked on a substrate 10. Hereinafter, the three layers sequentially stacked on the substrate 10 will be referred to as a first epitaxial stack 20, a second epitaxial stack 30, and a third epitaxial stack 40, respectively.

[0105] The first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may have different sizes from each other. More specifically, the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may have different areas from each other in a plan view, and / or may have different widths from each other in a cross-sectional view. In an exemplary embodiment, the areas of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may gradually decrease in the order of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40. The second epitaxial stack 30 is stacked on a portion of the first epitaxial stack 20. Therefore, in a plan view, the portion of the first epitaxial stack 20 is covered by the second epitaxial stack 30, and the other portion of the first epitaxial stack 20 is exposed. The third epitaxial stack 40 is stacked on a portion of the second epitaxial stack 30. Therefore, in a plan view, the portion of the second epitaxial stack 30 is covered by the third epitaxial stack 40 , and the other portion of the second epitaxial stack 30 is exposed.

[0106] The areas of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may be changed in various ways. For example, the area ratio of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may be about 3:2:1, but is not limited thereto. Considering the amount of light from each epitaxial stack, each of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may have a different area. For example, when the amount of light emitted from the third epitaxial stack 40 is small, the area ratio of the third epitaxial stack 40 may be relatively increased.

[0107] Each epitaxial stack can emit color light in the visible light band. In an exemplary embodiment, the light emitted from the bottommost epitaxial stack can have a color with the longest wavelength (lowest energy band), and the wavelength of the color light emitted from the epitaxial stack can become shorter and shorter in the upward direction. In this way, the light emitted from the topmost epitaxial stack can have a color with the shortest wavelength (highest energy band). For example, the first epitaxial stack 20 emits the first color light L1, the second epitaxial stack 30 emits the second color light L2, and the third epitaxial stack 40 emits the third color light L3. The first color light L1, the second color light L2, and the third color light L3 can have different colors and different bands. Specifically, the first color light L1, the second color light L2, and the third color light L3 can have different bands from each other, and in an exemplary embodiment, the band can become higher and higher from the first color light L1 to the third color light L3.

[0108] In an exemplary embodiment, the first color light L1 may be red light, the second color light L2 may be green light, and the third color light L3 may be blue light. However, the inventive concept is not limited thereto. When the light emitting stack structure includes a micro-LED (having a surface area of ​​less than about 10,000 square μm as known in the art or having a surface area of ​​less than about 4,000 square μm or 2,500 square μm in other exemplary embodiments), due to the small form factor of the micro-LED, the first epitaxial stack 20 may emit any one of red light, green light, and blue light, and the second epitaxial stack 30 and the third epitaxial stack 40 may emit a different one of red light, green light, and blue light without adversely affecting the operation.

[0109] Each epitaxial stack can emit light in a direction away from the substrate 10. In this case, the light emitted from one epitaxial stack can be emitted directly to the outside, or emitted to the outside through another epitaxial stack disposed thereon along the optical path of the light. As used herein, the direction away from the front surface of the substrate 10 can correspond to the direction in which the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 are stacked. Hereinafter, the direction away from the front surface of the substrate 10 will be referred to as the "front surface direction" or the "upward direction", and the direction facing the substrate 10 will be referred to as the "rear surface direction" or the "downward direction". However, the terms "upward" and "downward" may be relative terms that may vary according to the arrangement or stacking direction of the light-emitting stack structure.

[0110] Each epitaxial stack emits light in an upward direction. The light emitted from each epitaxial stack may travel directly in the upward direction, or may travel through another epitaxial stack disposed thereon. In an exemplary embodiment, a portion of the light emitted from the first epitaxial stack 20 travels in the upward direction through its exposed upper surface, another portion of the light emitted from the first epitaxial stack 20 travels in the upward direction after passing through the second epitaxial stack 30, and the other portion of the light emitted from the first epitaxial stack 20 travels in the upward direction after passing through the second epitaxial stack 30 and the third epitaxial stack 40. In addition, a portion of the light emitted from the second epitaxial stack 30 travels directly in the upward direction through its exposed upper surface, and the other portion of the light emitted from the second epitaxial stack 30 travels in the upward direction after passing through the third epitaxial stack 40. The light emitted from the third epitaxial stack 40 travels directly in the upward direction.

[0111] In an exemplary embodiment, each epitaxial stack transmits most of the light emitted from the epitaxial stack disposed below it. Specifically, a portion of the light emitted from the first epitaxial stack 20 travels in the front surface direction after passing through the second epitaxial stack 30 and the third epitaxial stack 40, and a portion of the light emitted from the second epitaxial stack 30 travels in the front surface direction after passing through the third epitaxial stack 40. To this end, at least a portion or substantially the entire portion of the other epitaxial stacks other than the lowest epitaxial stack disposed may be formed of a light-transmitting material. As used herein, the term "light-transmitting material" may refer to a material that transmits all light, or may refer to a material that transmits light having a predetermined wavelength or a portion of light having a predetermined wavelength. In an exemplary embodiment, each epitaxial stack may transmit about 60% or more of the light emitted from the epitaxial stack disposed below it. According to other exemplary embodiments, each epitaxial stack may transmit about 80% or more (or about 90% or more) of the light emitted from the epitaxial stack disposed below it.

[0112] The epitaxial stack can be driven independently by independently connecting signal lines that apply light-emitting signals to the epitaxial stack, and the epitaxial stack can display various colors depending on whether light is emitted from each epitaxial stack. In addition, since the epitaxial stacks emitting light with different wavelengths are formed to overlap each other, a light-emitting stack structure can be formed in a narrow area.

[0113] Figure 2 is a cross-sectional view of a light emitting stack structure according to an exemplary embodiment.

[0114] Reference Figure 2 , in the light emitting stack structure according to the exemplary embodiment, a line portion through which each epitaxial stack can be driven independently can be included. Each of the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40 can be arranged on the substrate 10, and a corresponding first adhesive layer 61, a second adhesive layer 63 and a third adhesive layer 65 are arranged between them. The first adhesive layer 61 may include a conductive or non-conductive material. In some exemplary embodiments, the first adhesive layer 61 may have conductivity in some areas where it is to be electrically connected to the substrate 10 disposed thereunder. The first adhesive layer 61 may include a transparent or opaque material. In an exemplary embodiment, when the substrate 10 includes an opaque material and the line portion is formed on the substrate 10, the first adhesive layer 61 may include an opaque material, such as a light absorbing material (such as various polymer adhesives, such as epoxy polymer adhesives).

[0115] The second adhesive layer 63 and the third adhesive layer 65 may include a non-conductive material and may include a light-transmitting material. For example, the second adhesive layer 63 and the third adhesive layer 65 may include an optically transparent adhesive (OCA). The material forming the second adhesive layer 63 and the third adhesive layer 65 is not particularly limited, as long as the material is optically transparent and can stably attach each epitaxial stack. For example, the second adhesive layer 63 and the third adhesive layer 65 may include an organic material such as an epoxy polymer like SU-8, various resists, polyparaxylene, poly(methyl methacrylate) (PMMA), benzocyclobutene (BCB), spin-on glass (SOG), and an inorganic material such as silicon oxide and aluminum oxide. In some exemplary embodiments, the adhesive material may include a conductive oxide. In this case, the conductive oxide may be insulated from other components. When an organic material is used as an adhesive layer, the first epitaxial stack 20, the second epitaxial stack 30, the third epitaxial stack 40, and the substrate 10 are attached to each other by coating a material on the bonding side of the first epitaxial stack 20, the second epitaxial stack 30, the third epitaxial stack 40, and the substrate 10, and applying high temperature and high pressure to the material under a high vacuum state. When an inorganic material is used as an adhesive layer, the first epitaxial stack 20, the second epitaxial stack 30, the third epitaxial stack 40, and the substrate 10 are attached to each other by depositing an inorganic material on the bonding side of the first epitaxial stack 20, the second epitaxial stack 30, the third epitaxial stack 40, and the substrate 10, planarizing the inorganic material using chemical-mechanical planarization (CMP), and performing plasma treatment on the surface of the inorganic material under a high vacuum state and attaching.

[0116] Each of the first epitaxial stack 20 , the second epitaxial stack 30 , and the third epitaxial stack 40 includes p-type semiconductor layers 25 , 35 , and 45 , active layers 23 , 33 , and 43 , and n-type semiconductor layers 21 , 31 , and 41 , respectively.

[0117] The p-type semiconductor layer 25, active layer 23 and n-type semiconductor layer 21 of the first epitaxial stack 20 may include semiconductor materials that can emit red light, such as aluminum gallium arsenide (AlGaAs), gallium arsenic phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP) and gallium phosphide (GaP), but are not limited thereto.

[0118] The first p-type contact electrode layer 25p may be disposed below the p-type semiconductor layer 25 of the first epitaxial stack 20. The first p-type contact electrode layer 25p of the first epitaxial stack 20 may have a single-layer structure or a multi-layer structure of a metal material. For example, the first p-type contact electrode layer 25p may include a metal such as Al, Ti, Cr, Ni, Au, Ag, Sn, W, Cu, or an alloy thereof. The first p-type contact electrode layer 25p may include a metal having a high reflectivity to improve the luminous efficiency of light emitted from the first epitaxial stack 20 in an upward direction.

[0119] The first n-type contact electrode 21n may be disposed on the n-type semiconductor layer of the first epitaxial stack 20. The first n-type contact electrode 21n of the first epitaxial stack 20 may have a single-layer structure or a multi-layer structure of a metal material. For example, the first n-type contact electrode 21n may include a metal such as Al, Ti, Cr, Ni, Au, Ag, Sn, W, Cu, or an alloy thereof, but is not limited thereto, or may include other conductive materials.

[0120] The second epitaxial stack 30 includes a sequentially stacked p-type semiconductor layer 35, an active layer 33, and an n-type semiconductor layer 31. The p-type semiconductor layer 35, the active layer 33, and the n-type semiconductor layer 31 may include semiconductor materials that can emit green light, such as indium gallium nitride (InGaN), gallium nitride (GaN), gallium phosphide (GaP), aluminum gallium indium phosphide (AlGaInP), and aluminum gallium phosphide (AlGaP) as examples, but not limited thereto.

[0121] The second p-type contact electrode layer 35p is disposed below the p-type semiconductor layer 35 of the second epitaxial stack 30. The second p-type contact electrode layer 35p is disposed between the first epitaxial stack 20 and the second epitaxial stack 30, more specifically, between the second adhesive layer 63 and the second epitaxial stack 30.

[0122] The second n-type contact electrode 31n may be disposed on the n-type semiconductor layer of the second epitaxial stack 30. The second n-type contact electrode 31n of the second epitaxial stack 30 may have a single-layer structure or a multi-layer structure of a metal material. For example, the second n-type contact electrode 31n may include a metal such as Al, Ti, Cr, Ni, Au, Ag, Sn, W, Cu, or an alloy thereof, or may include other conductive materials.

[0123] The third epitaxial stack 40 includes a sequentially stacked p-type semiconductor layer 45, an active layer 43, and an n-type semiconductor layer 41. The p-type semiconductor layer 45, the active layer 43, and the n-type semiconductor layer 41 may include semiconductor materials that can emit blue light, such as gallium nitride (GaN), indium gallium nitride (InGaN), and zinc arsenide (ZnSe), but are not limited thereto.

[0124] The third p-type contact electrode layer 45p is disposed under the p-type semiconductor layer 45 of the third epitaxial stack 40. The third p-type contact electrode layer 45p is disposed between the second epitaxial stack 30 and the third epitaxial stack 40, more specifically, between the third adhesive layer 65 and the third epitaxial stack 40.

[0125] The third n-type contact electrode 41n may be disposed on the n-type semiconductor layer of the third epitaxial stack 40. The third n-type contact electrode 41n of the third epitaxial stack 40 may have a single-layer structure or a multi-layer structure of a metal material. For example, the third n-type contact electrode 41n may include a metal such as Al, Ti, Cr, Ni, Au, Ag, Sn, W, Cu, or an alloy thereof, or may include other conductive materials.

[0126] In an exemplary embodiment, each of the n-type semiconductor layers 21, 31, and 41 and each of the p-type semiconductor layers 25, 35, and 45 of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 has a single-layer structure. However, the inventive concept is not limited thereto, and the semiconductor layer may have a multi-layer structure and may include a superlattice layer. The active layers 23, 33, and 43 of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may have a single quantum well structure or a multi-quantum well structure.

[0127] The second p-type contact electrode layer 35p may have an area that substantially covers the second epitaxial stack 30. In addition, the third p-type contact electrode layer 45p may have an area that substantially covers the third epitaxial stack 40. The second p-type contact electrode layer 35p and the third p-type contact electrode layer 45p may include a transparent conductive material to transmit light from the epitaxial stack disposed thereunder. For example, each of the second p-type contact electrode layer 35p and the third p-type contact electrode layer 45p may include a transparent conductive oxide (TCO). The transparent conductive oxide may include tin oxide (SnO), indium oxide (InO2), zinc oxide (ZnO), indium tin oxide (ITO), and indium tin zinc oxide (ITZO). The transparent conductive oxide may be deposited by chemical vapor deposition (CVD) or physical vapor deposition (PVD) using an evaporator or a sputterer. The second and third p-type contact electrode layers 35p and 45p may have a thickness of about 2000 angstroms to about 2 microns, may serve as an etch stop during a manufacturing process described below, and satisfy a predetermined transmittance.

[0128] In an exemplary embodiment, the first p-type contact electrode layer 25p, the second p-type contact electrode layer 35p, and the third p-type contact electrode layer 45p may be connected to a common line. The common line may be a line to which a common voltage is applied. In addition, the light emitting signal line may be connected to the first n-type contact electrode 21n, the second n-type contact electrode 31n, and the third n-type contact electrode 41n, respectively. Specifically, the common voltage S c The light emitting signal is applied to the first p-type contact electrode layer 25p, the second p-type contact electrode layer 35p and the third p-type contact electrode layer 45p through the common line, and the light emitting signal is applied to the first n-type contact electrode 21n, the second n-type contact electrode 31n and the third n-type contact electrode 41n through the light emitting signal line. In this way, the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40 are independently controlled. The light emitting signal includes the first light emitting signal S corresponding to the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40, respectively. R , the second light emitting signal S G and the third light emitting signal S B The first light emitting signal S R , the second light emitting signal S G and the third light emitting signal S B The signals may correspond to light emissions of red light, green light, and blue light, respectively.

[0129] In the illustrated exemplary embodiment, a common voltage is applied to the p-type semiconductor layer 25 of the first epitaxial stack 20, the p-type semiconductor layer 35 of the second epitaxial stack 30, and the p-type semiconductor layer 45 of the third epitaxial stack 40, and a light emitting signal is applied to the n-type semiconductor layer 21 of the first epitaxial stack 20, the n-type semiconductor layer 31 of the second epitaxial stack 30, and the n-type semiconductor layer 41 of the third epitaxial stack 40. However, the inventive concept is not limited thereto. According to another exemplary embodiment, a common voltage may be applied to the n-type semiconductor layer 21 of the first epitaxial stack 20, the n-type semiconductor layer 31 of the second epitaxial stack 30, and the n-type semiconductor layer 41 of the third epitaxial stack 40, and a light emitting signal may be applied to the p-type semiconductor layer 25 of the first epitaxial stack 20, the p-type semiconductor layer 35 of the second epitaxial stack 30, and the p-type semiconductor layer 45 of the third epitaxial stack 40.

[0130] According to the exemplary embodiment shown, the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 are driven in response to a light emission signal applied thereto. Specifically, the first epitaxial stack 20 is driven in response to the first light emission signal S R The second epitaxial stack 30 is driven in response to the second light emitting signal S G The third epitaxial stack 40 is driven in response to the third light emitting signal S BIn this case, the first light emitting signal S R , the second light emitting signal S G and the third light emitting signal S B The first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40 are independently applied, so that the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40 are independently driven. The light emitting stack structure can provide various colors of light by combining the first color light, the second color light and the third color light emitted upward from the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40.

[0131] Compared with a structure having a plurality of epitaxial stacks completely stacked on each other, the light emitting stack structure according to the exemplary embodiment can improve light extraction efficiency. For example, the amount of light emitted from the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 and traveling in an upward direction without passing through other epitaxial stacks can be increased, thereby improving light extraction efficiency.

[0132] In addition, when displaying colors, the light-emitting stacked structure according to the exemplary embodiment emits light with different colors through vertically stacked areas rather than horizontally spaced areas. More specifically, the conventional light-emitting elements that emit light of different colors (such as red light, green light, and blue light) are spaced apart from each other on a plane to achieve full-color display. In this way, since the light-emitting elements are spaced apart horizontally from each other, the area occupied by the conventional light-emitting elements is relatively large. On the other hand, the light-emitting elements that emit light of different colors according to the exemplary embodiment are stacked one on top of another in substantially the same area, and therefore, full-color display can be achieved by an area significantly smaller than that in the conventional field. Therefore, a high-resolution display device can be manufactured in a small area.

[0133] In addition, even when a conventional light-emitting device is manufactured in a stacked manner, such a conventional light-emitting device will still be manufactured by separately forming a contact portion in each light-emitting element (for example, by forming the light-emitting elements individually and separately, and connecting the light-emitting elements to each other using wiring), which will increase the structural complexity of the light-emitting device, and thus increase the manufacturing complexity of the light-emitting device. However, the light-emitting stack structure according to the exemplary embodiment can be manufactured by sequentially stacking a plurality of epitaxial stacks on a substrate, forming a contact portion in the epitaxial stack through a minimum process, and connecting the wiring portion to the epitaxial stack. In addition, since one light-emitting stack structure is installed instead of a plurality of conventional light-emitting elements, the manufacturing method of the display device according to the exemplary embodiment can be significantly simplified.

[0134] The light emitting stack structure according to the exemplary embodiment may further include various components to provide color light with high purity and high efficiency. For example, the light emitting stack structure may include a wave pass filter for preventing light with a relatively short wavelength from traveling toward an epitaxial stack emitting light with a relatively long wavelength.

[0135] Figure 3 2 is a cross-sectional view of a light emitting stack structure according to an exemplary embodiment. The light emitting stack structure according to the illustrated exemplary embodiment includes components substantially the same as those described above, and thus, detailed descriptions thereof will be omitted to avoid redundancy.

[0136] Reference Figure 3 , the light emitting stack structure according to an exemplary embodiment may include a first wave pass filter 71 disposed between the first epitaxial stack 20 and the second epitaxial stack 30 .

[0137] The first wave pass filter 71 selectively transmits light having a predetermined wavelength. The first wave pass filter 71 may transmit the first color light emitted from the first epitaxial stack 20, and may block or reflect light other than the first color light. Therefore, the first color light emitted from the first epitaxial stack 20 may travel in an upward direction, but the second color light and the third color light emitted from the second epitaxial stack 30 and the third epitaxial stack 40, respectively, may not travel toward the first epitaxial stack 20, and may be reflected or blocked by the first wave pass filter 71.

[0138] Compared with the wavelength and energy of the first color light, the second color light and the third color light have relatively shorter wavelengths and relatively higher energy. When the second color light and the third color light are incident on the first epitaxial stack 20, additional light emission is caused in the first epitaxial stack 20. According to an exemplary embodiment, the second color light and the third color light may be prevented from being incident on the first epitaxial stack 20 by the first wave pass filter 71.

[0139] According to an exemplary embodiment, the second wave pass filter 73 may be disposed between the second epitaxial stack 30 and the third epitaxial stack 40. The second wave pass filter 73 may transmit the first color light and the second color light emitted from the first epitaxial stack 20 and the second epitaxial stack 30, respectively, and may block or reflect light other than the first color light and the second color light. Therefore, the first color light and the second color light emitted from the first epitaxial stack 20 and the second epitaxial stack 30, respectively, may travel in an upward direction, but the third color light emitted from the third epitaxial stack 40 may not travel toward the first epitaxial stack 20 and the second epitaxial stack 30, and may be reflected or blocked by the second wave pass filter 73.

[0140] Compared with the wavelength and energy of the first color light and the second color light, the third color light has a relatively shorter wavelength and relatively higher energy. When the third color light is incident on the first epitaxial stack 20 and the second epitaxial stack 30, additional light emission is caused in the first epitaxial stack 20 and the second epitaxial stack 30. According to an exemplary embodiment, the third color light may be prevented from being incident on the first epitaxial stack 20 and the second epitaxial stack 30 by the second wave pass filter 73.

[0141] The first wave pass filter 71 and the second wave pass filter 73 may be formed in various ways. The first wave pass filter 71 and the second wave pass filter 73 may be formed by alternately stacking insulating films having different refractive indices from each other. For example, silicon dioxide (SiO2) and titanium dioxide (TiO2) may be alternately stacked with each other, and the wavelength of light may be determined by adjusting the thickness and number of stacked layers of silicon dioxide (SiO2) and titanium dioxide (TiO2). In some exemplary embodiments, SiO2, TiO2, HfO2, Nb2O5, ZrO2, and Ta2O5 may be used as insulating layers having different refractive indices.

[0142] The light emitting stack structure according to the exemplary embodiment may also include various components to provide efficient uniform light. For example, various concavoconvex portions may be formed on the light emitting surface. More specifically, a concavoconvex portion may be formed on the n-type semiconductor layer of at least one of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40.

[0143] In an exemplary embodiment, the concavoconvex part of each epitaxial stack may be selectively formed. For example, the concavoconvex part may be provided on the first epitaxial stack 20, the concavoconvex part may be provided on the first epitaxial stack 20 and the third epitaxial stack 40, or the concavoconvex part may be provided on the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40. The concavoconvex part of each epitaxial stack may be provided on the n-type semiconductor layer corresponding to the light emitting surface of the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40, respectively.

[0144] The concavoconvex portion can improve the light emitting efficiency. The concavoconvex portion can have various shapes on which the concavoconvex portions are randomly arranged, such as a polygonal pyramid, a hemisphere, or a surface with roughness. The concavoconvex portion can be textured by various etching processes, or can be formed using a patterned sapphire substrate.

[0145] The first color light, the second color light, and the third color light from the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 may have different intensities, and the intensity difference may cause a difference in visibility. According to an exemplary embodiment, the luminous efficiency may be improved by the concavo-convex portion selectively formed on the light emitting surface of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40, and thus, the difference in visibility between the first color light, the second color light, and the third color light may be reduced. For example, the color light corresponding to red and / or blue may have a lower visibility than green, and thus, the difference in visibility may be reduced by texturing the first epitaxial stack 20 and / or the third epitaxial stack 40. Specifically, because the red color light may be emitted from the lowermost portion of the light emitting stack structure, the red color light may have a relatively small intensity. In this case, when the concavo-convex portion is formed on the first epitaxial stack 20, the light efficiency may be improved.

[0146] [Implementation Methods of the Invention]

[0147] The light emitting stack structure according to the exemplary embodiment may be used as a light emitting element capable of displaying various colors, and may be applied to a display device as a pixel.

[0148] Figure 4 is a block diagram of a display device according to an exemplary embodiment.

[0149] Reference Figure 4 , a display device according to an exemplary embodiment may display any visual information such as text, video, photo, or two-dimensional or three-dimensional image.

[0150] The display device includes a plurality of pixels 110 that can display an image. Each pixel 110 may be a minimum unit for displaying an image. Each pixel 110 may include a light emitting stack structure according to an exemplary embodiment, and may emit white light and / or color light.

[0151] In an exemplary embodiment, each pixel 110 includes a first pixel emitting red light, a second pixel emitting green light, and a third pixel emitting blue light. The first pixel, the second pixel, and the third pixel may correspond to the first epitaxial stack, the second epitaxial stack, and the third epitaxial stack of the above-mentioned light emitting stack structure, respectively.

[0152] The pixels 110 may be arranged in a matrix. As used herein, the pixels 110 arranged "in a matrix" may refer to pixels 110 precisely arranged in a line along a row or column, and pixels 110 arranged substantially entirely along a row or column while the positions of the pixels 110 are changed, for example, in a zigzag shape.

[0153] The display device 100 according to an exemplary embodiment includes a timing controller 350, a scan driver 310, a data driver 330, a wiring part, and pixels. Each pixel is independently connected to the scan driver 310 and the data driver 330 through the wiring part.

[0154] The timing controller 350 receives various control signals and image data for driving the display device 100 from an external source (e.g., a system for transmitting image data). The timing controller 350 may rearrange the received image data and apply the rearranged image data to the data driver 330. In addition, the timing controller 350 may generate a scan control signal and a data control signal for driving the scan driver 310 and the data driver 330, and apply the generated scan control signal and data control signal to the scan driver 310 and the data driver 330, respectively.

[0155] The scan driver 310 receives a scan control signal from the timing controller 350 and may generate a scan signal in response to the scan control signal.

[0156] The data driver 330 receives a data control signal and image data from the timing controller 350 and may generate a data signal in response to the data control signal.

[0157] The line part includes a plurality of signal lines. For example, the line part includes: scanning line 130 R , 130 G and 130 B The first scan line 130 is a first scan line 130 connected to the pixel and the second scan line 130 is a second scan line 130 connected to the pixel. R , the second scanning line 130 G and the third scanning line 130 B .

[0158] The line portion may further include lines connecting the timing controller 350 and the scan driver 310 , the timing controller 350 and the data driver 330 , or other components to each other to transmit corresponding signals.

[0159] The scan line 130 applies a scan signal generated by the scan driver 310 to the pixel. The data signal generated by the data driver 330 is applied to the data line 120.

[0160] The pixels are connected to the scan lines 130 and the data lines 120. The pixels selectively emit light in response to a data signal provided from the data lines 120 when a scan signal from the scan lines 130 is applied thereto. For example, during each frame period, each pixel emits light having a brightness corresponding to the data signal applied thereto. When a data signal corresponding to black brightness is applied to the pixel, the pixel may not emit light during the corresponding frame period, thus displaying black.

[0161] In some exemplary embodiments, the pixels may be driven in a passive matrix manner or an active matrix manner. When the display device is driven in an active matrix manner, the display device 100 may be additionally supplied with a first pixel power source and a second pixel power source in addition to a scan signal and a data signal.

[0162] Figure 5 is a circuit diagram of a pixel of a passive matrix display device. The pixel may be one of a plurality of pixels (eg, a red pixel, a green pixel, and a blue pixel), Figure 5 The first pixel 110 is shown R As an example, the second pixel and the third pixel may be driven in substantially the same manner as the first pixel, and thus a detailed description of circuit diagrams of the second pixel and the third pixel will be omitted.

[0163] Reference Figure 5 , the first pixel 110 R Including connecting to the first scanning line 130 R The light emitting element 150 is provided between the first scan line 130 and the data line 120. The light emitting element 150 may correspond to the first epitaxial stack 20. When a voltage equal to or higher than the threshold voltage is applied between the p-type semiconductor layer and the n-type semiconductor layer, the first epitaxial stack 20 emits light having a brightness corresponding to the level of the voltage applied thereto. Specifically, the light emitting element 150 may be provided between the first scan line 130 and the data line 120. The light emitting element 150 may correspond to the first epitaxial stack 20. When a voltage equal to or higher than the threshold voltage is applied between the p-type semiconductor layer and the n-type semiconductor layer, the first epitaxial stack 20 emits light having a brightness corresponding to the level of the voltage applied thereto. R The voltage of the scan signal and / or the voltage of the data signal applied to the data line 120 controls the first pixel 110 R of light emission.

[0164] Figure 6 is a circuit diagram of one pixel of an active matrix type display device according to an exemplary embodiment.

[0165] When the display device is an active matrix type display device, in addition to the scan signal and the data signal, the first pixel 110 R The first pixel power source ELVDD and the second pixel power source ELVSS may also be supplied.

[0166] Reference Figure 6 , the first pixel 110 RThe device includes one or more light emitting elements 150 and a transistor portion connected to the light emitting element 150 .

[0167] The light emitting element 150 may correspond to the first epitaxial stack 20, the p-type semiconductor layer of the light emitting element 150 may be connected to the first pixel power source ELVDD via the transistor portion, and the n-type semiconductor layer of the light emitting element 150 may be connected to the second pixel power source ELVSS. The first pixel power source ELVDD and the second pixel power source ELVSS may have different potentials from each other. For example, the second pixel power source ELVSS may have a potential lower than the potential of the first pixel power source ELVDD by at least the threshold voltage of the light emitting element. Each light emitting element emits light having a brightness corresponding to the driving current controlled by the transistor portion.

[0168] According to an exemplary embodiment, the transistor part includes first and second transistors M1 and M2 and a storage capacitor Cst. However, the inventive concept is not limited to a specific configuration of the transistor part, and the transistor part may have various modifications.

[0169] The first transistor M1 (switching transistor) includes a source electrode connected to the data line 120, a drain electrode connected to the first node N1, and a drain electrode connected to the first scan line 130. R When the first scanning line 130 R When a scan signal having a voltage sufficient to turn on the first transistor M1 is provided, the first transistor M1 is turned on to electrically connect the data line 120 and the first node N1. In this case, a data signal of a corresponding frame is applied to the data line 120 and the data signal is applied to the first node N1. The storage capacitor Cst is charged with the data signal applied to the first node N1.

[0170] The second transistor M2 (driving transistor) includes a source electrode connected to the first pixel power source ELVDD, a drain electrode connected to the p-type semiconductor layer of the light emitting element 150, and a gate electrode connected to the first node N1. The second transistor M2 can control the amount of driving current supplied to the light emitting element 150 in response to the voltage of the first node N1.

[0171] One electrode of the storage capacitor Cst is connected to the first pixel power source ELVDD, and the other electrode of the storage capacitor Cst is connected to the first node N1. The storage capacitor Cst charges a voltage corresponding to the data signal applied to the first node N1 and maintains the charged voltage until a data signal of the next frame is provided.

[0172] Figure 6The transistor portion in the embodiment includes two transistors, however, the inventive concept is not limited to the number of transistors included in the transistor portion, but the configuration of the transistor portion can be changed in various ways. For example, the transistor portion can include two or more transistors and one or more capacitors. In addition, the configuration of the first transistor and the second transistor, the storage capacitor, and the line is not shown in detail, however, the first transistor and the second transistor, the storage capacitor, and the line can be set in various ways within the scope of implementing the circuit according to the exemplary embodiment.

[0173] The structure of a pixel may be changed in various ways within the scope of the inventive concept, and a display device including a pixel may be implemented in various structures and methods.

[0174] Figure 7 is a plan view of a portion of a display device according to an exemplary embodiment. Fig. 8A According to an exemplary embodiment, Figure 7 A cross-sectional view taken along line AA'.

[0175] Reference Figure 7 and Fig. 8A , a display device according to an exemplary embodiment includes a base substrate 101 and a plurality of pixel blocks 110T disposed on the base substrate 101 .

[0176] The base substrate 101 includes a line portion and / or a driving device electrically connected to the pixel block 110T disposed on its upper surface, and may include various materials. For example, the base substrate 101 may include glass, quartz, silicon, an organic polymer, or an organic-inorganic composite material, and in some exemplary embodiments, the base substrate 101 may be a printed circuit board. The line portion and / or the driving device disposed on the base substrate 101 may include a conductive material.

[0177] The adhesive layer 60 may be disposed between the base substrate 101 and the pixel block 110T. At least a portion of the adhesive layer 60 may have electrical conductivity, and the line portion and / or the driving device of the base substrate 101 may be connected to the line portion or the electrode of the pixel block 110T through the conductive portion of the adhesive layer 60. In an exemplary embodiment, solder may be used as the adhesive layer having electrical conductivity, however, the inventive concept is not limited thereto. For example, a portion of the adhesive layer may include a non-conductive material. The adhesive layer may include a transparent or opaque material.

[0178] Each pixel block 110T includes a substrate 10 and a plurality of pixels 110 disposed on the substrate 10. The pixels 110 disposed on the same pixel block 110T may be manufactured together through a common process, and the pixel block 110T may correspond to a unit that can be transferred or assembled as a single object during manufacture of a display device.

[0179] The pixels 110 of the pixel block 110T are connected to a wiring portion and / or a driving device of the base substrate 101 , so that light emission of the pixels 110 of the pixel block 110T can be controlled.

[0180] In an exemplary embodiment, the pixel 110 may have the above-described light emitting stack structure according to the exemplary embodiment. Hereinafter, each light emitting stack structure may be referred to as a "pixel", and each pixel includes the light emitting stack structure.

[0181] The substrate 10 may include various materials. For example, the substrate 10 may include: a main body including glass, silicon, quartz, an organic polymer or an organic-inorganic composite material; and a wiring portion disposed on the main body and including a conductive material. The wiring portion may be disposed on an upper surface, a lower surface and / or an inner surface of a through hole defined through the main body, and may include various materials such as metals, metal alloys or conductive metal oxides. In an exemplary embodiment, the substrate 10 may be a silicon substrate, the main body of the substrate 10 may include silicon, and wiring and pad (or "pad") electrodes may be disposed on an upper surface, a lower surface and / or an inner surface of a through hole defined in the silicon main body.

[0182] The substrate 10 may have various shapes. The shape of the pixel block 110T may correspond to the shape of the substrate 10. In the exemplary embodiment shown, the substrate 10 and the pixel block 110T corresponding to the substrate 10 have a substantially triangular shape. However, the shapes of the substrate 10 and the pixel block 110T are not limited thereto, but may be formed to have various other shapes. In some exemplary embodiments, the shape of the substrate 10 may be different from the shape of the pixel block 110T. A plurality of substrates 10 may be provided, and the substrates 10 may have substantially the same shape as each other.

[0183] Pixels 110 (e.g., light emitting stacked structures) may be disposed on respective substrates 10. Pixels 110 may be arranged in various ways according to the shape of the substrate 10, and the pixels 110 may be arranged at positions farthest from the center of the substrate 10. In the exemplary embodiment shown, the substrate 10 has a substantially triangular shape, and the pixels 110 are arranged at positions corresponding to the vertices of the triangular shape. However, the inventive concept is not limited to a specific position of the pixel 110, and the pixel 110 may be arranged at the center of the substrate 10 or at other positions.

[0184] The pixel blocks 110T are arranged at substantially regular intervals on the base substrate 101. For example, the pixel blocks 110T may be arranged in a predetermined direction (eg, in a direction such as Figure 7The pixel blocks 110T are arranged at substantially regular intervals in a first direction D1 across the left and right sides of the base substrate 101 as shown in FIG. 1 . In addition, the pixel blocks 110T may be arranged at substantially regular intervals in a direction (e.g., a second direction D2) intersecting the first direction D1. In this case, the first direction D1 and the second direction D2 correspond to two sides of the triangular shape when the pixel blocks 110T have a triangular shape. The pixel blocks 110T are arranged substantially regularly on the display device. In an exemplary embodiment, the pixel blocks 110T are arranged at intervals that cause the pixels 110 disposed on the pixel blocks 110T to be arranged at substantially regular intervals. Specifically, the pixel blocks 110T are arranged so that the intervals between the pixels 110 disposed in a specific pixel block 110T are substantially equal to the intervals between adjacent pixel blocks 110T relative to a predetermined direction (e.g., the first direction D1). In this way, when two pixels 110 disposed along the first direction D1 and arranged in the same pixel block 110T have an interval of the first pitch PT1, two adjacent pixels 110 disposed in different pixel blocks 110T may have an interval substantially equal to the first pitch PT1. In this case, the width D of the substrate 10 in the first direction D1 may be greater than the interval between the pixels 110 having the first pitch PT1, and the distance between the two substrates 10 in the first direction D1 may be less than the first pitch PT1. Similarly, adjacent pixels disposed in different pixel blocks 110T along the second direction D2 are spaced apart from each other by the second pitch PT2.

[0185] As described above, since the pixels 110 are arranged at substantially regular intervals in the display area of ​​the display device, the light emitting areas covered by the pixels 110 may be substantially identical to each other. For example, when the minimum area covered by pixels that are arranged repeatedly and adjacent to each other is defined as a unit area 110D, the display device may include a plurality of pixel blocks 110T, each of which includes at least one unit area 110D therein.

[0186] Each pixel block 110T may have a larger area than the unit area 110D. Therefore, the display device according to the exemplary embodiment may provide an image having uniform quality over the entire area thereof.

[0187] In an exemplary embodiment, when arranging the pixel blocks 110T, the pixel blocks 110T may be arranged after being turned upside down or reversed left to right according to their shapes, or the pixel blocks 110T may be arranged after being rotated relative to the center of each pixel block 110T, so that the pixel blocks 110T are uniformly arranged in the display area of ​​the display device.

[0188] Figure 8B According to another exemplary embodiment, Figure 7 A cross-sectional view taken along line AA'.

[0189] Reference Figure 7 and Figure 8B , a display device according to an exemplary embodiment includes a base substrate 101 and a plurality of pixel blocks 110T disposed on the base substrate 101. Each pixel block 110T includes a substrate 10 and a plurality of pixels 110 disposed on the substrate 10. The pixels 110 are disposed between the base substrate 101 and the substrate 10. In the illustrated exemplary embodiment, when the base substrate 101 includes a circuit thereon, the pixels 110 may be provided as a flip chip and may then be bonded to the wiring of the circuit on the substrate 10.

[0190] In an exemplary embodiment, the black matrix 10B may be disposed between the pixel blocks 110T adjacent to each other. When the black matrix 10B is disposed between the pixel blocks 110T, the adhesion between the base substrate 101 and the pixel blocks 110T may be improved, and the color mixing from the light passing through the adjacent pixels 110 may be reduced. In some exemplary embodiments, Figure 8B The black matrix 10B can also be formed on Fig. 8A in the display device.

[0191] Return to reference Figure 7 , the vertices of the triangular shape of the pixel block 110T are arranged between the vertices of the triangular shape of the adjacent pixel blocks 110T. When the black matrix is ​​arranged between the pixel blocks 110T, the portion of the black matrix corresponding to each vertex of the triangular shape may become weak, which may cause it to break. In this case, light from the pixel block 100T will leak at the broken portion, and the leaked light will be reflected or scattered by the electrode formed on the pixel block 100T, which will reduce the contrast of the display device. However, even when cracks occur, light reflection or scattering can be minimized by forming the vertices of the triangular shape of the pixel block 110T between the vertices of the triangular shape of the adjacent pixel blocks 110T.

[0192] Figure 7 and Fig. 8A The display device shown in FIG. 1 may be manufactured by forming a pixel block 110T, cutting the pixel block 110T, and transferring each pixel block 110T.

[0193] Fig. 9 It is shown Figure 7 , Fig. 8A and Figure 8B FIG. 1 is a plan view of one of the manufacturing operations of the display device shown in FIG.

[0194] Reference Figure 7 , Fig. 8A and Fig. 9, forming the pixel 110 on the substrate 10. An imaginary cutting line CL is defined on the substrate 10, and the shape and size of each pixel block 110T are determined by the cutting line CL. In an exemplary embodiment, the pixel 110 is formed in each pixel block 110T, and the position where the pixel 110 is formed can be determined by considering the arrangement of the pixel 110 in the display device. When the pixel 110 is formed on the substrate 10, the pixel block 110T is cut along the cutting line CL to separate the pixel blocks 110T from each other, and the separated pixel blocks 110T are transferred to the base substrate 101 and as shown in FIG. Figure 7 , Fig. 8A and Figure 8B Arrange as shown in to set up the display device.

[0195] According to an exemplary embodiment, since the pixel blocks 110T are individually transferred onto the base substrate 101 , whenever each pixel block 110T is transferred, the pixels 110 disposed on each pixel block 110T may be transferred substantially simultaneously.

[0196] Generally, during the manufacture of a display device, a plurality of pixels are each transferred, and therefore, the number of pixel transfers may become very large. However, according to an exemplary embodiment, the number of pixel transfers may be significantly reduced by providing a plurality of pixels on each substrate. For example, when Fig. 9 When three pixels are arranged on the substrate 10 as shown in FIG. , the number of transfers can be reduced to about 1 / 3 of that in the art.

[0197] In addition, in a conventional display device, pixels of each color (e.g., red pixels, green pixels, and blue pixels) are formed separately and transferred to a base substrate. However, according to an exemplary embodiment, since a light emitting stacked structure in which red pixels, green pixels, and blue pixels are stacked on each other is used as a pixel, the number of transfers for transferring pixels is further reduced to about 1 / 3 of the number of transfers in the art.

[0198] In addition, when conventional pixels are transferred one by one, defects may occur, such as the pixel being located outside the predetermined position of the lower adhesive layer disposed thereunder, or the pixel being tilted during attachment to the lower adhesive layer. However, according to an exemplary embodiment, since the pixels disposed at the fixed position of each pixel block are transferred to the base substrate in units of pixel blocks, the above defects can be significantly reduced.

[0199] In addition, since the pixel blocks according to the exemplary embodiment are formed in a small area on the substrate in a concentrated manner at substantially the same time and then arranged at regular intervals in a relatively large area, the display device can be easily manufactured. In this way, compared with when the pixels are arranged in a large area at wide intervals from the beginning, the arrangement of the pixels and the manufacturing method thereof can be simplified, thereby improving the yield during the manufacture of the display device.

[0200] In each pixel block, the pixels and line portions may be arranged in various shapes, which will be described in more detail below.

[0201] Fig.10 yes Figure 7 as well as Fig. 8A and Figure 8B A plan view of a pixel block in the pixel blocks.

[0202] Reference Fig.10 , three pixels 110 (e.g., light emitting stacked structures) are disposed on a substrate 10. The light emitting stacked structures 110 are disposed on the substrate 10 and are disposed at positions adjacent to vertices of a triangular shape. In the exemplary embodiment shown, a triangular portion defined by a dotted line connecting the light emitting stacked structures 110 corresponds to a unit region 110D.

[0203] A plurality of pads for electrically connecting to the base substrate 101 of the display device are provided on the substrate 10. The pads may apply a light emitting signal and a common voltage to each light emitting stack structure 110, and may be provided corresponding to the number of light emitting stack structures 110. In the illustrated exemplary embodiment, since three light emitting stack structures 110 are provided, three pads are provided. More specifically, a first pad 20P, a second pad 30P, and a third pad 40P for applying a light emitting signal and a common pad 50P for applying a common voltage are provided for each light emitting stack structure 110. The first pad 20P, the second pad 30P, and the third pad 40P are connected to the first scan line 130, respectively. R , the second scanning line 130 G and the third scanning line 130 B , the common pad 50P is connected to the data line 120. In an exemplary embodiment, the pad is provided in the form of a penetrating electrode which penetrates the upper and lower surfaces of the substrate 10.

[0204] Each of the pads connected to each light emitting stack structure 110 may be disposed at various positions on the substrate 10. For example, each pad may be disposed in the unit region 110D of the pixel block 110T, and may be disposed between the unit region 110D and the edge of the substrate 10. In the illustrated exemplary embodiment, each pad is disposed at a boundary of the unit region 110D, however, the inventive concept is not limited to a specific position of the pad.

[0205] In an exemplary embodiment, at least some of the pads may be disposed in the edge of the unit area 110D and the substrate 10. In this case, the pads may be disposed in a rotationally symmetrical form as much as possible with respect to the center of the pixel block 110T. In other exemplary embodiments, the pads disposed at the outermost positions from the center of the substrate 10 may be placed in a rotationally symmetrical position as much as possible. Therefore, when the pixel block 110T is attached to the base substrate 101, the pixel block 110T is prevented from tilting due to the step difference between the pads.

[0206] Fig.10 The light emitting stack structure and the pad shown in FIG. 1 may be driven in a passive matrix type manner or an active matrix type manner. Hereinafter, according to an exemplary embodiment, the light emitting stack structure and the pad will be described as being driven in a passive matrix type pixel.

[0207] Fig.11 According to an exemplary embodiment Fig.10 The enlarged view of part P2 and part P3, Fig.12 is along Fig.11 A cross-sectional view taken along line II'.

[0208] In the following, reference will be made to Fig.10 and Fig.11 The arrangement of the light emitting stack structure in a plan view is mainly described, and reference will be made to Fig.10 and Fig.12 The arrangement of the light-emitting stacked structure in the cross-sectional view is mainly described.

[0209] Reference Fig.10 , Fig.11 and Fig.12 , a light emitting stack structure according to an exemplary embodiment includes a substrate 10 and a plurality of epitaxial stacks stacked on the substrate 10 in a plan view.

[0210] In exemplary embodiments, the substrate 10 may include various materials, for example, silicon.

[0211] The pad portion is disposed on the substrate 10 and includes a first pad 20P, a second pad 30P, a third pad 40P, and a common pad 50P. R , the second scanning line 130 G and the third scanning line 130 B And the contacts between the line portion of the data line 120 and the pad portion including the first pad 20P, the second pad 30P, the third pad 40P and the common pad 50P are substantially the same as each other, so in Fig.11 and Fig.12 Only the third scan line 130 is shown. B The contact between the third pad 40P corresponds to the area P3.

[0212] The third pad 40P disposed on the substrate 10 may include: a penetration electrode 11 penetrating the upper and lower surfaces of the substrate 10; an upper pad electrode 13 disposed on the penetration electrode 11; and a lower pad electrode 15 disposed under the penetration electrode 11. An insulating layer 80 is disposed on the upper and lower surfaces of the substrate 10 and between the third pad 40P and the substrate 10.

[0213] The epitaxial stack (or light emitting stack structure) includes a first epitaxial stack 20 , a second epitaxial stack 30 , and a third epitaxial stack 40 .

[0214] First epitaxial stack 20 has the largest area. Second epitaxial stack 30 has an area smaller than that of first epitaxial stack 20, and is disposed on a portion of first epitaxial stack 20. Third epitaxial stack 40 has an area smaller than that of second epitaxial stack 30, and is disposed on a portion of second epitaxial stack 30. In an exemplary embodiment, first epitaxial stack 20, second epitaxial stack 30, and third epitaxial stack 40 are arranged so that upper surfaces of first epitaxial stack 20, second epitaxial stack 30, and third epitaxial stack 40 are sequentially exposed.

[0215] Contacts are provided in the pixel to connect the wiring portion to the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40. In an exemplary embodiment, the stacking structure of the pixel may be changed according to the type of polarity semiconductor layer to which a common voltage is applied of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40. Hereinafter, according to an exemplary embodiment, the common voltage will be described as being applied to the p-type semiconductor layer of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40.

[0216] A first light emitting signal line, a second light emitting signal line, and a third light emitting signal line for applying light emitting signals to the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40, respectively, and a common line for applying a common voltage to each of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 are connected to the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40. Hereinafter, since the first light emitting signal line, the second light emitting signal line, and the third light emitting signal line correspond to the first scan line 130, respectively R , the second scanning line 130 G and the third scanning line 130 B , and the common line corresponds to the data line 120, so the first scan line 130 R , the second scanning line 130 G and the third scanning line 130 BAnd the data line 120 will be described as being connected to the first epitaxial stack 20 , the second epitaxial stack 30 , and the third epitaxial stack 40 .

[0217] In an exemplary embodiment, the first scan line 130 R , the second scanning line 130 G and the third scanning line 130 B And the data line 120 may extend in a direction toward a corresponding pad on the substrate 10 and may be connected to the corresponding pad. However, the inventive concept is not limited to the first scan line 130. R , the second scanning line 130 G and the third scanning line 130 B As well as a specific direction along which the data line 120 extends, the extending direction may be changed in various ways according to the arrangement of pixels and pads.

[0218] The ohmic electrode 25p' is disposed in the light emitting region in which the first p-type contact electrode layer 25p is disposed, for ohmic contact between the first p-type contact electrode layer 25p and the first epitaxial stack 20. The ohmic electrode 25p' may have various shapes and may be provided in a plurality. In an exemplary embodiment, the ohmic electrode 25p' is provided in the lower surface of the first epitaxial stack 20, however, the inventive concept is not limited thereto. The ohmic electrode 25p' may include various materials for ohmic contact. For example, the ohmic electrode 25p' corresponding to the p-type ohmic electrode 25p' may include an Au-Zn alloy or an Au-Be alloy. In this case, since the material for the ohmic electrode 25p' has a reflectivity lower than that of Ag, Al, and Au, an additional reflective electrode may also be provided. Ag or Au may be used as a material for the additional reflective electrode, and a layer including Ti, Ni, Cr, or Ta may be provided as an adhesive layer for adhering to an adjacent component. In this case, the adhesive layer may be thinly deposited on the upper and lower surfaces of the reflective electrode including Ag or Au.

[0219] The first n-type contact electrode 21n is disposed on the first epitaxial stack 20. The first scan line 130 R The second n-type contact electrode 31n is connected to the first n-type contact electrode 21n. The second n-type contact electrode 31n is disposed on the second epitaxial stack 30. The second scan line 130 G The third n-type contact electrode 41n is disposed on the third epitaxial stack 40. The third scan line 130 B Connected to the third n-type contact electrode 41n.

[0220] A portion of one side of the second epitaxial stack 30 is removed to form a second p-type contact electrode 35pc. The second p-type contact electrode 35pc is connected to the data line 120. The third p-type contact electrode 45pc is connected to the data line 120. The data line 120 is connected to the first p-type contact electrode layer 25p through the first contact hole CH1 and the second contact hole CH2. Therefore, the first p-type contact electrode layer 25p, the second p-type contact electrode layer 35p, and the third p-type contact electrode layer 45p are electrically connected to the data line 120, and a common voltage is applied thereto through the data line 120.

[0221] In an exemplary embodiment, the first n-type contact electrode 21n, the second n-type contact electrode 31n, and the third n-type contact electrode 41n have relatively wide areas to be easily connected to the first scan line 130, respectively. R , the second scanning line 130 G and the third scanning line 130 B The first n-type contact electrode 21n, the second n-type contact electrode 31n, and the third n-type contact electrode 41n may be formed to have various shapes, and the first n-type contact electrode 21n, the second n-type contact electrode 31n, and the third n-type contact electrode 41n have a substantially circular shape (see Fig.14A ). An extension extending in one direction from the first n-type contact electrode 21n, the second n-type contact electrode 31n, and the third n-type contact electrode 41n may be provided together with the first n-type contact electrode 21n, the second n-type contact electrode 31n, and the third n-type contact electrode 41n. The extension may supply a uniform current to the n-type semiconductor layer of the first epitaxial stack 20, and may extend substantially in one direction from the first n-type contact electrode 21n, the second n-type contact electrode 31n, and the third n-type contact electrode 41n. The extension may be formed to have various shapes, and in the exemplary embodiment shown, the extension has an elongated shape like a strip.

[0222] First scanning line 130 R , the second scanning line 130 G and the third scanning line 130 B The first scan line 130 is connected to the first pad 20P, the second pad 30P and the third pad 40P, and the data line 120 is connected to the common pad 50P. R One end of the first scanning line 130 is connected to the first n-type contact electrode 21n. R The other end of the second scanning line 130 is connected to the first pad 20P. G One end of the second scanning line 130 is connected to the second n-type contact electrode 31n. G The other end of the third scanning line 130 is connected to the second pad 30P. B One end of the third scanning line 130 is connected to the third n-type contact electrode 41n.B The other end of the data line 120 is connected to the third pad 40P. One end of the data line 120 is connected to the first p-type contact electrode layer 25p, the second p-type contact electrode layer 35p, and the third p-type contact electrode layer 45p, and the other end of the data line 120 is connected to the common pad 50P.

[0223] An adhesive layer, a p-type contact electrode layer, and a wave pass filter may be disposed between substrate 10 and first epitaxial stack 20, between first epitaxial stack 20 and second epitaxial stack 30, and between second epitaxial stack 30 and third epitaxial stack 40. Hereinafter, according to an exemplary embodiment, a pixel will be described according to a stacking order.

[0224] According to an exemplary embodiment, a substrate 10 is provided, and a first epitaxial stack 20 is disposed on the substrate 10 with a first adhesive layer 61 interposed therebetween.

[0225] The first epitaxial stack 20 includes a p-type semiconductor layer, an active layer, and an n-type semiconductor layer sequentially stacked in an upward direction from a lower portion.

[0226] The first insulating layer 81 is disposed on the lower surface of the first epitaxial stack 20 facing the substrate 10. The first insulating layer 81 is provided with at least one contact hole defined therethrough. The ohmic electrode 25p' is disposed in the contact hole and contacts the p-type semiconductor layer of the first epitaxial stack 20. The ohmic electrode 25p' may include various materials.

[0227] The ohmic electrode 25 p ′ contacts the first p-type contact electrode layer 25 p . The first p-type contact electrode layer 25 p is disposed between the first insulating layer 81 and the first adhesive layer 61 .

[0228] The first p-type contact electrode layer 25p may overlap the first epitaxial stack 20 (specifically, the light emitting region of the first epitaxial stack 20), and may be disposed to cover most or all of the light emitting region in a plan view. The first p-type contact electrode layer 25p may include a reflective material to reflect light emitted from the first epitaxial stack 20. In addition, the first insulating layer 81 may have reflectivity, thereby easily performing reflection of light from the first epitaxial stack 20. For example, the first insulating layer 81 may have an omnidirectional reflector (ODR) structure.

[0229] In addition, the first p-type contact electrode layer 25p may include a metal having a high reflectivity for light emitted from the first epitaxial stack 20, thereby maximizing the reflectivity for light emitted from the first epitaxial stack 20. For example, when the first epitaxial stack 20 emits red light, the first p-type contact electrode layer 25p may include a metal having a high reflectivity for red light, such as Au, Al, or Ag. In the case of Au, the reflectivity for light (e.g., green light and blue light) emitted from the second epitaxial stack 30 and the third epitaxial stack 40 is not high, and therefore, color mixing caused by light emitted from the second epitaxial stack 30 and the third epitaxial stack 40 can be prevented.

[0230] The first n-type contact electrode 21n is disposed on the upper surface of the first epitaxial stack 20. The first n-type contact electrode 21n may include a conductive material. In an exemplary embodiment, the first n-type contact electrode 21n may include various metal materials and alloys thereof, for example, an Au-Te alloy or an Au-Ge alloy.

[0231] The second adhesive layer 63 is disposed on the first epitaxial stack 20 , and the first wave pass filter 71 , the second p type contact electrode layer 35 p , and the second epitaxial stack 30 are sequentially disposed on the second adhesive layer 63 .

[0232] The first wave pass filter 71 covers a portion of the light emitting region of the first epitaxial stack 20 , and is disposed on a portion of the upper surface of the first epitaxial stack 20 to overlap with a region in which the second epitaxial stack 30 is disposed.

[0233] The second epitaxial stack 30 includes a p-type semiconductor layer, an active layer, and an n-type semiconductor layer sequentially stacked in an upward direction from a lower portion.

[0234] The second epitaxial stack 30 is partially removed to expose a portion of the second p-type contact electrode layer 35p. The second p-type contact electrode 35pc is disposed on the second p-type contact electrode layer 35p in the partially removed region of the second epitaxial stack 30. The second n-type contact electrode 31n is disposed on the second epitaxial stack 30.

[0235] The third adhesive layer 65 is disposed on the second epitaxial stack 30 , and the second wave pass filter 73 , the third p-type contact electrode layer 45 p , and the third epitaxial stack 40 are sequentially disposed on the third adhesive layer 65 .

[0236] The second wave pass filter 73 covers a portion of the light emitting surface of the second epitaxial stack 30 , and is disposed on a portion of the upper surface of the second epitaxial stack 30 to overlap with a region in which the third epitaxial stack 40 is disposed.

[0237] The third epitaxial stack 40 includes a p-type semiconductor layer, an active layer, and an n-type semiconductor layer sequentially stacked in an upward direction from a lower portion.

[0238] The third epitaxial stack 40 is partially removed to expose a portion of the third p-type contact electrode layer 45p. A third p-type contact electrode 45pc is disposed on the third p-type contact electrode layer 45p in the partially removed region of the third epitaxial stack 40. A third n-type contact electrode 41n is disposed on the third epitaxial stack 40.

[0239] The second insulating layer 83 is disposed on the substrate 10 on which the third epitaxial stack 40 is formed. The second insulating layer 83 may include various organic / inorganic insulating materials, but is not limited thereto. For example, the second insulating layer 83 may include an inorganic insulating material including silicon nitride or silicon oxide, or an organic insulating material including polyimide.

[0240] The second insulating layer 83 is provided with a contact hole defined therethrough to expose the upper surfaces of the first p-type contact electrode layer 25p, the second p-type contact electrode 35pc, the third p-type contact electrode 45pc, the first n-type contact electrode 21n, the second n-type contact electrode 31n, the third n-type contact electrode 41n, the first pad 20P, the second pad 30P, the third pad 40P, and the common pad 50P. R , the second scanning line 130 G and the third scanning line 130 B The first scan line 130 is connected to the first n-type contact electrode 21n, the second n-type contact electrode 31n and the third n-type contact electrode 41n respectively. R , the second scanning line 130 G and the third scanning line 130 B The data line 120 extends to a region in which the first pad 20P, the second pad 30P, and the third pad 40P are formed, and is connected to the first pad 20P, the second pad 30P, and the third pad 40P through a contact hole (e.g., a third contact hole) defined above the first pad 20P, the second pad 30P, and the third pad 40P. The data line 120 is connected to the first p-type contact electrode layer 25p, the second p-type contact electrode 35pc, and the third p-type contact electrode 45pc through the first contact hole CH1 and the second contact hole CH2. The data line 120 extends to a region in which the common pad 50P is formed, and is connected to the common pad 50P through a contact hole defined above the common pad 50P. In an exemplary embodiment, the first scan line 130 R , the second scanning line 130 G and the third scanning line 130 BAnd the data line 120 may be disposed on the second insulating layer 83 and may be connected to the contact hole in a region where the first pad 20P, the second pad 30P, and the third pad 40P are formed, wherein a portion of the second insulating layer 83 is removed to expose the upper pad electrode 13 .

[0241] In some exemplary embodiments, the concavoconvex portion may be selectively formed on the upper surfaces of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40. The concavoconvex portion may be provided only in a region corresponding to the light emitting region, or may be provided on the entire upper surface of each semiconductor layer.

[0242] In some exemplary embodiments, a non-light-transmitting layer may be further provided on a side portion of the second insulating layer 83 corresponding to a side surface of the light-emitting stack structure. The non-light-transmitting layer may be used as a light blocking layer to prevent light from the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 from emitting through the side surface of the light-emitting stack structure. To this end, the non-light-transmitting layer may include a material that absorbs or reflects light.

[0243] The non-light-transmitting layer may have a single layer or multiple layers of metal. For example, the non-light-transmitting layer may include various materials including metals such as Al, Ti, Cr, Ni, Au, Ag, Sn, W, and Cu, or alloys thereof.

[0244] In an exemplary embodiment, the non-light-transmitting layer may be disposed on the side surface of the second insulating layer 83 as a separate layer using metal or a metal alloy.

[0245] In an exemplary embodiment, the non-light-transmitting layer may be formed by extending the first scanning line 130 along the side surface of the light-emitting stack structure. R , the second scanning line 130 G and the third scanning line 130 B and at least one of the data lines 120. In this case, from the first scan line 130 R , the second scanning line 130 G and the third scanning line 130 B And the non-light-transmitting layer of at least one extension of the data lines 120 may be insulated from other conductive components.

[0246] In addition, the non-light-transmitting layer may be aligned with the first scanning line 130 R , the second scanning line 130 G and the third scanning line 130 B and the data line 120 are separately arranged, wherein the non-light-transmitting layer and the first scanning line 130 R , the second scanning line 130 G and the third scanning line 130 BAnd at least one of the data lines 120 is formed by the same process, uses the same material and is disposed on the same layer.

[0247] As another example, when the non-light-transmitting layer is not separately provided, the second insulating layer 83 may be used as the non-light-transmitting layer. In this case, the second insulating layer 83 is not provided in a region corresponding to the upper portion (e.g., the front surface direction) of the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40, so that light emitted from the first epitaxial stack 20, the second epitaxial stack 30, and the third epitaxial stack 40 can travel in the front surface direction.

[0248] The non-light-transmitting layer is not particularly limited as long as the non-light-transmitting layer absorbs or reflects light to block the transmission of light. In some exemplary embodiments, the non-light-transmitting layer may be a distributed Bragg reflector (DBR) dielectric mirror, a metal reflective layer formed on an insulating layer, or a black organic polymer layer. When a metal reflective layer is used as a non-light-transmitting layer, the metal reflective layer may be in a floating state in which the metal reflective layer is electrically insulated from components of other pixels.

[0249] Due to the non-light-transmitting layer provided on the side surface of the pixel, light emitted from a specific pixel can be prevented from affecting an adjacent pixel or from being mixed with light emitted from the adjacent pixel.

[0250] The pixel having the above structure can be manufactured by sequentially stacking the first epitaxial stack 20, the second epitaxial stack 30 and the third epitaxial stack 40 on the substrate 10. Hereinafter, a process of preparing the substrate 10 will be described, and then a process of forming a light emitting stack structure on the substrate 10 will be described in detail.

[0251] FIG. 13A to FIG. 13E is a cross-sectional view illustrating a method of manufacturing a substrate according to an exemplary embodiment. Fig.14A , Fig.15A , Fig.16A , Fig.17A , Fig.18A , Fig.19A , Fig. 20A , Fig.21A , Fig.22A , Fig.23A , Fig.24A and Fig.25A is a plan view illustrating a method of stacking first to third epitaxial stacks on a substrate to form a pixel. Fig. 14B , Fig. 15B , Fig. 16B , Fig. 17B , Fig.18B , Fig.19B , Fig. 20B , Fig.21B , Fig. 22B , Fig. 23B , Fig. 24B and Fig.25B Along Fig.14A , Fig.15A , Fig.16A , Fig.17A , Fig.18A , Fig.19A , Fig. 20A , Fig.21A , Fig.22A , Fig.23A , Fig.24A and Fig.25A A cross-sectional view taken along line II'.

[0252] Reference Fig.13A , prepare a substrate 10, and etch the substrate 10 to form a groove therein. The substrate 10 may include silicon, and the groove may be formed by a deep silicon etching method or the like.

[0253] Reference Fig. 13B , an insulating layer 80 is formed on the substrate 10 using a thermal treatment process or a plasma enhanced chemical vapor deposition (PECVD) process. The insulating layer 80 may be, but is not limited to, a silicon oxide layer.

[0254] Reference Fig. 13C , a metal layer ML is formed on the substrate 10. The metal layer ML may be formed by depositing a seed metal on the substrate 10 having the insulating layer 80 formed thereon using a sputterer and plating the seed metal. As the seed metal, Cr and Cu, Ti and Cu, or Sn and Cu may be used.

[0255] Reference Fig.13D , the upper and lower surfaces of the substrate 10 are polished to form the through electrode 11. The polishing process may be performed by a chemical mechanical polishing (CMP) process, etc. Thus, the through electrode 11 penetrating both surfaces of the substrate 10 is formed, and the insulating layer 80 is interposed between the substrate 10 and the through electrode 11.

[0256] Reference Fig.13E Insulating layers 80 are formed on the upper and lower surfaces of the substrate 10 , respectively, and the insulating layers 80 are patterned to define openings. The upper pad electrodes 13 and the lower pad electrodes 15 may be formed in the openings of the insulating layer 80 .

[0257] In an exemplary embodiment, the upper pad electrode 13 and the lower pad electrode 15 may have substantially the same area in a plan view. However, the inventive concept is not limited thereto. For example, the area of ​​the lower pad electrode 15 may be larger than the area of ​​the upper pad electrode 13. When the lower pad electrode 15 has a relatively large area, the possibility of tilting the pixel block during the manufacture of the display device can be reduced, and the contact stability between the pixel block and the base substrate can be improved.

[0258] The upper pad electrode 13 and the lower pad electrode 15 may be formed of various metals and metal alloys, and may have a single-layer or multi-layer structure. The upper pad electrode 13 and the lower pad electrode 15 may include an adhesive metal layer including a metal such as Cr, Ti, or Ni for adhering to the penetration electrode, and a barrier layer including TiN, TiW, Ti, or Ni may be provided. In addition, a thin Au layer may be provided at the outermost position of the upper pad electrode 13 and the lower pad electrode 15 to prevent oxidation.

[0259] Reference Fig.14A and Fig. 14B , a first epitaxial stack 20 , a second epitaxial stack 30 , and a third epitaxial stack 40 are sequentially formed on a substrate 10 .

[0260] The first epitaxial stack 20 and the ohmic electrode 25p' are formed on the first temporary substrate. The first temporary substrate may be a semiconductor substrate (e.g., a gallium arsenide (GaAs) substrate) on which the first epitaxial stack 20 can be grown. The first epitaxial stack 20 is manufactured by forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on the first temporary substrate. A first insulating layer 81 is formed on the first temporary substrate, and an ohmic electrode 25p' is formed in a contact hole formed in the first insulating layer 81.

[0261] The ohmic electrode 25p' may be formed by forming a first insulating layer 81 on a first temporary substrate, coating a photoresist, patterning the photoresist, depositing a material for the ohmic electrode 25p' on the patterned photoresist, and stripping the photoresist pattern. However, the inventive concept is not limited to a specific method of forming the ohmic electrode 25p'. In another exemplary embodiment, the ohmic electrode 25p' may be formed by forming a first insulating layer 81, patterning the first insulating layer 81 using a photolithography process, forming a layer of the ohmic electrode 25p' using a material for the ohmic electrode 25p', and patterning the layer of the ohmic electrode 25p' using a photolithography process.

[0262] A first p-type contact electrode layer 25p (e.g., data line 120) is formed on the first temporary substrate on which the ohmic electrode 25p' is formed. The first p-type contact electrode layer 25p may include a reflective material. The first p-type contact electrode layer 25p may be formed by depositing a metal on the first temporary substrate and patterning the deposited metal by a photolithography process.

[0263] The first epitaxial stack 20 formed on the first temporary substrate is turned upside down and attached to the substrate 10 with the first adhesive layer 61 interposed therebetween.

[0264] The first temporary substrate is removed after attaching the first epitaxial stack 20 to the substrate 10. The first temporary substrate may be removed by various methods such as a wet etching process, a dry etching process, a physical removal process, or a laser lift-off process.

[0265] After removing the first temporary substrate, a first n-type contact electrode 21n is formed on the first epitaxial stack 20. The first n-type contact electrode 21n may be formed by forming a conductive material layer and patterning the conductive material layer using, for example, a photolithography process.

[0266] In some exemplary embodiments, after removing the first temporary substrate, a concavo-convex portion may be formed on the upper surface (e.g., n-type semiconductor layer) of the first epitaxial stack 20. The concavo-convex portion may be textured by various etching processes such as a dry etching process using microphotography, a wet etching process using crystal properties, a texturing process using a physical method such as sandblasting, an ion beam etching process, or a texturing process using an etching rate difference of a block copolymer.

[0267] A second epitaxial stack 30 , a second p-type contact electrode layer 35 p , and a first wavepass filter 71 are formed on the second temporary substrate.

[0268] The second temporary substrate may be a sapphire substrate. The second epitaxial stack 30 may be manufactured by forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on the second temporary substrate.

[0269] The second epitaxial stack 30 formed on the second temporary substrate is turned upside down and attached to the first epitaxial stack 20, and the second adhesive layer 63 is placed between the second epitaxial stack 30 and the first epitaxial stack 20. After the second epitaxial stack 30 is attached to the first epitaxial stack 20, the second temporary substrate is removed. The second temporary substrate can be removed by various methods such as a wet etching process, a dry etching process, a physical removal process, or a laser lift-off process. In some exemplary embodiments, after removing the second temporary substrate, a concavo-convex portion can be formed on the upper surface (e.g., the n-type semiconductor layer) of the second epitaxial stack 30. The concavo-convex portion can be textured by various etching processes, or a patterned sapphire substrate can be used as the second temporary substrate to form the concavo-convex portion.

[0270] A third epitaxial stack 40 , a third p-type contact electrode layer 45 p , and a second wavepass filter 73 are formed on the third temporary substrate.

[0271] The third temporary substrate may be a sapphire substrate. The third epitaxial stack 40 may be manufactured by forming an n-type semiconductor layer, an active layer, and a p-type semiconductor layer on the third temporary substrate.

[0272] The third epitaxial stack 40 formed on the third temporary substrate is turned upside down and attached to the second epitaxial stack 30, and the third adhesive layer 65 is placed between the third epitaxial stack 40 and the second epitaxial stack 30. After the third epitaxial stack 40 is attached to the second epitaxial stack 30, the third temporary substrate is removed. The third temporary substrate can be removed by various methods such as a wet etching process, a dry etching process, a physical removal process, or a laser lift-off process. In some exemplary embodiments, after removing the third temporary substrate, a concavo-convex portion can be formed on the upper surface (e.g., the n-type semiconductor layer) of the third epitaxial stack 40. The concavo-convex portion can be textured by various etching processes, or a patterned sapphire substrate can be used as the third temporary substrate to form the concavo-convex portion.

[0273] Reference Fig.15A and Fig. 15B , a third n-type contact electrode 41n is formed on the upper surface of the third epitaxial stack 40. The third n-type contact electrode 41n may be formed by forming a conductive material layer on the upper surface of the third epitaxial stack 40 and patterning the conductive material layer using, for example, a photolithography process.

[0274] Reference Fig.16A and Fig. 16B , the third epitaxial stack 40 is patterned. A portion of the third epitaxial stack 40 is removed from a region corresponding to the pixel except for a predetermined region of the pixel, so that the third epitaxial stack 40 has an area smaller than that of the first epitaxial stack 20 and the second epitaxial stack 30. In addition, a portion of the third epitaxial stack 40 is removed from a region in which the third p-type contact electrode 45pc is to be formed. The third epitaxial stack 40 may be removed by various methods such as a wet etching process or a dry etching process using a photolithography process, in which case the third p-type contact electrode layer 45p may be used as an etching stopper.

[0275] Reference Fig.17A and Fig. 17B , a third p-type contact electrode 45pc is formed on the third p-type contact electrode layer 45p exposed by removing the third epitaxial stack 40. The third p-type contact electrode 45pc may be formed by forming a conductive material layer on the upper surface of the substrate 10 on which the third p-type contact electrode layer 45p is formed, and patterning the conductive material layer using, for example, a photolithography process.

[0276] Reference Fig.18A and Fig.18B The third p-type contact electrode layer 45p, the second wavepass filter 73, and the third adhesive layer 65 are removed from the region other than the region in which the third epitaxial stack 40 is formed. Thus, the upper surface of the second epitaxial stack 30 is exposed.

[0277] The third p-type contact electrode layer 45 p , the second wave pass filter 73 , and the third adhesive layer 65 may be removed by various methods such as a wet etching process or a dry etching process using, for example, a photolithography process.

[0278] Reference Fig.19A and Fig.19B The second n-type contact electrode 31n is formed on the exposed upper surface of the second epitaxial stack 30. The second n-type contact electrode 31n may be formed by forming a conductive material layer on the upper surface of the second epitaxial stack 30 and patterning the conductive material layer using, for example, a photolithography process.

[0279] Reference Fig. 20A and Fig. 20B , the second epitaxial stack 30 is patterned. A portion of the second epitaxial stack 30 is removed from an area corresponding to the pixel except for a predetermined area of ​​the pixel, so that the second epitaxial stack 30 has an area smaller than that of the first epitaxial stack 20. In addition, the second epitaxial stack 30 is also removed from an area in which the second p-type contact electrode 35pc is to be formed later. The second epitaxial stack 30 may be removed by various methods such as a wet etching process or a dry etching process using a photolithography process, in which case the second p-type contact electrode layer 35p may be used as an etching stopper.

[0280] Reference Fig.21A and Fig.21B , a second p-type contact electrode 35pc is formed on the second p-type contact electrode layer 35p exposed by removing the second epitaxial stack 30. The second p-type contact electrode 35pc may be formed by forming a conductive material layer on the upper surface of the substrate 10 on which the second p-type contact electrode layer 35p is formed, and patterning the conductive material layer using, for example, a photolithography process.

[0281] In the exemplary embodiment shown, the third n-type contact electrode 41n, the third p-type contact electrode 45pc, the second n-type contact electrode 31n, and the second p-type contact electrode 35pc may be formed by separate mask processes as described above, respectively, but the inventive concept is not limited thereto. Specifically, the third n-type contact electrode 41n is described as being formed before patterning the third epitaxial stack 40, the third p-type contact electrode 45pc is described as being formed after patterning the third epitaxial stack 40, the second n-type contact electrode 31n is described as being formed before patterning the second epitaxial stack 30, and the second p-type contact electrode 35pc is described as being formed after patterning the second epitaxial stack 30.

[0282] In some exemplary embodiments, however, after the third epitaxial stack 40 and the second epitaxial stack 30 are sequentially patterned, the third n-type contact electrode 41n, the third p-type contact electrode 45pc, the second n-type contact electrode 31n, and the second p-type contact electrode 35pc may be formed substantially simultaneously by a single mask process. When the third n-type contact electrode 41n and the second n-type contact electrode 31n are formed of a material different from that of the third p-type contact electrode 45pc and the second p-type contact electrode 35pc, two types of contact electrodes may be formed using masks different from each other. More specifically, after the third epitaxial stack 40 and the second epitaxial stack 30 are sequentially patterned, the third n-type contact electrode 41n and the second n-type contact electrode 31n may be formed substantially simultaneously by a single mask process, and the third p-type contact electrode 45pc and the second p-type contact electrode 35pc may be formed substantially simultaneously by another single mask process.

[0283] Reference Fig.22A and Fig. 22B , the second p-type contact electrode layer 35p, the first wave-pass filter 71, and the second adhesive layer 63 are removed from the region other than the region in which the second epitaxial stack 30 is disposed. Therefore, the upper surface of the first epitaxial stack 20 is exposed. The second p-type contact electrode layer 35p, the first wave-pass filter 71, and the second adhesive layer 63 may be removed by various methods such as a wet etching process or a dry etching process using, for example, a photolithography process. Through the etching process, the first n-type contact electrode 21n disposed on the upper surface of the first epitaxial stack 20 is exposed.

[0284] Reference Fig.23A and Fig. 23B , patterning the first epitaxial stack 20. Since the first epitaxial stack 20 is also formed in the region where the second epitaxial stack 30 and the third epitaxial stack 40 are disposed, the first epitaxial stack 20 has the largest area. The first epitaxial stack 20 may be removed by various methods such as a wet etching process or a dry etching process using, for example, a photolithography process.

[0285] In this case, the first insulating layer 81 may be removed substantially simultaneously or additionally, and an upper surface of the first p type contact electrode layer 25p (eg, data line) is exposed in a portion of a region where the first epitaxial stack 20 is removed.

[0286] Reference Fig.24A and Fig. 24B A second insulating layer 83 may be formed on the patterned first epitaxial stack 20 , second epitaxial stack 30 , and third epitaxial stack 40 , and contact holes including a first contact hole CH1 , a second contact hole CH2 , and a third contact hole CH3 may be defined by the second insulating layer 83 .

[0287] The first p-type contact electrode layer 25p is exposed through the first contact hole CH1 and the second contact hole CH2, and the upper pad electrode 13 of the third pad 40P is exposed through the third contact hole CH3. The upper surface of the second p-type contact electrode 35pc, the upper surface of the third p-type contact electrode 45pc, the upper surface of the first n-type contact electrode 21n, the upper surface of the second n-type contact electrode 31n, the upper surface of the third n-type contact electrode 41n, the upper surface of the first pad 20P, the upper surface of the second pad 30P, and the upper surface of the common pad 50P are exposed through other contact holes. The second insulating layer 83 through which the contact holes are defined can be formed by, for example, a photolithography process.

[0288] Reference Fig.25A and Fig.25B , forming a first scanning line 130 on the second insulating layer 83 R , the second scanning line 130 G and the third scanning line 130 B And data line 120. First scan line 130 R The second scan line 130 is connected to the first n-type contact electrode 21n through a contact hole defined corresponding to the first n-type contact electrode 21n, and is connected to the upper pad electrode of the first pad 20P through a contact hole defined corresponding to the first pad 20P. G The third scan line 130 is connected to the second n-type contact electrode 31n through a contact hole defined corresponding to the second n-type contact electrode 31n, and is connected to the upper pad electrode of the second pad 30P through a contact hole defined corresponding to the second pad 30P. B The upper pad electrode 13 is connected to the third n-type contact electrode 41 n through a contact hole defined corresponding to the third n-type contact electrode 41 n , and is connected to the third pad 40P through a contact hole defined corresponding to the third pad 40P.

[0289] The data line 120 is connected to the second p-type contact electrode 35pc and the third p-type contact electrode 45pc through the contact holes defined corresponding to the second p-type contact electrode 35pc and the third p-type contact electrode 45pc, and is connected to the first p-type contact electrode layer 25p through the first contact hole CH1 and the second contact hole CH2 defined above the first p-type contact electrode layer 25p. The data line 120 is connected to the upper pad electrode of the common pad 50P through the contact hole defined above the common pad 50P.

[0290] According to an exemplary embodiment, the first scan line 130 R , the second scanning line 130 G and the third scanning line 130 BThe order of forming the data line 120 is not particularly limited, but can be formed in various ways different from the above steps. More specifically, the first scan line 130 R , the second scanning line 130 G and the third scanning line 130 B The data line 120 and the data line 120 are described as being formed on the second insulating layer 83 by the same process, however, they may be formed in a different order. R and the second scanning line 130 G Then, the third scanning line 130 is formed. B As another example, the first scan line 130 may be formed by the same process. R and the third scanning line 130 B Then, the second scanning line 130 is formed. G , and an additional insulating layer is formed. In addition, the first scanning line 130 can be formed R , the second scanning line 130 G and the third scanning line 130 B The data line 120 is formed by any of the steps.

[0291] Furthermore, in some exemplary embodiments, the position of the contact portion of each of the epitaxial stacks 20, 30, and 40 may be changed, and thus, the first scan line 130 R , the second scanning line 130 G and the third scanning line 130 B And the position of the data line 120 can also be changed.

[0292] In some exemplary embodiments, a non-light-transmitting layer may also be provided on the second insulating layer 83 in an area corresponding to the side surface of the pixel. The non-light-transmitting layer may be formed by a distributed Bragg reflector (DBR) dielectric mirror, a metal reflective layer formed on the insulating layer, or a black organic polymer layer. When the metal reflective layer is used as the non-light-transmitting layer, the metal reflective layer may be in a floating state and electrically insulated from components of other pixels. The non-light-transmitting layer may be formed by depositing two or more insulating layers having different refractive indices from each other. For example, the non-light-transmitting layer may be formed by sequentially stacking a material having a relatively low refractive index and a material having a relatively high refractive index or by alternately stacking insulating layers having different refractive indices from each other. The materials having different refractive indices are not particularly limited, but may include, for example, SiO2 and SiN x .

[0293] As described above, in the display device according to the exemplary embodiments, the epitaxial stacks may be sequentially stacked, and then contacts with the wiring portions may be substantially simultaneously formed in the epitaxial stacks.

[0294] After forming the light emitting stacked structure on the substrate, the substrate can be cut along cutting lines by pixel blocks, and the pixel blocks are transferred to a base substrate, thereby providing a display device.

[0295] According to an exemplary embodiment, the pixel block has a substantially triangular shape, however, the inventive concept is not limited to a specific shape of the pixel block. For example, the pixel block may have a substantially polygonal shape or a stripe shape. Specifically, the pixel block may have a substantially quadrilateral shape (such as a square shape, a rectangular shape, or a diamond shape), a pentagonal shape, or a hexagonal shape.

[0296] Fig.26A and Fig.26B are plan views of a pixel block and a display device according to exemplary embodiments, respectively. Fig.27A and Fig.27B is a plan view of a pixel block and a display device according to another exemplary embodiment.

[0297] Reference Fig.26A , Fig.26B , Fig.27A and Fig.27B , the pixels 110 can be arranged according to various shapes of the substrate 10. The pixels 110 can be arranged at a position as far as possible from the center of the substrate 10. When the substrate 10 has a substantially quadrilateral shape, the pixels 110 are arranged at positions corresponding to the vertices of the quadrilateral shape, and when the substrate 10 has a strip shape, the pixels 110 are arranged at both ends of the strip shape. However, the inventive concept is not limited to a specific position of the pixel 110, and in some exemplary embodiments, the pixel 110 can be arranged at the center of the substrate 10 or at other positions.

[0298] The pixel block 110T is formed by considering that the pixel block 110T is regularly arranged on the display device. The pixel block 110T is arranged at a predetermined interval so that when the pixel block 110T is transferred to the base substrate 101, the distance between the pixels 110 disposed on the pixel block 110T can be constant. Fig.26B and Fig.27B , the pixels 110 are arranged to have a first pitch PT1 and a second pitch PT2 in a predetermined direction, and a width D of the pixel block 110T is greater than the first pitch PT1.

[0299] The pixel blocks 110T may have substantially the same shape and size, however, the inventive concept is not limited thereto. For example, the display device may include two or more types of pixel blocks 110T having shapes different from each other. In this case, the pixel blocks 110T may be arranged to have pixels 110 arranged in a substantially regular manner. As another example, the display device may include pixel blocks 110T having substantially the same shape and sizes different from each other. In this case, although the pixel blocks 110T have sizes different from each other, the pixel blocks 110T may be arranged to have pixels 110 arranged substantially regularly.

[0300] An imaginary cutting line CL is defined on the substrate 10, the pixel blocks 110T are separated from each other along the cutting line CL, and the separated pixel blocks 110T are transferred to the base substrate 101, and Fig.26B and Fig.27B The arrangement is as shown in , thereby providing a display device.

[0301] In an exemplary embodiment, since the pixel blocks 110T are individually transferred to the base substrate 101, when each pixel block 110T is transferred, the plurality of pixels 110 arranged on each pixel block 110T may be transferred substantially simultaneously. Fig.26A When four pixels 110 are arranged on the substrate 10 as shown in FIG, the number of transfers is reduced to about 1 / 4 of that of the conventional device. In addition, since a light emitting stack structure in which red pixels, green pixels, and blue pixels are stacked on each other is used as the pixel 110, the number of transfers can be further reduced to about 1 / 3 of that of the conventional device. Fig.27A As shown in , when two pixels 110 are arranged on the substrate 10, the number of transfers is reduced to about 1 / 2 of that of the conventional device. In addition, since a light emitting stacked structure in which red pixels, green pixels, and blue pixels are stacked on each other is used as the pixel 110, the number of transfers according to the exemplary embodiment can be further reduced to about 1 / 3 of that of the conventional device.

[0302] Furthermore, since the pixels disposed at fixed positions of each pixel block 110T are transferred to the base substrate 101 in units of the pixel block 110T, the possibility of misalignment of the pixels on the adhesive layer and the possibility of tilting of the pixels are significantly reduced.

[0303] Fig.28 is a schematic cross-sectional view of a light emitting stack structure for a display device according to an exemplary embodiment.

[0304] Reference Fig.28, the light emitting stack structure 2100 according to the exemplary embodiment may include a supporting substrate 251, a first epitaxial stack 223, a second epitaxial stack 233, a third epitaxial stack 243, a reflective electrode 225, an ohmic electrode 229, a second p transparent electrode 235, a third p transparent electrode 245, an insulating layer 227, a first color filter 237, a second color filter 247, a first bonding layer 253, a second bonding layer 255, and a third bonding layer 257. In addition, the first epitaxial stack 223 may include an ohmic contact portion 223a for ohmic contact.

[0305] The support substrate 251 supports the epitaxial stacks 223, 233, and 243. The support substrate 251 may include a circuit on or in its surface, but is not limited thereto. The support substrate 251 may include, for example, a glass substrate, a sapphire substrate, a Si substrate, or a Ge substrate.

[0306] Each of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 includes an n-type semiconductor layer, a p-type semiconductor layer, and an active layer disposed between the n-type semiconductor layer and the p-type semiconductor layer. In some exemplary embodiments, the active layer may specifically have a multi-quantum well structure.

[0307] According to an exemplary embodiment, the first epitaxial stack 223 may be an inorganic light emitting diode that can emit red light, the second epitaxial stack 233 may be an inorganic light emitting diode that can emit green light, and the third epitaxial stack 243 may be an inorganic light emitting diode that can emit blue light. The first epitaxial stack 223 may include a GaInP base well layer, and each of the second epitaxial stack 233 and the third epitaxial stack 243 may include a GaInN base well layer. However, the inventive concept is not limited thereto. When the light emitting stack structure includes a micro-LED, the micro-LED has a surface area of ​​less than about 10,000 square microns as known in the art or less than about 4,000 square microns or 2,500 square microns in other exemplary embodiments, due to the small form factor of the micro-LED, the first epitaxial stack 223 may emit any one of red light, green light, and blue light, and the second epitaxial stack 233 and the third epitaxial stack 243 may emit different ones of red light, green light, and blue light without adversely affecting the operation.

[0308] The two surfaces of each of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 are an n-type semiconductor layer and a p-type semiconductor layer, respectively. In an exemplary embodiment, each of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 may have an n-type semiconductor layer disposed on its upper surface and a p-type semiconductor layer disposed on its lower surface. Since the third epitaxial stack 243 has an n-type upper surface, in some exemplary embodiments, a rough surface may be formed on the upper surface of the third epitaxial stack 243 by chemical etching or the like. However, the inventive concept is not limited thereto, and the type of semiconductor layer disposed on the upper surface and the lower surface of each epitaxial stack may be changed.

[0309] The first epitaxial stack 223 is disposed near the supporting substrate 251, the second epitaxial stack 233 is disposed on the first epitaxial stack 223, and the third epitaxial stack 243 is disposed on the second epitaxial stack 233. Since the first epitaxial stack 223 can emit light having a wavelength longer than that of the second epitaxial stack 233 and the third epitaxial stack 243, the light generated from the first epitaxial stack 223 can pass through the second epitaxial stack 233 and the third epitaxial stack 243 to be emitted to the outside. In addition, since the second epitaxial stack 233 can emit light having a wavelength longer than that of the third epitaxial stack 243, the light generated from the second epitaxial stack 233 can pass through the third epitaxial stack 243 to be emitted to the outside. However, the inventive concept is not limited thereto. When the light emitting stack structure includes a micro-LED having a surface area of ​​less than approximately 10,000 square microns as known in the art, or less than approximately 4,000 square microns or 2,500 square microns in other exemplary embodiments, due to the small form factor of the micro-LED, the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 can emit light having any wavelength without adversely affecting operation.

[0310] The reflective electrode 225 makes ohmic contact with the p-type semiconductor layer of the first epitaxial stack 223 , and reflects light generated from the first epitaxial stack 223 .

[0311] In an exemplary embodiment, the reflective electrode 225 may include an ohmic contact layer 225a and a reflective layer 225b. The ohmic contact layer 225a partially contacts the p-type semiconductor layer of the first epitaxial stack 223. In order to prevent light from being absorbed by the ohmic contact layer 225a, the area where the ohmic contact layer 225a contacts the p-type semiconductor layer does not exceed about 50% of the total area of ​​the p-type semiconductor layer. The reflective layer 225b covers the ohmic contact layer 225a and the insulating layer 227. As shown in the figure, the reflective layer 225b may substantially cover the entire ohmic contact layer 225a, but is not limited thereto, and in some exemplary embodiments, the reflective layer 225b may cover a portion of the ohmic contact layer 225a.

[0312] Since the reflective layer 225b covers the insulating layer 227, an omnidirectional reflector can be formed by the stacked structure of the first epitaxial stack 223 having a relatively high refractive index and the insulating layer 227 having a relatively low refractive index and the reflective layer 225b. The reflective layer 225b covers 50% or more of the area of ​​the first epitaxial stack 223, or covers most of the first epitaxial stack 223, thereby improving light emitting efficiency.

[0313] The ohmic contact layer 225a and the reflective layer 225b may be formed of a metal layer including Au. For example, the ohmic contact layer 225a may be formed of an Au-Zn alloy or an Au-Be alloy, and the reflective layer 225b may include a reflective metal layer such as Al, Ag or Au. In addition, the reflective layer 225b may include an adhesive metal layer of Ti, Ta, Ni, Cr, etc. on the upper and lower surfaces of the reflective metal layer to improve the adhesion of the reflective metal layer. Since Au has a high reflectivity for red light and a low reflectivity for blue and green light, the luminous efficiency of the first epitaxial stack can be improved. In addition, since the light generated from the second epitaxial stack 233 and the third epitaxial stack 243 and traveling toward the supporting substrate 251 is absorbed by Au, optical interference can be prevented.

[0314] In another exemplary embodiment, the reflective electrode 225 may be formed of a highly reflective ohmic contact layer in the first epitaxial stack 223. In this case, the insulating layer 227 and the additional reflective layer may be omitted. For example, because the Au-Zn alloy or the Au-Be alloy has a relatively high reflectivity to red light while being in ohmic contact with the p-type semiconductor layer of the first epitaxial stack 223, the Au-Zn alloy or the Au-Be alloy may be used without an additional reflective layer.

[0315] The insulating layer 227 is interposed between the support substrate 251 and the first epitaxial stack 223 and has an opening exposing the first epitaxial stack 223. The ohmic contact layer 225a is connected to the first epitaxial stack 223 through the opening of the insulating layer 227.

[0316] The ohmic electrode 229 is disposed on the upper surface of the first epitaxial stack 223. To reduce the ohmic contact resistance of the ohmic electrode 229, the ohmic contact portion 223a may protrude from the upper surface of the first epitaxial stack 223. The ohmic electrode 229 may be restrictively disposed on the ohmic contact portion 223a.

[0317] The second p transparent electrode 235 makes ohmic contact with the p-type semiconductor layer of the second epitaxial stack 233. The second p transparent electrode 235 may include a metal layer or a conductive oxide layer transparent to red and green light.

[0318] The third p transparent electrode 245 makes ohmic contact with the p-type semiconductor layer of the third epitaxial stack 243. The third p transparent electrode 245 may include a metal layer or a conductive oxide layer transparent to red, green, and blue light.

[0319] The reflective electrode 225 , the second p transparent electrode 235 , and the third p transparent electrode 245 may facilitate current diffusion by making ohmic contact with the p-type semiconductor layer of each epitaxial stack.

[0320] The first color filter 237 may be disposed between the first epitaxial stack 223 and the second epitaxial stack 233. In addition, the second color filter 247 may be disposed between the second epitaxial stack 233 and the third epitaxial stack 243. The first color filter 237 transmits light generated from the first epitaxial stack 223 and reflects light generated from the second epitaxial stack 233. The second color filter 247 transmits light generated from the first epitaxial stack 223 and the second epitaxial stack 233 and reflects light generated from the third epitaxial stack 243. Therefore, light generated from the first epitaxial stack 223 may be emitted to the outside through the second epitaxial stack 233 and the third epitaxial stack 243, and light generated from the second epitaxial stack 233 may be emitted to the outside through the third epitaxial stack 243. Furthermore, light generated from the second epitaxial stack 233 can be prevented from being incident on the first epitaxial stack 223 and lost, or light generated from the third epitaxial stack 243 can be prevented from being incident on the second epitaxial stack 233 and lost.

[0321] In some exemplary embodiments, the first color filter 237 may reflect light generated from the third epitaxial stack 243 .

[0322] The first color filter 237 and the second color filter 247 can be a low-pass filter that only allows light in a low-frequency region (e.g., a long wavelength region) to pass, a band-pass filter that only allows light in a predetermined band to pass, or a band-stop filter that only blocks light in a predetermined band. Specifically, the first color filter 237 and the second color filter 247 may include a distributed Bragg reflector DBR. The distributed Bragg reflector DBR can be formed by alternately stacking insulating layers with different refractive indices, for example, by alternately stacking TiO2 and SiO2. In addition, the stop band of the distributed Bragg reflector can be controlled by adjusting the thickness of TiO2 and SiO2. The low-pass filter and the band-pass filter can also be formed by alternately stacking insulating layers with different refractive indices.

[0323] The first bonding layer 253 bonds the first epitaxial stack 223 to the supporting substrate 251. As shown in the figure, the reflective electrode 225 may be adjacent to the first bonding layer 253. The first bonding layer 253 may be a light-transmitting layer or an opaque layer. When the first bonding layer 253 is an opaque layer, the first bonding layer 253 may be formed of, for example, a black epoxy resin or a white photosensitive solder resist (PSR). When the first bonding layer 253 is a light-transmitting layer, the first bonding layer 253 may be formed of a transparent organic material layer or a transparent inorganic material layer. Examples of transparent organic material layers may include SU8, poly (methyl methacrylate) (PMMA), polyimide, polyparaxylene, benzocyclobutene (BCB) or others, and examples of transparent inorganic material layers may include Al2O3, SiO2, SiN x Or others. The organic material layer may be bonded under high vacuum and high pressure, the surface of the inorganic material layer may be planarized by, for example, a chemical mechanical polishing process, and then the surface energy of the inorganic material layer may be controlled by using plasma, etc., and may be bonded under high vacuum. In some exemplary embodiments, the first bonding layer 253 may be formed of transparent spin-on glass (SOG).

[0324] The second bonding layer 255 bonds the second epitaxial stack 233 to the first epitaxial stack 223. As shown in the figure, the second bonding layer 255 may be adjacent to the first epitaxial stack 223 and the first color filter 237. The ohmic electrode 229 may be covered by the second bonding layer 255. The second bonding layer 255 transmits light generated from the first epitaxial stack 223.

[0325] The third bonding layer 257 bonds the third epitaxial stack 243 to the second epitaxial stack 233. As shown in the figure, the third bonding layer 257 may be adjacent to the second epitaxial stack 233 and the second color filter 247. However, the inventive concept is not limited thereto, and a transparent conductive layer may be provided on the second epitaxial stack 233. The third bonding layer 257 transmits light generated from the first epitaxial stack 223 and the second epitaxial stack 233.

[0326] The second bonding layer 255 and the third bonding layer 257 may be formed of a material substantially the same as that of the first bonding layer 253 , and thus, a detailed description of the second bonding layer 255 and the third bonding layer 257 will be omitted to avoid redundancy.

[0327] Fig.29A , Fig.29B , Fig.29C , Fig.29D and Fig.29E is a schematic cross-sectional view illustrating a method of manufacturing a light emitting stack structure for a display device according to an exemplary embodiment.

[0328] Reference Fig.29A First, a first epitaxial stack 223 is grown on a first substrate 221. The first substrate 221 may be, for example, a GaAs substrate. In addition, the first epitaxial stack 223 may be formed of an AlGaInP-based semiconductor layer and include an n-type semiconductor layer, an active layer, and a p-type semiconductor layer.

[0329] An insulating layer 227 is formed on the first epitaxial stack 223, and the insulating layer 227 is patterned to form an opening. For example, a SiO2 layer is formed on the first epitaxial stack 223, and a photoresist is deposited on the SiO2 layer, followed by photolithography and development to form a photoresist pattern. Then, the SiO2 layer is patterned with the photoresist pattern used as an etching mask, thereby forming an insulating layer 227 having an opening.

[0330] Afterwards, an ohmic contact layer 225a is formed in the opening of the insulating layer 227. The ohmic contact layer 225a may be formed by a lift-off process or the like. After the ohmic contact layer 225a is formed, a reflective layer 225b is formed to cover the ohmic contact layer 225a and the insulating layer 227. The reflective layer 225b may be formed by a lift-off process or the like. As shown in the figure, the reflective layer 225b may cover a portion of or all of the ohmic contact layer 225a. The ohmic contact layer 225a and the reflective layer 225b form a reflective electrode.

[0331] Although the ohmic contact layer 225 a and the reflective layer 225 b are described as being formed by different processes, in some exemplary embodiments, an ohmic reflective layer having ohmic characteristics and reflective properties, such as an Au—Zn alloy or an Au—Be alloy, may be directly formed on the first epitaxial stack 223 .

[0332] The reflective electrode 225 makes ohmic contact with the p-type semiconductor layer of the first epitaxial stack 223 , and thus, hereinafter, will be referred to as a first p reflective electrode 225 .

[0333] Reference Fig.29B, a second epitaxial stack 233 is grown on a second substrate 231, and a second p transparent electrode 235 and a first color filter 237 are formed on the second epitaxial stack 233. The second epitaxial stack 233 may be formed of a GaN-based semiconductor layer, and may include a GaInN well layer. The second substrate 231 is a substrate on which a GaN-based semiconductor layer can be grown, and may be different from the first substrate 221. For example, the composition ratio of GaInN of the second epitaxial stack 233 may be determined so that the second epitaxial stack 233 emits green light. The second p transparent electrode 235 is in ohmic contact with the p-type semiconductor layer.

[0334] Reference Fig.29C , a third epitaxial stack 243 is grown on a third substrate 241, and a third p transparent electrode 245 and a second color filter 247 are formed on the third epitaxial stack 243. The third epitaxial stack 243 may be formed of a GaN-based semiconductor layer, and may include a GaInN well layer. The third substrate 241 is a substrate on which a GaN-based semiconductor layer can be grown, and may be different from the first substrate 221. For example, the composition ratio of GaInN of the third epitaxial stack 243 may be determined so that the third epitaxial stack 243 emits blue light. The third p transparent electrode 245 is in ohmic contact with the p-type semiconductor layer of the third epitaxial stack 243.

[0335] Since the first color filter 237 and the second color filter 247 are Fig.28 The described first color filter 237 and the second color filter 247 are substantially the same, so a detailed description of the first color filter 237 and the second color filter 247 will be omitted to avoid redundancy.

[0336] Since the first epitaxial stack 223 , the second epitaxial stack 233 , and the third epitaxial stack 243 are grown on different substrates, their formation order is not limited to a specific order.

[0337] Then, refer to Fig.29D , the first epitaxial stack 223 is bonded to the supporting substrate 251 via the first bonding layer 253. The reflective electrode 225 may be arranged to face the supporting substrate 251 and may be bonded to the first bonding layer 253. In addition, when the surface of the reflective electrode 225 or the surface of the supporting substrate 251 is hydrophobic, a hydrophilic material layer may be pre-formed on these surfaces. The hydrophilic material layer may be formed, for example, by depositing a hydrophilic material layer on a hydrophobic surface or forming a modified layer on a hydrophobic surface by a treatment such as plasma. The first substrate 221 is removed from the first epitaxial stack 223 using a chemical etching technique or the like. Therefore, the n-type semiconductor layer of the first epitaxial stack 223 is exposed on the upper surface. In some exemplary embodiments, a rough surface may be formed on the exposed surface of the n-type semiconductor layer by texturing or the like.

[0338] Then, an ohmic electrode 229 is formed in the exposed region of the first epitaxial stack 223. To reduce the ohmic contact resistance of the ohmic electrode 229, the ohmic electrode 229 may be heat-treated. The ohmic electrode 229 may be formed in each pixel region to correspond to the pixel region.

[0339] Reference Fig.29E , the second epitaxial stack 233 is bonded to the first epitaxial stack 223 on which the ohmic electrode 229 is formed via the second bonding layer 255. The first color filter 237 is disposed to face the first epitaxial stack 223 and bonded to the second bonding layer 255. In addition, when the surface of the first color filter 237 or the surface of the first epitaxial stack 223 is hydrophobic, a hydrophilic material layer may be pre-formed on the hydrophobic surface. The second substrate 231 may be separated from the second epitaxial stack 233 using a technique such as laser lift-off or chemical lift-off.

[0340] Then, refer to Fig.28 and Fig.29C ,Will Fig.29C The third epitaxial stack 243 is bonded to the second epitaxial stack 233 via the third bonding layer 257. The second color filter 247 is disposed to face the second epitaxial stack 233 and bonded to the third bonding layer 257. In some exemplary embodiments, a hydrophilic material layer may be added to the surface of the second color filter 247 or the surface of the second epitaxial stack 233. The third substrate 241 may be separated from the third epitaxial stack 243 by a laser lift-off process or a chemical lift-off process. In this way, a light emitting stack structure 2100 for a display device is provided, and the light emitting stack structure 2100 is as shown in FIG. Fig.28 An n-type semiconductor layer having a third epitaxial stack 243 exposed to the outside is shown in FIG.

[0341] The display device may be configured by patterning the stack of first epitaxial stack 223 , second epitaxial stack 233 , and third epitaxial stack 243 on supporting substrate 251 in units of pixels and then connecting the first to third epitaxial stacks to each other through interconnects.

[0342] Fig.30 is a schematic plan view of a display device according to an exemplary embodiment. Fig.31 According to an exemplary embodiment Fig.30 A circuit diagram of a display device.

[0343] Reference Fig.30 and Fig.31 , a plurality of light emitting stacked structures arranged substantially in a matrix form are disposed on a supporting substrate 251 . Fig.30A unit region of the repetitive structure in the embodiment may have a stack structure of a first epitaxial stack 223, a second epitaxial stack 233, and a third epitaxial stack 243 according to an exemplary embodiment, each stack structure having a Fig.31 is shown as a diode. However, due to Fig.28 The light emitting stacked structure 2100 for a display device shown in FIG. 1 has a structure of a first epitaxial stack 223, a second epitaxial stack 233, and a third epitaxial stack 243 stacked in a vertical direction, so Fig.31 Each diode shown in 2 represents a stack structure in which the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 are stacked in the vertical direction. The first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 may respectively correspond to light-emitting sub-pixels, and therefore, the stack structure of the sub-pixels may be referred to as a light-emitting stack structure.

[0344] like Fig.30 As shown in , the light emitting stacked structures have substantially the same structure and are arranged in a matrix form on the substrate 251 or the display panel. Fig.31 As shown in , a plurality of light emitting stack structures are arranged in one pixel region F, and during operation, some of the light emitting stack structures are driven, while the remaining unselected light emitting stack structures are not driven and remain in an idle state. Hereinafter, the light emitting stack structure to be driven is referred to as a "selected light emitting stack structure SSF", and the remaining light emitting stack structures that remain in an idle state are referred to as "unselected light emitting stack structures NSSF".

[0345] Reference Fig.31 , the pixel region F may correspond to the minimum region defined as realizing an image, and a plurality of light emitting stack structures are arranged in the region. In addition, one of the light emitting stack structures arranged in one pixel region F is selected and driven, and the selected light emitting stack structure SSF covers the corresponding pixel region.

[0346] Specifically, current is applied to the data lines (Vdata1-1, Vdata2-1, ...) and scan lines (Vscan1, Vscan2, Vscan3, ...) connected to the selected light emitting stack structure SSF. The data lines (Vdata1-0, Vdata1-2) connected to the unselected light emitting stack structure NSSF are disconnected from the current source, so that the unselected light emitting stack structure NSSF remains idle during the operation of the display device.

[0347] In an exemplary embodiment, since three light-emitting stacked structures are arranged in a 1×3 matrix in one pixel region F, three data lines are connected for each pixel region F. Therefore, data line Vdata1-0, data line Vdata1-1, and data line Vdata1-2 are shown as representing data lines corresponding to respective pixel regions F. "Vdata1" represents a data line connected to a pixel region F in a first group of columns. Similarly, the data line connected to a pixel region F in a second group of columns is represented by Vdata2, and the light-emitting stacked structures in each pixel region F in the second group of columns are respectively connected to data line Vdata2-0, data line Vdata2-1, and data line Vdata2-2. However, the concept of the invention is not limited to the specific number of light-emitting stacked structures in one pixel region F, and in some exemplary embodiments, the number of light-emitting stacked structures may vary.

[0348] Each of the scan lines Vscan1, Vscan2, Vscan3 includes a group of three auxiliary scan lines 271, 273, and 275. Each of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 in one light emitting stack structure may be respectively connected to different auxiliary scan lines 271, 273, and 275. The data line may be formed as an interconnection line 225.

[0349] In an exemplary embodiment, the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 of the selected light emitting stack structure SSF are connected in common to the data line 225, and are respectively connected to different auxiliary scanning lines 271, 273, and 275. Therefore, the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 in the selected light emitting stack structure SSF can be driven independently and display the required color.

[0350] Although the anodes of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 are described as being commonly connected to the data line 225, and the cathodes of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 are described as being respectively connected to different auxiliary scan lines, the inventive concept is not limited thereto. For example, the anodes of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 may be respectively connected to different scan lines, and the cathodes of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 may be commonly connected to the data line.

[0351] Each of the first epitaxial stack 223 , the second epitaxial stack 233 , and the third epitaxial stack 243 may be driven by pulse width modulation or by changing the magnitude of current to control the brightness of each sub-pixel.

[0352] Return to reference Fig.30 , by referring to Fig.28 The epitaxial stack described is patterned to form a plurality of pixels, and each pixel is connected to the reflective electrode 225 and the interconnection lines 271, 273 and 275. Fig.31 As shown in FIG. 2 , the reflective electrode 225 may be used as a data line Vdata, and the interconnection lines 271 , 273 , and 275 may be formed as scan lines.

[0353] The sub-pixel stacks (or light emitting stack structures) may be arranged substantially in a matrix form, and a plurality of light emitting stack structures may be arranged in one pixel region F.

[0354] Fig.32 yes Fig.30 An enlarged plan view of a light emitting stacked structure of a display device, Fig.33 is along Fig.32 A schematic cross-sectional view taken along line AA of FIG. Fig.34 is along Fig.32 A schematic cross-sectional view taken along line BB of FIG.

[0355] Reference Fig.30 , Fig.32 , Fig.33 and Fig.34 In each pixel (or each light-emitting stack structure), a portion of the reflective electrode 225, the ohmic electrode 229 formed on the upper surface of the first epitaxial stack 223, a portion of the second p transparent electrode 235, a portion of the upper surface of the second epitaxial stack 233, a portion of the third p transparent electrode 245, and the upper surface of the third epitaxial stack 243 are exposed to the outside.

[0356] The third epitaxial stack 243 may have a rough surface 243a on an upper surface thereof. The rough surface 243a may be formed over the entire upper surface of the third epitaxial stack 243, or may be formed in certain regions thereof as shown in the drawing.

[0357] The lower insulating layer 261 may cover the side surface of each pixel. The lower insulating layer 261 may be formed of a light-transmitting material such as SiO2. In this case, the lower insulating layer 261 may substantially cover the entire upper surface of the third epitaxial stack 243. Optionally, the lower insulating layer 261 may include a distributed Bragg reflector to reflect light traveling toward the side surfaces of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243. In this case, the lower insulating layer 261 at least partially exposes the upper surface of the third epitaxial stack 243. The lower insulating layer 261 may also include a light absorbing layer. For example, the lower insulating layer 261 may include a light absorbing material such as black epoxy. In addition, the lower insulating layer 261 may be formed of a light-transmitting material, and an organic reflective layer or an inorganic reflective layer may be added thereon.

[0358] The lower insulating layer 261 may further include: an opening 261a exposing the upper surface of the third epitaxial stack 243; an opening 261b exposing the upper surface of the second epitaxial stack 233; an opening 261c (see Fig.35H ), exposing the ohmic electrode 229 of the first epitaxial stack 223; an opening 261d, exposing the third p transparent electrode 245; an opening 261e, exposing the second p transparent electrode 235; and an opening 261f, exposing the first p reflective electrode 225.

[0359] Interconnection lines 271 and 275 may be formed on the support substrate 251 near the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243, and may be disposed on the lower insulating layer 261 to be insulated from the first p reflective electrode 225. The connection portion 277a connects the third p transparent electrode 245 to the reflective electrode 225, and the connection portion 277b connects the second p transparent electrode 235 to the reflective electrode 225, so that the anodes of the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 are connected to the reflective electrode 225 in common.

[0360] The connection portion 271 a connects the upper surface of the third epitaxial stack 243 to the interconnection line 271 , and the connection portion 275 a connects the ohmic electrode 229 on the first epitaxial stack 223 to the interconnection line 275 .

[0361] An upper insulating layer 281 may be disposed on the interconnection lines 271 and 275 and the lower insulating layer 261 to cover an upper surface of the third epitaxial stack 243. The upper insulating layer 281 may have an opening 281a that partially exposes an upper surface of the second epitaxial stack 233.

[0362] The interconnection line 273 may be disposed on the upper insulating layer 281, and the connection portion 273a may connect the upper surface of the second epitaxial stack 233 to the interconnection line 273. The connection portion 273a may cross the upper portion of the interconnection line 275 and be insulated from the interconnection line 275 by the upper insulating layer 281.

[0363] Although the electrodes of each light emitting stack structure are described as being connected to the data line and the scan line, the interconnects 271 and 275 are described as being formed on the lower insulating layer 261, and the interconnect 273 is described as being formed on the upper insulating layer 281, the inventive concept is not limited thereto. For example, all of the interconnects 271, 273, and 275 may be formed on the lower insulating layer 261 and may be covered by the upper insulating layer 281, and the upper insulating layer 281 may have an opening that exposes the interconnect 273. In this case, the connection portion 273a may pass through the opening of the upper insulating layer 281 to connect the upper surface of the second epitaxial stack 233 to the interconnect 273.

[0364] Optionally, interconnect lines 271, 273 and 275 can be formed on the inner side of the supporting substrate 251, and the connecting portions 271a, 273a and 275a on the lower insulating layer 261 can connect the ohmic electrode 229, the upper surface of the first epitaxial stack 223 and the upper surface of the third epitaxial stack 243 to the interconnect lines 271, 273 and 275, respectively.

[0365] FIG. 35A to FIG. 35K is a schematic plan view illustrating a method of manufacturing a display device according to an exemplary embodiment.

[0366] First, prepare Fig.28 A light emitting stacked structure 2100 is provided.

[0367] Then, refer to Fig.35A , a rough surface 243a may be formed on the upper surface of the third epitaxial stack 243. The rough surface 243a may be formed on the upper surface of the third epitaxial stack 243 corresponding to each pixel region. The rough surface 243a may be formed by chemical etching (eg, photo-enhanced chemical etching (PEC)).

[0368] The rough surface 243 a may be partially formed in each pixel region by considering a region of the third epitaxial stack 243 to be etched in a subsequent process, but is not limited thereto. Alternatively, the rough surface 243 a may be formed on the entire upper surface of the third epitaxial stack 243 .

[0369] Reference Fig.35B, the peripheral area of ​​the third epitaxial stack 243 in each pixel is removed by etching to expose the third p transparent electrode 245. As shown in the figure, the third epitaxial stack 243 can be retained to have a substantially rectangular shape or a square shape as shown in the figure. The third epitaxial stack 243 can be patterned to have a plurality of recesses along its edge.

[0370] Reference Fig.35C By removing the third p transparent electrode 245 in the region other than one recess, the upper surface of the second epitaxial stack 233 is exposed. Therefore, the upper surface of the second epitaxial stack 233 is exposed around the third epitaxial stack 243 and in the recesses other than the one recess on which the third p transparent electrode 245 partially remains.

[0371] Reference Fig.35D , by removing the second epitaxial stack 233 in the region except for the other recess, the second p transparent electrode 235 is exposed.

[0372] Reference Fig.35E By removing the second p transparent electrode 235 in the region except for another recess, the ohmic electrode 229 is exposed together with the upper surface of the first epitaxial stack 223. Here, the ohmic electrode 229 can be exposed in one recess. Therefore, the upper surface of the first epitaxial stack 223 is exposed around the third epitaxial stack 243, and the upper surface of the ohmic electrode 229 is exposed in at least one of the recesses formed in the third epitaxial stack 243.

[0373] Reference Fig.35F By removing the exposed portion of the first epitaxial stack 223 in a region other than the ohmic electrode 229 exposed in one recess, the reflective electrode 225 is exposed. In this way, the reflective electrode 225 is exposed around the third epitaxial stack 243.

[0374] Reference Figure 35G , linear interconnection lines are formed by patterning the reflective electrode 225. In this case, the support substrate 251 may be exposed. Among the light emitting stacked structures arranged in a matrix, the reflective electrode 225 may connect the light emitting stacked structures arranged in one or more columns to each other (see Fig.31 ).

[0375] Reference Fig.35H , forming a lower insulating layer 261 (see Fig.33 and Fig.34) to cover the pixel. The lower insulating layer 261 covers the reflective electrode 225 and the side surfaces of the first epitaxial stack 223, the side surfaces of the second epitaxial stack 233, and the side surfaces of the third epitaxial stack 243. In addition, the lower insulating layer 261 may at least partially cover the upper surface of the third epitaxial stack 243. When the lower insulating layer 261 is transparent (such as a SiO2 layer), the lower insulating layer 261 may substantially cover the entire upper surface of the third epitaxial stack 243. Optionally, the lower insulating layer 261 may include a distributed Bragg reflector. In this case, the lower insulating layer 261 may at least partially expose the upper surface of the third epitaxial stack 243 so that light is emitted to the outside.

[0376] The lower insulating layer 261 may include an opening 261a exposing the third epitaxial stack 243, an opening 261b exposing the second epitaxial stack 233, an opening 261c exposing the ohmic electrode 229, an opening 261d exposing the third p transparent electrode 245, an opening 261e exposing the second p transparent electrode 235, and an opening 261f exposing the reflective electrode 225. One or more openings 261f may be formed.

[0377] Reference Fig.35I , interconnection lines 271 and 275 and connection parts 271a, 275a, 277a and 277b are formed by a lift-off process or the like. The interconnection lines 271 and 275 are insulated from the reflective electrode 225 by the lower insulating layer 261. The connection part 271a electrically connects the third epitaxial stack 243 to the interconnection line 271, and the connection part 275a electrically connects the ohmic electrode 229 to the interconnection line 275, so that the first epitaxial stack 223 is electrically connected to the interconnection line 275. The connection part 277a electrically connects the third p transparent electrode 245 to the first p reflective electrode 225, and the connection part 277b electrically connects the second p transparent electrode 235 to the first p reflective electrode 225.

[0378] Then, refer to Fig.35J , upper insulating layer 281 (see Fig.33 and Fig.34 ) covers the interconnect lines 271 and 275 and the connecting parts 271a, 275a, 277a and 277b. The upper insulating layer 281 may also substantially cover the entire upper surface of the third epitaxial stack 243. The upper insulating layer 281 has an opening 281a that exposes the upper surface of the second epitaxial stack 233. The upper insulating layer 281 may be formed of, for example, silicon oxide or silicon nitride, and may include a distributed Bragg reflector. Optionally, the upper insulating layer 281 may include a light absorbing layer. When the upper insulating layer 281 includes a reflective layer or a light absorbing layer, the upper insulating layer 281 may expose at least a portion of the upper surface of the third epitaxial stack 243 so that light is emitted to the outside.

[0379] Reference Figure 35K, forming an interconnection line 273 and a connection portion 273a. The interconnection line 273 and the connection portion 273a may be formed by a lift-off process or the like. The interconnection line 273 is disposed on the upper insulating layer 281 and is insulated from the reflective electrode 225 and the interconnections 271, 275. The connection portion 273a electrically connects the second epitaxial stack 233 to the interconnection line 273. The connection portion 273a may pass through an upper portion of the interconnection line 275 and be insulated from the interconnection line 275 by the upper insulating layer 281.

[0380] So, set Fig.32 In addition, Fig.30 As shown in , a plurality of light emitting stack structures may be formed on the support substrate 251 , and an image may be realized by selecting a light emitting stack structure SSF among the plurality of light emitting stack structures actually used in one pixel region F.

[0381] Although the method of manufacturing a display device configured to be driven in a passive matrix manner has been described according to the exemplary embodiment, the inventive concept is not limited thereto. For example, the display device may be manufactured in various ways to drive the display device in an active matrix manner using a light emitting stack structure.

[0382] For example, although the interconnection line 273 is described as being formed on the upper insulating layer 281, the interconnection line 273 may be formed on the lower insulating layer 261 together with the interconnection lines 271 and 275, and the connection portion 273a may be formed on the upper insulating layer 281 to connect the second epitaxial stack 233 to the interconnection line 273. Alternatively, the interconnection lines 271, 273, and 275 may be disposed inside the support substrate 251.

[0383] In some exemplary embodiments, the display device may be formed to be driven in an active matrix manner.

[0384] According to an exemplary embodiment, one pixel region F includes a plurality of light emitting stack structures, and a selected light emitting stack structure SSF among the plurality of light emitting stack structures is used to display an image. The first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 in the unselected light emitting stack structure NSSF are also connected to the data line and the scan line, but since the data line (e.g., the data line Vdata1-0 and the data line Vdata1-2) connected to the unselected light emitting stack structure NSSF is disconnected from the current source, the unselected light emitting stack structure NSSF remains idle during operation of the display device.

[0385] According to an exemplary embodiment, since the display device is manufactured by using a plurality of light emitting stack structures formed on the support substrate 251 , a step of separately mounting small-sized LEDs may be omitted.

[0386] Furthermore, by arranging a plurality of light emitting stacked structures within one pixel region F, a defective pixel region F can be easily replaced with a new light emitting stacked structure.

[0387] Fig.36 is a circuit diagram of a display device according to another exemplary embodiment.

[0388] Return to reference Fig.31 , the display device includes an unselected light emitting stacked structure NSSF connected to the data line 225 and the auxiliary scanning lines 271, 273 and 275. Fig.36 , the display device according to the exemplary embodiment includes the unselected light emitting stacked structure NSSF connected to the data line 225 but disconnected from the auxiliary scan lines 271 , 273 , and 275 .

[0389] For example, by omitting the connection parts 271a, 273a and 275a formed on the unselected light emitting stacked structure NSSF, the unselected light emitting stacked structure NSSF may be disconnected from the auxiliary scan lines 271, 273 and 275. Therefore, the unselected light emitting stacked structure NSSF is initially disconnected from the current source.

[0390] In some exemplary embodiments, the unselected light emitting stack structure NSSF may be disconnected from the data line 225. For example, the connection portions 277a and 277b insulating the first epitaxial stack 223 from the reflective electrode 225 in the unselected light emitting stack structure NSSF may be omitted, and the second epitaxial stack 233 and the third epitaxial stack 243 may be connected to the reflective electrode 225.

[0391] The pixel regions F are basically arranged in a matrix form, and a plurality of light emitting stack structures arranged in each pixel region F are arranged in a 1×3 matrix. However, the inventive concept is not limited thereto, and the light emitting stack structures may be arranged in two columns (or four or more columns) and two rows (or more rows).

[0392] Fig.37 is a circuit diagram of a display device according to another exemplary embodiment.

[0393] Reference Fig.37 , the light emitting stacked structures according to the exemplary embodiment in each pixel region F are arranged in a plurality of rows. More specifically, the light emitting stacked structures are arranged in a 2×3 matrix in each pixel region F. However, the inventive concept is not limited thereto, but the light emitting stacked structures may be arranged in a 2×1 or larger matrix (or a 2×2 matrix or larger matrix) in each pixel region F.

[0394] Since the light emitting stacked structures are arranged in a plurality of rows in each pixel region F, the scan line Vscan connected to each pixel region F is represented by a plurality of lines, such as a scan line Vscan1-1 and a scan line Vscan1-2. In addition, each scan line Vscan includes a group of auxiliary scan lines 271, 273, and 275, and the first epitaxial stack 223, the second epitaxial stack 233, and the third epitaxial stack 243 are respectively connected to the auxiliary scan lines 271, 273, and 275.

[0395] During operation, the selected light emitting stack structure SSF in each pixel region F may be operated, and the remaining unselected light emitting stack structures NSSF may remain in an idle state. The unselected light emitting stack structure NSSF may be connected to the data line 225 and the auxiliary scan lines 271, 273, and 275 as shown in the figure, but the current source for the data line 225 and / or the auxiliary scan lines 271, 273, and 275 may be interrupted. For example, the data line 225 and / or the auxiliary scan lines 271, 273, and 275 connected to the unselected light emitting stack structure NSSF may be disconnected from the current source, so that the unselected light emitting stack structure NSSF remains in an idle state during operation of the display device.

[0396] like Fig.37 As shown in , when only one light emitting stacked structure SSF is selected in one pixel region F, the remaining light emitting stacked structures in another row or another column in the same pixel region F are not selected.

[0397] Although the unselected light emitting stack structure NSSF is described as being connected to the data line 225 and the auxiliary scan lines 271, 273, and 275, in some exemplary embodiments, the unselected light emitting stack structure NSSF may not be connected to the data line 225 and / or the auxiliary scan lines 271, 273, and 275, or the data line 225 and / or the auxiliary scan lines 271, 273, and 275 connected to the unselected light emitting stack structure NSSF may be omitted.

[0398] According to an exemplary embodiment, the first epitaxial stack 223, the second epitaxial stack 233 and the third epitaxial stack 243 are stacked on each other to form a light emitting stack structure that can be formed at a wafer level. In this way, the step of separately mounting the light emitting stack structure can be omitted to simplify the manufacturing process of the display device.

[0399] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but rather to the broader scope of the appended claims and various obvious modifications and equivalent arrangements apparent to those of ordinary skill in the art.

Claims

1. A display device, comprising: A plurality of pixel regions are arranged on a supporting substrate; as well as A data line and a scan line connected to each of the plurality of pixel regions, Each pixel region includes a plurality of light-emitting stack structures, each of which includes: a first epitaxial stack disposed on a supporting substrate; a reflective electrode disposed between the first epitaxial stack and the supporting substrate and in ohmic contact with the first epitaxial stack; a second epitaxial stack disposed on the first epitaxial stack; and a third epitaxial stack disposed on the second epitaxial stack. wherein the reflective electrode is commonly electrically connected to the first epitaxial stack, the second epitaxial stack, and the third epitaxial stack and serves as a data line, wherein light generated from the first epitaxial stack is emitted to the outside through the second epitaxial stack and the third epitaxial stack, and The light generated from the second epitaxial stack is emitted to the outside through the third epitaxial stack, Wherein, during operation, one of the plurality of light emitting stack structures in each pixel region is selected and driven, while the remaining unselected light emitting stack structures are not driven and remain in an idle state, wherein the first epitaxial stack, the second epitaxial stack, and the third epitaxial stack in the selected light emitting stack structure are commonly connected to the same data line but to different scan lines, and During operation, current is applied to the data lines and scan lines connected to the selected light emitting stacked structure, and the data lines and / or scan lines connected to the unselected light emitting stacked structure are disconnected from the current source.

2. The display device according to claim 1, in, The first epitaxial stack, the second epitaxial stack, and the third epitaxial stack in the selected light emitting stack structure emit red light, green light, and blue light, respectively.

3. The display device according to claim 1, in, The first epitaxial stack, the second epitaxial stack, and the third epitaxial stack in the unselected light emitting stack structure in each pixel region are also connected to the data line and the scan line.

4. The display device according to claim 1, in, The first epitaxial stack, the second epitaxial stack, and the third epitaxial stack in the unselected light emitting stack structure in each pixel region are disconnected from the data line or the scan line.

5. The display device according to claim 1, in, The plurality of pixel regions are arranged in a matrix, and the first epitaxial stack, the second epitaxial stack, and the third epitaxial stack of the light emitting stack structure selected in the pixel regions of the same column are connected to the same data line, and The first epitaxial stack, the second epitaxial stack, and the third epitaxial stack of the light emitting stack structure selected in the pixel regions of the same row are respectively connected to different scan lines.

6. The display device according to claim 5, in, In each pixel region, the light emitting stacked structures are arranged in at least a 2×2 matrix.

7. The display device according to claim 1, in, The reflective electrode is disposed over at least two pixel regions.

8. The display device according to claim 1, in, The at least one light emitting stack structure further includes an ohmic electrode disposed between the first epitaxial stack and the second epitaxial stack and in ohmic contact with the first epitaxial stack.

9. The display device according to claim 1, in, The at least one light emitting stack structure further comprises: a second p transparent electrode in ohmic contact with the p-type semiconductor layer of the second epitaxial stack; and The third p transparent electrode is in ohmic contact with the p-type semiconductor layer of the third epitaxial stack.

10. The display device according to claim 1, further comprising: a first color filter disposed between the first epitaxial stack and the second epitaxial stack, transmitting light generated from the first epitaxial stack and reflecting light generated from the second epitaxial stack; as well as The second color filter, disposed between the second epitaxial stack and the third epitaxial stack, transmits light generated from the first epitaxial stack and the second epitaxial stack, and reflects light generated from the third epitaxial stack.

11. The display device according to claim 10, in, Each of the first color filter and the second color filter is a low pass filter, a band pass filter, or a band stop filter.

12. The display device according to claim 1, further comprising: a first bonding layer disposed between the support substrate and the first epitaxial stack; a second bonding layer disposed between the first epitaxial stack and the second epitaxial stack; as well as a third bonding layer disposed between the second epitaxial stack and the third epitaxial stack, wherein the second bonding layer transmits light generated from the first epitaxial stack, and The third bonding layer transmits light generated from the first epitaxial stack and the second epitaxial stack.

13. The display device according to claim 1, further comprising: The lower insulating layer covers the side surface of the first epitaxial stack, the side surface of the second epitaxial stack, and the side surface of the third epitaxial stack.

14. The display device according to claim 13, in, The lower insulating layer blocks light generated from the first epitaxial stack to the third epitaxial stack.

15. The display device according to claim 1, in, The plurality of light emitting stacked structures in each pixel region have the same stacked structure.

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