Method for forming pattern portion

Abstract

A method for forming a pattern portion is provided, the method comprising: forming a first film on a target object, the first film having a first curing shrinkage; forming a second film on the first film, the second film having a second curing shrinkage greater than the first curing shrinkage; and patterning the first film and the second film to form a pattern.

Description

[0001] Korean Patent Application No. 10-2018-0139977, filed on November 14, 2018 in the Korean Intellectual Property Office and entitled “Pattern portion, method of forming a pattern portion, and method of manufacturing a display device using the same” is hereby incorporated by reference in its entirety. Technical Field

[0002] Embodiments relate to a pattern part, a method of forming the pattern part, and a method of manufacturing a display device using the same. Background Art

[0003] When manufacturing a display device, at least a portion of a layer or pattern constituting the display device may be formed by using a photolithography process. The photolithography process may include an exposure step, a development step, and an etching step. In the exposure step, a mask reflecting the design of the pattern and an exposure device are used to form a photoresist pattern. Summary of the invention

[0004] An embodiment is directed to a method for forming a pattern portion, the method comprising the following steps: forming a first film on a target object, the first film having a first curing shrinkage rate; forming a second film on the first film, the second film having a second curing shrinkage rate greater than the first curing shrinkage rate; and patterning the first film and the second film to form a pattern.

[0005] In example embodiments, the pattern may include a first pattern formed by patterning the first film and a second pattern formed by patterning the second film.

[0006] In example embodiments, the method of forming the pattern part may further include a first curing step of curing the first film and the second film after forming the second film.

[0007] In example embodiments, the method of forming the pattern part may further include a second curing step of curing the pattern after forming the pattern.

[0008] In example embodiments, the second curing step may include a first temperature curing step for curing the pattern at a first temperature and a second temperature curing step for curing the pattern at a second temperature lower than the first temperature.

[0009] In example embodiments, in the second curing step, the second pattern may shrink to a greater extent than the first pattern.

[0010] In example embodiments, in the step of forming the first film, the first film may be formed with a first thickness, and in the step of forming the second film, the second film may be formed with a second thickness greater than the first thickness.

[0011] In example embodiments, the first film may include a first monomer, the second film may include a second monomer, and the number of functional groups of the second monomer may be greater than the number of functional groups of the first monomer.

[0012] In example embodiments, the method of forming the pattern part may further include forming a third film on the second film, wherein the third film may be patterned in the forming of the pattern.

[0013] In example embodiments, the third film may have a third curing shrinkage greater than the second curing shrinkage.

[0014] In example embodiments, the first film may include a first monomer, the second film may include a second monomer, the third film may include a third monomer, the number of functional groups of the second monomer may be greater than that of the first monomer, and the number of functional groups of the third monomer may be greater than that of the second monomer.

[0015] In example embodiments, the method of forming the pattern part may further include forming a sacrificial layer on the target object, wherein the first film may be formed on the sacrificial layer.

[0016] In example embodiments, the method of forming the pattern part may further include patterning the sacrificial layer to form a sacrificial pattern after the step of forming the pattern, wherein the sacrificial pattern may have an undercut shape with respect to the pattern.

[0017] In an example embodiment, a method for manufacturing a display device includes the following steps: forming a circuit layer on a base layer; forming a pixel defining film configured to define a pixel area on the circuit layer; forming a sacrificial layer configured to cover the pixel defining film; forming a first film on the sacrificial layer; forming a second film including a material different from the material of the first film; patterning the first film, the second film, and the sacrificial layer to form a first pattern, a second pattern, and a sacrificial pattern; forming a light emitting layer on the pixel area; and removing the first pattern, the second pattern, and the sacrificial pattern.

[0018] In example embodiments, the first film may have a first curing shrinkage rate, and the second film may have a second curing shrinkage rate greater than the first curing shrinkage rate.

[0019] In example embodiments, the first film may include a first monomer, the second film may include a second monomer, and the number of functional groups of the second monomer may be greater than the number of functional groups of the first monomer.

[0020] In example embodiments, in the step of forming the first film, the first film may be formed with a first thickness, and in the step of forming the second film, the second film may be formed with a second thickness greater than the first thickness.

[0021] In an example embodiment, the pixel area may be one of a plurality of pixel areas, which may include a first pixel area, a second pixel area, and a third pixel area, and in the step of forming a first pattern, a second pattern, and a sacrificial pattern, the first pattern, the second pattern, and the sacrificial pattern may be formed to cover all of the first pixel area and the second pixel area and expose the third pixel area.

[0022] In example embodiments, the method of manufacturing a display device may further include curing the first pattern, the second pattern, and the sacrificial pattern, wherein the curing step includes a first temperature curing step for providing a first temperature and a second temperature curing step for providing a second temperature lower than the first temperature.

[0023] In example embodiments, the sacrificial pattern may have an undercut shape with respect to the first pattern.

[0024] In example embodiments, the pattern part includes a sacrificial pattern disposed on the target object, a first pattern disposed on the sacrificial pattern and including a first monomer, and a second pattern disposed on the first pattern and including a second monomer having more functional groups than the first monomer.

[0025] In example embodiments, a thickness of the second pattern may be greater than a thickness of the first pattern. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Features will become apparent to those skilled in the art by describing example embodiments in detail with reference to the accompanying drawings, in which:

[0027] Figure 1 shows a perspective view of a display device according to an example embodiment;

[0028] Figure 2 shows a cross-sectional view of a display device according to an example embodiment;

[0029] Figure 3 shows an equivalent circuit diagram of a pixel according to an example embodiment;

[0030] Figure 4A cross-sectional views showing some configurations of display panels according to example embodiments;

[0031] Figure 4B A plan view showing some configurations of a display panel according to example embodiments;

[0032] FIG. 5A to FIG. 5G views showing some manufacturing processes of a display device according to example embodiments;

[0033] Figure 6 Shown by FIG. 5A to FIG. 5E A flow chart of the process described;

[0034] Fig. 7A and Figure 7B views showing some manufacturing processes of a display device according to example embodiments;

[0035] Figure 8 Shown include Fig. 7A and Figure 7B A flow chart of a pattern forming method of the process shown in ;

[0036] Fig.9A and Fig. 9B views showing some manufacturing processes of a display device according to example embodiments;

[0037] Fig. 10A and Fig. 10B views showing some manufacturing processes of a display device according to example embodiments;

[0038] Fig.11 A cross-sectional view showing a pattern portion according to a comparative example; and

[0039] Figure 12 to Figure 14 A cross-sectional view of a pattern part according to example embodiments is illustrated. DETAILED DESCRIPTION

[0040] Example embodiments will now be described more fully below with reference to the accompanying drawings; however, they may be implemented in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and fully convey the example implementations to those skilled in the art. In the accompanying drawings, the dimensions of layers and regions may be exaggerated for clarity of illustration. Like reference numerals represent like elements throughout.

[0041] In this specification, it will be meant that when an element (or region, layer, part, etc.) is referred to as being “on,” “connected to” or “coupled to” another element, the element can be directly on, directly connected to or directly coupled to the other element, or a third element can be placed between them.

[0042] The term "and / or" includes any combination of one or more combinations that can be limited by the associated listed items.

[0043] It will be understood that although the terms first and second can be used to describe various elements here, these elements should not be limited by these terms. The above terms are only used to distinguish one component from other components. For example, without departing from the spirit and scope of the present invention, the first element can be referred to as the second element, and the second element can also be referred to as the first element. Unless explicitly indicated to the contrary, the terms in the singular can include plural forms.

[0044] In addition, terms such as "below", "beneath", "on", "over", etc. may be used herein to describe the relationship between elements shown in the drawings. The above terms are relative concepts and are described with respect to the directions indicated in the drawings.

[0045] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present invention belongs. It will also be understood that, unless explicitly defined as such herein, terms (such as those defined in general dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and will not be interpreted in an idealized or overly formal sense.

[0046] It should be understood that, in the specification, the meaning of “including” or “having” lists attributes, quantities, steps, operations, elements or a combination thereof, but does not exclude other attributes, quantities, steps, operations, elements or a combination thereof.

[0047] Hereinafter, example embodiments will be described in detail with reference to the accompanying drawings.

[0048] Figure 1 is a perspective view of a display device DD according to an example embodiment.

[0049] Reference Figure 1 In the display device DD, a display area DA and a non-display area NDA may be defined.

[0050] The display area DA in which the image IM is displayed is parallel to a plane defined by the first direction DR1 and the second direction DR2. The direction of the normal to the display area DA (i.e., the thickness direction of the display device DD) is indicated by a third direction DR3. The front surface (or upper surface) and the rear surface (or lower surface) of each of the components are distinguished by the third direction DR3. However, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 are relative concepts and can be converted into other directions. In the following, the first direction to the third direction are directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3, and can be represented by the same figure marks.

[0051] The display device DD can be used for large electronic devices such as televisions, monitors, or external billboards, and can also be used for small and medium-sized electronic devices such as personal computers, laptop computers, personal digital terminals, car navigation units, game consoles, portable electronic devices, and cameras. In addition, these are provided only as examples, and the display device DD can also be used for other electronic devices.

[0052] The non-display area NDA is an area adjacent to the display area DA, and is an area in which any image IM is not displayed. A bezel area of ​​the display device DD may be defined by the non-display area NDA.

[0053] The non-display area NDA may surround the display area DA. In another embodiment, the shape of the display area DA and the shape of the non-display area NDA may be relatively designed.

[0054] Figure 2 is a cross-sectional view of a display device DD according to example embodiments.

[0055] Reference Figure 2 , the display device DD may include a display panel DP and a detection unit SU.

[0056] The display panel DP may include a base layer BL, a circuit layer ML, a light emitting element layer EL, and a thin film encapsulation layer TFE. An organic light emitting display panel is described as an example of the display panel DP.

[0057] The base layer BL may be a stacked structure including a silicon substrate, a plastic substrate, a glass substrate, an insulating film, or a plurality of insulating layers.

[0058] The circuit layer ML may be disposed on the base layer BL. The circuit layer ML may include a plurality of insulating layers, a plurality of conductive layers, and a semiconductor layer.

[0059] The light emitting element layer EL may be disposed on the circuit layer ML. The light emitting element layer EL may include a light emitting element, for example, an organic light emitting diode. In another embodiment, the light emitting element layer EL may include an inorganic light emitting diode or an organic-inorganic hybrid light emitting diode.

[0060] The thin film encapsulation layer TFE may encapsulate the light emitting element layer EL. The thin film encapsulation layer TFE may include a plurality of inorganic layers and at least one organic layer disposed between the plurality of inorganic layers. In addition, the thin film encapsulation layer TFE may further include a buffer layer. The buffer layer may be the layer closest to the detection unit SU. The buffer layer may be an inorganic layer or an organic layer.

[0061] The detection unit SU may include a circuit for detecting touch. The touch detection method of the detection unit SU may include a resistive film method, an electrostatic capacitance method, an ultrasonic method, etc. Among these methods, the electrostatic capacitance type detection unit SU may detect whether a touch occurs by using electrostatic capacitance when the touch generating means contacts the screen of the display device DD. The electrostatic capacitance method may be divided into a mutual electrostatic capacitance method and a magnetic electrostatic capacitance method.

[0062] The detection unit SU may be directly disposed on the display panel DP. The term "directly disposed" means excluding attachment by using a separate adhesive member, and means being formed by a continuous process. In another embodiment, the display panel DP and the detection unit SU may be combined with each other by using an adhesive member (not shown). In addition, in another embodiment, the detection unit SU may also be omitted.

[0063] Figure 3 is an equivalent circuit diagram of a pixel PX according to example embodiments. Figure 3 The pixel PX connected to the i-th scan line SLi and the i-th emission control line ECLi is exemplarily shown.

[0064] The pixel PX may include an organic light emitting element OLED and a pixel circuit CC. The pixel circuit CC may include a plurality of transistors T1 to T7 and a capacitor CP. The pixel circuit CC may control the amount of current flowing through the organic light emitting element OLED in response to a data signal.

[0065] The organic light emitting element OLED may emit light of predetermined brightness corresponding to the amount of current supplied from the pixel circuit CC. A level of the first power source ELVDD may be set to be higher than a level of the second power source ELVSS.

[0066] Each of the plurality of transistors T1 to T7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode). For convenience, any one of the input electrode and the output electrode may be referred to as a first electrode, and the other electrode may be referred to as a second electrode.

[0067] In this example embodiment, a first electrode of the first transistor T1 is connected to the first power source ELVDD via the fifth transistor T5, and a second electrode of the first transistor T1 is connected to the anode electrode of the organic light emitting element OLED via the sixth transistor T6. The first transistor T1 may be referred to as a driving transistor.

[0068] In the present example embodiment, the first transistor T1 controls the amount of current flowing through the organic light emitting element OLED corresponding to a voltage applied to the control electrode of the first transistor T1 .

[0069] In this exemplary embodiment, the second transistor T2 is connected between the data line DL and the first electrode of the first transistor T1. In addition, the control electrode of the second transistor T2 is connected to the i-th scan line SLi. The second transistor T2 is turned on when the i-th scan signal is provided to the i-th scan line SLi, and electrically connects the data line DL and the first electrode of the first transistor T1.

[0070] In this exemplary embodiment, the third transistor T3 is connected to the second electrode of the first transistor T1 and the control electrode of the first transistor T1. The control electrode of the third transistor T3 is connected to the i-th scan line SLi. The third transistor T3 is turned on when the i-th scan signal is provided to the i-th scan line SLi, and electrically connects the second electrode of the first transistor T1 and the control electrode of the first transistor T1. Therefore, when the third transistor T3 is turned on, the first transistor T1 is connected in the form of a diode.

[0071] In the present exemplary embodiment, the fourth transistor T4 is connected between the node ND and the initialization power generating section (not shown). In addition, the control electrode of the fourth transistor T4 is connected to the i-1th scan line SLi-1. The fourth transistor T4 is turned on when the i-1th scan signal is provided to the i-1th scan line SLi-1, and the node ND is provided with the initialization voltage Vint.

[0072] In the present example embodiment, the fifth transistor T5 is connected between the power line PL and the first electrode of the first transistor T1. A control electrode of the fifth transistor T5 is connected to the i-th emission control line ECLi.

[0073] In the present exemplary embodiment, the sixth transistor T6 is connected between the second electrode of the first transistor T1 and the anode electrode of the organic light emitting element OLED. In addition, the control electrode of the sixth transistor T6 is connected to the i-th emission control line ECLi.

[0074] In the present exemplary embodiment, the seventh transistor T7 is connected between the initialization power generating portion (not shown) and the anode electrode of the organic light emitting element OLED. In addition, the control electrode of the seventh transistor T7 is connected to the i+1th scan line SLi+1. Such a seventh transistor T7 is turned on when the i+1th scan signal is provided to the i+1th scan line SLi+1, and provides the initialization voltage Vint to the anode electrode of the organic light emitting element OLED.

[0075] In this example embodiment, the seventh transistor T7 can improve the black performance of the pixel PX. Specifically, when the seventh transistor T7 is turned on, the parasitic capacitor (not shown) of the organic light emitting element OLED is discharged. Then, when black brightness is achieved, the organic light emitting element OLED does not emit light due to the leakage current from the first transistor T1, and thus, the black performance can be improved.

[0076] Figure 3 An example is shown in which the control electrode of the seventh transistor T7 is connected to the i+1th scan line SLi+1. In another example embodiment, the control electrode of the seventh transistor T7 may be connected to the i-th scan line SLi or to the i-1th scan line SLi-1.

[0077] Figure 3 It is shown for PMOS. In another example embodiment, the pixel circuit CC may be configured as NMOS. In another example embodiment, the pixel circuit CC may be configured by a combination of NMOS and PMOS.

[0078] In this example embodiment, the capacitor CP is provided between the power line PL and the node ND. The capacitor CP stores a voltage corresponding to the data signal. According to the voltage stored in the capacitor CP, when the fifth transistor T5 and the sixth transistor T6 are turned on, the amount of current flowing through the first transistor T1 can be determined.

[0079] Figure 3 The structure of the pixel PX shown in FIG. 1 is an example. In another example embodiment, the pixel PX may be implemented in various forms to allow the organic light emitting element OLED to emit light.

[0080] Figure 4A 2 are cross-sectional views illustrating some configurations of a display panel DP according to example embodiments. Figure 4B 2 is a plan view showing some configurations of a display panel DP according to example embodiments.

[0081] Reference Figure 4A and Figure 4B , the display panel DP may include a base layer BL, a circuit layer ML, a light emitting element layer EL and a thin film encapsulation layer TFE.

[0082] The circuit layer ML may include a transistor TR and a plurality of insulating layers BFL, L1, L2, L3, and L4.

[0083] The insulating layer BFL may be disposed on the base layer BL, and the transistor TR may be disposed on the insulating layer BFL. Figure 4A The transistor TR can be Figure 3 The transistor TR may include a semiconductor layer ACL, a control electrode GED, a first electrode ED1, and a second electrode ED2.

[0084] The semiconductor layer ACL may be disposed on the insulating layer BFL. The insulating layer BFL may be a buffer layer that provides a modified surface to the semiconductor layer ACL. In this case, the semiconductor layer ACL may have stronger adhesion to the insulating layer BFL than to the base layer BL. In addition, the insulating layer BFL may be a barrier layer that protects the lower surface of the semiconductor layer ACL. In this case, the insulating layer BFL may prevent contaminants, moisture, and the like introduced through the base layer BL itself or introduced by passing through the base layer BL from penetrating into the semiconductor layer ACL. Alternatively, the insulating layer BFL may be a light blocking layer that blocks external light incident through the base layer BL from being incident on the semiconductor layer ACL. In this case, the insulating layer BFL may further include a light blocking material.

[0085] The semiconductor layer ACL may include polysilicon or amorphous silicon. The semiconductor layer ACL may include a metal oxide semiconductor. The semiconductor layer ACL may include a channel region serving as a passage through which electrons or holes may move and a first ion doped region and a second ion doped region with the channel region disposed therebetween.

[0086] The first insulating layer L1 may be disposed on the insulating layer BFL and may cover the semiconductor layer ACL. The first insulating layer L1 may include an inorganic material. The inorganic material may include at least any one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide.

[0087] The control electrode GED may be disposed on the first insulating layer L1. The second insulating layer L2 may be disposed on the first insulating layer L1 and may cover the control electrode GED. The second insulating layer L2 may include an inorganic material.

[0088] The third insulating layer L3 may be disposed on the second insulating layer L2. The first electrode ED1 and the second electrode ED2 may be disposed on the third insulating layer L3. The first electrode ED1 and the second electrode ED2 may be connected to the semiconductor layer ACL via a through hole passing through the first insulating layer L1, the second insulating layer L2, and the third insulating layer L3.

[0089] The fourth insulating layer L4 may be disposed on the third insulating layer L3 and may cover the first electrode ED1 and the second electrode ED2. The fourth insulating layer L4 may be composed of a single layer or multiple layers. For example, the single layer may include an organic layer. The multiple layers may be provided by a stack of organic layers and inorganic layers. The fourth insulating layer L4 may be a planarization layer on which a planarized surface is provided.

[0090] The light emitting element layer EL and the pixel defining film PDP may be disposed on the fourth insulating layer L4.

[0091] The light emitting element layer EL may include a first electrode E1, a light emitting layer EM, a second electrode E2, and an auxiliary electrode SE2. The first electrode E1 may be disposed on the fourth insulating layer L4, and may be electrically connected to the second electrode ED2 through a through hole passing through the fourth insulating layer L4.

[0092] The pixel defining film PDP may be disposed on the circuit layer ML and define the pixel area PXA. The pixel defining film PDP covers at least a portion of the first electrode E1 and may be disposed on the fourth insulating layer L4. A portion of the first electrode E1 may not be covered by the pixel defining film PDP, and the portion may correspond to the pixel area PXA.

[0093] The light emitting layer EM may be disposed between the first electrode E1 and the second electrode E2. The light emitting layer EM may have a single layer structure formed of a single material, a single layer structure formed of multiple materials different from each other, or a multilayer structure formed of multiple layers composed of multiple materials different from each other.

[0094] The light emitting layer EM may include an organic material. For example, the light emitting layer EM may be composed of at least any one of materials emitting red light, green light, and blue light, and may include a fluorescent material or a phosphorescent material.

[0095] The second electrode E2 may be disposed on the light emitting layer EM, and the auxiliary electrode SE2 may be disposed on the pixel defining film PDP. The second electrode E2 and the auxiliary electrode SE2 may receive a second power source ELVSS (see FIG. Figure 3 ).

[0096] The second electrode E2 may be provided in plurality, and the plurality of second electrodes E2-1, E2-2, and E2-3 may be spaced apart from each other. The second electrodes E2-1, E2-2, and E2-3 may be electrically connected through the auxiliary electrode SE2.

[0097] The thin film encapsulation layer TFE may be disposed on the second electrode E2 and the auxiliary electrode SE2. The thin film encapsulation layer TFE may directly cover the second electrode E2 and the auxiliary electrode SE2.

[0098] The thin film encapsulation layer TFE may include a first inorganic layer ECL1 , an organic layer ECL2 , and a second inorganic layer ECL3 sequentially stacked.

[0099] The first inorganic layer ECL1 may cover the second electrode E2. The first inorganic layer ECL1 may be provided in plurality. The plurality of first inorganic layers ECL1-1, ECL1-2, and ECL1-3 may correspond one-to-one to the second electrodes E2-1, E2-2, and E2-3 and cover the second electrodes E2-1, E2-2, and E2-3.

[0100] The organic layer ECL2 may cover the first inorganic layers ECL1-1, ECL1-2, and ECL1-3. The organic layer ECL2 may be formed by depositing, printing, or coating an organic material. The second inorganic layer ECL3 may be disposed on the organic layer ECL2.

[0101] The first inorganic layer ECL1 and the second inorganic layer ECL3 may protect the light emitting element layer EL from moisture and oxygen, and the organic layer ECL2 may protect the light emitting element layer EL from foreign matter such as dust particles, etc. The first inorganic layer ECL1 and the second inorganic layer ECL3 may include at least any one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide. The organic layer ECL2 may include a polymer, for example, an acryl-based organic layer.

[0102] Figure 4A The thin film encapsulation layer TFE is exemplarily shown to include two inorganic layers and one organic layer. For example, the thin film encapsulation layer TFE may also include three inorganic layers and two organic layers, and in this case, the thin film encapsulation layer TFE may have a stacked structure in which inorganic layers and organic layers are alternately stacked.

[0103] FIG. 5A to FIG. 5G 1 is a diagram showing some manufacturing processes of a display device according to an example embodiment. FIG. 5A to FIG. 5G When Figure 4A For the sake of clarity, the repeated description of the figure marks described in the figure may be omitted.

[0104] Reference Figure 5A , a circuit layer ML is formed on the base layer BL.

[0105] Reference Figure 5B , first electrodes E1 - 1 , E1 - 2 , and E1 - 3 are formed on the circuit layer ML. Figure 4A The first electrode E1 shown in FIG. 5 may be any one of the first electrodes E1 - 1 , E1 - 2 , and E1 - 3 .

[0106] A pixel defining film PDP is formed on the circuit layer ML. The pixel defining film PDP may cover at least a portion of the first electrodes E1-1, E1-2, and E1-3. Some areas of the first electrodes E1-1, E1-2, and E1-3 that are not covered by the pixel defining film PDP and are exposed may be defined as pixel areas PXA-1, PXA-2, and PXA-3. The pixel areas PXA-1, PXA-2, and PXA-3 may be divided into a first pixel area PXA-1, a second pixel area PXA-2, and a third pixel area PXA-3.

[0107] The auxiliary electrode SE2 is formed on the pixel definition film PDP. The auxiliary electrode SE2 may include a conductive material. For example, the auxiliary electrode SE2 may include molybdenum.

[0108] Reference Figure 5C A sacrificial layer SL is formed to cover the pixel defining film PDP and the first electrodes E1-1, E1-2, and E1-3. The sacrificial layer SL may include, for example, an organic fluorine-based resin.

[0109] The first film PL1 is formed on the sacrificial layer SL. The second film PL2 is formed on the first film PL1. The first film PL1 and the second film PL2 may include corresponding photosensitive chemical materials. After the first film PL1 and the second film PL2 are formed, the first film PL1 and the second film PL2 may be cured.

[0110] The first film PL1 may have a first curing shrinkage rate, and the second film PL2 may have a second curing shrinkage rate. The second curing shrinkage rate may be greater than the first curing shrinkage rate. When each of the first film PL1 and the second film PL2 is cured, volume shrinkage may occur when the solvent in the photosensitive chemical material is removed. The first curing shrinkage rate and the second curing shrinkage rate may indicate a volume shrinkage rate during the curing reaction.

[0111] The first film PL1 and the second film PL2 may include materials different from each other. For example, the first film PL1 and the second film PL2 may include different monomers having different numbers of functional groups from each other or be formed using different monomers having different numbers of functional groups from each other. The larger the number of functional groups of the monomer, the larger the curing shrinkage rate may be. Therefore, the first film PL1 may include a monomer having a number of functional groups of x. x may be a positive integer. The second film PL2 may include a monomer having a number of functional groups of y or be formed using a monomer having a number of functional groups of y, and y may be an integer greater than x. For example, y may be 8 and x may be 4. For example, y may be 4 and x may be 2.

[0112] In example embodiments, a material for increasing a curing shrinkage ratio may be added to the second film PL2 so that the second curing shrinkage ratio is higher than the first curing shrinkage ratio of the first film PL1 .

[0113] Reference Figure 5D , a mask MK is disposed on the second film PL2. The mask MK may be a binary mask including a light transmitting portion TP and a light blocking portion BP.

[0114] Each of the first film PL1 and the second film PL2 may be a positive photoresist film or a negative photoresist film. Hereinafter, an embodiment in which the first film PL1 and the second film PL2 are positive photoresist films is described.

[0115] The light blocking portion BP may overlap the first pixel region PXA-1 and the third pixel region PXA-3. The light transmitting portion TP may overlap the second pixel region PXA-2. Light is emitted after the mask MK is disposed on the second film PL2.

[0116] Reference Figure 5E , the first pattern PL1P may be formed by patterning the first film PL1, and the second pattern PL2P may be formed by patterning the second film PL2. Patterning may include an exposure process and a development process. The first pattern PL1P and the second pattern PL2P may be formed simultaneously by the same process. A pattern including both the first pattern PL1P and the second pattern PL2P may be referred to as a pattern.

[0117] After forming the first and second patterns PL1P and PL2P, the sacrificial layer SL may be patterned to form the sacrificial pattern SLP. Thus, a pattern portion PTP including the first and second patterns PL1P, PL2P, and the sacrificial pattern SLP may be formed.

[0118] The sacrificial pattern SLP may have an undercut shape with respect to the first pattern PL1P. Therefore, a portion POT of each of the first and second patterns PL1P and PL2P may not be supported by the sacrificial pattern SLP.

[0119] According to the present exemplary embodiment, the curing shrinkage rate of the second pattern PL2P is greater than that of the first pattern PL1P. Therefore, the first pattern PL1P can receive a force pulled toward the second pattern PL2P. Therefore, even when a partial POT is not supported by the sacrificial pattern SLP, a phenomenon in which one of the partial POTs is deflected can be prevented, for example, the pattern droop of the overhang portion can be reduced or prevented.

[0120] By the method described herein, light emitting layers emitting light having different colors from each other may be formed in the first pixel region PXA-1, the second pixel region PXA-2, and the third pixel region PXA-3, respectively. For example, a red light emitting layer, a green light emitting layer, and a blue light emitting layer may be formed in the first pixel region PXA-1, the second pixel region PXA-2, and the third pixel region PXA-3, respectively. As will now be described, the green light emitting layer may be formed first.

[0121] exist Fig. 5F In the embodiment, the first pixel region PXA-1 and the third pixel region PXA-3 except the second pixel region PXA-2 may be covered by the sacrificial pattern SLP. According to example embodiments, other regions except a specific pixel region (eg, the second pixel region PXA-2) may be covered by the sacrificial pattern SLP.

[0122] like Fig. 5FAs shown in the figure, although a light-emitting layer EM-G, for example, a green light-emitting layer, is initially formed in the exposed second pixel area PXA-2 and the first and third pixel areas PXA-1 and PXA-3, since the first and third pixel areas PXA-1 and PXA-3 are covered by the sacrificial pattern SLP, the light-emitting layer EM-G can be removed therewith as described below.

[0123] According to example embodiments, when the light emitting layer EM-G is formed, the pixel regions other than the second pixel region PXA-2 may be covered by the sacrificial pattern SLP. Therefore, even when, for example, the distance between the first pixel region PXA-1 and the second pixel region PXA-2 is reduced, the light emitting layer that emits different light for adjacent pixel regions may not eventually exist on the adjacent pixel regions. Therefore, the area of ​​each of the first pixel region PXA-1, the second pixel region PXA-2, and the third pixel region PXA-3 may be expanded, and the width WT of the pixel defining film PDP may be reduced. For example, the width WT of the pixel defining film PDP may be reduced to about 6 micrometers or less.

[0124] Still refer to Fig. 5F , after forming the light emitting layer EM-G, a second electrode E2-2 may be formed. The second electrode E2-2 may contact the auxiliary electrode SE2. The second electrode E2-2 may include a conductive material. The second electrode E2-2 may include a multilayer structure or a single layer structure. When the second electrode E2-2 is a multilayer structure, the second electrode E2-2 may include a first electrode layer and a second electrode layer. The first electrode layer may include an Ag-Mg alloy, and the second electrode layer may include indium tin oxide (ITO). In an example embodiment, the first electrode layer and the second electrode layer may be in direct contact with each other, the first electrode layer may not be in contact with the auxiliary electrode SE2, and the first electrode layer may be electrically connected to the auxiliary electrode SE2 through the second electrode layer. In another example embodiment, the first electrode layer and the auxiliary electrode SE2 may be in direct contact with each other.

[0125] After forming the second electrode E2-2, a first inorganic layer ECL1-2 may be formed. The first inorganic layer ECL1-2 may include an inorganic material. The inorganic material may be, for example, silicon nitride.

[0126] Reference Figure 5G , materials may be removed from adjacent pixel regions. For example, an etchant may be provided to the sacrificial pattern SLP so that the sacrificial pattern SLP, the first pattern PL1P, and the second pattern PL2P may be removed. The etchant may be, for example, an organic fluorine-based solvent.

[0127] The same may be performed with respect to the first pixel area PXA-1 and the third pixel area PXA-3. Figure 5C to Figure 5G process, thereby forming, for example, a red light-emitting area and a blue light-emitting area.

[0128] Figure 6 is through FIG. 5A to FIG. 5E Flowchart of the process described.

[0129] Reference FIG. 5A to FIG. 5E as well as Figure 6 , a sacrificial layer SL is formed on the target object (S110). The target object may be Figure 5B . A display panel in the manufacturing steps shown in FIG.

[0130] A first film PL1 is formed on the sacrificial layer SL (S120). A second film PL2 is formed on the first film PL1 (S130). The first film PL1 and the second film PL2 are cured (S140). Subsequently, through a patterning process, a first pattern PL1P, a second pattern PL2P, and a sacrificial pattern SLP are formed (S150).

[0131] exist Figure 6 , a step is described in which both the first film PL1 and the second film PL2 are formed and then cured. For example, the first film PL1 is formed and then the first film PL1 is first cured, and then the second film PL2 is formed, and the second curing may be performed.

[0132] FIG. 7A to FIG. 7B are views illustrating some manufacturing processes for a display device according to example embodiments. Figure 8 Yes Fig. 7A and Figure 7B Flow chart of a pattern forming method of the process shown in FIG.

[0133] Reference Fig. 7A , Figure 7B and Figure 8 , a step ( S160 ) of curing the first and second patterns PL1P and PL2P at a first temperature Ht1 and a step ( S170 ) of curing the first and second patterns PL1P and PL2P at a second temperature Ht2 may further be provided.

[0134] The first temperature Ht1 may be a temperature higher than the second temperature Ht2. For example, the first temperature Ht1 may be about 80 degrees Celsius, and the second temperature Ht2 may be about 70 degrees Celsius.

[0135] When the first temperature Ht1 is applied to the second pattern PL2P, the second pattern PL2P may be closer to the heat source than the first pattern PL1P. Therefore, heat may be first transferred to the second pattern PL2P faster than the first pattern PL1P. When the temperature is higher under the same conditions, the curing shrinkage rate may be further increased. Therefore, the second pattern PL2P may shrink, and shrink to a greater extent than the first pattern PL1P, so that the first pattern PL1P may receive a force in a direction oriented toward the shrinkage direction of the second pattern PL2P (e.g., in a lateral direction). Subsequently, heat may be applied at a second temperature Ht2 lower than the first temperature Ht1.

[0136] The step (S140) of curing the first film PL1 and the second film PL2 may be referred to as a first curing step, and the step (S160) of curing the first pattern PL1P and the second pattern PL2P at the first temperature Ht1 and the step (S170) of curing the first pattern PL1P and the second pattern PL2P at the second temperature Ht2 may be referred to as a second curing step.

[0137] FIG. 9A to FIG. 9B 1 is a view showing some manufacturing processes for a display device according to an example embodiment. Fig.9A and Fig. 9B , the same reference numerals are used to describe FIG. 5A to FIG. 5G The components described are not described, and a description thereof will not be provided.

[0138] Reference Fig.9A A sacrificial layer SL covering the pixel definition film PDP, the first electrodes E1-1, E1-2 and E1-3 is formed. A first film PL1 is formed on the sacrificial layer SL. A second film PL2 is formed on the first film PL1. A third film PL3 is formed on the second film PL2.

[0139] The first film PL1 may have a first curing shrinkage rate, the second film PL2 may have a second curing shrinkage rate, and the third film PL3 may have a third curing shrinkage rate. The second curing shrinkage rate may be greater than the first curing shrinkage rate. The third curing shrinkage rate may be greater than the second curing shrinkage rate.

[0140] The first film PL1, the second film PL2, and the third film PL3 may include materials different from each other. For example, the first film PL1, the second film PL2, and the third film PL3 may respectively include monomers having different numbers of functional groups from each other. The larger the number of functional groups of the monomer, the larger the curing shrinkage rate may be. Therefore, the first film PL1 may include a monomer having a number of functional groups of x, where x may be a positive integer. The second film PL2 may include a monomer having a number of functional groups of y, where y may be an integer greater than x. The third film PL3 may include a monomer having a number of functional groups of z, where z may be an integer greater than y.

[0141] Reference Fig. 9B The pattern part PTP-1 is formed by patterning the sacrificial layer SL, the first film PL1, the second film PL2, and the third film PL3. The pattern part PTP-1 may include a sacrificial pattern SLP, a first pattern PL1P, a second pattern PL2P, and a third pattern PL3P.

[0142] FIG. 10A to FIG. 10B 1 is a diagram showing some manufacturing processes of a display device according to an example embodiment. Fig. 10A and Fig. 10B , the same reference numerals are used to describe FIG. 5A to FIG. 5G The components described are described, and their descriptions may not be repeated for the sake of clarity.

[0143] Reference Fig. 10A A sacrificial layer SL is formed to cover the pixel definition film PDP and the first electrodes E1-1, E1-2 and E1-3. A first film PL1 is formed on the sacrificial layer SL. A second film PL2-1 is formed on the first film PL1.

[0144] The first film PL1 may have a first thickness Tk1, and the second film PL2-1 may have a second thickness Tk2. The first film PL1 may have a first curing shrinkage rate, and the second film PL2-1 may have a second curing shrinkage rate. The second curing shrinkage rate may be greater than the first curing shrinkage rate. Therefore, the film having a relatively larger curing shrinkage rate may have a larger thickness.

[0145] The first film PL1 and the second film PL2-1 may include materials different from each other. For example, the first film PL1 and the second film PL2-1 may include or be formed of corresponding monomers having different numbers of functional groups from each other. The monomers included in the second film PL2-1 may have a greater number of functional groups than the monomers included in the first film PL1.

[0146] Reference Fig. 10B The pattern part PTP-2 is formed by patterning the sacrificial layer SL, the first film PL1, and the second film PL2-1. The pattern part PTP-2 may include a sacrificial pattern SLP, a first pattern PL1P, and a second pattern PL2-1P.

[0147] Fig.11 is a cross-sectional view showing a pattern portion according to a comparative example.

[0148] Reference Fig.11 , the pattern part PTP-C may have a sacrificial pattern SLP and a contrast pattern PLP-C. The contrast pattern PLP-C may be a photoresist pattern. According to a comparative example, the contrast pattern PLP-C may be constructed as a single layer.

[0149] The sacrificial pattern SLP may have an undercut shape with respect to the contrast pattern PLP-C, and the contrast pattern PLP-C may have a deflected area, eg, drooped, where the sacrificial pattern SLP is not disposed under the contrast pattern PLP-C.

[0150] In this case, during the process of removing the sacrificial pattern SLP, the etchant is not smoothly supplied to the sacrificial pattern SLP. In addition, in the case where the contrast pattern PLP-C contacts the target object TG, the gas generated during the process is not smoothly discharged. This may cause process defects.

[0151] Figure 12 to Figure 14 is a cross-sectional view illustrating a pattern part according to example embodiments.

[0152] Reference Fig.12 The pattern part PTP may include a sacrificial pattern SLP, a first pattern PL1P, and a second pattern PL2P. The first pattern PL1P and the second pattern PL2P may be photoresist patterns. The curing shrinkage rate of the second pattern PL2P may be greater than the curing shrinkage rate of the first pattern PL1P.

[0153] exist Fig.12 , the forces according to the contraction are exemplarily shown using vectors, and the directions and lengths of the vectors may be regarded as indicating the corresponding forces. The first force FC1 may be a force according to the contraction of the first pattern PL1P, and the second force FC2 may be a force according to the contraction of the second pattern PL2P. The second force FC2 may be greater than the first force FC1. At the boundary where the first pattern PL1P and the second pattern PL2P contact each other, the first pattern PL1P may be pulled in the direction of the second force FC2. Therefore, an effect may be exhibited in which a force FC-U is generated that lifts the first pattern PL1P by a force proportional to the difference between the first force FC1 and the second force FC2.

[0154] According to example embodiments, even when the sacrificial pattern SLP has an undercut shape relative to the first pattern PL1P, the probability of the first and second patterns PL1P and PL2P being deflected, which are not supported by the sacrificial pattern SLP, can be reduced. Therefore, the probability of defects occurring during the process of removing the sacrificial pattern SLP can be reduced, and a phenomenon in which a gas exhaust path is blocked can be prevented.

[0155] Reference Fig.13, the pattern portion PTP-1 may include a sacrificial pattern SLP, a first pattern PL1P, a second pattern PL2P, and a third pattern PL3P. The first pattern PL1P, the second pattern PL2P, and the third pattern PL3P may be photoresist patterns. The curing shrinkage rate of the third pattern PL3P may be greater than the curing shrinkage rate of the first pattern PL1P and may be greater than the curing shrinkage rate of the second pattern PL2P. Therefore, the third force FC3-1 may be greater than the first force FC1-1 and the second force FC2-1. Therefore, the following effect may be exhibited: a force FC-U1 is generated to lift the portions of the first pattern PL1P, the second pattern PL2P, and the third pattern PL3P that are not supported by the sacrificial layer SLP. In Fig.13 , three patterns of a first pattern PL1P, a second pattern PL2P, and a third pattern PL3P are exemplarily shown. For example, the pattern part may also include four or more patterns.

[0156] Reference Fig.14 , the pattern portion PTP-2 may include a sacrificial pattern SLP, a first pattern PL1P, and a second pattern PL2-1P. The first pattern PL1P and the second pattern PL2-1P may be photoresist patterns. The curing shrinkage rate of the second pattern PL2-1P may be greater than the curing shrinkage rate of the first pattern PL1P. Therefore, the second force FC2-2 may be greater than the first force FC1-2.

[0157] In addition, the thickness of the second pattern PL2-1P having a greater curing shrinkage rate may be greater than the thickness of the first pattern PL1. Therefore, the force FC-U2 that lifts the portion of the first and second patterns PL1P and PL2-1P that is not supported by the sacrificial layer SLP may be greater than Fig.12 The force of FC-U.

[0158] By way of summary and review, when the shape of the photoresist pattern changes, the accuracy of the shape of the pattern may deteriorate. In addition, due to the deformation of the shape of the photoresist pattern, defects may occur during the stripping process.

[0159] As described above, embodiments relate to a pattern part, a method of forming the pattern part, and a method of manufacturing a display device using the same, in which process reliability can be improved.

[0160] According to example embodiments, the pattern portion may include a sacrificial pattern, a first pattern, and a second pattern. The curing shrinkage rate of the second pattern disposed on the first pattern may be greater than the curing shrinkage rate of the first pattern. Portions of the first and second patterns that are not supported by the sacrificial pattern may have a reduced probability of downward deflection by the shrinkage force of the second pattern. Therefore, the probability of causing defects during the process of removing the sacrificial pattern may be reduced, and a phenomenon in which a gas exhaust path is blocked by the first and second patterns may be prevented.

[0161] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and interpreted in a general and descriptive sense only and not for purposes of limitation. In some cases, as will be apparent to one of ordinary skill in the art at the time of filing this application, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless expressly indicated otherwise. Therefore, it will be understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the invention as set forth in the claims.

Claims

1. A method for forming a pattern portion, the method comprising the following steps: forming a sacrificial layer on the target object; forming a first film on the sacrificial layer, wherein the first film has a first curing shrinkage rate; forming a second film on the first film, the second film having a second curing shrinkage greater than the first curing shrinkage; curing and patterning the first film and the second film to form a pattern; as well as patterning the sacrificial layer to form a sacrificial pattern, wherein a portion of the pattern is not supported by the sacrificial pattern, and The first curing shrinkage rate and the second curing shrinkage rate refer to volume shrinkage rates during the curing reaction.

2. The method according to claim 1, wherein: The patterns include: a first pattern formed by patterning the first film; and The second pattern is formed by patterning the second film. 3 . The method according to claim 2 , further comprising a second curing step for curing the pattern after forming the pattern.

4. The method according to claim 3, wherein: The second curing step comprises: A first temperature curing step for curing the pattern at a first temperature; and The second temperature curing step is used to cure the pattern at a second temperature lower than the first temperature.

5. The method according to claim 3, wherein: In the second curing step, the second pattern shrinks to a greater extent than the first pattern.

6. The method according to claim 1, wherein: In the step of forming the first film, the first film is formed with a first thickness, and In the step of forming the second film, the second film is formed with a second thickness greater than the first thickness.

7. The method according to claim 1, wherein: The first film includes a first monomer, the second film includes a second monomer, and the number of functional groups of the second monomer is greater than the number of functional groups of the first monomer.

8. The method according to claim 1, further comprising forming a third film on the second film, wherein The third film is patterned in the step of forming the pattern.

9. The method according to claim 8, wherein: The third film has a third curing shrinkage greater than the second curing shrinkage.

10. The method according to claim 8, wherein: The first film includes a first monomer, the second film includes a second monomer, and the third film includes a third monomer, the second monomer has a greater number of functional groups than the first monomer, and the third monomer has a greater number of functional groups than the second monomer.

11. The method according to claim 1, wherein: The first film is interposed between the second film and the sacrificial layer.

12. The method according to claim 11, wherein: The sacrificial pattern is formed after the step of forming the pattern, wherein the sacrificial pattern is formed to have an undercut shape with respect to the pattern so that the patterned first film and the patterned second film extend laterally beyond an upper surface of the sacrificial pattern.

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