Display Devices

Abstract

The present invention relates to a display device, the display device includes a pixel circuit, the pixel circuit includes a first pixel and a second pixel. The first pixel arranged in a first row and the second pixel arranged in a second row are connected to a scan line together, and the number of scan lines required for the display device can be reduced to half. The effective period of the first selection signal does not overlap with the effective period of the second selection signal. The scanning time of the scanning signal overlaps with one of the effective periods of the first selection signal and the effective period of the second selection signal.

Description

[0001] CROSS REFERENCE TO RELATED APPLICATIONS

[0002] The entire contents of Korean Patent Application No. 10-2018-0146646, entitled “DISPLAY DEVICE AND METHOD OF DRIVING THE SAME,” filed on November 23, 2018 in the Korean Intellectual Property Office are hereby incorporated by reference in its entirety. Technical Field

[0003] The present disclosure relates to a display device and a method of driving the display device. More particularly, the present disclosure relates to a display device capable of reducing the area of ​​a non-display region and a method of driving the display device. Background Art

[0004] Among display devices, an organic light emitting display device displays an image using an organic light emitting diode that generates light from electron-hole recombination. The organic light emitting display device has advantages such as fast response speed and low power consumption.

[0005] The organic light emitting display device includes a data line, a scan line, and pixels connected to the data line and the scan line. Each pixel includes an organic light emitting diode and a circuit unit that controls the amount of current flowing through the organic light emitting diode. The circuit unit controls the amount of current flowing from a first driving voltage to a second driving voltage via the organic light emitting diode in response to a data signal. In this case, light having a predetermined brightness is generated corresponding to the amount of current flowing through the organic light emitting diode.

[0006] The display device includes a display area in which pixels are arranged and a non-display area in which a driving circuit is arranged. In recent years, research continues to reduce the area of ​​the non-display area. Summary of the invention

[0007] An embodiment provides a display device, comprising: a pixel circuit including a first pixel connected to a first data line and a scan line and a second pixel connected to a second data line and the scan line; a scan drive circuit outputting a scan signal to drive the scan line; a data drive circuit outputting a data signal; a data output circuit applying the data signal to the first data line and the second data line in response to a first selection signal and a second selection signal; and a drive controller controlling the scan drive circuit and the data drive circuit and outputting the first selection signal and the second selection signal. The effective period of the first selection signal does not overlap with the effective period of the second selection signal, and the scanning progress time of the scan signal overlaps with one of the effective period of the first selection signal and the effective period of the second selection signal.

[0008] The scan lines extend in a first direction, the first and second data lines extend in a second direction crossing the first direction and are arranged spaced apart from each other, and the first and second pixels are sequentially arranged in the second direction.

[0009] The first data line is disposed adjacent to first sides of the first pixel and the second pixel, and the second data line is disposed adjacent to second sides of the first pixel and the second pixel.

[0010] The first pixels arranged in the first column are red pixels, the second pixels arranged in the first column are blue pixels, and each of the first pixel and the second pixel arranged in the second column adjacent to the first column is a green pixel.

[0011] When the first frame starts, the second selection signal is activated after the first selection signal is activated, and the scan-on time of the scan signal overlaps with the effective period of the second selection signal.

[0012] When the second frame continuing from the first frame starts, the first selection signal is activated after the second selection signal is activated, and the scan progress time of the scan signal overlaps with the effective period of the first selection signal.

[0013] The scanning time of the scanning signal is substantially equal to one horizontal period.

[0014] The effective period of the first selection signal is shorter than the ineffective period of the first selection signal.

[0015] The effective period of the second selection signal is shorter than the ineffective period of the second selection signal.

[0016] The data output circuit includes a first switching transistor that applies a data signal to a first data line in response to a first selection signal and a second switching transistor that applies a data signal to a second data line in response to a second selection signal.

[0017] An embodiment provides a display device, including: a pixel circuit including a first pixel connected to a first data line and a scan line and a second pixel connected to a second data line and the scan line; a scan driving circuit outputting a scan signal to drive the scan line; a data driving circuit outputting a data signal; a data output circuit applying the data signal to the first data line in response to a first selection signal and applying the data signal to the second data line in response to a second selection signal; and a driving controller controlling the scan driving circuit and the data driving circuit and outputting the first selection signal and the second selection signal. When the second selection signal is activated, the driving controller sequentially activates the first selection signal and the second selection signal and activates the scan signal.

[0018] The scan lines extend in a first direction, the first and second data lines extend in a second direction crossing the first direction and are arranged spaced apart from each other, and the first and second pixels are sequentially arranged in the second direction.

[0019] The first data line is disposed adjacent to first sides of the first pixel and the second pixel, and the second data line is disposed adjacent to second sides of the first pixel and the second pixel.

[0020] The first pixels arranged in the first column are red pixels, the second pixels arranged in the first column are blue pixels, and each of the first pixel and the second pixel arranged in the second column adjacent to the first column is a green pixel.

[0021] The scanning time of the scanning signal is substantially equal to one horizontal period.

[0022] The data output circuit includes a first switching transistor that applies a data signal to a first data line in response to a first selection signal, and a second switching transistor that applies a data signal to a second data line in response to a second selection signal.

[0023] An embodiment provides a method for driving a display device, the display device comprising: a first pixel connected to a first data line and a scan line, and a second pixel connected to a second data line and the scan line, the method comprising: outputting a first data signal to the first data line in response to a first selection signal; outputting a second data signal to the second data line in response to a second selection signal; and applying a scan signal to the scan line. An effective period of the first selection signal does not overlap with an effective period of the second selection signal, and a scan progress time of the scan signal overlaps with one of an effective period of the first selection signal and an effective period of the second selection signal.

[0024] The scan lines extend in a first direction, the first and second data lines extend in a second direction crossing the first direction and are arranged spaced apart from each other, and the first and second pixels are sequentially arranged in the second direction.

[0025] When the first frame starts, the second selection signal is activated after the first selection signal is activated, and the scan-on time of the scan signal overlaps with the effective period of the second selection signal.

[0026] When the second frame continuing from the first frame starts, the first selection signal is activated after the second selection signal is activated, and the scan progress time of the scan signal overlaps with the effective period of the first selection signal.

[0027] The scanning time of the scanning signal is substantially equal to one horizontal period. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Features will become apparent to those skilled in the art by describing in detail exemplary embodiments with reference to the accompanying drawings, in which:

[0029] Figure 1illustrates a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0030] Figure 2 The diagram shows Figure 1 A circuit diagram of a data output circuit and a pixel circuit shown in FIG.

[0031] Figure 3 A timing diagram illustrating a method of driving a display device according to an exemplary embodiment of the present disclosure is illustrated;

[0032] Figure 4 The diagram shows Figure 1 An example of the color output for each pixel shown in;

[0033] Figure 5A illustrates a timing diagram showing the operation of a display device in an i-th frame;

[0034] Figure 5B illustrates a timing diagram showing the operation of a display device in an (i+1)th frame;

[0035] Figure 6 illustrates a waveform diagram showing changes of a first selection signal and a second selection signal in consecutive frames; and

[0036] Figure 7 The diagram shows Figure 1 An example of the color output of each pixel and the pixel layout is shown in FIG. DETAILED DESCRIPTION

[0037] It will be understood that when an element or layer is referred to as being “on,” “connected to” or “coupled to” another element or layer, it can be directly on, directly connected or coupled to the other element or layer, or intervening elements or layers may be present.

[0038] Like reference numerals refer to like elements throughout.In the drawings, the thicknesses of layers, films, and regions are exaggerated for clarity.

[0039] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0040] It will be understood that, although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, first component, first region, first layer or first part discussed below may be referred to as the second element, second component, second region, second layer or second part. As used herein, unless the context clearly indicates otherwise, the singular forms "one" and "the" are intended to also include plural forms.

[0041] For ease of description, spatially relative terms such as “below,” “beneath,” “lower,” “above,” “upper,” etc. may be used herein to describe the relationship of one element or feature to another element or feature as illustrated in the figures.

[0042] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense unless explicitly defined in this article.

[0043] It should be further understood that when used in this specification, the term “comprising” specifies the presence of stated features, integers, steps, operations, elements and / or parts, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or combinations thereof.

[0044] Hereinafter, the present disclosure will be described in detail with reference to the accompanying drawings.

[0045] Figure 1 1 is a plan view showing a display device 100 according to an exemplary embodiment of the present disclosure. Figure 1 , the display device 100 includes a pixel circuit 110 , a driving controller 120 , a scan driving circuit 130 , a data driving circuit 140 , a data output circuit 150 , and a power supply 160 .

[0046] The pixel circuit 110, the scan drive circuit 130, and the data output circuit 150 may be on the display substrate DP. According to an embodiment, the data output circuit 150 may be arranged in the data drive circuit 140. In the present exemplary embodiment, the scan drive circuit 130 may be implemented by an amorphous silicon gate (ASG) using an amorphous silicon thin film transistor (a-Si TFT), an oxide semiconductor, a crystalline semiconductor, a polycrystalline semiconductor, and the like, and may be integrated in a predetermined area of ​​the display substrate DP. According to an embodiment, the scan drive circuit 130 may be a tape carrier package (TCP), a chip on film (COF), and the like.

[0047] The display substrate DP may include various display panels, for example, a liquid crystal display panel, an organic light emitting display panel, an electrophoretic display panel, an electrowetting display panel, etc. When the display substrate DP includes a liquid crystal display panel, the display device 100 may further include a backlight unit. In the present exemplary embodiment, an organic light emitting display panel will be described as the display substrate DP.

[0048] When viewed in a plan view, the display substrate DP includes a display area DA in which a plurality of pixels are arranged and a non-display area NDA surrounding the display area DA. The pixel circuit 110 is in the display area DA, and the scan driving circuit 130 and the data driving circuit 140 are in the non-display area NDA.

[0049] The pixel circuit 110 includes a plurality of scan lines SL1 to SLn extending in a first direction DR1, a plurality of data lines DL1 to DLm extending in a second direction, and a plurality of pixels PXa and PXb connected to the scan lines SL1 to SLn and the data lines DL1 to DLm. In the present exemplary embodiment, each of "m" and "n" is a positive integer. Figure 1 Only some of the scan lines SL1 to SLn and some of the data lines DL1 to DLm are shown.

[0050] Figure 1 Only some of the pixels PXa and PXb are shown. Each of the pixels PXa and PXb is connected to a corresponding scan line of the scan lines SL1 to SLn and a corresponding data line of the data lines DL1 to DLm.

[0051] The scan lines SL1 to SLn extend in the first direction DR1 and are arranged to be spaced apart from each other in the second direction DR2. The data lines DL1 to DLm extend in the second direction DR2 and are arranged to be spaced apart from each other in the first direction DR1.

[0052] Each of the pixels PXa and PXb includes an organic light emitting diode and a pixel circuit unit for controlling the light emission of the organic light emitting diode. The pixel circuit unit includes a plurality of transistors and a capacitor. At least one of the scan driving circuit 130 and the data driving circuit 140 may include a transistor formed by the same process as the pixel circuit unit.

[0053] The pixels PXa and PXb may be grouped into a plurality of groups. The pixels PXa and PXb may display one of the primary colors to produce a full-color display, and may further display white. The primary colors may include: red, green, and blue, or yellow, cyan, and magenta.

[0054] exist Figure 1 In the present exemplary embodiment shown in FIG. 1 , the first pixel PXa is connected to each of the odd data lines DL1, ..., DLm-1, and the second pixel PXb is connected to each of the even data lines DL2, ..., DLm. Two pixels adjacent to each other in the second direction DR2 (i.e., the first pixel PXa and the second pixel PXb) are commonly connected to one scan line. The connection relationship between the plurality of first pixels PXa and the plurality of second pixels PXb, the data lines DL1 to DLm, and the scan lines SL1 to SLn will be described in detail later.

[0055] The driving controller 120 receives the image signal RGB and the control signal CTRL from an external graphic controller (or a host processor, not shown). The control signal CTRL includes a vertical synchronization signal, a horizontal synchronization signal, a data enable signal and a clock signal.

[0056] The driving controller 120 converts the data format of the image signal RGB to generate the image data signal RGB_DATA. The driving controller 120 outputs a scan control signal SCS, a data control signal DCS, a voltage control signal VCS, a first selection signal SEL1, and a second selection signal SEL2.

[0057] The scan driving circuit 130 receives a scan control signal SCS from the driving controller 120. The scan driving circuit 130 generates a plurality of scan signals and sequentially outputs the scan signals to the scan lines SL1 to SLn. The scan driving circuit 130 may further apply a plurality of light emission control signals to the pixel circuit 110 in response to the scan control signal SCS. According to another embodiment, the display device 100 may separately include a light emission driving circuit that outputs a light emission control signal.

[0058] exist Figure 1 In the embodiment, a plurality of scan signals are output from one scan driving circuit 130. According to an embodiment, a plurality of scan driving circuits may divide and output the plurality of scan signals.

[0059] The data driving circuit 140 receives the data control signal DCS and the image data signal RGB_DATA. The data driving circuit 140 converts the image data signal RGB_DATA into data signals DOUT1 to DOUTk, and outputs the data signals DOUT1 to DOUTk to the data lines DL1 to DLm. The data signals DOUT1 to DOUTk are analog voltages corresponding to the grayscale values ​​of the image data signal RGB_DATA. In the present exemplary embodiment, "k" is a positive integer, and "k" is equal to m / 2.

[0060] The data output circuit 150 selectively electrically connects the plurality of channels CH1 to CHk of the data driving circuit 140 to the data lines DL1 to DLm in response to the first selection signal SEL1 and the second selection signal SEL2. For example, the data output circuit 150 electrically connects the channel CH1 to one of the data lines DL1 and DL2 in response to the first selection signal SEL1, and electrically connects the channel CHk to one of the data lines DLm-1 and DLm in response to the second selection signal SEL2.

[0061] In an exemplary embodiment, among the data lines, odd data lines DL1, DL3, ..., DLm-1 connected to the first pixel PXa are referred to as 'first data lines', and even data lines DL2, DL4, ..., DLm connected to the second pixel PXb are referred to as 'second data lines'.

[0062] For example, the data output circuit 150 applies the data signals DOUT1 to DOUTk to the first data lines DL1, DL3, ..., DLm-1 during the valid period of the first selection signal SEL1, and applies the data signals DOUT1 to DOUTk to the second data lines DL2, DL4, ..., DLm during the valid period of the second selection signal SEL2.

[0063] The data output circuit 150 is in a predetermined area of ​​the display substrate DP adjacent to the data driving circuit 140 , or on a separate circuit board.

[0064] The data output circuit 150 includes a plurality of switch transistors ST1 to STm corresponding to the data lines DL1 to DLm, respectively. Each of the switch transistors ST1 to STm includes a first electrode connected to a corresponding channel among the channels CH1 to CHk, a second electrode connected to a corresponding data line among the data lines DL1 to DLm, and a gate electrode connected to a corresponding selection signal among the first selection signal SEL1 and the second selection signal SEL2.

[0065] Among the switching transistors ST1 to STm, odd-numbered transistors are respectively connected to the first data lines DL1, DL3, ..., DLm-1, and operate in response to the first selection signal SEL1. Among the switching transistors ST1 to STm, even-numbered transistors are respectively connected to the second data lines DL2, DL4, ..., DLm, and operate in response to the second selection signal SEL2.

[0066] For example, the data signal D1 output from the data driving circuit 140 through the channel CH1 is applied to one of the data lines DL1 and DL2 through the data output circuit 150, and the data signal Dm is applied to one of the data lines DLm-1 and DLm through the data output circuit 150. The data driving circuit 140 may drive two data lines using the data signal output through one channel.

[0067] The power supply 160 receives the voltage control signal VCS from the driving controller 120 and applies the first driving voltage ELVDD and the second driving voltage ELVSS to the pixel circuit 110. In addition to the pixel circuit 110, the power supply 160 also generates various voltages to the scan driving circuit 130 and the data driving circuit 140. For example, the power supply 160 may generate a scan-on voltage and a scan-off voltage for the operation of the scan driving circuit 130.

[0068] Figure 2 It is shown Figure 1 1 and 110. Figure 2 , the pixel circuit 110 includes a plurality of pixels PXa11 to PXbnm. Figure 1 , the pixels of the pixel circuit 110 are shown as a first pixel PXa connected to a first data line and a second pixel PXb connected to a second data line. Figure 2 , the reference numerals of the first pixel and the second pixel of the pixel circuit 110 are represented differently to distinguish the data line and the scan line connected to each pixel. For example, the first pixel PXa11 is connected to the scan line SL1 and the first data line DL1, and the second pixel PXb12 is connected to the scan line SL1 and the second data line DL2.

[0069] Among the pixels PXa11 to PXbnm, the first pixels PXa11 to PXanm-1 are connected to odd data lines, namely, the first data lines DL1, DL3, ..., DLm-1. Among the pixels PXa11 to PXbnm, the second pixels PXb12 to PXbnm are connected to even data lines, namely, the second data lines DL2, DL4, ..., DLm.

[0070] The first pixels and the second pixels adjacent to each other in the second direction DR2 are connected to one scan line in common. For example, the first pixels PXa11 to PXa1m-1 and the second pixels PXb12 to PXb1m are connected to the scan line SL1. The first pixels PXa21 to PXa2m-1 and the second pixels PXb22 to PXb2m are connected to the scan line SL2. The first pixels PXan1 to PXanm-1 and the second pixels PXbn2 to PXbnm are connected to the scan line SLn, and so on.

[0071] Figure 3 is a timing diagram illustrating a method of driving a display device according to an exemplary embodiment of the present disclosure. Figure 3 , the data driving circuit 140 outputs data signals DOUT1 to DOUTk.

[0072] The driving controller 120 outputs a first selection signal SEL1 and a second selection signal SEL2. In an exemplary embodiment, the first selection signal SEL1 and the second selection signal SEL2 have the same frequency, and the effective period AP1 of the first selection signal SEL1 does not overlap with the effective period AP2 of the second selection signal SEL2. The effective period AP1 of the first selection signal SEL1 may be shorter than the ineffective period IP1 of the first selection signal SEL1. Similarly, the effective period AP2 of the second selection signal SEL2 may be shorter than the ineffective period IP2 of the second selection signal SEL2.

[0073] When the switching transistors ST1, ST3, ..., STm-1 are turned on in the effective period AP1 of the first selection signal SEL1, the data signals DOUT1 to DOUTk are applied to the first data lines DL1, DL3, ..., DLm-1. When the switching transistors ST2, ST4, ..., STm are turned on in the effective period AP2 of the second selection signal SEL2, the data signals DOUT1 to DOUTk are applied to the second data lines DL2, DL4, ..., DLm.

[0074] When the scan signal S1 transmitted from the scan driving circuit 130 through the scan line SL1 is activated to a predetermined level (e.g., a low level), the first pixels PXa11, PXa13, ..., PXa1m-1 receive the data signals DOUT1 to DOUTk through the first data lines DL1, DL3, ..., DLm-1. For example, when the data driving circuit 140 sequentially outputs the data signal DOUT1 through the channel CH1 in the order of Da1, Db1, Da2, Db2, Da3, Db3, ..., Dan, and Dbn in one frame F, the first data signal D1 applied to the first data line DL1 is Da1, Da2, Da3, ..., and Dan, and the second data signal D2 applied to the first data line DL1 is Db1, Db2, Db3, ..., and Dbn.

[0075] Therefore, the first pixels PXa11, PXa21, ..., PXan1 connected to the first data line DL1 and sequentially arranged in the second direction DR2 receive Da1, Da2, ..., Dan as the first data signal D1, respectively. In addition, the second pixels PXb12, PXb22, ..., PXbn2 connected to the second data line DL2 and sequentially arranged in the second direction DR2 receive Db1, Db2, ..., Dbn as the second data signal D2.

[0076] Since the first and second pixels adjacent to each other in the second direction DR2 are connected to one scan line, the number of scan lines SL1 to SLn can be half (1 / 2) the number of the first pixels PXa11, PXa21, ..., PXan1 and the second pixels PXb12, PXb22, ..., PXbn2 arranged in the second direction DR2.

[0077] Since the pixel circuit 110 of the present disclosure requires ½ the number of scan lines compared to a pixel circuit in which one scan line is connected to one pixel, the area of ​​the scan driving circuit 130 can be reduced.

[0078] like Figure 3As shown, there is a blank time BT as an invalid period between the effective period of the scan signal S1 and the effective period of the scan signal S2. Therefore, the scan progress time SOT corresponding to the effective period of the scan signal S1 can be long enough. For example, the scan progress time SOT of each of the scan signals S1 to Sn can be equal to one horizontal cycle. Since the scan progress time SOT of each of the scan signals S1 to Sn can be sufficiently extended, the time required for writing the first pixel PXa11, PXa21, ..., PXan1 and the second pixel PXb12, PXb22, ..., PXbn2 to write the data signals DOUT1 to DOUTk can be sufficient.

[0079] Figure 4 It is shown by Figure 1 An example of the color of a pixel output is shown in FIG. Figure 4 , connected to the data line DL1 and sequentially arranged in the second direction DR2 of the first pixel PXa (reference Figure 1 ) displays red (R) color. The second pixels PXb (reference pixel) connected to the data line DL2 and sequentially arranged in the second direction DR2 Figure 1 ) displays a blue (B) color. The first pixel PXa and the second pixel PXb, which are respectively connected to the data line DL3 and the data line DL4 and are sequentially arranged in the second direction DR2, display a green (G) color. Similarly, the first pixel PXa, which is connected to the data line DL5 and is sequentially arranged in the second direction DR2, displays a blue (B) color. The second pixel PXb, which is connected to the data line DL6 and is sequentially arranged in the second direction DR2, displays a red (R) color. The first pixel PXa and the second pixel PXb, which are respectively connected to the data line DL7 and the data line DL8 and are sequentially arranged in the second direction DR2, display a green (G) color, and so on.

[0080] Figure 4 The first pixel PXa and the second pixel PXb displaying the red (R) color, the green (G) color, and the blue (B) color are shown, but Figure 4 A pixel displaying a white (W) color may be further included.

[0081] Figure 5A is a timing diagram showing the operation of the display device in the i-th frame. Figure 5B is a timing diagram showing the operation of the display device in the (i+1)th frame.

[0082] Reference Figure 4 and Figure 5ADuring the data holding period of the first data lines DL1 and DL3, the first pixel PXa connected to the data line DL1 displaying a red (R) color and the first pixel PXa connected to the data line DL3 displaying a green (G) color receive the data signals D1 and D3 in response to the scan signals SL1 to SLn.

[0083] During the data writing period of the second data lines DL2 and DL4, the second pixel PXb connected to the data line DL2 displaying blue (B) color and the second pixel PXb connected to the data line DL4 displaying green (G) color receive data signals D2 and D4 in response to the scan signals SL1 to SLn.

[0084] Specifically, in the pixel displaying the green (G) color, the first pixel PXa connected to the data line DL3 and the second pixel PXb connected to the data line DL4 receive the data signals D3 and D4 during the data holding period and the data writing period, respectively. Although the data signal DOUT2 having the same grayscale is applied to the data lines DL3 and DL4, due to leakage current, there may be a slight difference between the data signal D3 in the data holding period and the data signal D4 in the data writing period. That is, since the first pixel PXa arranged in the odd row receives the data signal D1, D3, ..., Dm-1 during the data holding period and the second pixel PXb arranged in the even row receives the data signal D2, D4, ..., Dm in the data writing period, the user may perceive the brightness difference expressed as a horizontal line.

[0085] like Figure 5A As shown, in the i-th frame, the first pixels PXa arranged in the odd rows receive data signals D1, D3, ..., Dm-1 during the data holding period, and the second pixels PXb arranged in the even rows receive data signals D2, D4, ..., Dm during the data writing period. Figure 5B As shown, in the i+1th frame, the first pixels PXa arranged in odd rows receive data signals D1, D3, ..., Dm-1 during the data writing period, and the second pixels PXb arranged in even rows receive data signals D2, D4, ..., Dm during the data holding period.

[0086] As described above, at each frame, the first pixel PXa and the second pixel PXb alternately receive the data signals D1 to Dm during the data holding period and the data writing period, and the brightness difference expressed as a horizontal line may be reduced or prevented.

[0087] Figure 6 is a waveform diagram showing changes in the first selection signal SEL1 and the second selection signal SEL2 in consecutive frames. Figure 6, when the i-th frame Fi starts, the first selection signal SEL1 is activated to a low level, and then the second selection signal SEL2 is activated to a low level.

[0088] In the i-th frame Fi, the scan progress time SOT of each of the scan signals S1 to Sn overlaps with the effective period AP2 of the second selection signal SEL2. In an exemplary embodiment, the scan progress time SOT of each of the scan signals S1 to Sn may be equal to or longer than the effective period AP2 of the second selection signal SEL2.

[0089] When the (i+1)th frame Fi+1 temporally continuous with the i-th frame Fi starts, the second selection signal SEL2 is activated to a low level, and then the first selection signal SEL1 is activated to a low level.

[0090] The scan progress time SOT of each of the scan signals S1 to Sn overlaps with the effective period AP1 of the first selection signal SEL1 in the (i+1)th frame Fi+1. In an exemplary embodiment, the scan progress time SOT of each of the scan signals S1 to Sn may be equal to or longer than the effective period AP1 of the first selection signal SEL1.

[0091] Figure 7 yes Figure 1 A view of an example of a layout of pixels is shown in FIG. Figure 7 The pixel circuit 110a shown in FIG. Figure 1 and Figure 4 The pixels PXa and PXb of the pixel circuit 110 shown in FIG. 1 are connected to the data lines DL1 to DLm in the same manner. That is, the first pixel PXa (refer to FIG. 1 ) connected to the data line DL1 and sequentially arranged in the second direction DR2 Figure 1 ) displays red (R) color. The second pixels PXb (reference pixel) connected to the data line DL2 and sequentially arranged in the second direction DR2 Figure 1 ) displays a blue (B) color. The first pixel PXa and the second pixel PXb connected to the data line DL3 and the data line DL4, respectively, and arranged sequentially in the second direction DR2 display a green (G) color. Similarly, the first pixel PXa connected to the data line DL5 and arranged sequentially in the second direction DR2 displays a blue (B) color. The second pixel PXb connected to the data line DL6 and arranged sequentially in the second direction DR2 (reference Figure 1 ) displays a red (R) color. The first pixel PXa and the second pixel PXb, which are respectively connected to the data line DL7 and the data line DL8 and are sequentially arranged in the second direction DR2, display a green (G) color.

[0092] When viewed in plan view, Figure 7The pixels of the pixel circuit 110 a shown in FIG. 1 overlap with the data lines DL1 to DLm and do not overlap with the scan lines SL1 to SLn, however, they should not be limited thereto or thereby.

[0093] Figure 7 Each of the pixels of the pixel circuit 110a shown in FIG. 1 has a rhombus shape, and Figure 7 The pixels of the pixel circuit 110a shown in FIG. 1 are arranged in a zigzag shape. In an embodiment, the pixels of the pixel circuit 110a may have various shapes and may be arranged in various ways. In addition, each of the pixels may have a rhombus shape with rounded corners.

[0094] exist Figure 7 In the exemplary embodiment shown in , the area of ​​the pixel displaying the red (R) color and the blue (B) color is larger than the area of ​​the pixel displaying the green (G) color. In an embodiment, the pixels of the pixel circuit 110a may have the same area or different areas for each color.

[0095] exist Figure 7 In the exemplary embodiment shown in FIG. 1 , the scan lines SL1 to SLn extend in the first direction DR1 and have a zigzag form. In an embodiment, the scan lines SL1 to SLn may be in a straight line in the first direction to be substantially parallel to each other and may partially overlap with the pixels.

[0096] Figure 7 The first pixel PXa and the second pixel PXb displaying red (R), green (G), and blue (B) colors are shown as representative examples. In an embodiment, in addition to the red (R), green (G), and blue (B) colors, the first pixel PXa and the second pixel PXb may further display white (W).

[0097] By way of summary and review, the present disclosure provides a display device in which an area of ​​a non-display region is reduced and a method of driving the display device in which an area of ​​a non-display region is reduced.

[0098] According to the above, the display device includes a data output circuit in which the number of ICs of the data driving circuit can be reduced. Specifically, since the first pixel arranged in the first row and the second pixel arranged in the second row are connected to one scan line in common, the number of scan lines required for the display device can be reduced to half. Thus, the circuit area of ​​the scan circuit can be reduced, thereby reducing the non-display area.

[0099] Example embodiments have been disclosed herein, and although specific terms are used, such specific terms are used only in a general and descriptive sense and are to be interpreted only in a general and descriptive sense and are not intended to be limiting. In some cases, as will be apparent to one of ordinary skill in the art upon filing this application, features, characteristics, and / or elements described in conjunction with specific embodiments may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments, unless otherwise expressly indicated. Therefore, those skilled in the art will appreciate that various changes in form and detail may be made without departing from the spirit and scope of the invention as set forth in the appended claims.

Claims

1. A display device, comprising: A pixel circuit comprising a first pixel connected to a first data line and a scan line and a second pixel connected to a second data line and the scan line; A scan driving circuit, used for outputting a scan signal to drive the scan line; A data driving circuit, used for outputting a data signal; a data output circuit for applying the data signal to the first data line and the second data line in response to a first selection signal and a second selection signal; as well as a drive controller for controlling the scan drive circuit and the data drive circuit, and for outputting the first selection signal and the second selection signal, wherein the effective period of the first selection signal does not overlap with the effective period of the second selection signal, and the scanning time of the scan signal overlaps with one of the effective period of the first selection signal and the effective period of the second selection signal, wherein when the first frame starts, the second selection signal is activated after the first selection signal is activated, and the scanning time of the scanning signal overlaps with the effective period of the second selection signal, and Wherein, when a second frame continuing from the first frame starts, the first selection signal is activated after the second selection signal is activated, and the scanning progress time of the scanning signal overlaps with the effective period of the first selection signal.

2. The display device according to claim 1, wherein the scan line extends in a first direction, the first data line and the second data line extend in a second direction crossing the first direction and are spaced apart from each other, and the first pixel and the second pixel are sequentially arranged in the second direction.

3. The display device according to claim 2, wherein: The first data line is adjacent to a first side of the first pixel and the second pixel, and The second data line is adjacent to second sides of the first pixel and the second pixel.

4. The display device according to claim 2, wherein: The first pixel in the first column is a red pixel, The second pixel in the first column is a blue pixel, and Each of the first pixel and the second pixel in a second column adjacent to the first column is a green pixel.

5. The display device according to claim 1, wherein the scanning performance time of the scanning signal is equal to one horizontal period.

6. The display device according to claim 1, wherein: The effective period of the first selection signal is shorter than the ineffective period of the first selection signal, and The effective period of the second selection signal is shorter than an ineffective period of the second selection signal.

7. The display device according to claim 1, wherein the data output circuit comprises: a first switch transistor for applying the data signal to the first data line in response to the first selection signal; and The second switch transistor is configured to apply the data signal to the second data line in response to the second selection signal.

8. A display device comprising: A pixel circuit comprising a first pixel connected to a first data line and a scan line and a second pixel connected to a second data line and the scan line; A scan driving circuit, used for outputting a scan signal to drive the scan line; A data driving circuit, used for outputting a data signal; a data output circuit for applying the data signal to the first data line in response to a first selection signal and applying the data signal to the second data line in response to a second selection signal; as well as a drive controller for controlling the scan drive circuit and the data drive circuit and outputting the first selection signal and the second selection signal, wherein the drive controller sequentially activates the first selection signal and the second selection signal, and activates the scan signal when the second selection signal is activated, wherein when the first frame starts, the second selection signal is activated after the first selection signal is activated, and the scanning time of the scanning signal overlaps with the effective period of the second selection signal, and Wherein, when a second frame continuing from the first frame starts, the first selection signal is activated after the second selection signal is activated, and the scanning progress time of the scanning signal overlaps with the effective period of the first selection signal.

9. The display device according to claim 8, wherein the scan line extends in a first direction, the first data line and the second data line extend in a second direction crossing the first direction and are arranged spaced apart from each other, and the first pixel and the second pixel are sequentially arranged in the second direction.

10. The display device according to claim 9, wherein: The first data line is adjacent to a first side of the first pixel and the second pixel, and The second data line is disposed adjacent to second sides of the first pixel and the second pixel.

11. The display device according to claim 9, wherein the first pixels arranged in a first column are red pixels, the second pixels arranged in the first column are blue pixels, and each of the first pixel and the second pixel arranged in a second column adjacent to the first column is a green pixel.

12. The display device according to claim 9, wherein a scanning duration of the scanning signal is equal to one horizontal period.

13. The display device according to claim 9, wherein the data output circuit comprises: a first switch transistor for applying the data signal to the first data line in response to the first selection signal; and The second switch transistor is configured to apply the data signal to the second data line in response to the second selection signal.

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