Power amplifier circuit

Abstract

The present invention provides a power amplifier circuit that can connect appropriate capacitors according to the operation status regardless of the control method of the power supply voltage, and can reduce the withstand voltage of each capacitor. The power amplifier circuit includes: an amplifier that amplifies the RF signal; and a bypass capacitor unit connected to a power supply terminal for supplying the power supply voltage to the amplifier, and the bypass capacitor unit includes: a first capacitor, one end of which is connected to the power supply path; a second capacitor, one end of which is connected to the other end of the first capacitor and the other end of which is connected to the ground side; and a first switch circuit, one end of which is connected to the other end of the first capacitor and one end of the second capacitor, and the other end of which is connected to the ground, and switches the connection between the other end of the first capacitor and the ground.

Description

Technical Field

[0001] The invention relates to a power amplifier circuit. Background Art

[0002] In mobile communication terminals such as cellular phones, a power amplifier circuit is used to amplify the RF (Radio Frequency) signal transmitted to a base station. In order to improve the efficiency of the power amplifier circuit, an ET (Envelope Tracking) control is known that dynamically controls the power supply voltage according to the level of the RF signal.

[0003] For example, Patent Document 1 discloses a power amplifier circuit including: an envelope tracker that controls a power supply voltage based on an envelope of an RF signal; a plurality of amplifiers that are supplied with power supply voltage from the envelope tracker; and a bypass capacitor that is connected between the envelope tracker and each amplifier at one end and grounded at the other end and can be switched on / off by a switch. In this power amplifier circuit, the bypass capacitor connected to an unused amplifier is disconnected by a switch, thereby reducing the capacitive load of the envelope tracker and improving the efficiency of the power amplifier circuit.

[0004] Prior Art Literature

[0005] Patent Literature

[0006] Patent Document 1: U.S. Patent No. 8598950

[0007] In the structure of Patent Document 1, the capacitance value is determined by the combined capacitance of each capacitor by turning on / off the switch. Therefore, when the power supply voltage is high, it is necessary to ensure the withstand voltage by one capacitor, so the withstand voltage has to be increased. Summary of the invention

[0008] Problems to be solved by the invention

[0009] Therefore, an object of the present invention is to provide a power amplifier circuit capable of switching between a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control and capable of lowering the withstand voltage of a capacitor element compared to Patent Document 1.

[0010] Means for solving problems

[0011] A power amplifier circuit involved in one embodiment of the present invention is characterized in that it comprises: a bipolar transistor for amplifying an RF signal; and a bypass capacitor portion connected between a power supply terminal connected to the collector terminal of the bipolar transistor and the collector terminal, the bypass capacitor portion including a first capacitor, a second capacitor and a first switching circuit, one end of the first capacitor being connected to the power supply terminal, the other end of the first capacitor being connected to one end of the second capacitor and one end of the first switching circuit, the other end of the second capacitor being connected to ground, the other end of the first switching circuit being connected to ground, and the first switching circuit switching the connection / disconnection of the other end of the first capacitor to ground by switching on and off.

[0012] According to this aspect, by changing the capacitance value of the bypass capacitor according to the control method of the power supply voltage, it is possible to connect appropriate capacitors according to the operation status, and the withstand voltage of each capacitor can be reduced.

[0013] Effects of the Invention

[0014] According to the present invention, regardless of the control method of the power supply voltage, appropriate capacitors can be connected according to the operation status, and the withstand voltage of each capacitor can be reduced. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 It is a schematic configuration diagram of a power amplifier circuit 100A according to the first embodiment.

[0016] Figure 2 This is a diagram for explaining the operation of the power amplifier circuit 100A in the APT control mode.

[0017] Figure 3 This is a diagram for explaining the operation of the power amplifier circuit 100A in the ET control mode.

[0018] Figure 4 It is a schematic configuration diagram of a power amplifier circuit 100A-1 according to a first modification of the first embodiment.

[0019] Figure 5 It is a schematic configuration diagram of a power amplifier circuit 100B according to the second embodiment.

[0020] Figure 6 It is a schematic configuration diagram of a power amplifier circuit 100B-1 according to a first modification of the second embodiment.

[0021] Figure 7 It is a schematic configuration diagram of a power amplifier circuit 100B-2 according to a second modification of the second embodiment.

[0022] Figure 8It is a schematic configuration diagram of a power amplifier circuit 100B-3 according to a third modification of the second embodiment.

[0023] Fig. 9 It is a schematic configuration diagram of a power amplifier circuit 100C according to the third embodiment.

[0024] Fig.10 It is a schematic configuration diagram of a power amplifier circuit 100C-1 according to a first modification of the third embodiment.

[0025] Fig.11 It is a schematic configuration diagram of a power amplifier circuit 100C-2 according to a second modification of the third embodiment.

[0026] Fig.12 It is a schematic configuration diagram of a power amplifier circuit 100C-3 according to a third modification of the third embodiment.

[0027] Fig.13 It is a schematic configuration diagram of a power amplifier circuit 100C-4 according to a fourth modification of the third embodiment.

[0028] Fig.14 It is a schematic configuration diagram of a power amplifier circuit 100C-5 according to a fifth modification of the third embodiment.

[0029] Fig.15 It is a schematic configuration diagram of a power amplifier circuit 100D according to the fourth embodiment.

[0030] Fig.16 It is a schematic configuration diagram of a power amplifier circuit 100D-1 according to a first modification of the fourth embodiment.

[0031] Fig.17 It is a schematic configuration diagram of a power amplifier circuit 100D-2 according to a second modification of the fourth embodiment.

[0032] Fig.18 It is a schematic configuration diagram of a power amplifier circuit 100E according to the fifth embodiment.

[0033] Description of Reference Numerals

[0034] 100A~D…power amplifier circuit, 110…control IC, C1~C5…capacitors, SW1, SW2, SW3…switches, PA1, PA2…power amplifier, Vcc, Vcc1, Vcc2…power supply terminals. DETAILED DESCRIPTION

[0035] The preferred embodiments of the present invention will be described with reference to the attached drawings. (In addition, in each figure, the parts marked with the same reference numerals have the same or similar structures.)

[0036] [First embodiment]

[0037] (1) Structure

[0038] Figure 1 It is a schematic configuration diagram of a power amplifier circuit 100A according to the first embodiment.

[0039] The power amplifier circuit 100A amplifies the power of the input signal RFin to the level required for transmission to the base station in a mobile communication terminal such as a cellular phone, and outputs it as an amplified signal RFout. A power supply terminal Vcc is provided in the power amplifier circuit 100A. The power supply terminal Vcc is selectively supplied with a power supply voltage from an ET modulator (ETMOD) or a buck DCDC converter (BuckConverter). Here, the ET modulator is a power supply voltage supply circuit for the ET control mode, and the buck DCDC converter is a power supply voltage supply circuit for the APT control mode. When the power supply terminal Vcc is connected to the ET modulator, the power amplifier circuit 100A performs an operation based on the ET control mode. When the power supply terminal Vcc is connected to the buck DCDC converter, the power amplifier circuit 100A performs an operation based on the APT control mode. In addition, although a buck DCDC converter is used here, a buck-boost DCDC converter may also be used.

[0040] like Figure 1 As shown, the power amplifier circuit 100A includes, for example, a power amplifier PA1, a capacitor C1 (first capacitor), a capacitor C2 (second capacitor), and a switch SW1 (first switch circuit). The power amplifier PA1 is configured to include, for example, a transistor (amplifier) ​​that receives an input signal RFin, amplifies it, and outputs an amplified signal RFout. The transistor may be a bipolar transistor or a field effect transistor (FET). The power amplifier PA1 is connected to a power supply terminal Vcc, for example, via a choke inductor not shown.

[0041] Capacitor C1, capacitor C2 and switch SW1 constitute a bypass capacitor unit. The bypass capacitor unit is configured to change the capacitance value according to the control mode of the power supply voltage supplied to the power supply terminal Vcc. One end of the capacitor C1 is connected to the wiring between the power supply terminal Vcc and the power amplifier PA1. The capacitance value of the capacitor C1 (hereinafter referred to as "C1") is, for example, about 100nF. One end of the capacitor C2 is connected to the other end of the capacitor C1, and the other end of the capacitor C2 is connected to the ground. The capacitance value of the capacitor C2 (hereinafter referred to as "C2") is, for example, about 100pF. Here, C1 may also be larger than C2. In addition, it is preferable that C1 is sufficiently larger than C2.

[0042] Here, “sufficiently large” may mean, for example, that the capacitance value is approximately 10 times larger or more.

[0043] One end of the switch SW1 is connected to the connection between the other end of the capacitor C1 and one end of the capacitor C2. The switch SW1 may be formed of, for example, a FET. The switch SW1 switches the connection between the other end of the capacitor C1 and the ground according to the control mode of the power amplifier circuit 100A.

[0044] The switch SW1 is disconnected in the case of the ET control mode, for example, and the other end of the capacitor C1 is not connected to the ground. Therefore, in the case of the ET control mode, the series circuit of the capacitors C1 and C2 is connected to the connection between the power supply terminal Vcc and the power amplifier PA1. Furthermore, since "C1>>C2", it can be said that the combined capacitance value of the series circuit is substantially equal to C2. In an example structure, in the ET control mode, it becomes about 100pF.

[0045] The switch SW1 is turned on in the APT control mode, for example, and the other end of the capacitor C1 is connected to the ground. Therefore, in the APT control mode, the capacitor C1 is connected to the connection between the power supply terminal Vcc and the power amplifier PA1. In an example structure, in the APT control mode, the capacitor C1 is 100 nF.

[0046] (2) Action

[0047] Figure 2 This is a diagram for explaining the operation of the power amplifier circuit 100A in the APT control mode. Figure 2 The diagram shown in the upper stage of FIG. 1 is a schematic diagram showing the temporal change of the output voltage Vpout of the power amplifier PA1 . Figure 2 The middle section is a schematic diagram showing the output of a step-down DCDC converter. Figure 2 The diagram shown in the lower stage of FIG. 1 is a schematic diagram showing the temporal change of the voltage generated at the power supply terminal Vcc when the power supply capacitance inside the module is small.

[0048] like Figure 2As shown, the output voltage Vpout of the power amplifier PA1 becomes an output signal proportional to the amplitude change of the modulation signal. In the case of the APT control mode, according to the nonlinearity of the transistor constituting the power amplifier PA1, the magnitude of the current flowing into the power amplifier PA1 from the power terminal Vcc varies in the same manner as the envelope of the modulation signal. There are parasitic components such as parasitic inductance in the wiring connecting the power amplifier PA1 to the power supply (in this case, the step-down DCDC converter), and the voltage generated by the parasitic components is generated at the power terminal Vcc. The larger the output amplitude of the power amplifier PA1, the lower the voltage variation generated at the power terminal Vcc. As a result, the maximum output level, gain, and linear characteristics of the power amplifier PA1 are affected. In this embodiment, in order to avoid this problem, the switch SW1 is turned on in the APT control mode, thereby making the capacitance value of the bypass capacitor connected to the power terminal Vcc sufficiently large. As a result, the voltage variation generated at the power terminal Vcc can be reduced.

[0049] Figure 3 This is a diagram for explaining the operation of the power amplifier circuit 100A in the ET control mode. Figure 3 The diagram shown in the upper stage of FIG. 1 is a schematic diagram showing the temporal change of the output voltage Vpout of the power amplifier PA1 . Figure 3 The diagram shown in the lower stage of FIG. 1 is a schematic diagram showing the temporal change of the voltage generated at the power supply terminal Vcc.

[0050] like Figure 3 As shown in FIG. 1 , the output voltage Vpout of the power amplifier PA1 becomes an output signal proportional to the amplitude change of the modulation signal. The voltage variation of the power supply terminal Vcc in the ET control mode is as follows: Figure 3 As shown, the output voltage Vpout varies according to the envelope of the ET power supply connected to the power supply terminal Vcc. Therefore, the above-mentioned phenomenon that the voltage of the power supply terminal Vcc decreases as the output voltage Vpout of the power amplifier PA1 increases does not occur in the ET control mode. Therefore, in this embodiment, the switch SW1 is disconnected in the ET control mode so that the ET control speed is increased, thereby fully reducing the capacitance value of the bypass capacitor connected to the power supply terminal Vcc.

[0051] As described above, in the present embodiment, in the ET control mode, the switch SW1 is disconnected, so that the series connection capacitance (about C2) of the capacitor C1 and the capacitor C2 is connected to the power supply terminal Vcc. In addition, in the APT control mode, the switch SW1 is turned on, so that the large-capacitance capacitor C1 is connected to the power supply terminal Vcc. In this way, the capacitance value of the bypass capacitor portion is changed according to the control method of the power supply voltage. Therefore, the quality of the amplified signal is improved. In addition, as described above, in order to fully suppress the voltage fluctuation generated at the power supply terminal Vcc during the APT control mode, it is preferable that C1 and C2 have a relationship of "C1>>C2" (C1 is sufficiently larger than C2). Specifically, a size of about 10 times or more of the capacitance value of C2 is used for the capacitance value of C1.

[0052] [First Modification of First Embodiment]

[0053] Figure 4 1 is a schematic diagram of a power amplifier circuit 100A-1 according to a first modification of the first embodiment. In the power amplifier circuit 100A-1, the switch SW1 is formed of a FET.

[0054] [Second embodiment]

[0055] Figure 5 1 is a schematic diagram of a power amplifier circuit 100B according to the second embodiment. In the following, the differences between the second embodiment and the first embodiment will be described, and the description of the common matters between the two will be appropriately omitted.

[0056] The power amplifier circuit 100B includes a control IC 110. The control IC 110 receives a digital IF (interface) as a control signal from the outside of the power amplifier circuit 100B, and controls the power amplifier PA1 and the like based on the digital IF. More specifically, the control IC 110 turns on SW1 when the APT is in operation, and turns off SW1 when the ET is in operation, based on the digital IF. Furthermore, the control IC 110 adjusts the current value of the bias current Ib of the power amplifier PA1 according to the operation mode.

[0057] like Figure 5 As shown, in the power amplifier circuit 100B, the switch SW1 is installed in the control IC 110. For example, the control IC 110 can be manufactured using a CMOS process, and the switch SW1 can be formed by a MOSFET. In addition, the switch SW1 and the power amplifier PA1 can also be formed in the same integrated circuit. In this case, a BiFET process, a SiGeBiCMOS process, etc. can also be applied.

[0058] [First Modification of Second Embodiment]

[0059] Figure 6FIG. 1 is a schematic diagram of a power amplifier circuit 100B-1 according to a first variation of the second embodiment. As described above, C1 and C2 satisfy the relationship “C1>>C2”. Therefore, Figure 6 As shown, the capacitor C2 may also be installed in the control IC 110 .

[0060] As described above, in the power amplifier circuit 100B-1, by installing the switch SW1 and the capacitor C2 in the control IC 110, a dedicated component for the switch function is not required, and the number of components can be reduced and the miniaturization can be achieved. As a result, the wiring for connecting the capacitor C2 and the switch is reduced, and the parasitic resistance and parasitic inductance can be reduced.

[0061] [Second Modification of Second Embodiment]

[0062] Figure 7 1 is a schematic diagram of a power amplifier circuit 100B-2 according to a second variation of the second embodiment. The power amplifier circuit 100B-2 corresponds to a plurality of communication frequency bands (multi-band) and includes a band selection switch IC 120. In the power amplifier circuit 100B-2, a switch SW1 and a capacitor C2 are mounted in the band selection switch IC 120.

[0063] The frequency band selection switch IC120 has a switch SWB for selectively connecting the output end of the power amplifier PA1 to the output terminal RFout1, RFout2, or RFout3 according to the digital IF supplied from the outside of the power amplifier circuit 100B-2. The output terminals RFout1, RFout2, or RFout3 correspond to given communication frequency bands (frequency bands), respectively. In addition, in this example, although the power amplifier circuit 100B-2 corresponds to three communication frequency bands, the number of communication frequency bands corresponding to the power amplifier circuit 100B-2 is not particularly limited, and it can also correspond to one, two, or more than four communication frequency bands. By adopting this structure, the switch and capacitor C2 for switching the capacitance value in the use structure can also be built into the frequency band selection switch, so that the wiring of the digital IF in the module can be miniaturized and reduced.

[0064] [Third Modification of Second Embodiment]

[0065] Figure 8This is a schematic structural diagram of a power amplifier circuit 100B-3 involved in the third variant of the second embodiment. In the power amplifier circuit 100B-3, the switch SW1 is installed in the band selection switch IC120, and the capacitor C2 is not installed in the band selection switch IC120. The capacitor C2 can be composed of a parallel plate of a substrate, for example, or a chip capacitor formed by a surface mount component. By adopting this structure, a switch for switching the capacitance value can be built into the band selection switch, thereby miniaturizing and reducing the wiring of the digital IF in the module. By configuring C2 in the module, the optimal capacitance value can be changed according to the operation mode.

[0066] [Third Embodiment]

[0067] Fig. 9 1 is a schematic diagram of a power amplifier circuit 100C according to the third embodiment. In the following, differences between the third embodiment and the first embodiment will be described, and description of matters common to both will be appropriately omitted.

[0068] The bypass capacitor section of the power amplifier circuit 100C further includes a capacitor C3 (fourth capacitor). One end of the capacitor C3 is connected to the connection between the power supply terminal Vcc and the power amplifier PA1. The other end of the capacitor C3 is connected to the ground.

[0069] In the power amplifier circuit 100C, the switch SW1 is turned off in the ET control mode. Therefore, if the series capacitance of the capacitors C1 and C2 is set to the capacitor C12, the bypass capacitor in the ET control mode becomes the parallel capacitance of the capacitors C3 and C12. However, since "C1>>C2", it can actually be considered as the parallel capacitance of the capacitors C3 and C2.

[0070] In the power amplifier circuit 100C, the switch SW1 is turned on in the APT control mode. Thus, the bypass capacitor portion in the APT control mode becomes a parallel capacitor of the capacitors C3 and C1.

[0071] In the power amplifier circuit 100C, the capacitance value of the bypass capacitor can be fine-tuned by the capacitor C3. When the capacitance value of the capacitor C3 (hereinafter referred to as "C3") is small, the capacitor C3 can also be installed in the control IC110 in the same way as the capacitor C2. In this way, by adding the capacitor C3 for fine-tuning, for example, when there is a limitation on the capacitance value when the capacitor C2 is integrated, the design freedom of the optimal capacitance of the two control modes ET / APT can be increased. Furthermore, a switch (the third switch circuit) is added between the capacitor C3 and GND, and the composite capacitance of the capacitor C3, the capacitor C2 and the capacitor C1 can be adjusted by turning on / off. In addition, a switch can also be set in series with the capacitor C3 to further improve the freedom of adjustment.

[0072] In the third embodiment and the second embodiment (including the modified example), the switch SW1 is mounted in the control IC 110. However, for example, the control IC 110 and the power amplifier PA1 may be integrated into one IC. In this case, specifically, the IC may be composed of CMOS, SOICMOS, SiGe-BiCMOS, etc. In addition, the switch SW1 may be mounted on the IC side on which the power amplifier PA1 is mounted. In this case, the IC may be composed of BiFET, etc.

[0073] [First Modification of the Third Embodiment]

[0074] Fig.10 1 is a schematic diagram of a power amplifier circuit 100C-1 according to a first variant of the third embodiment. In the power amplifier circuit 100C-1, the switch SW1 is configured as an SPDT. The input end of the switch SW1 is connected to the ground. One output end of the switch SW1 is connected to one end of the capacitor C2, and the other output end is connected to the other end of the capacitor C2. By adopting this structure, the ground connected to the other end of the capacitor C1 and the ground connected to the other end of the capacitor C2 can be made common, and miniaturization can be achieved.

[0075] [Second variation of the third embodiment]

[0076] Fig.11 1 is a schematic diagram of a power amplifier circuit 100C-2 according to a second variation of the third embodiment. In the power amplifier circuit 100C-2, capacitors C1, C2 and switch SW1 are mounted in the band selection switch IC 120. By adopting this structure, since the bias capacitors C1, C2 and switch SW1 are built-in, it is no longer necessary to form unnecessary control lines and wiring in the module, so that the module can be miniaturized and crosstalk caused by increased wiring in the module can be reduced.

[0077] [Third Modification of Third Embodiment]

[0078] Fig.12 1 is a schematic diagram of a power amplifier circuit 100C-3 according to a third variation of the third embodiment. In the power amplifier circuit 100C-3, in addition to the capacitors C1, C2 and the switch SW1, a bias generating circuit 121 for supplying a bias current Ib to the power amplifier PA1 is also mounted in the band selection switch IC 120. By adopting this structure, the bias capacitor section of the capacitors C1, C2 and the switch SW1 can be built-in, and the band selection SW group and the control IC can be integrated into one IC, and it is no longer necessary to form useless control lines and wiring in the module, so that the module can be miniaturized and the crosstalk caused by the increase of wiring in the module can be reduced.

[0079] [Fourth Modification of the Third Embodiment]

[0080] Fig.13 This is a schematic diagram of a power amplifier circuit 100C-4 according to the fourth variant of the third embodiment. In the power amplifier circuit 100C-4, the switch SW1 and the capacitor C2 are installed in the band selection switch IC 120. By adopting this structure, the bias capacitor of the capacitor C2 and the switch SW1 can be built-in, and the band selection SW group can be integrated into one IC, and there is no need to form useless control lines and wiring in the module, so it can be miniaturized and reduce the crosstalk caused by the increase of wiring in the module. The capacitor C1 can adjust the characteristics of the power amplifier circuit by replacing the installed components according to the characteristics in the operation mode.

[0081] [Fifth Modification of the Third Embodiment]

[0082] Fig.14 This is a schematic diagram of a power amplifier circuit 100C-5 according to the fifth variant of the third embodiment. In the power amplifier circuit 100C-5, the switch SW1 is installed in the band selection switch IC 120. By adopting this structure, the bias capacitor of the switch SW1 can be built-in, and the band selection SW group and the control IC can be integrated into one IC, and there is no need to form useless control lines and wiring in the module, so that the module can be miniaturized and the crosstalk caused by the increase of wiring in the module can be reduced. The capacitors C1 and C2 can adjust the characteristics of the power amplifier circuit by replacing the installed components according to the characteristics in the operation mode.

[0083] [Fourth embodiment]

[0084] Fig.151 is a schematic diagram of a power amplifier circuit 100D according to the fourth embodiment. In the following, the differences between the fourth embodiment and the first embodiment will be described, and the description of the common matters between the two will be appropriately omitted.

[0085] The power amplifier circuit 100D further includes a power amplifier PA2 and a capacitor C4. The power amplifier circuit 100D amplifies the RF signal in two stages. Specifically, in the power amplifier circuit 100D, the power amplifier PA2 constitutes an amplifier at the initial stage (driver stage), and the power amplifier PA1 constitutes an amplifier at the subsequent stage (power stage).

[0086] The power amplifier circuit 100D is provided with power supply terminals Vcc1 and Vcc2. The power supply terminal Vcc1 corresponds to the power supply terminal Vcc in the first embodiment and is a power supply terminal to which a power supply voltage is selectively supplied from the ET modulator or the step-down DCDC converter. The power supply terminal Vcc2 is supplied with a power supply voltage from the step-down DCDC converter.

[0087] Capacitor C4 constitutes a bypass capacitor for power amplifier PA2. One end of capacitor C4 is connected to the wiring between power supply terminal Vcc2 and power amplifier PA2. The other end of capacitor C4 is connected to ground. The capacitance value of capacitor C4 (hereinafter referred to as "C4") is, for example, about 50pF. In this structure, since only the power amplifier PA2 of the second stage performs the switching of ET action and APT action, in the case of outputting high power, since no bias capacitor is constituted, even if it is a two-stage structure, the capacitance value can be adjusted only where it is needed, so it can be miniaturized into a module.

[0088] [First Modification of the Fourth Embodiment]

[0089] Fig.16 1 is a schematic diagram of a power amplifier circuit 100D-1 according to a first variant of the fourth embodiment. In the power amplifier circuit 100D-1, the switch SW1, capacitors C1 and C2 are mounted on the band selection switch IC. Similarly, since only the second-stage power amplifier PA2 performs switching between ET and APT operations, when outputting high power, since no bias capacitor is formed, even in a two-stage structure, the capacitance value can be adjusted only where necessary, and thus the circuit can be miniaturized into a module.

[0090] [Second variation of the fourth embodiment]

[0091] Fig.171 is a schematic diagram of a power amplifier circuit 100D-2 according to a second variant of the fourth embodiment. In the power amplifier circuit 100D-2, the switch SW1 is configured as an SPDT. The input end of the switch SW1 is connected to the ground. One output end of the switch SW1 is connected to one end of the capacitor C2, and the other output end is connected to the other end of the capacitor C2. By adopting this structure, the ground connected to the other end of the capacitor C1 and the ground connected to the other end of the capacitor C2 can be made common, and miniaturization can be achieved.

[0092] [Fifth embodiment]

[0093] Fig.18 1 is a schematic diagram of a power amplifier circuit 100E according to the fifth embodiment. The following describes the differences between the power amplifier circuit 100E according to the fifth embodiment and the power amplifier circuit 100C-4 according to the fourth variation of the third embodiment, and omits description of common items between the two.

[0094] The bypass capacitor section of the power amplifier circuit 100E further includes a capacitor C5 (third capacitor) and a switch SW3 (second switch circuit). One end of the capacitor C5 is connected to the other end of the capacitor C2, and the other end of the capacitor C5 is connected to the ground.

[0095] One end of the switch SW3 is connected to the connection between the other end of the capacitor C2 and one end of the capacitor C5. The switch SW3 can be composed of, for example, a FET. The switch SW3 switches the connection between the other end of the capacitor C2 and the ground according to the control mode of the power amplifier circuit 100E. Similarly, since only the second-stage power amplifier PA2 performs the switching between the ET action and the APT action, when a large power is output, since a bias capacitor section is not formed, even if it is a two-stage structure, the capacitance value can be adjusted only where it is needed, and thus it can be miniaturized into a module.

[0096] Various embodiments of the present invention have been described above. The power amplifier circuit according to the embodiment of the present invention is characterized in that it comprises: a bipolar transistor for amplifying an RF signal, and a bypass capacitor connected between a power supply terminal connected to the collector terminal of the bipolar transistor and the collector terminal, the bypass capacitor comprising a first capacitor, a second capacitor, and a first switch circuit, one end of the first capacitor is connected to the power supply terminal, the other end of the first capacitor is connected to one end of the second capacitor and one end of the first switch circuit, the other end of the second capacitor is connected to ground, the other end of the first switch circuit is connected to ground, and the first switch circuit switches the connection / disconnection of the other end of the first capacitor to ground by switching on and off.

[0097] According to this aspect, a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control can be switched without a complicated switch structure, and the withstand voltage of the capacitor element can be reduced.

[0098] The power amplifier circuit involved in other embodiments of the present invention is characterized in that it comprises: a bipolar transistor for amplifying an RF signal, and a bypass capacitor part connected between a power supply terminal connected to the collector terminal of the bipolar transistor and the collector terminal, the bypass capacitor part includes a first capacitor, a second capacitor and a first switching circuit, one end of the first capacitor is connected to the power supply terminal, the other end of the first capacitor is connected to the first terminal of the first switching circuit, the second terminal of the first switching circuit is connected to the ground, the third terminal of the first switching circuit is connected to the other end of the second capacitor, and the first switching circuit switches the connection / disconnection between the second capacitor and the ground by switching the path.

[0099] According to this aspect, a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control can be switched without a complicated switch structure, and the withstand voltage of the capacitor element can be reduced.

[0100] A power amplifier circuit according to another embodiment of the present invention is characterized in that it comprises: a field effect transistor for amplifying an RF signal, and a bypass capacitor portion connected between a power supply terminal connected to a drain terminal of the field effect transistor and a drain terminal, the bypass capacitor portion comprising a first capacitor, a second capacitor and a first switch circuit, one end of the first capacitor being connected to the power supply terminal, the other end being connected to one end of the second capacitor and one end of the first switch circuit, the other end of the second capacitor being connected to ground, the other end of the first switch circuit being connected to ground, and the first switch circuit switching the connection / disconnection of the other end of the first capacitor to ground by switching on and off.

[0101] According to this aspect, a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control can be switched without a complicated switch structure, and the withstand voltage of the capacitor element can be reduced.

[0102] A power amplifier circuit according to another embodiment of the present invention is characterized in that it comprises: a field effect transistor for amplifying an RF signal, and a bypass capacitor portion connected between a power supply terminal connected to a drain terminal of the field effect transistor and a drain terminal, the bypass capacitor portion being composed of a first capacitor, a second capacitor, and a first switch circuit, one end of the first capacitor being connected to the power supply terminal, the other end of the first capacitor being connected to a first terminal of the first switch circuit, the second terminal of the first switch circuit being connected to ground, the third terminal of the first switch circuit being connected to the other end of the second capacitor, and the first switch circuit switching connection / disconnection between the second capacitor and ground by switching a path.

[0103] According to this aspect, a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control can be switched without a complicated switch structure, and the withstand voltage of the capacitor element can be reduced.

[0104] In the above-mentioned power amplifier circuit, the capacitance value of the first capacitor may be larger than the capacitance value of the second capacitor.

[0105] According to this aspect, it becomes easy to change the capacitance value of the bypass capacitor portion according to the control method of the power supply voltage.

[0106] In the above-mentioned power amplifier circuit, the first switching circuit may not connect the other end of the first capacitor to the ground when the control mode is the ET (Envelope Tracking) control mode, and connect the other end of the first capacitor to the ground when the control mode is the APT (Average Power Tracking) control mode.

[0107] According to this aspect, the quality of the amplified signal can be improved by reducing the capacitance value of the bypass capacitor in the ET control mode and increasing the capacitance value of the bypass capacitor in the APT control mode.

[0108] In the above-mentioned power amplifier circuit, the other end of the second capacitor may be directly connected to the ground.

[0109] According to this aspect, the structure of the first switch circuit becomes simple.

[0110] In the above power amplifier circuit, the bypass capacitor unit may further include: a third capacitor having one end connected to the other end of the second capacitor and the other end connected to ground; and a second switch circuit that switches the connection between the other end of the second capacitor and the ground.

[0111] According to this aspect, a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control can be switched without a complicated switch structure, and the withstand voltage of the capacitor element can be reduced.

[0112] The above-mentioned power amplifier circuit may further include a fourth capacitor, one end of the fourth capacitor being connected to the power supply terminal, and the other end of the fourth capacitor being connected to the ground.

[0113] According to this aspect, a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control can be switched without a complicated switch structure, and the withstand voltage of the capacitor element can be reduced.

[0114] The above-mentioned power amplifier circuit may further include a third switch circuit for switching connection between the other end of the fourth capacitor and the ground.

[0115] According to this aspect, a decoupling capacitor suitable for ET control and a decoupling capacitor suitable for APT control can be switched without a complicated switch structure, and the withstand voltage of the capacitor element can be reduced.

[0116] In the above-mentioned power amplifier circuit, the first switch circuit may be configured to include a FET.

[0117] According to this aspect, the structure of the first switch circuit becomes simple.

[0118] The embodiments described above are intended to facilitate the understanding of the present invention and are not intended to limit or explain the present invention. The various elements and their configurations, materials, conditions, shapes, and sizes of the embodiments are not limited to the illustrated contents and can be appropriately changed. In addition, the structures shown in different embodiments can be partially replaced or combined with each other.

Claims

1. A power amplifier circuit, characterized in that: have: A bipolar transistor to amplify the RF signal; and a bypass capacitor connected between a power supply terminal connected to the collector terminal of the bipolar transistor and the collector terminal; The bypass capacitor unit includes a first capacitor, a second capacitor, and a first switch circuit. One end of the first capacitor is connected to the power supply terminal, and the other end of the first capacitor is connected to one end of the second capacitor and one end of the first switch circuit. The other end of the second capacitor is connected to the ground. The other end of the first switch circuit is connected to the ground. The first switch circuit switches on and off to switch between connection and disconnection of the other end of the first capacitor and the ground.

2. A power amplifier circuit, characterized in that: have: A bipolar transistor to amplify the RF signal; and a bypass capacitor connected between a power supply terminal connected to the collector terminal of the bipolar transistor and the collector terminal; The bypass capacitor unit includes a first capacitor, a second capacitor, and a first switch circuit. One end of the first capacitor is connected to the power supply terminal, and the other end of the first capacitor is connected to one end of the second capacitor and the first terminal of the first switch circuit. The second terminal of the first switch circuit is connected to the ground, and the third terminal of the first switch circuit is connected to the other end of the second capacitor. The first switch circuit switches connection / disconnection between the second capacitor and the ground by switching a path.

3. A power amplifier circuit, characterized in that: have: Field effect transistors to amplify RF signals; and a bypass capacitor connected between a power supply terminal connected to the drain terminal of the field effect transistor and the drain terminal; The bypass capacitor unit includes a first capacitor, a second capacitor, and a first switch circuit. One end of the first capacitor is connected to the power supply terminal, and the other end is connected to one end of the second capacitor and one end of the first switch circuit. The other end of the second capacitor is connected to the ground. The other end of the first switch circuit is connected to the ground. The first switch circuit switches on and off to switch between connection and disconnection of the other end of the first capacitor and the ground.

4. A power amplifier circuit, characterized in that: have: Field effect transistors to amplify RF signals; and a bypass capacitor connected between a power supply terminal connected to the drain terminal of the field effect transistor and the drain terminal; The bypass capacitor section is composed of a first capacitor, a second capacitor, and a first switch circuit. One end of the first capacitor is connected to the power supply terminal, and the other end of the first capacitor is connected to one end of the second capacitor and the first terminal of the first switch circuit. The second terminal of the first switch circuit is connected to the ground, and the third terminal of the first switch circuit is connected to the other end of the second capacitor. The first switch circuit switches connection / disconnection between the second capacitor and the ground by switching a path.

5. The power amplifier circuit according to any one of claims 1 to 4, characterized in that: The capacitance value of the first capacitor is greater than the capacitance value of the second capacitor.

6. The power amplifier circuit according to any one of claims 1 to 4, characterized in that: The first switch circuit does not connect the other end of the first capacitor to the ground when the control mode is the envelope tracking ET control mode, and connects the other end of the first capacitor to the ground when the control mode is the average power tracking APT control mode.

7. The power amplifier circuit according to any one of claims 1 to 4, characterized in that: The other end of the second capacitor is directly connected to the ground.

8. The power amplifier circuit according to any one of claims 1 to 4, characterized in that: The bypass capacitor unit further comprises: a third capacitor having one end connected to the other end of the second capacitor and the other end connected to ground; and The second switch circuit switches connection between the other end of the second capacitor and the ground.

9. The power amplifier circuit according to any one of claims 1 to 4, characterized in that: A fourth capacitor is also provided. One end of the fourth capacitor is connected to the power supply terminal, and the other end of the fourth capacitor is connected to the ground.

10. The power amplifier circuit according to claim 9, characterized in that: The device further includes a third switch circuit configured to switch connection between the other end of the fourth capacitor and the ground.

11. The power amplifier circuit according to any one of claims 1 to 4, characterized in that: The first switch circuit is configured to include a FET.

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