Display device

Abstract

The present application discloses a display device. The display device may include a first substrate, a second substrate, a plurality of display elements, a sealing unit, and a common power line. The second substrate may overlap with the first substrate. The display element may be positioned between the first substrate and the second substrate. In a plan view of the display device, the sealing unit may surround the display element, and the sealing unit may be arranged between the first substrate and the second substrate. In a plan view of the display device, the common power line may at least partially surround the display element, and the common power line may include a protrusion. In a plan view of the display device, the protrusion may protrude beyond the sealing unit and may be positioned between the sealing unit and a first edge of the first substrate.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2018-0167897 filed in the Korean Intellectual Property Office on December 21, 2018; the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The technical field relates to display devices. Background Art

[0004] The display device may include a touch panel as an input unit for receiving a user input. Electrostatic discharge may cause damage to the touch panel. Summary of the invention

[0005] One or more embodiments may be directed to a display device that may be protected from potential damage.

[0006] According to one or more embodiments, a display device includes the following elements: a substrate, including a display area, a peripheral area surrounding the display area, and a pad area arranged in the peripheral area; a packaging substrate located above the substrate; a sealing unit surrounding the display area and arranged between the substrate and the packaging substrate; and a common power line located in the peripheral area and partially surrounding the display area, wherein the pad area is arranged above an edge of the substrate, the common power line extends along an edge of the substrate except for the edge where the pad area is arranged, the sealing unit includes a first area positioned between the pad area and the display area, and the common power line includes an extension area protruding to the outside of the first area.

[0007] The display device may further include: a blocking pattern disposed on a top surface of the encapsulation substrate and corresponding to an outer surface of the first region, the blocking pattern having conductivity, wherein the extension region may cover an end portion of the blocking pattern.

[0008] The extended region may include at least one peak.

[0009] The extension region may include a plurality of peaks arranged around an end portion of the barrier pattern.

[0010] The sealing unit may include: a second region parallel to the first region and third and fourth regions connecting the first and second regions, the third and fourth regions being parallel to each other, wherein the second, third and fourth regions may cover an outer end of the common power line.

[0011] Outer surfaces of the second region, the third region, and the fourth region may be located on the same plane as an outer surface of the package substrate and an outer surface of the substrate.

[0012] The first region may be spaced apart from an end portion of the package substrate in a manner close to the display region.

[0013] The display device may further include: a pair of blocking patterns corresponding to the outer surface and the inner surface of the first area, respectively, and the pair of blocking patterns are arranged on the top surface of the packaging substrate; and an input sensing unit corresponding to the display area, wherein, in a plan view, an end of the extension area may be further outward than an end of one of the blocking patterns corresponding to the outer surface of the first area.

[0014] A display element may be located in the display area, the display element including a pixel electrode, a common electrode and an intermediate layer, wherein the intermediate layer includes an emission layer between the pixel electrode and the common electrode, and a common power line is electrically connected to the common electrode.

[0015] A driving power supply line configured to supply a driving voltage to the display element may be located between the display area and the first area.

[0016] According to one or more embodiments, a display device includes: a substrate including a display area, a peripheral area surrounding the display area, and a pad area arranged in the peripheral area; a packaging substrate located above the substrate and having an area smaller than that of the substrate; an input sensing unit located on the packaging substrate; a common power line located in the peripheral area and partially surrounding the display area; and a sealing unit surrounding the display area and arranged between the substrate and the packaging substrate, wherein the pad area is arranged above an edge of the substrate, the sealing unit includes a first area located between the pad area and the display area, a blocking pattern is arranged above the packaging substrate, corresponds to an outer surface of the first area and has conductivity, and the common power line includes an extension area overlapping an end of the blocking pattern, and the end of the extension area is located at a position further outward than the end of the blocking pattern.

[0017] The extended region may protrude to an outside of the first region.

[0018] The extension region may cover an end portion of the barrier pattern in a plan view.

[0019] The extended region may include at least one peak.

[0020] The extension region may include a plurality of peaks arranged around an end portion of the barrier pattern.

[0021] The common power line may extend along an edge of the substrate except for an edge where a pad area is arranged, and the sealing unit may include: a second area parallel to the first area; and a third area and a fourth area connecting the first area and the second area, the third area and the fourth area being parallel to each other, wherein the second area, the third area and the fourth area may cover an outer end of the common power line.

[0022] The first region may be spaced apart from an end portion of the package substrate in a manner close to the display region.

[0023] Outer surfaces of the second region, the third region, and the fourth region may be located on the same plane as an outer surface of the package substrate and an outer surface of the substrate.

[0024] A display element may be located in the display area, the display element including a pixel electrode, a common electrode and an intermediate layer, wherein the intermediate layer includes an emission layer between the pixel electrode and the common electrode, and a common power line is electrically connected to the common electrode.

[0025] A driving power supply line configured to supply a driving voltage to the display element may be located between the display area and the first area.

[0026] Embodiments may relate to a display device. The display device may include a first substrate, a second substrate, a plurality of display elements, a sealing unit, and a common power line. The second substrate may overlap the first substrate. The display element may be positioned between the first substrate and the second substrate. The sealing unit may surround the display element in a plan view of the display device, and the sealing unit may be arranged between the first substrate and the second substrate. The common power line may be electrically connected to the display element, and may at least partially surround the display element in a plan view of the display device, and may include a protrusion. In a plan view of the display device, the protrusion may protrude beyond the sealing unit and may be positioned between the sealing unit and a first edge of the first substrate.

[0027] The display device may include a conductive member that is positioned outside the sealing unit in a plan view of the display device, is disposed on the second substrate and is formed of a conductive material, and partially overlaps the protrusion.

[0028] The protrusion may include two edges that are oriented at an acute angle with respect to each other in a plan view of the display device and are located farther from the sealing unit than the conductive member in a plan view of the display device.

[0029] The protrusion may include a first tip and a second tip. In a plan view of the display device, an edge of the conductive member may be positioned between the first tip and the second tip in a direction parallel to the first edge of the first substrate.

[0030] The sealing unit may include a first section and a second section. In a plan view of the display device, the protrusion may be adjacent to the first section. The second section may be opposite to the first section, may cover the covered portion of the common power line and may expose the exposed portion of the common power line. In a plan view of the display device, the exposed portion of the common power line may be positioned between the covered portion of the common power line and the first section of the sealing unit.

[0031] A face of the second segment of the sealing unit may be coplanar with each of a face of the second substrate and a face of the first substrate.

[0032] In a plan view of the display device, the protrusion of the common power line may be positioned between the first segment of the sealing unit and an edge of the second substrate.

[0033] The display device may include a first conductive member, a second conductive member, and an input sensing unit. The first conductive member may be positioned on the second substrate and may overlap with a protrusion of a common power line. The second conductive member may be positioned on the second substrate. In a plan view of the display device, a first section of the sealing unit may be positioned between the first conductive member and the second conductive member and may be adjacent to the protrusion of the common power line.

[0034] The display element may include a pixel electrode, a common electrode and an intermediate layer. The intermediate layer may include an emission layer between the pixel electrode and the common electrode. The common power line may be electrically connected to the common electrode.

[0035] The display device may include a driving power line configured to provide a driving voltage to the display element. The first section of the driving power line may be positioned between the display element and the first section of the sealing unit. In a plan view of the display device, the protrusion of the common power line may protrude from the first section of the sealing unit and may be adjacent to the first section of the sealing unit.

[0036] The second segment of the driving power line may be located closer to the first edge of the first substrate than the protrusion of the common power line.

[0037] The display device may include the following elements: an input sensing unit positioned on the second substrate; and a conductive member positioned on the second substrate and partially overlapping with the protrusion of the common power line. The first section of the sealing unit may be positioned between the conductive member and the input sensing unit. The conductive material of the conductive member may be the same as the conductive material of the wiring group of the input sensing unit.

[0038] The conductive member may be positioned between the first segment of the sealing unit and the first edge of the first substrate. In a plan view of the display device, the second segment of the sealing unit may extend in a manner not aligned with the first segment of the sealing unit. A surface of the second segment of the sealing unit may be coplanar with a surface of the first substrate.

[0039] The second section of the sealing unit may cover the covered portion of the common power line and may expose the exposed portion of the common power line. The covered portion of the common power line may be positioned between the exposed portion of the common power line and a face of the second section of the sealing unit.

[0040] The display device may include: a conductive member formed of a conductive material, positioned directly on the face of the second substrate, partially overlapping the protrusion, and narrower than the protrusion in a direction perpendicular to the first edge of the first substrate.

[0041] The display device may include an input sensing unit directly positioned on a face of the second substrate.

[0042] The display device may include: a conductive terminal positioned at a first edge of the first substrate. The common power line may include a connection portion directly connected to the conductive terminal, the connection portion being narrower than the protrusion in a direction parallel to the first edge of the first substrate.

[0043] The first surface of the sealing unit may be positioned between the protrusion and the second surface of the sealing unit. The second surface of the sealing unit may be coplanar with a surface of the first substrate.

[0044] The protrusion may include a first portion and a second portion narrower than the first portion in a direction perpendicular to the first edge of the first substrate.The conductive member may be narrower than each of the first portion and the second portion in a direction perpendicular to the first edge of the first substrate.

[0045] In a plan view of the display device, the protrusion may be positioned between the first edge of the second substrate and the sealing unit. In a plan view of the display device, the first edge of the second substrate may be positioned between the first edge of the first substrate and the protrusion. BRIEF DESCRIPTION OF THE DRAWINGS

[0046] Figure 1 It is a plan view of a display device according to an embodiment.

[0047] Figure 2 This is an equivalent circuit diagram of a sub-pixel or a pixel of a display device according to an embodiment.

[0048] Figure 3 It is involved in the implementation method Figure 1 A cross-sectional view of the example taken along line II'.

[0049] Figure 4 In the manufacturing embodiment Figure 1 A cross-sectional view of a structure formed in a method of displaying a device.

[0050] Figure 5 The implementation method is Figure 1 A plan view of area A.

[0051] Figure 6 It is involved in the implementation method Figure 5 A cross-sectional view taken along line II-II'.

[0052] Figure 7 yes Figure 1 A plan view of another embodiment of area A.

[0053] Figure 8 yes Figure 1 A plan view of another embodiment of area A. DETAILED DESCRIPTION

[0054] The exemplary embodiments are described with reference to the accompanying drawings. Actual embodiments may be embodied in many different forms and should not be construed as limited to the exemplary embodiments.

[0055] Although the terms "first", "second", etc. can be used to describe each element, these elements should not be limited by these terms. These terms can be used to distinguish one element from another element. Without departing from the teaching of one or more embodiments, the first element can be referred to as the second element. Describing an element as a "first" element may not require or imply the presence of a second element or other elements. The terms "first", "second", etc. can also be used to distinguish between different classes or different groups of elements in this article. For simplicity, the terms "first", "second", etc. can respectively represent "first type (or first group)", "second type (or second group)", etc.

[0056] The singular forms "a", "an" and "the" may include the plural forms as well, unless the context clearly indicates otherwise.

[0057] The terms “include / comprises” and / or “comprising / including” may specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0058] When a first element is referred to as being “on” a second element, the first element may be directly or indirectly on the second element, and one or more intervening elements may be present between the first element and the second element.

[0059] The sizes of elements in the drawings may be exaggerated for convenience of explanation.

[0060] When a certain embodiment can be implemented differently, a specific process order can be performed differently from the described order. For example, two processes described in succession can be performed substantially simultaneously or in the reverse order of the described order.

[0061] In the drawings, like reference numerals may be assigned to similar or corresponding elements.

[0062] The term "extended area" may mean a "protrusion". The term "pattern" may mean a "component". The term "conductive" may mean "conductive". The term "conductivity" may mean "conductivity". The term "area" may mean a "portion" or a "segment". The term "pixel" may mean a "pixel", a "sub-pixel" or a "display element". The term "connection" may mean an "electrical connection". The term "insulation" may mean an "electrical insulation". The term "surface" may mean a "face". The term "end" may mean an "edge".

[0063] Figure 1 is a plan view of a display device 10 according to an embodiment, and Figure 2 It is an equivalent circuit diagram of a sub-pixel or a pixel of the display device 10 according to the embodiment.

[0064] Reference Figure 1 The display device 10 includes a display area DA having a display element for displaying an image, and includes a peripheral area PA surrounding the display area DA. The substrate 100 includes a corresponding display area DA and a corresponding peripheral area PA.

[0065] The pixels P are located in the display area DA. The pixels P may be connected to a scan line SL extending in the y direction, and may be connected to a data line DL extending in the x direction and crossing the scan line SL. Each pixel P may include a display element for emitting red light, green light, blue light, or white light. Each pixel P may include an organic light emitting diode as a display element.

[0066] Reference Figure 2 , one pixel P may include a pixel circuit PC and an organic light emitting diode OLED connected to the pixel circuit PC, wherein the pixel circuit PC is connected to a scan line SL and a data line DL.

[0067] The pixel circuit PC may include a driving thin film transistor Td, a switching thin film transistor Ts, and a storage capacitor Cst. The switching thin film transistor Ts may be connected to the scan line SL and the data line DL, and transmit a data signal input through the data line DL to the driving thin film transistor Td in response to a scan signal input through the scan line SL.

[0068] The storage capacitor Cst may be connected to the switching thin film transistor Ts and the driving voltage supply line PL, and may store a voltage corresponding to a difference between a voltage transmitted from the switching thin film transistor Ts and a driving voltage ELVDD supplied to the driving voltage supply line PL.

[0069] The driving thin film transistor Td may be connected to the driving voltage supply line PL and the storage capacitor Cst, and may control the driving current flowing from the driving voltage supply line PL through the organic light emitting diode OLED in response to the voltage value stored in the storage capacitor Cst. The organic light emitting diode OLED may emit light having a predetermined brightness by using the driving current. The organic light emitting diode OLED may emit, for example, red light, green light, blue light, or white light.

[0070] Figure 2 It is shown that one pixel P includes two thin film transistors, namely a switching thin film transistor Ts and a driving thin film transistor Td, and also includes a storage capacitor Cst. In an embodiment, the pixel circuit PC of the pixel P may include three or more thin film transistors or two or more storage capacitors.

[0071] Refer again Figure 1 , the peripheral area PA may surround the display area DA. The peripheral area PA does not include pixels P and is a non-display area that does not dynamically provide an image. Drivers 20 and 22, pad areas 40, driving power lines 60, common power lines 70, etc. may be arranged in the peripheral area PA.

[0072] The driver 20 and the driver 22 may include an emission drive circuit, a scan drive circuit, and the like. The emission drive circuit is arranged in the peripheral area PA of the substrate 100, generates an emission control signal, and transmits the emission control signal to each pixel P through an emission control line (not shown). The emission drive circuit may be arranged on the left and right of the display area DA. In an embodiment, only one emission drive circuit may be provided. The scan drive circuit is arranged in the peripheral area PA of the substrate 100, generates a scan signal, and transmits the scan signal to each pixel P through a scan line SL. The scan drive circuit may be arranged on the left and right of the display area DA. In an embodiment, only one scan drive circuit may be provided.

[0073] The pad area 40 may include various electronic components and / or a printed circuit board, is arranged on the edge of the substrate 100, and includes a plurality of terminals 41, 42, 44, and 45. The pad area 40 may be arranged in the peripheral area PA adjacent to one side of the display area DA, may be exposed without being covered by an insulating layer, and may be electrically connected to a flexible printed circuit board that may support a data driving circuit. The pad area 40 may not extend parallel to any one of the driver 20 and the driver 22.

[0074] The driving power line 60 may be disposed in the peripheral area PA. The driving power line 60 may be disposed between the pad area 40 and one side of the display area DA adjacent to the pad area 40, and may be disposed between the display area DA and the first area S1 of the sealing unit 400. The driving voltage ELVDD provided through the terminal 42 may be supplied to each pixel P through the driving voltage supply line PL.

[0075] The common power line 70 may be arranged in the peripheral area PA and may at least partially surround the display area DA. The common power line 70 may have an open loop adjacent to the pad area 40 and may extend along the edge of the substrate 100. The common power line 70 is connected to the terminal 45 and provides a common voltage ELVSS to a common electrode of the organic light emitting diode OLED of the pixel P.

[0076] The encapsulation substrate 300 may be located above the substrate 100, and the sealing unit 400 may be disposed between the substrate 100 and the encapsulation substrate 300 and may bond the substrate 100 to the encapsulation substrate 300. The encapsulation substrate 300 may be smaller than the substrate 100. The pad region 40 may not be covered by the encapsulation substrate 300.

[0077] The sealing unit 400 may include an inorganic material such as glass frit. In an implementation, the sealing unit 400 may include epoxy resin or the like. Figure 1 In the plan view shown, the sealing unit 400 may surround the display area DA. Therefore, a space defined by the substrate 100, the encapsulation substrate 300, and the sealing unit 400 may be sealed from external moisture or impurities.

[0078] The display area DA may be substantially rectangular, and the sealing unit 400 may include a first area S1 close to one edge of the encapsulation substrate 300, a second area S2 parallel to the first area S1, and a third area S3 and a fourth area S4 connecting the first area S1 and the second area S2, respectively. The first area S3 and the fourth area S4 may be parallel to each other. The corners of the sealing unit 400 connecting the first area S1 to the third area S3 and the fourth area S4 may be rounded, and the corners of the sealing unit 400 connecting the second area S2 to the third area S3 and the fourth area S4 may be rounded.

[0079] The first area S1 may be arranged between the display area DA and the pad area 40. The first area S1 is positioned between the display area DA and the end / edge of the encapsulation substrate 300. Each of the second area S2, the third area S3, and the fourth area S4 has an edge that overlaps the end / edge of the encapsulation substrate 300. The outer surfaces of the second area S2, the third area S3, and the fourth area S4 may be coplanar with the corresponding outer surfaces of the encapsulation substrate 300, respectively, and the encapsulation substrate 300 does not protrude beyond the second area S2, the third area S3, and the fourth area S4. Therefore, the unused space of the display device 10 may be minimized. The second area S2, the third area S3, and the fourth area S4 may cover the outer end / edge of the common power line 70, and may cover at least a portion of the common power line 70. With this structure, the unused space of the display device 10 may be minimized.

[0080] Input sensing unit (eg, Figure 3 The unit 500 shown in FIG. 5 may be located on the encapsulation substrate 300. The input sensing unit may generate an input signal based on a touch of an external touch input unit such as a user's hand or a pen. The input sensing unit may be formed directly on the top surface of the encapsulation substrate 300. The input sensing unit may include a capacitive input sensing unit in which a capacitance change occurs due to a touch. If an external electrostatic discharge ESD is introduced, damage may occur in the capacitive input sensing unit. According to an embodiment, in order to prevent an external electrostatic discharge ESD from being introduced into the input sensing unit, the common power line 70 includes an extension area protruding outside the first area S1. Through the extension area, the electrostatic discharge introduced into the display device 10 can be guided to the common power line 70 so that the electrostatic discharge does not significantly affect the input sensing unit.

[0081] Figure 3 It is involved in the implementation method Figure 1 A cross-sectional view taken along line II'.

[0082] Reference Figure 3 , the pixel circuit PC and the display element 200 may be positioned in the display area DA over the substrate 100. The driver 20, the common power line 70, etc. may be arranged in the peripheral area PA over the substrate 100.

[0083] The substrate 100 may include at least one of a glass material, a metal material, and a plastic material, wherein the plastic material includes polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide, etc. The encapsulation substrate 300 may include a transparent material. For example, the encapsulation substrate 300 may include a glass material or a plastic material, wherein the plastic material includes at least one of polyethylene terephthalate (PET), polyethylene naphthalate (PEN), polyimide, etc. The substrate 100 and the encapsulation substrate 300 may include the same material or different materials.

[0084] The buffer layer 101 may be formed on the substrate 100. The buffer layer 101 may block foreign substances or moisture from penetrating the substrate 100. The buffer layer 101 may include a material such as SiO x 、SiN x The buffer layer 101 may be formed in the display area DA and the peripheral area PA.

[0085] The thin film transistor 130, the storage capacitor 140, and the display element 200 electrically connected to the thin film transistor 130 and the storage capacitor 140 may be positioned in the display area DA over the substrate 100. The display element 200 may include, for example, an organic light emitting diode OLED. Figure 3 The thin film transistor 130 may correspond to the reference Figure 2 The driving thin film transistor Td described above, and the storage capacitor 140 may correspond to the reference Figure 2 The storage capacitor Cst is described.

[0086] The thin film transistor 130 includes a semiconductor layer 134 and a gate 136. The semiconductor layer 134 may include polycrystalline silicon. The semiconductor layer 134 may include a channel region 131 overlapping the gate 136, and may include a source region 132 and a drain region 133 respectively arranged on opposite sides of the channel region 131 and doped with impurities having a higher concentration than that of the channel region 131. The impurities may include N-type impurities or P-type impurities. In an embodiment, the semiconductor layer 134 may include amorphous silicon or an organic semiconductor material. In an embodiment, the semiconductor layer 134 may include an oxide semiconductor.

[0087] As mentioned above Figure 2 As described above, the pixel circuit PC may further include a switch thin film transistor Ts. The semiconductor layer 134 of the thin film transistor 130 and the switch thin film transistor Ts (see Figure 2 ) may include different materials. For example, the semiconductor layer 134 of the thin film transistor 130 and the switch thin film transistor Ts (see Figure 2) may include an oxide semiconductor, and the other may include polycrystalline silicon.

[0088] The gate insulating layer 103 may be disposed between the semiconductor layer 134 and the gate 136. The gate insulating layer 103 may include SiON, SiO x and / or SiN x The inorganic insulating layer may include a single layer or a multi-layer structure.

[0089] The storage capacitor 140 includes a lower electrode 144 and an upper electrode 146 that overlap each other. A first interlayer insulating layer 105 may be disposed between the lower electrode 144 and the upper electrode 146.

[0090] The first interlayer insulating layer 105 may have a predetermined dielectric constant and may include SiON, SiO x and / or SiN x The inorganic insulating layer may include a single layer or a multi-layer structure. Figure 3 It is shown that the storage capacitor 140 overlaps the thin film transistor 130, and the lower electrode 144 is used as the gate 136 of the thin film transistor 130. In an implementation, the lower electrode 144 may include an independent element independent of the gate 136 of the thin film transistor 130.

[0091] The storage capacitor 140 may be covered by the second interlayer insulating layer 107. The second interlayer insulating layer 107 may include SiON, SiO x and / or SiN x The inorganic insulating layer may include a single layer or a multi-layer structure.

[0092] The driving voltage supply line PL may be disposed on the first organic insulating layer 111. The driving voltage supply line PL may include at least one of Al, Cu, Ti, etc., and may include a single layer or a multilayer structure. In an embodiment, the driving voltage supply line PL may have a multilayer structure of Ti-Al-Ti.

[0093] Figure 3It is shown that the lower driving voltage supply line PL1 is arranged below the first organic insulating layer 111. The lower driving voltage supply line PL1 can be electrically connected to the driving voltage supply line PL through a contact hole penetrating the first organic insulating layer 111, and a voltage drop of the driving voltage ELVDD provided by the driving voltage supply line PL can be prevented. The lower driving voltage supply line PL1 may include the same material as that of the data line DL. The lower driving voltage supply line PL1 and the data line DL may include at least one of Al, Cu, Ti, etc., and may include a single-layer or multi-layer structure. In an embodiment, the lower driving voltage supply line PL1 and the data line DL may have a multi-layer structure of Ti-Al-Ti or TiN-Al-Ti.

[0094] The first organic insulating layer 111 includes an organic insulating material. The organic insulating material may include an imide-based polymer, a general polymer such as polymethyl methacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenol group, an acrylic acid-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a mixture of some of the above materials. In an embodiment, the first organic insulating layer 111 may include polyimide.

[0095] The driving voltage supply line PL may be covered by the second organic insulating layer 113. The second organic insulating layer 113 may include an imide-based polymer, a general polymer such as polymethyl methacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenol group, an acrylic-based polymer, an aryl ether-based polymer, an amide-based polymer, a fluorine-based polymer, a p-xylene-based polymer, a vinyl alcohol-based polymer, or a mixture. In an embodiment, the second organic insulating layer 113 may include polyimide.

[0096] The pixel electrode 210 is disposed on the second organic insulating layer 113. The pixel defining layer 120 is disposed on the pixel electrode 210. The pixel defining layer 120 may define an opening that exposes at least a central portion of the pixel electrode 210. The pixel defining layer 120 may prevent an arc between the pixel electrode 210 and the common electrode 230 by increasing a distance between an edge of the pixel electrode 210 and the common electrode 230. The pixel defining layer 120 may include, for example, an organic material such as polyimide or hexamethyldisiloxane (HMDSO).

[0097] The intermediate layer 220 may include a low molecular weight material or a polymer material. When the intermediate layer 220 includes a low molecular weight material, the intermediate layer 220 may have a structure stacked by a hole injection layer (HIL), a hole transport layer (HTL), an emission layer (EML), an electron transport layer (ETL), an electron injection layer (EIL), etc. The intermediate layer 220 may include one or more organic materials, such as copper phthalocyanine (CuPc), N, N'-di (-1-naphthyl) -N, N'-diphenylbenzidine (NPB) and tris-8-hydroxyquinoline aluminum (Alq3). These layers can be formed by vacuum deposition.

[0098] When the intermediate layer 220 includes a polymer material, the intermediate layer 220 may have a structure including an HTL and an EML. In this case, the HTL may include PEDOT, and the EML may include a polymer material such as a polyvinylidene (PPV)-based material and / or a polyfluorene-based material. In an embodiment, at least one of the layers constituting the intermediate layer 220 may be formed as one body above the plurality of pixel electrodes 210. In an embodiment, the intermediate layer 220 may include a patterned layer corresponding to each of the plurality of pixel electrodes 210.

[0099] The common electrode 230 may be disposed in the display area DA and may cover the display area DA. The common electrode 230 may cover a plurality of pixels.

[0100] A filling material (not shown) may be disposed between the common electrode 230 and the encapsulation substrate 300. The filling material (not shown) may include at least one of a photocurable epoxy-based material and an acrylate-based material.

[0101] The driver 20 , the common power line 70 , etc. may be arranged in the peripheral area PA of the substrate 100 .

[0102] The driver 20 may include a thin film transistor TFT and a wiring (not shown) connected to the thin film transistor TFT. The thin film transistor TFT and the thin film transistor 130 of the pixel circuit PC may be formed by the same process.

[0103] The common power line 70 may include the same material as that of the driving voltage supply line PL. The common power line 70 may have a multilayer structure of Ti-Al-Ti. The outer end of the common power line 70 may be covered by the sealing unit 400, and the inner end opposite to the outer end may directly contact the conductive layer 212. The conductive layer 212 may include the same material as that of the pixel electrode 210. The conductive layer 212 may be connected to the common electrode 230. In an embodiment, the common power line 70 may extend to the display area DA and may directly contact the common electrode 230.

[0104] The sealing unit 400 bonds the substrate 100 to the encapsulation substrate 300. The sealing unit 400 may include glass frit or epoxy resin. The glass frit may be SiO 2 The glass material may be a main material and may include a laser or infrared absorbing material, an organic binder, a filler for reducing the thermal expansion coefficient, etc. If the glass material is subjected to a drying process and a plastic process, the organic binder and moisture may be removed. The laser or infrared absorbing material may include a transition metal compound. The glass material may be cured by laser to form the sealing unit 400.

[0105] The sealing unit 400 may cover the outer end of the common power line 70, overlap a portion of the common power line 70, directly contact the common power line 70, and not be spaced apart from the common power line 70. The display device 10 (see Figure 1 ) of unused space.

[0106] The input sensing unit 500 may be located on the encapsulation substrate 300. The input sensing unit 500 may be directly formed on the encapsulation substrate 300. The input sensing unit 500 may include a capacitive input sensing unit in which a capacitance change occurs due to touch. The input sensing unit 500 includes a plurality of sensing patterns that form a capacitor in cooperation with the common electrode 230. When an external touch input unit touches the input sensing unit 500, the external touch input unit and the plurality of sensing patterns form another capacitor. Since the two capacitors are connected in series by a touch operation, a change in capacitance occurs, and a touch panel function may be implemented by sensing the position of the change in capacitance and the magnitude of the change.

[0107] Figure 4 In the manufacturing embodiment Figure 1 A cross-sectional view of a structure formed in the method of display device 10, Figure 5 The implementation method is Figure 1 The plan view of area A, and Figure 6 It is involved in the implementation method Figure 5 A cross-sectional view of the example taken along line II-II'.

[0108] Figure 4 An operation of curing the sealing unit 400 to bond the substrate 100 to the encapsulation substrate 300 is shown. The curing of the sealing unit 400 may be performed by irradiating a laser beam L to the encapsulation substrate 300. A blocking pattern 600 may be formed on a top surface of the encapsulation substrate 300. The blocking pattern 600 may include the same material as a group of wirings of the input sensing unit 500. The blocking pattern 600 may control a range of curing of the sealing unit 400 by partially blocking the irradiated laser beam L.

[0109] After the sealing unit 400 is cured, the substrate 100, the sealing unit 400, and the encapsulation substrate 300 may be cut substantially simultaneously along the cutting line CL. Figure 1 ), the third area S3 (see Figure 1 ) and the fourth region S4 (see Figure 1 ) is cut along three corresponding planes substantially at the same time together with the substrate 100 and the encapsulation substrate 300, and the second area S2 of the sealing unit 400 (see Figure 1 ), the third area S3 (see Figure 1 ) and the fourth region S4 (see Figure 1 ) may be positioned on the same plane as the outer surface of the package substrate 300 and the outer surface of the substrate 100. The width of the sealing unit 400 may be reduced. Figure 1 ), the third area S3 (see Figure 1 ) and the fourth region S4 (see Figure 1 ) covers the outer end / outer edge of the common power line 70 and overlaps with a portion of the common power line 70, so that the display device 10 (see Figure 1 ) of unused space.

[0110] The wires are arranged in the pad area 40 (see Figure 1 ) and display area DA (see Figure 1 ). Therefore, the substrate 100, the sealing unit 400 and the packaging substrate 300 are not cut at the pad area 40. As a result, Figure 5 As shown, the first area S1 of the sealing unit 400 is spaced apart from the end / edge of the encapsulation substrate 300 and is positioned between the display area DA and the end / edge of the encapsulation substrate 300. The blocking pattern 600 may limit the width of the first area S1. Figure 1 ) and display area DA (see Figure 1 ), so when the laser beam L (see Figure 4 ) to cure the sealing unit 400, the curing may be affected by the wire. In order to more accurately control the width of the cured first region S1, a pair of barrier patterns 600 corresponding to the inner and outer surfaces of the first region S1 may be formed on the encapsulation substrate 300.

[0111] Since the blocking pattern 600 includes the same material as the conductive material of the input sensing unit 500 and is substantially located near the input sensing unit 500, the display device 10 (see Figure 1 ) may introduce electrostatic discharge into the input sensing unit 500.

[0112] In order to prevent the electrostatic discharge from affecting the input sensing unit 500, the common power line 70 includes an extension region 72 protruding outside the first region S1. The extension region 72 may overlap with the end of the blocking pattern 600 located outside the first region S1. The extension region 72 may cover the end / edge of the blocking pattern 600. Figure 6 As shown in FIG. 1 , the end / edge of the extension region 72 is further away from the sealing unit 400 than the end / edge of the blocking pattern 600. With this structure, external electrostatic discharge can be guided to the extension region 72, so that the input sensing unit 500 may not be significantly affected. Since the electrostatic discharge guided to the extension region 72 is widely diffused, the electrostatic discharge may not significantly affect the display device 10 (see FIG. 1 ). Figure 1 ).

[0113] Figure 7 and Figure 8 Each of the graphs in Figure 1 The plan views of other embodiments of the region A of FIG. The description of the above elements may not be repeated.

[0114] Reference Figure 7 and Figure 8 , the common power line 70 includes an extension region 72 protruding out of the first region S1 of the sealing unit 400. The extension region 72 covers the end of the barrier pattern 600 located outside the first region S1. Therefore, external electrostatic discharge is guided to the extension region 72, so that the input sensing unit 500 may not be significantly affected.

[0115] like Figure 7 As shown, the extension region 72 may include at least one pointed portion. Since the pointed structure acts as a lightning rod, static discharge can be more effectively guided to the extension region 72.

[0116] Figure 8 The extended region 72 is shown to include a plurality of tips in order to more effectively guide electrostatic discharge. The plurality of tips may substantially surround the end of the blocking pattern 600, thus effectively preventing electrostatic discharge from being introduced into the blocking pattern 600.

[0117] In embodiments, the extended region 72 may have one or more other shapes, such as a needle shape and / or a sawtooth shape, in order to effectively guide electrostatic discharge.

[0118] According to an embodiment, an unused space of a display device may be minimized, and damage of an input sensing unit potentially caused by an inflow of external electrostatic discharge may be prevented.

[0119] Although embodiments have been described by way of example, various changes may be made without departing from the scope defined by the appended claims.

Claims

1. A display device, comprising: a first substrate; a second substrate overlapping the first substrate and including a first surface and a second surface, the first surface and the second surface facing each other; a plurality of display elements positioned between the first substrate and the first surface of the second substrate; a sealing unit, the sealing unit surrounding the display element in a plan view of the display device, and the sealing unit is disposed between the first substrate and the first surface of the second substrate; a common power line at least partially surrounding the display element in the plan view of the display device, and comprising a protrusion, wherein the protrusion protrudes out of the sealing unit in the plan view of the display device and is positioned between the sealing unit and a first edge of the first substrate, and A conductive member, which is positioned outside the sealing unit in the plan view of the display device, is arranged on the second surface of the second substrate, is formed of a conductive material, and partially overlaps with the protrusion, wherein the second substrate is positioned between the conductive member and the protrusion in the cross-sectional view of the display device.

2. The display device according to claim 1, wherein: The protrusion includes two edges that are oriented at an acute angle with respect to each other in the plan view of the display device, and the two edges are located farther from the sealing unit than the conductive member in the plan view of the display device.

3. The display device according to claim 1, wherein: The protrusion includes a first tip and a second tip, and an edge of the conductive member is positioned between the first tip and the second tip in a direction parallel to the first edge of the first substrate in the plan view of the display device.

4. The display device according to claim 1, wherein: The sealing unit comprises: a first segment, wherein the protrusion is adjacent to the first segment in the plan view of the display device; A second section, which is opposite to the first section, covers the covered portion of the common power line and exposes the exposed portion of the common power line, wherein in the plan view of the display device, the exposed portion of the common power line is positioned between the covered portion of the common power line and the first section of the sealing unit.

5. The display device according to claim 4, wherein: A surface of the second segment of the sealing unit is coplanar with each of a surface of the second substrate and a surface of the first substrate.

6. The display device according to claim 5, wherein: In the plan view of the display device, the protrusion of the common power line is positioned between the first segment of the sealing unit and an edge of the second substrate.

7. The display device according to claim 1, wherein: The conductive member comprises: a first conductive member positioned on the second surface of the second substrate and overlapping the protrusion of the common power line; and A second conductive member is positioned on the second surface of the second substrate, wherein the first section of the sealing unit is positioned between the first conductive member and the second conductive member and adjacent to the protrusion of the common power line in the plan view of the display device.

8. The display device according to claim 1, wherein: The display element includes a pixel electrode, a common electrode, and an intermediate layer, wherein the intermediate layer includes an emission layer between the pixel electrode and the common electrode, and wherein the common power line is electrically connected to the common electrode.

9. The display device according to claim 8, further comprising: A driving power line configured to provide a driving voltage to the display element, wherein a first segment of the driving power line is positioned between the display element and a first segment of the sealing unit, and wherein, in the plan view of the display device, the protrusion of the common power line protrudes from the first segment of the sealing unit and is adjacent to the first segment of the sealing unit.

10. The display device according to claim 9, wherein: The second segment of the driving power line is located closer to the first edge of the first substrate than the protrusion of the common power line.

11. The display device according to claim 1, further comprising: An input sensing unit, the input sensing unit is positioned on the second surface of the second substrate, wherein in the plan view of the display device, the first section of the sealing unit is positioned between the conductive member and the input sensing unit, and wherein the conductive material of the conductive member is the same as the conductive material of the wiring group of the input sensing unit.

12. The display device according to claim 11, wherein: In the plan view of the display device, the conductive member is positioned between the first segment of the sealing unit and the first edge of the first substrate, wherein in the plan view of the display device, the second segment of the sealing unit extends in a manner that is not aligned with the first segment of the sealing unit, and wherein a surface of the second segment of the sealing unit is coplanar with a surface of the first substrate.

13. The display device according to claim 12, wherein: The second section of the sealing unit covers the covered portion of the common power line and exposes the exposed portion of the common power line, and wherein the covered portion of the common power line is positioned between the exposed portion of the common power line and the surface of the second section of the sealing unit.

14. The display device according to claim 1, wherein: The conductive member is narrower than the protrusion in a direction perpendicular to the first edge of the first substrate.

15. The display device according to claim 14, further comprising: The input sensing unit is directly positioned on the second surface of the second substrate.

16. The display device according to claim 14, further comprising: A conductive terminal is positioned at the first edge of the first substrate, wherein the common power line includes a connection portion directly connected to the conductive terminal, and the connection portion is narrower than the protrusion in a direction parallel to the first edge of the first substrate.

17. The display device according to claim 14, wherein: The first face of the sealing unit is positioned between the protrusion and the second face of the sealing unit, and wherein the second face of the sealing unit is coplanar with a face of the first substrate.

18. The display device according to claim 14, wherein: The protrusion includes a first portion and a second portion narrower than the first portion in a direction perpendicular to the first edge of the first substrate, and wherein the conductive member is narrower than each of the first portion and the second portion in the direction perpendicular to the first edge of the first substrate.

19. The display device according to claim 1, wherein: In the plan view of the display device, the protrusion is positioned between the first edge of the second substrate and the sealing unit, and in the plan view of the display device, the first edge of the second substrate is positioned between the first edge of the first substrate and the protrusion.

Images