A digital frequency meter and a frequency measurement method
Through the design of the digital frequency meter, the signal is processed using polarity transformation, shaping filtering and post-stage amplifier circuit, and counting is combined with FPGA and microcontroller, which solves the complexity and low accuracy of the traditional analog frequency meter, and realizes high-precision frequency, time interval and duty cycle measurement.
Patent Information
- Application Number
- CN202010259749.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-04-03
- Publication Date
- 2025-07-29
- Estimated Expiration
- 2040-04-03
AI Technical Summary
The traditional analog frequency meter circuit is complex, has a large space occupancy, and has low measurement accuracy, and has large signal interference, which affects the measurement accuracy.
The digital frequency meter is adopted, including a pre-processing unit, a first control unit and a voice broadcasting unit, and the signal is processed through polarity conversion, shaping filtering and post-stage amplification circuit, and counting and measuring using FPGA and microcontroller to avoid logic circuits and timing circuits.
Improve measurement accuracy, reduce signal interference, reduce equipment space, and achieve high-precision frequency, time interval and duty cycle measurement.
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Figure CN111398677B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of frequency measurement, and particularly to a digital frequency meter and a frequency measurement method. Background Art
[0002] Frequency is an important parameter in the field of electronic measurement and also has great significance in daily life. Due to the rapid development of the electronic information industry, the measurement of signal frequency is playing an increasingly important role in scientific research and practical applications.
[0003] Traditional frequency meters are usually analog frequency meters, which are generally composed of complex logic circuits and timing circuits. The frequency meters constituted by such circuits not only occupy a large space and have low measurement efficiency, but also generate large signal interferences between various circuits, and these interferences will increase the measurement error and affect the final measurement accuracy. Summary of the Invention
[0004] In order to solve the problems of complex circuits, large occupied space and low measurement accuracy of traditional analog frequency meters, the present invention provides a digital frequency meter.
[0005] Technical solutions adopted by the present invention:
[0006] A digital frequency meter includes:
[0007] A preprocessing unit, and an input signal is output to a first control unit after passing through the preprocessing unit;
[0008] A first control unit, the first control unit is connected to the preprocessing unit, measures the output information of the preprocessing unit, and the first control unit is further connected to a second control unit and transmits the measurement information to the second control unit;
[0009] A second control unit, an input end of the second control unit is connected to a keyboard, and outputs measurement information according to the input information of the keyboard;
[0010] A voice broadcast unit, the voice broadcast unit is connected to the second control unit and broadcasts the output information of the second control unit by voice.
[0011] Further, the preprocessing unit includes a polarity conversion circuit, and the polarity conversion circuit converts the input signal into a unipolar signal.
[0012] Specifically, the polarity conversion circuit includes a triode Q1, a triode Q4, a variable resistor Ra, a resistor R15, a resistor R2, and a capacitor C8. The collector of the triode Q1 is connected to the input signal, the base of the triode Q1 is connected to the base of the triode Q4, the base of the triode Q1 is connected to the power supply via the variable resistor Ra, the emitter of the triode Q1 is connected to the collector of the triode Q4 via the resistor R15, the emitter of the triode Q1 is grounded via the resistor R2, the emitter of the triode Q4 is connected to the power supply, and at the same time, the emitter of the triode Q4 is grounded via the capacitor C8.
[0013] Further, the preprocessing unit further includes a shaping and filtering circuit. The shaping and filtering circuit is connected to the polarity conversion circuit and converts the output signal of the polarity conversion circuit into a signal recognizable by the first control unit.
[0014] Specifically, the shaping and filtering circuit includes a chip U1, an RC filtering circuit, a resistor R10, a resistor R12, and a resistor R14. The Cin terminal and the Cin' terminal of the chip U1 are connected to the polarity conversion circuit. The Cout' terminal of the chip U1 is connected to the Bin terminal and the Bout terminal of the chip U1 via the RC filtering circuit. The Cout of the chip U1 is connected to the Bin' terminal of the chip U1. The Bin' terminal of the chip U1 is grounded via the resistor R10. The Ain terminal and the Bout' terminal of the chip U1 are grounded via the resistor R12. The Aout' terminal of the chip U1 outputs the signal recognizable by the first control unit, and the Aout terminal of the chip U1 is grounded via the resistor R14.
[0015] Further, the preprocessing unit further includes a post-stage amplification circuit. The input end of the post-stage amplification circuit is connected to the output end of the shaping and filtering circuit, and the output end of the post-stage amplification circuit is connected to the first control unit.
[0016] Specifically, the post-stage amplification circuit includes a triode Q5, a triode Q6, a resistor R13, a resistor R17, and a resistor R18. The base of the triode Q5 is connected to the output end of the shaping and filtering circuit, and at the same time, the base of the triode Q5 is grounded via the resistor R13. The collector of the triode Q5 is connected to the first control unit, and at the same time, the collector of the triode Q5 is grounded via the resistor R17. The emitter of the triode Q5 is connected to the emitter of the triode Q6 via the resistor R18. The base of the triode Q6 is connected to the shaping and filtering circuit, and the collector of the triode Q6 is grounded.
[0017] Further, the voice broadcast unit includes a voice synthesis module and a speaker. The input end of the voice synthesis module is connected to the second control unit, and the output end of the voice synthesis module is connected to the speaker.
[0018] To solve the problems of complex traditional analog frequency meter circuits, large occupied space, and low measurement accuracy, the present invention provides a digital frequency meter.
[0019] Process the signal to be measured to obtain a square wave signal;
[0020] Simultaneously count the standard signal and the square wave signal;
[0021] Calculate the frequency of the signal to be measured according to the counting results. The frequency calculation method of the signal to be measured is as follows: Where N x is the count value of the signal to be measured, N S is the count value of the standard signal, and f s is the frequency of the standard signal.
[0022] Compared with the prior art, the beneficial effects of the present invention are:
[0023] The digital frequency meter provided by the present invention processes the signal to be measured to make it meet the requirements of the first control unit, measures the signal to be measured through the first control unit, and then outputs corresponding measurement information according to the requirements of the second control unit. The present invention no longer uses logic circuits and timing circuits, solving the problems of large occupied space, large signal interference, and low measurement accuracy of traditional analog frequency meters, and improving the measurement accuracy of the frequency meter. Description of the Drawings
[0024] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the following drawings are only some embodiments of the present invention. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.
[0025] Figure 1 is the principle block diagram of the digital frequency meter provided by the embodiment of the present invention;
[0026] Figure 2 is the circuit diagram of the preprocessing unit provided by the embodiment of the present invention;
[0027] Figure 3 is the enlarged view of point A (polarity conversion circuit) in the circuit diagram of the preprocessing unit provided by the embodiment of the present invention;
[0028] Figure 4 is the enlarged view of point B (shaping and filtering circuit) in the circuit diagram of the preprocessing unit provided by the embodiment of the present invention;
[0029] Figure 5It is an enlarged view of the C (post-stage amplifier circuit) in the circuit diagram of the preprocessing unit provided by the embodiment of the present invention;
[0030] Figure 6 It is an enlarged view of the D (overload protection circuit) in the circuit diagram of the preprocessing unit provided by the embodiment of the present invention;
[0031] Figure 7 It is the circuit diagram of the FPGA provided by the embodiment of the present invention;
[0032] Figure 8 It is the working flowchart of the digital frequency meter provided by the embodiment of the present invention;
[0033] Figure 9 It is the circuit diagram of the voice broadcast unit provided by the embodiment of the present invention;
[0034] Figure 10 It is the schematic diagram of the measurement of the time interval provided by the embodiment of the present invention;
[0035] Figure 11 It is the schematic diagram of the measurement of the duty cycle provided by the embodiment of the present invention. Specific embodiments
[0036] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and in no way limits the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present invention.
[0037] Figure 1 A digital frequency meter provided by the embodiment of the present invention is shown. The frequency meter includes a preprocessing unit, a first control unit, a second control unit, and a voice broadcast unit. Among them, the input signal is output to the first control unit after passing through the preprocessing unit. The first control unit is connected to the preprocessing unit and measures the output information of the preprocessing unit. The first control unit is also connected to the second control unit and transmits the measurement information to the second control unit. The input end of the second control unit is connected to the keyboard and outputs the measurement information according to the input information of the keyboard. The voice broadcast unit is connected to the second control unit and broadcasts the output information of the second control unit in voice.
[0038] It should be noted that the digital frequency meter provided in this embodiment processes the signal to be measured so that the signal to be measured meets the requirements of the first control unit. The first control unit simultaneously counts the signal to be measured and the standard signal, and then calculates information such as the frequency, time, time interval, and duty cycle of the signal to be measured. Then, according to the requirements of the second control unit, the corresponding measurement information is output. This embodiment no longer uses logic circuits and timing circuits, solving the problems of large signal interference and low measurement accuracy of traditional analog frequency meters.
[0039] Specifically, there are two signals to be measured provided in this embodiment, namely the first input signal and the second input signal, and the two input signals are co-frequency periodic signals.
[0040] As a specific embodiment of the preprocessing unit provided in this embodiment, as Figure 2 and Figure 3 shown, the preprocessing unit includes a polarity conversion circuit, a shaping and filtering circuit, and a post-stage amplification circuit. The input signal to be measured is converted into a unipolar signal through the polarity conversion circuit, and then the unipolar signal is converted into a square wave signal through the shaping and filtering circuit, and then the square wave signal is amplified to meet the requirements of the first control unit.
[0041] Specifically, as Figure 3 shown, the polarity conversion circuit includes a triode Q1, a triode Q4, a variable resistor Ra, a resistor R15, a resistor R2, and a capacitor C8. The collector of the triode Q1 is connected to the input signal, the base of the triode Q1 is connected to the base of the triode Q4, the base of the triode Q1 is connected to the power supply through the variable resistor Ra, the emitter of the triode Q1 is connected to the collector of the triode Q4 through the resistor R15, the emitter of the triode Q1 is grounded through the resistor R2, the emitter of the triode Q4 is connected to the power supply, and at the same time, the emitter of the triode Q4 is grounded through the capacitor C8. In this embodiment, the circuit composed of the triode Q1 plays a role in polarity conversion, converting the bipolar signal into a unipolar signal. The triode Q2 forms a common-emitter amplification circuit to preliminarily amplify the signal. By adjusting the variable resistor Ra, the static operating point and amplification factor of the amplification circuit can be changed. Through experimental adjustment, it is known that when the resistance value of the variable resistor Ra is 265Ω, the measurement accuracy is the highest. At this time, the amplification factor of the polarity conversion circuit is: -107.1.
[0042] Specifically, as Figure 4As shown in the figure, the shaping filter circuit includes chip U1, an RC filter circuit, resistor R10, resistor R12, and resistor R14. The Cin terminal and Cin' terminal of chip U1 are connected to the polarity conversion circuit. The Cout' terminal of chip U1 is connected to the Bin terminal and Bout terminal of chip U1 through the RC filter circuit. The Cout terminal of chip U1 is connected to the Bin' terminal of chip U1. The Bin' terminal of chip U1 is grounded through resistor R10. The Ain terminal and Bout' terminal of chip U1 are grounded through resistor R12. The Aout' terminal of chip U1 outputs a signal that can be recognized by the first control unit. The Aout terminal of chip U1 is grounded through resistor R14.
[0043] It should be noted that the shaping filter circuit provided in this embodiment first inputs the sine wave signal after polarity conversion into chip U1 through the Cin' terminal and Cin terminal of chip U1 for shaping and amplification, and filters the signal output from the Cont' terminal of chip U1 through the RC filter circuit. Then, the filtered signal is input from the Bin terminal of chip U1 into chip U1 for shaping. At the same time, the signal output from the Cout terminal of chip U1 is also input from the Bin' terminal of chip U1 into chip U1 for secondary shaping after passing through the RC filter. Then, the waveforms output from the Bout terminal and Bout' terminal of chip U1 after the secondary shaping are filtered through the RC filter circuit and then input into chip U1 through the Ain' terminal and Ain terminal of chip U1 for tertiary shaping. Finally, the signal is output from the Aout' terminal and Aout terminal of chip U1, which can make the output waveform of the shaping filter circuit more beautiful and less interfering, facilitating the accurate measurement of the frequency of the signal to be measured.
[0044] Specifically, as Figure 5 shown in the figure, the post-stage amplification circuit includes triode Q5, triode Q6, resistor R13, resistor R17, and resistor R18. The base of triode Q5 is connected to the output terminal of the shaping filter circuit. At the same time, the base of triode Q5 is grounded through resistor R13. The collector of triode Q5 is connected to the first control unit. At the same time, the collector of triode Q5 is grounded through resistor R17. The emitter of triode Q5 is connected to the emitter of triode Q6 through resistor R18. The base of triode Q6 is connected to the shaping filter circuit. The collector of triode Q6 is grounded.
[0045] It should be noted that the post-stage amplification circuit provided in this embodiment is a differential amplification circuit. The two input signals of the post-stage amplification circuit are two completely identical reverse square waves output from the Aout' terminal and Aout terminal of chip U1. The single-ended output amplification factor of the post-stage amplification circuit provided in this embodiment is -13.675.
[0046] Further, this embodiment further includes an over - load protection circuit, such as Figure 2 and Figure 6 As shown, the over - load protection circuit consists of two equivalent diodes. Since only one of these two diodes can conduct at a time and the other is in the cut - off state, the voltage drop will be clamped below the forward voltage drop of the diode, thus playing a role in protecting the circuit.
[0047] Specifically, in this embodiment, by applying the input signal between the emitter and base of transistor Q3 and transistor Q2, the reverse breakdown voltage of transistor Q3 or transistor Q2 is 2V, so that the voltage of the entire circuit is clamped below 2V.
[0048] As a specific embodiment of the first control unit provided in this embodiment, as Figure 7 shown, in this embodiment, the first control unit uses an FPGA, and the model of the FPGA in this embodiment is EP2C8Q208C8N. Of course, other models can also be used for the FPGA, and no excessive restrictions are imposed on this.
[0049] Specifically, as Figure 7 shown, the FPGA provided in this embodiment includes a clock signal input terminal, two square - wave signal input terminals, two - bit control signal input terminals, three - bit output timing signal output terminals, and eight - bit data output terminals.
[0050] It should be noted that the frequency of the input clock signal in this embodiment is 50MHz. In this embodiment, the 50MHz clock signal is divided to obtain a 1MHz clock, and the 50MHz clock signal is phase - locked and multiplied to obtain a 200MHz clock;
[0051] When the input signal A of the FPGA and the current input state of the input signal are "01", a high - impedance state is output, that is, the output signal is not counted and frequency measurement is directly performed; when the input signal A of the FPGA and the current input state of the input signal are "10", A or B is output, that is, time - interval measurement is performed; when the input signal A of the FPGA and the current input state of the input signal are "11", A is output, that is, duty - cycle measurement is performed;
[0052] When the state of the control signal input terminal of the FPGA is "01", frequency information is output; when the state of the control signal input terminal of the FPGA is "10", duty - cycle information is output; if it is "11", time - interval information is output.
[0053] As a specific embodiment of the second control unit provided in this embodiment, in this implementation, the second control unit uses a single - chip microcomputer. Specifically, the model of the single - chip microcomputer used in this embodiment is MSP430. Of course, other models can also be used, and no excessive restrictions are imposed on this.
[0054] The single-chip microcomputer provided in this embodiment selects to receive data according to the input information of the keyboard and broadcasts the received data. Specifically, as Figure 8 shown, this embodiment includes four buttons. When the first button is pressed, a control signal "01" is sent, and the frequency measurement data sent by the FPGA is received, and then it is displayed through the liquid crystal display and broadcasted by voice; when the second button is pressed, a control signal "10" is sent, and the duty cycle measurement data sent by the FPGA is received, and then it is displayed through the liquid crystal display; when the third button is pressed, a control signal "11" is sent, and at this time the time interval measurement data sent by the FPGA is received, and then it is displayed through the liquid crystal display; if no button is pressed or the reset button is pressed, the main interface is returned for display, otherwise the measurement data is continuously displayed.
[0055] As a specific embodiment of the voice broadcast unit provided in this embodiment, as Figure 9 shown, the voice broadcast unit provided in this embodiment includes a voice synthesis module and a speaker. Specifically, the model of the voice synthesis module provided in this embodiment is SYN6288. This voice synthesis module communicates with the single-chip microcomputer, receives the information transmitted by the single-chip microcomputer and broadcasts it through the speaker.
[0056] The digital frequency meter provided in this embodiment has a frequency measurement function. Specifically, this embodiment provides a frequency measurement method for the above digital frequency meter. This frequency measurement method includes:
[0057] Processing the signal to be measured to obtain a square wave signal;
[0058] Simultaneously counting the standard signal and the square wave signal;
[0059] Calculating the frequency of the signal to be measured according to the counting result. The frequency calculation method of the signal to be measured is:
[0060] where N x is the count value of the signal to be measured, N S is the count value of the standard signal, and f s is the frequency of the standard signal.
[0061] Furthermore, if the error of the standard frequency f s is ignored, the possible relative error generated by frequency measurement is:
[0062]
[0063] where f xe is the accurate value of the frequency of the signal to be measured.
[0064] In actual measurement, since the start and stop times of counting f x are both triggered by the rising edge of this signal, so within the gate time T for fx Count N X There is no error; for f s Count N S The error is at most one number different, that is, |ΔN s | ≤ 1, then the measured frequency is:
[0065]
[0066] Substitute Equation 3 and Equation 1 into Equation 2 and simplify to get:
[0067]
[0068] It can be seen from Equation 4 that the relative error of the measured frequency has nothing to do with the magnitude of the frequency of the measured signal, and is only related to the gate time and the standard signal frequency. That is, equal-precision measurement is completed within the entire test frequency band. At the same time, it can also be seen from Equation 4 that the longer the gate time and the higher the standard frequency, the smaller the relative error of the measured frequency. Therefore, the measurement accuracy of this embodiment can be adjusted by adjusting the clock signal frequency of this embodiment.
[0069] Furthermore, the period of the measured signal is obtained by taking the reciprocal of the measured frequency.
[0070] The digital frequency meter provided by this embodiment also includes a time interval measurement function. Specifically, as Figure 10 shown, the time interval measurement measures the time interval Td between two input signals A and B with the same frequency and period. First, perform an exclusive OR operation on input signal A and input signal B. The high-level time of the obtained signal is Td in the figure, that is, the time interval between input signal A and input signal B. Then, as long as the FPGA counts when detecting the rising edge of the signal after detecting A XOR B, and assume the count value at this time is N S (the count value of the standard signal during this period of time), then the time interval between the two input signals A and B can be obtained as: (where fs is the frequency of the standard signal).
[0071] The digital frequency meter provided by this embodiment also includes a duty cycle measurement function. Specifically, as Figure 11 shown, when the FPGA detects the high level of the measured signal, it starts the counter to count. When the low level arrives, it stops the counter. Then the count value corresponding to the high level is N1. When detecting the low level of the measured signal, start the counter to count. When the high level arrives, stop the counter, and the count value corresponding to the low level can be obtained as N2. Then the duty cycle can be obtained as:
[0072]
[0073] This embodiment also provides a frequency measurement system, including:
[0074] A frequency division module that performs phase-locked frequency multiplication and / or frequency division on the output information of the crystal oscillator to measure at least two clock signals;
[0075] Specifically, in this embodiment, the FPGA performs phase-locked frequency multiplication and frequency division on a 50 MHz crystal oscillator to obtain 200 MHz and 1 MHz clocks respectively, preparing for the clocks required for the following frequency measurement, time interval measurement, and duty cycle measurement;
[0076] A frequency measurement module that measures the frequency of the input signal;
[0077] Specifically, the square wave signal sent by the pre-processing unit is measured to obtain the frequency information of the signal to be measured. Since the period is the reciprocal of the frequency, it is not measured separately;
[0078] A time interval measurement module that processes the input signal A and the input signal B and measures the interval data between them;
[0079] A duty cycle measurement module that measures the high and low level times within one period of the input signal A or the input signal B through the FPGA and sends them to the single-chip microcomputer for calculating the duty cycle;
[0080] An integrated processing module that stores the data of the frequency measurement module, the time interval measurement module, and the duty cycle measurement module, and is also used to communicate with the single-chip microcomputer, receive the control signal of the single-chip, and select the data required by the single-chip microcomputer for transmission.
[0081] In summary, the digital frequency meter provided by this embodiment has the functions of measuring frequency, duty cycle, and time interval, and the measurements are all completed in the FPGA, and the measurement accuracy is also controlled by the FPGA.
[0082] Those of ordinary skill in the art of this technology can understand that all or part of the steps carried out by the method of the above embodiment can be completed by instructing relevant hardware through a program. The program can be stored in a computer-readable storage medium. When the program is executed, it includes one or a combination of the steps of the method embodiment.
[0083] In the description of this specification, the description with reference to terms such as "one embodiment", "some embodiments", "example", "specific example", or "some examples" means that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic expressions of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials, or characteristics described can be combined in a suitable manner in any one or more embodiments or examples.
[0084] The above embodiments are only descriptions of the preferred embodiments of the present invention, and do not limit the scope of the present invention. Without departing from the spirit of the present invention's design, various deformations and improvements made by those of ordinary skill in the art to the technical solutions of the present invention should all fall within the protection scope determined by the claims of the present invention.
Claims
1. A digital frequency meter, characterized in that, Including: A preprocessing unit, to which a signal to be measured is output after passing through the preprocessing unit and then sent to a first control unit. The preprocessing unit includes a polarity conversion circuit, which includes a triode Q1, a triode Q4, a variable resistor Ra, a resistor R15, a resistor R2, and a capacitor C8. The collector of the triode Q1 is connected to the signal to be measured, the base of the triode Q1 is connected to the base of the triode Q4, the base of the triode Q1 is connected to the power supply through the variable resistor Ra, the emitter of the triode Q1 is connected to the collector of the triode Q4 through the resistor R15, the emitter of the triode Q1 is grounded through the resistor R2, the emitter of the triode Q4 is connected to the power supply, and at the same time, the emitter of the triode Q4 is grounded through the capacitor C8; A first control unit, which is connected to the preprocessing unit to measure the output information of the preprocessing unit. The first control unit is also connected to a second control unit to transmit the measurement information to the second control unit; A second control unit, the input end of which is connected to a keyboard to output measurement information according to the input information of the keyboard; A voice broadcast unit, which is connected to the second control unit to perform voice broadcast on the output information of the second control unit.
2. The digital frequency meter according to claim 1, wherein The polarity conversion circuit converts the input signal into a unipolar signal.
3. The digital frequency meter according to claim 2, wherein The preprocessing unit further includes a shaping and filtering circuit, which is connected to the polarity conversion circuit to convert the output signal of the polarity conversion circuit into a signal recognizable by the first control unit.
4. The digital frequency meter according to claim 3, characterized in that, The shaping and filtering circuit includes a chip U1, an RC filtering circuit, a resistor R10, a resistor R12, and a resistor R14. The Cin terminal and the Cin' terminal of the chip U1 are connected to the polarity conversion circuit. The Cout' terminal of the chip U1 is connected to the Bin terminal and the Bout terminal of the chip U1 through the RC filtering circuit. The Cout terminal of the chip U1 is connected to the Bin' terminal of the chip U1. The Bin' terminal of the chip U1 is grounded through the resistor R10. The Ain terminal and the Bout' terminal of the chip U1 are grounded through the resistor R12. The Aout' terminal of the chip U1 outputs the signal recognizable by the first control unit. The Aout terminal of the chip U1 is grounded through the resistor R14.
5. The digital frequency meter according to claim 3, characterized in that, The preprocessing unit further includes a post-stage amplification circuit, the input end of which is connected to the output end of the shaping and filtering circuit, and the output end of which is connected to the first control unit.
6. The digital frequency meter according to claim 5, characterized in that, The post-stage amplification circuit includes a triode Q5, a triode Q6, a resistor R13, a resistor R17, and a resistor R18. The base of the triode Q5 is connected to the output end of the shaping and filtering circuit. At the same time, the base of the triode Q5 is grounded through the resistor R13. The collector of the triode Q5 is connected to the first control unit. At the same time, the collector of the triode Q5 is grounded through the resistor R17. The emitter of the triode Q5 is connected to the emitter of the triode Q6 through the resistor R18. The base of the triode Q6 is connected to the shaping and filtering circuit, and the collector of the triode Q6 is grounded.
7. The digital frequency meter according to claim 1, wherein The voice broadcast unit includes a voice synthesis module and a speaker. The input end of the voice synthesis module is connected to the second control unit, and the output end of the voice synthesis module is connected to the speaker.
8. A frequency measurement method for the digital frequency meter according to claim 1, characterized in that Comprising: Processing the signal to be measured to obtain a square wave signal; Counting the standard signal and the square wave signal simultaneously; Calculate the frequency of the signal to be measured according to the counting result, and the frequency calculation method of the signal to be measured is as follows: , where is the count value of the signal to be measured, is the count value of the standard signal, is the frequency of the standard signal.
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