Opening process of amorphous carbon layer

Abstract

A method for opening an amorphous carbon layer mask beneath a hard mask is provided. Opening the amorphous carbon layer mask comprises: performing one or more cycles, wherein each cycle comprises an opening phase and a cleaning phase of the amorphous carbon layer mask. The opening phase of the amorphous carbon layer mask comprises: flowing an opening gas into a plasma processing chamber, wherein the opening gas comprises an oxygen-containing component; generating a plasma from the opening gas, wherein the plasma etches features in the amorphous carbon layer mask; and stopping the flow of the opening gas. The cleaning phase comprises: flowing a cleaning gas into the plasma processing chamber, wherein the cleaning gas comprises a hydrogen-containing component, a carbon-containing component, and a halogen-containing component; generating a plasma from the cleaning gas; and stopping the flow of the cleaning gas into the plasma processing chamber.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Application No. 62 / 626,264, filed on February 5, 2018, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a method of forming a semiconductor device on a semiconductor wafer, and more particularly, to opening an amorphous carbon layer in the formation of a semiconductor device. Background Art

[0004] In forming semiconductor devices, holes are formed. In memory devices, memory holes with high aspect ratios can be formed. The amorphous carbon layer mask can be used as a mask for etching memory holes with high aspect ratios. Summary of the invention

[0005] In order to achieve the aforementioned objectives and in accordance with the objectives of the present disclosure, a method for opening an amorphous carbon layer mask below a hard mask is provided. Opening the amorphous carbon layer mask below the hard mask includes: performing one or more cycles in a plasma processing chamber, wherein each cycle includes an opening phase and a cleaning phase of the amorphous carbon layer mask. The opening phase of the amorphous carbon layer mask includes: flowing an opening gas into the plasma processing chamber, wherein the opening gas includes an oxygen-containing component; generating plasma from the opening gas in the plasma processing chamber, wherein the plasma etches features in the amorphous carbon layer mask; and stopping the opening gas from flowing into the plasma processing chamber. The cleaning phase includes: flowing a cleaning gas into the plasma processing chamber, wherein the cleaning gas includes a hydrogen-containing component, a carbon-containing component, and a halogen-containing component; generating plasma from the cleaning gas in the plasma processing chamber; and stopping the cleaning gas from flowing into the plasma processing chamber.

[0006] These and other features of the present disclosure will be described in greater detail below in the detailed description of the embodiments and in conjunction with the following figures. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] The present disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like reference numerals refer to similar elements and in which:

[0008] Figure 1 It is a high-level flowchart of the implementation plan.

[0009] Figure 2 A schematic diagram of an etching chamber that may be used in one embodiment is schematically shown.

[0010] Figure 3 is a schematic diagram of a computer system that can be used to practice an embodiment.

[0011] Figures 4A-4D is a schematic cross-sectional view of a stack processed according to one embodiment.

[0012] Figure 5A is a top view of a portion of a stack.

[0013] Figure 5B is a cross-sectional view of the stack

[0014] Figure 6 is a more detailed flowchart of the opening phase.

[0015] Figure 7 is a more detailed flow chart of the cleaning phase. DETAILED DESCRIPTION

[0016] The provided embodiments will now be described in detail with reference to several preferred embodiments thereof as shown in the accompanying drawings. In the following description, numerous specific details are set forth in order to thoroughly understand the present disclosure. However, it will be apparent to those skilled in the art that the present disclosure may be implemented without some or all of these specific details. In other cases, well-known processing steps and / or structures are not described in detail to avoid unnecessarily obscuring the present disclosure.

[0017] Figure 1 1 is a high level flow chart of an embodiment. In this embodiment, a stack having an amorphous carbon layer mask is placed in a plasma processing chamber (step 104). Amorphous carbon is a non-crystalline carbon material. The amorphous carbon layer mask is opened using a mask (step 108), which includes a single step opening process, or one cycle of an opening phase and a cleaning phase, or multiple cycles of an opening phase (step 112) and a cleaning phase (step 116). Additional processing steps may be provided (step 120). A memory hole is formed, and the stack is removed from the plasma processing chamber (step 124).

[0018] Example

[0019] Figure 2A plasma processing system 200 that can be used to process a stack 201 is schematically shown according to one embodiment. The plasma processing system 200 includes a plasma reactor 202 having a plasma processing chamber 204 surrounded by a chamber wall 252. A plasma power supply 206 tuned by a matching network 208 provides power to a transformer coupled power (TCP) coil 210 positioned near a power window 212 to generate a plasma 214 in the plasma processing chamber 204 by providing inductively coupled power. The TCP coil (upper power supply) 210 can be configured to generate a uniform diffusion profile in the plasma processing chamber 204. For example, the TCP coil 210 can be configured to generate a toroidal power distribution in the plasma 214. The power window 212 is provided to isolate the plasma processing chamber 204 from the TCP coil 210 while allowing energy to be transferred from the TCP coil 210 to the plasma processing chamber 204. A wafer bias power supply 216 tuned by a matching network 218 provides power to an electrode 220 to set a bias voltage on the stack 201 supported on the electrode 220. The controller 224 sets points for the plasma power supply 206 and the wafer bias power supply 216 .

[0020] The plasma power supply 206 and the wafer bias power supply 226 can be configured to operate at a specific radio frequency, such as 13.56 megahertz (MHz), 27 MHz, 2 MHz, 1 MHz, 400 kilohertz (kHz), or a combination thereof. The plasma power supply 206 and the wafer bias power supply 216 can be appropriately sized to provide a range of power to achieve the desired processing performance. For example, in one embodiment, the range of power that the plasma power supply 206 can supply is 50 to 5000 watts, and the range of bias voltage that the wafer bias power supply 216 can supply is 0 to 3000 volts (V). In addition, the TCP coil 210 and / or electrode 220 can include two or more sub-coils or sub-electrodes, which can be powered by a single power supply or by multiple power supplies.

[0021] like Figure 2 As shown, the plasma processing system 200 further includes a gas source / gas supply mechanism 230. The gas source / gas supply mechanism 230 provides gas to a gas feed device 236 in the form of a nozzle. The process gas and byproducts are removed from the plasma processing chamber 204 via a pressure control valve 242 and a pump 244. The pressure control valve 242 and the pump 244 can also play a role in maintaining a specific pressure in the plasma processing chamber 204. The gas source / gas supply mechanism 230 is controlled by a controller 224. The Kiyo from Lam Research (Fremont, CA) can be used to practice the embodiments.

[0022] Figure 3 300 is a high-level block diagram showing a computer system 300 suitable for implementing the controller 224 used in the embodiment. The computer system can have many physical forms from integrated circuits, printed circuit boards, and small handheld devices to supercomputers. The computer system 300 includes one or more processors 302, and may also include an electronic display device 304 (for displaying graphics, text, and other data), a main memory 306 (e.g., a random access memory (RAM)), a storage device 308 (e.g., a hard drive), a removable storage device 310 (e.g., an optical drive), a user interface device 312 (e.g., a keyboard, a touch screen, a keypad, a mouse or other pointing device, etc.) and a communication interface 314 (e.g., a wireless network interface). The communication interface 314 allows software and data to be transmitted between the computer system 300 and external devices via a link. The system may also include a communication infrastructure 316 (e.g., a communication bus, a cross-connect bar, or a network) connected to the above-mentioned devices / modules.

[0023] The information transmitted via the communication interface 314 may be in the form of signals such as electronic, electromagnetic, optical or other signals that can be received by the communication interface 314 via a communication link that carries the signals and may be implemented using wires or cables, optical fibers, telephone lines, cellular telephone links, radio frequency links and / or other communication channels. Using such a communication interface, it is contemplated that one or more processors 302 may receive information from a network during the execution of the above method steps, or may output information to a network. Furthermore, method embodiments of the present invention may be executed solely on a processor, or may be executed over a network such as the Internet with a remote processor that shares a portion of the processing.

[0024] The term "non-transitory computer-readable medium" is generally used to refer to media such as main memory, secondary memory, removable storage devices, and storage devices such as hard disks, flash memory, disk drive memory, CD-ROMs, and other forms of persistent memory, and should not be interpreted as covering transient subject matter such as carrier waves or signals. Examples of computer code include machine code (such as that produced by a compiler) and files containing higher-level code executed by a computer using an interpreter. Computer-readable media may also be computer code that is transmitted by a computer data signal embodied in a carrier wave and represents a sequence of instructions that can be executed by a processor.

[0025] In one embodiment, the stack includes an ONON (silicon oxide (SiO 2 ), silicon nitride (SiN), silicon oxide, silicon nitride and repeat) stack. Figure 4Ais a schematic cross-sectional view of a stack 201, the stack 201 including a substrate 404 and a memory stack 408 on the substrate 404, the memory stack 408 including a plurality of silicon oxide (SiO 2 ) layer 416 and silicon nitride layer 412 double layer, silicon oxide (SiO 2 ) layer 416 is on top of the silicon nitride layer 412. The multi-layer mask is above the memory stack 408. In this embodiment, the multi-layer mask includes the following structure: an amorphous carbon layer (ACL) mask 420 is below a dielectric anti-reflective coating (DARC) 424, which is below a bottom anti-reflective coating (BARC) 428, which is below a patterned photoresist mask 432. In this embodiment, a photolithography process is used to pattern the patterned photoresist mask 432 to provide mask features 436. Using the patterned photoresist mask 432, an opening process is used to pattern the BARC 428 and the DARC 424. Such a process can remove the patterned photoresist mask 432. In this embodiment, the DARC 424 is silicon oxynitride (SiON). The DARC 424 is used as a hard mask to open the ACL mask 420.

[0026] Figure 5A is a top view of a portion of stack 201 showing the top of patterned photoresist mask 432 and mask features 436. Mask features 436 are cylindrical holes having a circular cross-section, as shown.

[0027] like Figure 2 As shown, the stack 201 is placed in the plasma processing chamber 204. After the stack 201 is placed in the plasma processing chamber 204, the amorphous carbon layer mask is opened (step 108). The amorphous carbon layer mask opening (step 108) includes a single step opening process, or one cycle of an opening stage and a cleaning stage, or multiple cycles of an opening stage (step 112) and a cleaning stage (step 116). In this embodiment, the stack 201 is maintained at a temperature of at least 20°C.

[0028] Figure 6 1 is a more detailed flow chart of the opening phase (step 112). An opening gas is flowed into the plasma processing chamber 204 (step 604), wherein the opening gas comprises an oxygen-containing component. In this embodiment, the opening gas is substantially composed of about 100 standard cubic centimeters per minute (sccm) to about 3000 sccm of oxygen (O 2 ) and carbonyl sulfide (COS) from about 10 sccm to about 500 sccm and / or SO 2 In addition, methane (CH4 ), fluoromethane (CH 3 F), difluoromethane (CH 2 F 2 ), hydrogen bromide (HBr), chlorine (Cl 2 ), silicon tetrachloride (SiCl 4 ), Silicon tetrafluoride (SiF 4 ), nitrogen (N 2 ), helium (He) or argon (Ar) to obtain good etching performance. Plasma is generated in the plasma processing chamber 204 by opening the gas (step 608). The plasma etches features in the ACL mask 420. In this example, the plasma is created by providing a radio frequency (RF) power between about 300 watts and about 6000 watts at about 13.56 MHz to the plasma processing chamber 204 through the TCP coil 210. A pulsed bias with an amplitude of 100 volts to 3000 volts is provided (step 612) to the stack 201 from the wafer bias voltage power supply 216 through the electrode 220. In this embodiment, the bias has an RF frequency of 13.56 MHz, 27 MHz, 2 MHz, 1 MHz or 400 kHz, or is a continuous wave, or is a pulse frequency between about 1 Hertz (Hz) and about 10000 Hz and the duty cycle is between about 3% and about 99%. After about 5 seconds to about 600 seconds, the flow of the open gas into the plasma processing chamber is stopped (step 616).

[0029] Figure 4B 4 is a schematic cross-sectional view of stack 201 after the opening phase (step 112) is completed. Mask feature 436 has been partially etched into ACL mask 420. BARC 428 and patterned photoresist mask 432 ( Figure 4B 424 is removed, thereby exposing the DARC 424 to the plasma. The plasma sputters some of the DARC 424. The sputtered DARC 424 is redeposited and forms a redeposited hard mask 440 containing silicon. The redeposited hard mask 440 can change the CD and circular cross-section of the mask feature 436.

[0030] Figure 7 1 is a more detailed flow chart of the cleaning phase (step 116). A cleaning gas is flowed into the plasma processing chamber 204 (step 704), wherein the cleaning gas comprises a hydrogen-containing component, a carbon-containing component, and a halogen-containing component. In this embodiment, the cleaning gas is substantially composed of about 10 sccm to about 1000 sccm of fluoromethane (CH 3 F) composition. Other gases can be added, including CH 2 F 2 , fluoroform (CHF 3 ), carbon tetrafluoride (CF4 ), CH 4 、Nitrogen trifluoride (NF 3 ), sulfur hexafluoride (SF 6 ), N 2 、Ar、He、SiCl 4 , Cl 2 , HBr or SiF 4 ; or alternatively, CH 2 F 2 , CHF 3 and CH 4 . A plasma is generated from the cleaning gas in the plasma processing chamber (step 708). The plasma removes the redeposited hard mask and deposits a carbon-based passivation layer on the top and sidewalls of the mask feature 436. In this example, the plasma is formed by providing an RF power between about 100 watts and about 6000 watts at about 13.56 MHz to the plasma processing chamber 204 through the TCP coil 210. A bias voltage with an amplitude greater than about 500 volts is provided to the stack 201 from the wafer bias power supply 216 through the electrode 220 (step 712). In this embodiment, the bias has an RF frequency of about 13.56 MHz, 27 MHz, 2 MHz, 1 MHz, or 400 kHz and is a continuous wave, or a pulse frequency of about 1 Hz to 10,000 Hz and a duty cycle of about 3% to 99%. After about 3 seconds to about 100 seconds, the cleaning gas is stopped from flowing into the plasma processing chamber (step 716).

[0031] Figure 4C is a schematic cross-sectional view of the stack 201 after the cleaning phase (step 116) is completed. The cleaning phase (step 116) removes the redeposited hard mask 440 ( Figure 4C (not shown). 3 The halogen-containing component of F provides the halogen. The halogen is used to etch away the re-deposited hard mask. 3 F has a carbon-containing component and a hydrogen-containing component. The carbon-containing component and the hydrogen-containing component are used to form a carbon-containing sidewall passivation 444 on the sidewalls of the mask feature 436.

[0032] The opening (step 108 ) continues for a number of cycles including an opening phase (step 112 ) and a cleaning phase (step 116 ) until the opening of the ACL mask 420 is complete. Figure 4D 4 is a schematic cross-sectional view of the stack 201 after the opening of the ACL mask 420 is completed (step 108). In this embodiment, in order to check the bottom shape of the memory hole after the carbon hole is formed, the bottom shape of the memory hole can be checked by forming a carbon hole on the SiO 2 The opening of the pit formed in the layer 416 (step 108) slightly etches the SiO2 below the ACL mask 420. 2Layer 416. Figure 5B is a cross-sectional view of stack 201 along cut line 5B-5B after the opening of ACL mask 420 is completed (step 108). Some of the cross-sections of mask features 436 are elliptical rather than circular. Some of the cross-sections of mask features have larger CDs, and some of the cross-sections of mask features have smaller CDs. In various embodiments, the opening of the ACL mask can be a flashing or breakthrough process.

[0033] Additional processing may be performed on stack 201 (step 120). For example, plasma processing chamber 204 may be used to etch memory stack 408. Stack 201 is removed from plasma processing chamber 204 (step 124). After stack 201 is removed from plasma processing chamber 204, additional processing may be performed.

[0034] By keeping the stack at a temperature of at least 20°C, more circular cross-sections are obtained. In other embodiments, the stack 201 is kept at a temperature of at least 25°C. In addition, by providing a cleaning phase, the redeposited hard mask is removed. Removing the redeposited hard mask can reduce the CD difference between features. Otherwise, CD differences and changes in feature size and shape will be caused by the redeposited hard mask on the feature sidewalls. The sidewall passivation 444 reduces the warpage of the mask feature 436. Various parameters are adjusted to reduce the CD difference between features, maintain cross-sectional roundness, minimize warpage, and maintain a vertical etch profile. This embodiment provides parameters: wafer temperature to maintain roundness, cleaning gas chemistry to reduce warpage, high cleaning bias to remove the redeposited hard mask, and duty cycle as additional adjustment knobs to provide a recipe that minimizes CD differences, roundness changes, and warpage. Minimization of CD differences, roundness changes, and warpage reduces defects and places contacts more closely together. The time period of each phase provides another adjustment knob.

[0035] Prior art processes provide for a cleaning phase which utilizes a cleaning gas CF 4 NF 3 , SF 6 For example, CF 4 The cleaning gas requires a lower bias to remove the redeposited hard mask and also requires a lower temperature. To control the various characteristics, this process allows only a single parameter, CF 4 Flow. A recipe that is optimized for roundness will not be optimized for warpage, hole-to-hole variation, and hole bottom roundness.

[0036] Roundness is measured as the roundness ratio of the feature's minor axis divided by the feature's major axis, or sometimes vice versa. The major axis will be the feature's widest dimension, while the minor axis will be the feature's narrowest dimension. Figure 5B , for one of the mask features 436, the major axis is shown as dimension J and the minor axis is shown as dimension N. In experiments, it was found that the circularity ratio was improved (closer to 1.0, which is a perfect circle) by the prior art without increasing feature-to-feature CD variation or increasing warpage. When the resulting ACL mask 420 is used to etch features in the memory stack 408, the resulting mask will have improved defect performance.

[0037] In one embodiment, the CD of the mask features 436 is less than about 300 nanometers (nm) and the thickness of the ACL mask 420 is at least 600 nm, so that the aspect ratio of the mask features is at least about 2:1. In some embodiments, the bias voltage during the cleaning phase has a magnitude of at least 500 volts. More preferably, the bias voltage during the cleaning phase has a magnitude of at least about 1000 volts. More preferably, the bias voltage during the cleaning phase has a magnitude between about 1200 volts and about 3000 volts. Preferably, the bias voltage during the opening phase has a magnitude of less than 3000 volts. More preferably, the bias voltage during the opening phase has a magnitude of no greater than about 1500 volts. In other embodiments, different mixtures and ratios of hydrofluorocarbons can be used to further tune the process to improve roundness while minimizing feature-to-feature variation and warpage. In one embodiment, another halogen can be used instead of fluorine. However, fluorine has been found to work in one embodiment. Preferably, the cleaning gas consists essentially of CHF 3 , CH 2 F 2 and CH 3 At least one or more components of F.

[0038] Without being bound by theory, it is believed that during the cleaning phase with high bias, the redeposited hard mask is removed and at the same time, or during the portion of the duty cycle without bias, a sidewall passivation is deposited without removing the redeposited hard mask and / or a carbon-based deposit is deposited on top. The formation of the sidewall passivation reduces the warpage. In some embodiments, the hard mask is a silicon-containing material. Preferably, the hard mask is silicon oxynitride (SiON), SiO 2 , SiN, silicon (Si), metal, doped carbon, or doped Si, wherein the redeposited hard mask comprises silicon or metal. In various embodiments, the opening gas is halogen-free because halogen is not required to etch the ACL mask 420, and the cleaning gas is oxygen-free because the presence of oxygen reduces the deposition of the sidewall passivation 444.

[0039] Although the present disclosure has been described according to several preferred embodiments, there are changes, modifications, permutations, and various alternative equivalents that fall within the scope of the present disclosure. It should also be noted that there are many alternatives to the methods and devices of the present disclosure. Therefore, the following appended claims are intended to be interpreted as including all such changes, modifications, permutations, and various alternative equivalents that fall within the true spirit and scope of the present disclosure.

Claims

1. A method for opening an amorphous carbon layer mask beneath a hard mask, comprising performing one or more cycles in a plasma processing chamber, wherein each cycle comprises: The opening stage of the amorphous carbon layer mask includes: flowing an opening gas into a plasma processing chamber, wherein the opening gas includes an oxygen-containing component; generating a plasma from the open gas in the plasma processing chamber, wherein the plasma etches features in the amorphous carbon layer mask; and stopping the flow of the open gas into the plasma processing chamber; and The cleaning phase includes: flowing a cleaning gas into the plasma processing chamber, wherein the cleaning gas comprises a hydrogen-containing component, a carbon-containing component, and a halogen-containing component; generating a plasma from the cleaning gas in the plasma processing chamber; and stopping the flow of the cleaning gas into the plasma processing chamber, and The opening phase of the amorphous carbon layer mask forms a redeposited hard mask on features in the amorphous carbon layer mask, and the cleaning phase removes the redeposited hard mask and deposits a carbon-containing layer on sidewalls of the features in the amorphous carbon layer mask.

2. The method according to claim 1, wherein: The hydrogen-containing component, the carbon-containing component, and the halogen-containing component consist essentially of at least one hydrofluorocarbon.

3. The method according to claim 2, wherein: The at least one hydrofluorocarbon is one or more of CHF3, CH2F2 and CH3F.

4. The method according to claim 1, wherein: The hard mask comprises silicon or metal, wherein the re-deposited hard mask comprises silicon or metal.

5. The method according to claim 1, wherein: The hard mask includes at least one of SiON, SiO2, SiN, Si, metal, doped carbon or doped Si, wherein the re-deposited hard mask includes silicon or metal.

6. The method according to claim 1, wherein: The cleaning phase also includes providing a bias voltage having a magnitude greater than 500 volts.

7. The method according to claim 6, wherein: The bias voltage is pulsed and has a duty cycle between 3% and 99%.

8. The method according to claim 6, wherein: The opening stage of the amorphous carbon layer mask further includes providing a pulse bias voltage with an amplitude less than 1500 volts.

9. The method of claim 1, further comprising maintaining the mask of the amorphous carbon layer at a temperature of at least 20°C during the opening phase of the mask of the amorphous carbon layer and during the cleaning phase.

10. The method according to claim 1, wherein: The opening gas includes oxygen and COS or SO2.

11. The method according to claim 1, wherein: The cleaning stage also includes providing a pulsed bias voltage having an amplitude greater than 1000 volts.

12. The method according to claim 11, wherein: The duty cycle of the pulse bias voltage is between 20% and 80%.

13. The method according to claim 11, wherein: The opening stage of the amorphous carbon layer mask further includes providing a pulse bias with an amplitude less than 1000 volts.

14. The method of claim 1, further comprising maintaining the mask of the amorphous carbon layer at a temperature of at least 25°C during the opening phase of the mask of the amorphous carbon layer and during the cleaning phase.

15. The method according to claim 1, wherein: The opening gas is halogen-free, and wherein the cleaning gas is oxygen-free.

16. The method according to claim 1, wherein: The opening of the amorphous carbon layer mask opens features having a CD less than 300 nm.

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