Improves high voltage startup voltage rating for PWM controllers with internal high voltage startup circuitry

Abstract

Various embodiments of the present disclosure relate to a power supply circuit having an improved high voltage startup voltage rating for a PWM controller with an internal high voltage startup circuit. The power supply has a transformer with a primary winding and a secondary winding. The first terminal of the primary winding is coupled to a power supply input. The PFC includes a low voltage circuit for correcting the power factor of a power signal, specifically a power input that receives the power supply voltage during normal operation; a feedback input coupled to the first terminal of the secondary winding; and a gate drive output. During startup, the high voltage startup circuit powers the low voltage circuit. The peripheral circuit includes a transient voltage suppression diode having an anode coupled to power the high voltage startup circuit and a cathode coupled to the power input, the diode having an anode coupled to the first terminal of the secondary winding and a cathode coupled to the power input of the low voltage circuit. A capacitor is coupled between the power input and ground. A transistor has a drain coupled to the second terminal of the primary winding and a gate coupled to the gate drive output.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 820,390, filed on March 19, 2019, the contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a high voltage startup circuit for an analog PWM controller, and in particular, to increasing the startup voltage rating of a PWM controller having an internal high voltage startup circuit. Background Art

[0004] Figure 1 A block diagram of a typical prior art power supply 10 is shown. Power supply 10 includes a filter 12 that receives an AC voltage from an AC mains 11. Filter 12 regulates the AC voltage and supplies the regulated AC voltage to a bridge rectifier 13. Bridge rectifier 13 rectifies the regulated AC voltage to produce a rectified DC voltage, which is smoothed by capacitor C1. A power factor controller (PFC) 14 receives the rectified DC voltage and, during normal operation, provides a constant DC output voltage to subsequent PFC stages (e.g., a DC-DC converter) with a higher power factor than the rectified DC voltage.

[0005] While it is possible to power the PFC 14 during startup from a brownout state using an external voltage divider that divides the voltage of the rectified mains signal down to a level that the PFC 14 can tolerate at that point, such a voltage divider would undesirably maintain a constant power dissipation even after the PFC 14 reaches normal operating conditions and is switching as designed. This quiescent power dissipation would be even greater and even less desirable in higher voltage applications and / or where the rectified power signal is multi-phase.

[0006] Therefore, when starting from a power-off state, it is not preferred to start the PFC 14 directly by using a voltage divider powered by the rectified DC voltage. Instead, a dedicated high-voltage startup circuit 15 (external to the PFC 14) can be used to power the PFC 14 only when starting from a power-off state and until the PFC 14 is properly switching in normal operation. Once the PFC supply voltage is generated by the switching action during normal operation, the external high-voltage startup circuit is disabled to minimize quiescent power consumption.

[0007] In some cases, it is desirable that the high voltage startup circuit is not external to the PFC 14, but rather integrated within the PFC. Figure 2. Here, peripheral circuitry 17 receives the rectified power signal and appropriately couples it to a power factor controller (PFC) package 18. PFC controller 18 features an internal, on-chip high-voltage startup generator 18a and a low-voltage control circuit 18b integrated in the same package. High-voltage startup integrated circuit 18a powers low-voltage integrated circuit 18b during startup conditions until low-voltage integrated circuit 18b reaches normal operating conditions, at which point low-voltage integrated circuit 18b is then powered via peripheral circuitry 17 and also disables the high-voltage startup circuitry. Low-voltage integrated circuit 18b cooperates with peripheral circuitry 17 to provide a stable DC voltage with improved power factor.

[0008] Although the above design is a clear improvement over using a simple voltage divider, improvements are still needed, especially for high voltage operation and multiphase operation. Through the innovative enhancements described below, it is possible to use a PWM controller with internal high voltage startup for 230V mains operation, even for multiphase and higher voltage power supply applications. Summary of the Invention

[0009] A power supply is disclosed herein, including: a power signal input for receiving a power signal; a transformer having a primary winding and a secondary winding, wherein a first terminal of the primary winding is coupled to the power signal input; and a power factor controller. The power factor controller includes a low-voltage circuit configured to correct a power factor of the power signal, the low-voltage circuit having: a supply voltage input for receiving a supply voltage for powering the low-voltage circuit during normal operation; at least one feedback input coupled to a first terminal of the transformer secondary winding; and a gate drive output. The power factor controller also includes a high-voltage startup circuit configured to power the low-voltage circuit at least during startup of the power supply. The peripheral circuit includes: at least one transient voltage suppression diode having an anode coupled to power the high voltage startup circuit for powering the high voltage startup circuit, and a cathode coupled to the power signal input, the diode having an anode coupled to a first terminal of the secondary winding of the transformer, and a cathode coupled to the power supply voltage input of the low voltage circuit; a power supply capacitor coupled between the low voltage circuit power supply voltage input and ground; and a MOSFET having a first conductive terminal coupled to the second terminal of the secondary winding of the transformer, and a gate terminal coupled to the gate drive output of the low voltage circuit.

[0010] The at least one transient voltage suppression diode may be sized to operate to break down in response to the high voltage startup circuit drawing a startup current from the power signal input through the at least one transient voltage suppression diode.

[0011] The at least one transient voltage suppression diode may be sized such that a startup current drawn by the high voltage startup circuit from the power signal input through the at least one transient voltage suppression diode is insufficient to cause the at least one transient voltage suppression diode to operate into breakdown, and the peripheral circuit may include at least one resistor coupled between a cathode of the at least one transient voltage suppression diode and ground to cause additional startup current to be drawn from the power signal input through the at least one transient voltage suppression diode.

[0012] The at least one resistor may have a resistance value such that the sum of the startup current and the additional startup current through the at least one resistor is sufficient to cause the at least one transient voltage suppressor diode to operate in breakdown, and such that the startup current due to the at least one resistor itself is insufficient to cause the at least one transient voltage suppressor diode to operate in breakdown.

[0013] The at least one transient voltage suppressor diode may be a plurality of transient voltage suppressor diodes connected in series.

[0014] The low voltage circuit may generate a gate drive signal at the gate drive output in response to an input received at the at least one feedback input, the gate drive signal causing switching of the MOSFET causing current to flow out of the first terminal of the secondary winding of the transformer toward a power supply input of the low voltage circuit.

[0015] The current flowing from the first terminal of the secondary winding may charge the power supply capacitor, and when the power supply capacitor is charged to a threshold level, startup of the power supply is completed and normal operation of the power supply may begin.

[0016] A load or a DC-DC converter may be coupled to the second terminal of the primary winding of the transformer via the series-coupled diode and the parallel-coupled diode.

[0017] The power supply may further include a filter coupled to the AC mains and configured to condition a signal received from the AC mains; and a bridge rectifier coupled to the filter and configured to rectify the signal received from the filter to produce a power signal provided to the power signal input.

[0018] Also disclosed herein is a method of operating a power supply. The method includes the following steps: a) operating the power supply during a startup condition by: 1) powering an internal high-voltage startup integrated circuit within a power factor controller package by drawing current from a rectified power input through an internal high-voltage startup integrated circuit and through a reverse-biased transient voltage suppression diode; and 2) powering an internal low-voltage power factor correction integrated circuit within the power factor controller package using the internal high-voltage startup integrated circuit; and b) after startup, operating the power supply during a normal condition by powering the internal low-voltage power factor correction integrated circuit by: 1) using the internal low-voltage power factor correction integrated circuit to switch a transistor coupled to a second terminal of a primary transformer winding having a first terminal coupled to the rectified power input; and 2) drawing normal operating current from a secondary transformer winding magnetically coupled to the primary transformer winding into the internal low-voltage power factor correction integrated circuit.

[0019] The internal high voltage startup integrated circuit draws a startup current from the rectified power input and through the reverse biased transient voltage suppression diode, including the internal high voltage startup integrated circuit drawing a startup current from the rectifier input and through the reverse biased transient voltage suppression diode sufficient to cause the reverse biased transient voltage suppression diode to operate into breakdown.

[0020] Powering the internal high voltage startup integrated circuit further includes drawing an additional startup current from the rectified mains input through a reverse biased transient voltage suppressor diode and through a resistor coupled between an anode of the reverse biased transient voltage suppressor diode and ground, such that a sum of the startup current and the additional startup current through the resistor is sufficient to cause the reverse biased transient voltage suppressor diode to operate into breakdown, but such that the additional startup current through the resistor itself is insufficient to cause the reverse biased transient voltage suppressor diode to operate into breakdown.

[0021] The present invention also discloses a peripheral circuit for a power supply. The peripheral circuit includes a first capacitor and a first resistor connected in parallel between a rectified power signal node and a first intermediate node, a second capacitor and a second resistor connected in parallel between the first intermediate node and a second intermediate node, a third capacitor and a third resistor connected in series between the second intermediate node and ground, a power MOS connected in series between the rectified power signal node and a high voltage input node of a power factor controller, and a Zener diode MOS coupled and configured to protect a power gate.

[0022] The power MOS may be an NMOS transistor having a drain connected to the rectified power signal node, a source connected to the high voltage input node of the power factor controller, and a gate connected to the first intermediate node.

[0023] The Zener diode may have an anode connected to the high voltage input node of the power factor controller and a cathode connected to the first intermediate node.

[0024] Also disclosed herein is a power supply comprising: a power signal input for receiving a power signal; and a transformer having a primary winding and a secondary winding, wherein a first terminal of the primary winding is coupled to the power signal input. The power supply also comprises a power factor controller having: a low-voltage circuit configured to correct the power factor of the power signal, the low-voltage circuit having a power voltage input for receiving a power voltage for powering the low-voltage circuit during normal operation; and a high-voltage startup circuit for powering the low-voltage circuit at least during startup of the power supply. The power supply also comprises: a peripheral circuit having at least one transient voltage suppression diode coupled to supply power to the high-voltage startup circuit for powering the high-voltage startup circuit; a diode coupled between a first terminal of the secondary winding of the transformer and the power voltage input of the low-voltage circuit; a power capacitor coupled between the power voltage input of the low-voltage circuit and ground; and a transistor coupled between a second terminal of the primary winding of the transformer and a PWM comparator input, the transistor being controlled by a gate drive output of the low-voltage circuit.

[0025] At least one transient voltage suppression diode is sized to operate to break down in response to the high voltage startup circuit drawing a startup current from the power signal input.

[0026] The at least one transient voltage suppression diode may be sized such that a startup current drawn from the power signal input by the high voltage startup circuit is insufficient to cause the at least one transient voltage suppression diode to operate in a breakdown manner. The peripheral circuit may further include at least one resistor to cause additional startup current to be drawn from the power signal input through the at least one transient voltage suppression diode.

[0027] The at least one resistor has a resistance value such that a sum of the startup current and the additional startup current is sufficient to operate the at least one transient voltage suppression diode into breakdown.

[0028] The at least one transient voltage suppressor diode may be a plurality of transient voltage suppressor diodes connected in series.

[0029] The low voltage circuit may generate a gate drive signal at the gate drive output in response to an input received at the at least one feedback input, the gate drive signal causing switching of the transistor.

[0030] The current flowing from the first terminal of the secondary winding may charge the power supply capacitor, and when the power supply capacitor is charged to a threshold level, startup of the power supply is completed and normal operation of the power supply may begin. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 is a block diagram of a prior art power supply in which the PFC is externally powered during startup.

[0032] Figure 2 is a block diagram of a prior art power supply in which the PFC is internally powered by an internal high voltage startup circuit during startup.

[0033] Figure 3 is a more detailed block diagram of a PFC and its peripheral circuitry that is internally powered by an internal high voltage startup circuit during startup, but utilizes external MOSFETs within the peripheral circuitry to boost the startup voltage rating such that it can be used for the power supply.

[0034] Figure 4 is a schematic block diagram of an improved PFC and its peripheral circuits. According to the present disclosure, the PFC is internally powered by an internal high-voltage startup circuit during startup, such as can be used to increase the startup voltage rating in a power supply.

[0035] Figure 5 It shows Figure 4 Schematic block diagram of possible configurations of TVS diodes.

[0036] Figure 6 is a detailed schematic block diagram of a possible configuration of a power supply according to the present disclosure utilizing an improved PFC that is internally powered during startup by an internal high voltage startup circuit, such as may be used to increase the startup voltage rating. DETAILED DESCRIPTION

[0037] The following disclosure enables those skilled in the art to make and use the subject matter disclosed herein. The general principles described herein may be applied to embodiments and applications other than those described in detail above without departing from the spirit and scope of the present disclosure. The present disclosure is not intended to be limited to the embodiments shown, but should be given the widest scope consistent with the principles and features disclosed or suggested herein.

[0038] For high voltage or multiphase applications such as Figure 3 As shown, the following design of the peripheral circuit 54 and the PFC 55 can be used. The PFC 55 is a single device package having a high-voltage startup circuit 55a (e.g., a high-voltage startup integrated circuit 55a) and a low-voltage control circuit 55b (e.g., a low-voltage control integrated circuit) therein. The peripheral circuit refers to a circuit provided outside the PFC 55 but close to the PFC 55.

[0039] The high-voltage startup integrated circuit 55a and the low-voltage control circuit 55b can be formed as separate dies using different manufacturing technologies to support different operating voltages, and then integrated together within the PFC controller 55. During startup of the high-voltage startup integrated circuit 55a, the peripheral circuit 55a, together with the peripheral circuit 54, powers the low-voltage integrated circuit 55b until the low-voltage integrated circuit 55b reaches a normal operating state, at which point the low-voltage integrated circuit 55b is powered via a conventional auxiliary winding of the PFC.

[0040] The power supply to the high voltage startup integrated circuit 55a via the peripheral circuit 54 will now be described. The peripheral circuit 54 includes resistors 20, 21, and 22 coupled in series between the rectified power signal (having a voltage of Vbus) and ground, and capacitors 23, 24, and 25 coupled in series between the rectified power signal and ground. The resistors 20, 21, and 22 and the capacitors 23, 24, and 25 are interconnected in a ladder configuration. Node 30 is the center tap of the series connection of resistors 20 and 21 and capacitors 23 and 24. Node 31 is the center tap of the series connection of resistors 21 and 22 and capacitors 24 and 25.

[0041] N-channel MOSFET 27 (e.g., depletion mode) has its gate coupled to node 30, its drain coupled to the rectified power signal, and its source coupled to the high voltage startup input pin of integrated circuit 55 a. Zener diode 26 is coupled between the gate and source of N-channel MOSFET 27 to protect the gate of N-channel MOSFET 27.

[0042] N-channel MOSFET 27 is sized to withstand the voltage Vbus of the rectifier output relative to the voltage rating of the internal high-voltage generator MOSFET. The bias voltage of external N-channel MOSFET 27 is two-thirds of the rectified bus voltage available at node 30. External N-channel MOSFET 27 operates in its active region and has a voltage drop across the drain-source of MOSFET 27 that is approximately one-third of the rectified bus voltage. Consequently, the internal high-voltage generator MOSFET sees only approximately two-thirds of the input DC voltage, and the maximum input voltage rating of the startup generator is increased by one-third of the maximum expected input voltage value.

[0043] Figure 3 The design effectively extends the upper limit of the startup voltage of the high voltage startup integrated circuit 55a. However, in some applications, it is undesirable to use an N-channel MOSFET 27 in the periphery because it may be physically large and expensive. Therefore, Figure 4 The peripheral circuit 54' and PFC 55' have been developed.

[0044] Now describe Figure 4 The peripheral circuit 54' and PFC 55' are described below. Although the specific inputs and outputs of the above-mentioned PFC 55' will be described below, the PFC 55' is the same as the above-mentioned PFC 55. Note that the transient voltage suppression (TVS) diode 60 (such as the one manufactured and sold by STMicroelectronics) The diode (a) has its anode coupled to the high voltage startup integrated circuit 55a' at the high voltage startup pin HVS of the PFC 55' and its cathode coupled to the bridge rectifier 13 to receive the rectified DC bus voltage. Also note that the optional resistor R1 is coupled between the anode of the transient voltage suppression diode 60 and ground, the diode D2 is coupled in series between the second terminal of the primary winding of the transformer 61 and the load or DC-DC converter 16, and the capacitor C2 is coupled between the cathode of the diode D2 and ground.

[0045] During startup, the high-voltage startup integrated circuit 55a' draws a current of approximately 1mA to 3mA through the high-voltage startup pin HVS. The transient voltage suppressor diode 60 is sized so that it operates in its breakdown region during startup, and in practice, a typical transient voltage suppressor diode breaks down at a current of approximately 1mA. Because the voltage across the transient voltage suppressor diode 60 in the breakdown region remains near the breakdown voltage Vbr of the transient voltage suppressor diode 60, the maximum voltage Vhv' seen at the high-voltage startup pin HVS of the high-voltage startup integrated circuit 55a is the voltage Vbus of the rectified power signal from the bridge rectifier 13 minus the breakdown voltage Vbr of the transient voltage suppressor diode 60, i.e., Vbus - Vbr. Therefore, using the transient voltage suppressor diode 60 in series with the high-voltage startup pin HVS of the high-voltage startup integrated circuit 55a' can reduce the voltage across the high-voltage startup integrated circuit 55a' by Vbr. Therefore, the maximum voltage startup voltage rating of the PFC 55' is increased by the breakdown voltage Vbr of the transient voltage suppressor diode 60, however, after startup, the static power consumption of the high voltage startup circuit 55a' is negligible or almost zero because the high voltage startup circuit 55a' is disabled by the low voltage control circuit 55b' during normal switching operation. Note that the transient voltage suppressor diode 60 is used over a typical Zener diode due to its higher breakdown voltage.

[0046] In some cases, the size of the transient voltage suppressor diode 60 can be determined so that the current drawn by the high-voltage startup integrated circuit 55a during startup alone is insufficient to cause the transient voltage suppressor diode 60 to break down. In these cases, the optional resistor R1 is present and its resistance value is set to draw enough current so that the total current drawn through the transient voltage suppressor diode 60 (the current drawn by the high-voltage startup integrated circuit 55a' plus the current drawn through the resistor R1) is sufficient to cause the transient voltage suppressor diode 60 to break down. However, it should be understood that the resistance value of the resistor R1 is set to be insufficient to draw a current through the transient voltage suppressor diode 60 that is of sufficient magnitude to cause breakdown in the absence of the current drawn by the high-voltage startup integrated circuit 55a'. Therefore, even with the use of the optional configuration resistor R1, the quiescent current consumption of the high-voltage startup integrated circuit 55a' after startup can still be negligible or almost zero.

[0047] It should also be understood that the transient voltage suppressor diode 60 may be a Figure 4 A single TVS diode as shown, or in some cases, a Figure 5 An arbitrary number of TVS diodes 60a...60n are shown coupled in series. By coupling multiple TVS diodes 60a...60n in series, the maximum voltage startup voltage rating of the PFC 55' can be increased by a desired amount.

[0048] The remainder of the PFC 55' and peripheral circuit 54' will now be described. A transformer 61 has a primary winding, a first terminal of which is coupled to receive the rectified power signal from the bridge rectifier 13. The secondary winding of the transformer 61 has a first terminal coupled to a node N1 and a second terminal coupled to ground. A resistor R2 is coupled between the node N1 and the zero-crossing detection input ZCD of the low-voltage integrated circuit 55b'. A diode D1 has an anode coupled to the node N1 and a cathode coupled to the node N2. The node N2 is coupled to the power supply voltage input VCC of the low-voltage integrated circuit 55b'. A capacitor Cvcc is coupled between the node N2 and ground.

[0049] Resistor R3 is coupled between the gate drive output of low-voltage integrated circuit 55 b ′ and the gate of N-channel MOSFET T1 (e.g., a depletion mode type). The source of N-channel MOSFET T1 is coupled to the PWM comparator input CS of low-voltage integrated circuit 55 b ′, and the drain of N-channel MOSFET T1 is coupled to the second terminal of the primary winding of transformer 61 (and therefore to DC-DC converter 56 ). Resistor R4 is coupled between the PWM comparator input CS of low-voltage integrated circuit 55 b ′ and ground.

[0050] In operation, at startup, the primary winding of transformer 61 is charged with the rectified DC voltage. As described above, the high-voltage startup integrated circuit 55a' supplies power to the low-voltage integrated circuit 55b'. In response to the zero-crossing input and the PWM comparator input CS, the low-voltage integrated circuit 55b', through a signal generated by its gate drive output, begins switching the N-channel MOSFET T1, thereby causing current to flow from the secondary winding of transformer 61. This charges capacitor Cvcc. Once capacitor Cvcc is charged, normal operation is achieved, and the high-voltage startup integrated circuit 55a' is disabled by the internal control logic and no longer supplies power to the low-voltage integrated circuit 55b'. Instead, in normal operation, the low-voltage integrated circuit 55b' is powered by the voltage at the VCC input provided by the current from the secondary winding of transformer 61, thereby keeping capacitor Cvcc charged.

[0051] Now refer to Figure 6 The system diagram depicts another arrangement of PFC 55" and peripheral circuits 54", the Figure 6 A power supply 100 is shown. Here, the PFC 55″ is a model L6564H produced by STMicroelectronics. For detailed information about this PFC, see the “L6564H High Voltage Startup Transition-Mode PFC Datasheet,” document ID 022960 Rev, published by STMicroelectronics on its website on June 2, 2012, the entire contents of which are incorporated herein by reference. Although the specific internal details of the PFC 55″ are not described below for the sake of brevity, it is noted that they generally follow the description of the PFC 55′ described above.

[0052] The peripheral circuit 54″ includes a transient voltage suppressor diode 60 having its anode coupled to the high voltage startup integrated circuit 55a″ at the high voltage startup pin HVS and its cathode coupled to the bridge rectifier 13 to receive the rectified DC voltage. An optional resistor R1 is coupled between the anode of the transient voltage suppressor diode 60 and ground. The transient voltage suppressor diode 60 performs the above-described function as described above and requires no further description.

[0053] Resistors R5, R6, and R7 are coupled in series between the rectified mains signal and ground, and a center tap between R6 and R7 is coupled to a MULT input of the PFC 55", which senses the voltage of the rectified mains signal using the MULT input.

[0054] Transformer 61 has a primary winding having a first terminal coupled to receive the rectified power signal from bridge rectifier 13. A first terminal of the secondary winding of transformer 61 is coupled to node N1, and a second terminal is coupled to ground. Resistor R2 is coupled between node N1 and the zero-crossing detection input ZCD of low-voltage integrated circuit 55 b″. Diode D1 has its anode coupled to node N1 and its cathode coupled to node N2. Node N2 is coupled to the power supply voltage input VCC of low-voltage integrated circuit 55 b″. Capacitor Cvcc is coupled between node N2 and ground.

[0055] Resistor R3 is coupled between the gate drive output GD of the low-voltage integrated circuit 55 b ″ and the gate of an N-channel MOSFET T1 (e.g., a depletion-mode type). The source of the N-channel MOSFET T1 is coupled to the PWM comparator input CS of the low-voltage integrated circuit 55 b ″, and the drain of the N-channel MOSFET T1 is coupled to the second terminal of the primary winding of the transformer 61 (and therefore to the power converter 16, which may be a DC-DC converter). Resistor R4 is coupled between the PWM comparator input CS of the low-voltage integrated circuit 55 b ″ and ground.

[0056] Diode D2 has its anode coupled to the second terminal of the primary winding of transformer 61 and its cathode coupled to power converter 16. Resistors R8, R9, and R10 are coupled in series between the cathode of diode D2 and ground, with a center tap between resistors R9 and R10 coupled directly to the INV terminal (error amplifier input) of PFC 55″ and to the COMP terminal (error amplifier output) of PFC 55″ through capacitor C3. Capacitor C2 is coupled between the cathode of diode D2 and ground.

[0057] Resistors R11, R12, and R13 are coupled between the cathode of diode D2 and ground. Node N3 is the center tap between resistors R12 and R13 and is coupled to a PFCOK terminal of PFC 55″, which is used to monitor the operating status. N-channel MOSFET T2 (e.g., a depletion mode type) has its drain coupled to node N3, its source coupled to ground, and its gate receiving a control signal from power converter 16.

[0058] The operation of the PFC 55" proceeds generally as described above with reference to the PFC 55. Further details need not be given and can be found in the "L6564H High voltage startup transition-mode PFC Datasheet".

[0059] While the present disclosure has been described with respect to a limited number of embodiments, those skilled in the art having benefit of this disclosure will appreciate that other embodiments can be conceived which do not depart from the scope of the present disclosure as disclosed herein. Accordingly, the scope of the present disclosure should be limited only by the claims appended hereto.

Claims

1. A power supply comprising: Power signal input, power signal receiving; a transformer having a primary winding and a secondary winding, the primary winding having a first terminal coupled to the power signal input; Power factor controller, including: a low voltage circuit configured to correct a power factor of the power signal, the low voltage circuit having: a supply voltage input receiving a supply voltage to power the low voltage circuit during normal operation; at least one feedback input coupled to a first terminal of the secondary winding of the transformer; and a gate drive output; and a high voltage startup circuit configured to power the low voltage circuit at least during startup of the power supply; and Peripheral circuits, including: at least one transient voltage suppression diode having an anode coupled to the high voltage startup circuit to power the high voltage startup circuit, and a cathode coupled to the power signal input; a diode having an anode coupled to the first terminal of the secondary winding of the transformer and a cathode coupled to the supply voltage input of the low voltage circuit; a power supply capacitor coupled between the power supply voltage input of the low voltage circuit and ground; and A transistor has a first conductive terminal coupled to the second terminal of the primary winding of the transformer and a gate terminal coupled to the gate drive output of the low voltage circuit.

2. The power supply of claim 1 , wherein the at least one transient voltage suppression diode is sized to operate to break down in response to the high voltage startup circuit drawing a startup current from the power signal input through the at least one transient voltage suppression diode.

3. The power supply of claim 1 , wherein the at least one transient voltage suppression diode is sized such that: a startup current drawn from the power signal input through the at least one transient voltage suppression diode by the high voltage startup circuit is insufficient to cause the at least one transient voltage suppression diode to operate into breakdown; and wherein the peripheral circuit further comprises at least one resistor coupled between the cathode of the at least one transient voltage suppression diode and ground to cause additional startup current to be drawn from the power signal input through the at least one transient voltage suppression diode.

4. The power supply of claim 3 , wherein the at least one resistor has a resistance value such that the sum of the additional startup current through the at least one resistor and the startup current is sufficient to cause the at least one transient voltage suppressor diode to operate in a breakdown manner, and such that the additional startup current due to the at least one resistor alone is insufficient to cause the at least one transient voltage suppressor diode to operate in a breakdown manner.

5. The power supply of claim 1, wherein the at least one transient voltage suppression diode comprises a plurality of transient voltage suppression diodes connected in series.

6. The power supply of claim 1 , wherein the low voltage circuit is configured to generate a gate drive signal at the gate drive output in response to an input received at the at least one feedback input, the gate drive signal causing switching of the transistor to allow current to flow from the first terminal of the secondary winding of the transformer towards the supply voltage input of the low voltage circuit due to magnetic coupling.

7. The power supply of claim 6 , wherein the current flowing from the first terminal of the secondary winding charges the power supply capacitor; and wherein startup of the power supply ends and normal operation of the power supply begins when the power supply capacitor is charged to a threshold level.

8. The power supply of claim 1 , further comprising: A DC-DC converter is coupled to the second terminal of the primary winding of the transformer.

9. The power supply of claim 1 , further comprising: a filter coupled to the AC power source and configured to condition a signal received from the AC power source; and A bridge rectifier is coupled to the filter and configured to rectify a signal received from the filter to generate the power signal provided to the power signal input.

10. A method of operating a power supply, comprising the steps of: a) operating the power supply during a start-up condition by: 1) drawing a startup current from a rectified power input through an internal high-voltage startup integrated circuit and through a reverse-biased transient voltage suppression diode to power the internal high-voltage startup integrated circuit within the power factor controller package; and 2) using the internal high voltage startup integrated circuit to power an internal low voltage power factor correction integrated circuit within the power factor controller package; and b) after startup, operating the power supply during normal conditions by powering the internal low voltage power factor correction integrated circuit by: 1) using the internal low voltage power factor correction integrated circuit to switch a transistor coupled to a second terminal of a primary transformer winding, the primary transformer winding having a first terminal coupled to the rectified power input; and 2) Draw normal operating current from a secondary transformer winding magnetically coupled to the primary transformer winding into the internal low voltage power factor correction integrated circuit.

11. The method of claim 10 , wherein the internal high voltage startup integrated circuit draws the startup current from the rectified power input and through the reverse biased transient voltage suppression diode, comprising the internal high voltage startup integrated circuit drawing a startup current from the rectified power input and through the reverse biased transient voltage suppression diode sufficient to cause the reverse biased transient voltage suppression diode to operate in breakdown.

12. The method according to claim 10, wherein powering the internal high voltage startup integrated circuit further comprises: An additional startup current is drawn from the rectified power supply input through the reverse biased TVS diode and through a resistor coupled between an anode of the reverse biased TVS diode and ground, such that a sum of the startup current and the additional startup current through the resistor is sufficient to cause the reverse biased TVS diode to operate in breakdown, but such that the additional startup current drawn through the resistor is itself insufficient to cause the reverse biased TVS diode to operate in breakdown.

13. A power supply comprising: Power signal input, power signal receiving; a transformer having a primary winding and a secondary winding, the primary winding having a first terminal coupled to the power signal input; Power factor controller, including: a low voltage circuit having a supply voltage input; and a high voltage startup circuit having an output coupled to the supply voltage input of the low voltage circuit; and Peripheral circuits, including: at least one transient voltage suppression diode having an anode coupled to the high voltage startup circuit and a cathode coupled to the power signal input; a diode having an anode coupled to the first terminal of the secondary winding of the transformer and a cathode coupled to the supply voltage input of the low voltage circuit; and A power supply capacitor is coupled between the power supply voltage input of the low voltage circuit and ground.

14. The power supply of claim 13, wherein the at least one TVS diode is sized to operate to break down in response to the high voltage startup circuit drawing startup current from the power signal input through the at least one TVS diode.

15. The power supply of claim 13 , wherein the at least one TVS diode is sized such that: a startup current drawn from the power signal input by the high voltage startup circuit through the at least one TVS diode is insufficient to cause the at least one TVS diode to operate into breakdown; and wherein the peripheral circuit further comprises at least one resistor coupled between the cathode of the at least one TVS diode and ground to cause additional startup current to be drawn from the power signal input through the at least one TVS diode.

16. The power supply of claim 15 , wherein the at least one resistor has a resistance value such that the sum of the additional startup current through the at least one resistor and the startup current is sufficient to cause the at least one transient voltage suppressor diode to operate in breakdown, and such that the additional startup current due to the at least one resistor alone is insufficient to cause the at least one transient voltage suppressor diode to operate in breakdown.

17. The power supply of claim 13, wherein the at least one transient voltage suppression diode comprises a plurality of transient voltage suppression diodes connected in series.

18. A power supply comprising: A power signal input configured to receive a power signal; a transformer having a primary winding and a secondary winding, the primary winding having a first terminal coupled to the power signal input; Power factor controller, including: a low voltage circuit configured to correct a power factor of the power signal, the low voltage circuit having: a supply voltage input configured to receive a supply voltage for powering the low voltage circuit during normal operation; and a high voltage startup circuit configured to power the low voltage circuit at least during startup of the power supply; and Peripheral circuits, including: at least one transient voltage suppression diode coupled to the high voltage startup circuit to power the high voltage startup circuit; a diode coupled between a first terminal of the secondary winding of the transformer and the supply voltage input of the low voltage circuit; a power supply capacitor coupled between the power supply voltage input of the low voltage circuit and ground; and A transistor is coupled between the second terminal of the primary winding of the transformer and a PWM comparator input, the transistor being controlled by a gate drive output of the low voltage circuit.

19. The power supply of claim 18, wherein the at least one transient voltage suppression diode is sized to operate to break down in response to the high voltage startup circuit drawing a startup current from the power signal input.

20. The power supply of claim 18, wherein the at least one transient voltage suppression diode is sized such that: a startup current drawn from the power signal input by the high voltage startup circuit is insufficient to cause the at least one transient voltage suppression diode to operate into breakdown; and wherein the peripheral circuit further comprises at least one resistor to cause additional startup current to be drawn from the power signal input through the at least one transient voltage suppression diode.

21. The power supply of claim 20, wherein the at least one resistor has a resistance value such that a sum of the startup current and the additional startup current is sufficient to cause the at least one transient voltage suppression diode to operate in breakdown.

22. The power supply of claim 18, wherein the at least one TVS diode comprises a plurality of TVS diodes connected in series.

23. The power supply of claim 18, wherein the low voltage circuit generates a gate drive signal at the gate drive output in response to an input received at at least one feedback input coupled to a first terminal of the secondary winding of the transformer, the gate drive signal causing switching of the transistor.

24. The power supply of claim 23, wherein the current flowing from the first terminal of the secondary winding charges the power supply capacitor; and wherein startup of the power supply ends and normal operation of the power supply begins when the power supply capacitor is charged to a threshold level.

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