A low-stress silicon-based thick film on silicon-on-insulator and a preparation method thereof

Abstract

The present invention discloses a low-stress silicon-based thick film on silicon-on-insulator and a preparation method thereof, belonging to the technical field of semiconductor preparation. The low-stress silicon-based thick film of the present invention includes a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer. A silicon oxide layer is provided on the substrate silicon layer, a silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is provided on the silicon-based thick film layer, and the grid-shaped groove divides the silicon-based thin film into several independent units, and the grid-shaped groove is filled with a coating layer; the silicon-based thick film of the present invention can improve the uneven stress inside the thick film, reduce the thick film stress, increase the maximum thickness of the deposited thick film, and enable large-scale production of devices.

Description

Technical Field

[0001] The invention relates to a low-stress silicon-based thick film based on silicon on insulator and a preparation method thereof, belonging to the technical field of semiconductor preparation. Background Art

[0002] Silicon-On-Insulator (SOI) technology is widely used in satellites, electronics, computers, aerospace and other fields due to its low power consumption, high speed, small parasitic capacitance and strong radiation resistance.

[0003] According to the thickness of the device layer, the deposited film layer can be divided into thick film and thin film. Thick film usually refers to the device layer thickness greater than 1μm, which is mainly used in micro-electromechanical systems (MEMS) and power devices; thin film refers to the device layer thickness of 0.1 to 1μm, which is mainly used in sub-micron integrated circuits such as complementary metal oxide semiconductor (CMOS).

[0004] In recent years, with the rapid development of MEMS and intelligent power device markets, silicon-based thick film materials have attracted widespread attention from the industry. However, the residual stress in thick films prepared by conventional methods is generated by the structure and defects of the thick film itself and the difference in physical properties between the thick film and the substrate. Excessive tensile residual stress (tensile stress) will cause the film structure to rupture, while excessive compressive residual stress (compressive stress) will cause the wafer to expand or warp. Both of the above situations will increase the difficulty of the process and may cause the device to fail. Summary of the invention

[0005] In view of the problems and shortcomings of the above-mentioned prior art, the purpose of the present invention is to overcome the inevitable defects such as excessive residual stress in the prepared film, which may lead to deformation, instability, signal misconduction, and even system failure of the micro-device unit or even the entire device structure, and to provide a low-stress silicon-based thick film based on silicon on insulator, which has good insulation, stability and mechanical properties.

[0006] The objective of the present invention is achieved through the following scheme: the low stress silicon-based thick film based on silicon on insulator comprises a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer, a silicon oxide layer is grown on the substrate silicon layer, a silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is provided on the silicon-based thick film layer, the grid-shaped groove divides the silicon-based thin film into several independent units, and the grid-shaped groove is filled with the coating layer.

[0007] Preferably, the thickness of the silicon-based thick film layer of the present invention is greater than 1 micron, and the thickness of the silicon oxide layer is 2 to 3 microns.

[0008] Preferably, the size of the independent unit of the present invention is 5-25 mm×5-32 mm; the width of the groove is 180-220 nm, and the length spans the entire substrate.

[0009] Another object of the present invention is to provide a method for preparing a low-stress silicon-based thick film based on silicon on insulator with a simple process, which specifically comprises the following steps:

[0010] (1) A silicon oxide layer is formed on a silicon substrate, and then a silicon-based thin film layer is deposited. A groove is formed every 5-25 mm in the x direction of the silicon-based thin film layer, and a groove is formed every 5-32 mm in the y direction of the silicon-based thin film layer. After degumming and cleaning, the layer is set aside.

[0011] (2) A low-stress coating layer is deposited on the film, wherein the thickness of the coating layer material is higher than that of the silicon-based film material; and the groove is filled with the low-stress coating layer material.

[0012] (3) The cladding material on the silicon-based thin film layer is polished and removed by a reverse cladding layer etching process and a chemical mechanical planarization process, and the cladding material in the groove is retained to obtain a flat upper surface.

[0013] (4) Repeat steps (1), (2) and (3) multiple times to make the thickness of the silicon-based film reach more than 1 μm and keep the wafer warpage low.

[0014] Preferably, the thick film material of the present invention comprises SiN, Si 3 N 4 、SiN 2 、Si(OH) 4 Or polysilicon, other film materials that meet the requirements can also be used in the present invention.

[0015] Preferably, the trench filling material of the present invention is SiO 2 Or SiON, other low stress filling materials that meet the requirements can also be used in the present invention.

[0016] The beneficial effects of the present invention are:

[0017] (1) The present invention is an effective improvement on the current method for preparing high-stress silicon-based thick films. By adding a process of etching grooves and filling low-stress coating layer materials during the deposition process, the original continuous silicon-based thick film deposition process is divided into several repeated low-stress film preparation stages. In each stage, it is necessary to etch grooves after depositing the film to divide the silicon-based film into several independent units, and then deposit low-stress coating layer materials in the grooves. After each stage is repeated in sequence, the desired thickness is finally achieved. In this way, on the one hand, the uneven stress inside the thick film during the deposition process can be improved, thereby reducing the stress of the thick film; on the other hand, the reduction of stress increases the maximum thickness of the deposited thick film.

[0018] (2) The present invention releases stress by forming grooves, reduces the stress accumulation of thick films, and increases the maximum thickness of thick films that can be deposited; at the same time, all processes in the present invention are fully compatible with current CMOS processes, and can achieve large-scale mass production of devices, which will help promote the widespread application of silicon photonic integrated devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 It is a schematic diagram of the layer structure of the low stress silicon-based thick film prepared by the present invention.

[0020] Figure 2 It is a top view of the thick film prepared by the present invention.

[0021] Figure 3 It is a schematic diagram of the process of preparing the thick film according to the present invention.

[0022] Figure 4 It is a process flow chart of the preparation method described in Example 1.

[0023] Figure 1 Middle: 1-substrate silicon layer; 2-silicon oxide layer; 3-cladding layer; 4-silicon-based thick film layer. DETAILED DESCRIPTION

[0024] The specific implementation modes of the present invention are further described below in conjunction with the embodiments; the following embodiments are only used to more clearly illustrate the technical solutions of the present invention, and cannot be used to limit the protection scope of the present invention.

[0025] Example 1

[0026] The low-stress silicon-based thick film based on silicon on insulator described in this embodiment includes a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer. A silicon oxide layer is provided on the substrate silicon layer, a silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is provided on the silicon-based thick film layer, the grid-shaped groove divides the silicon-based film into several independent units, and the coating layer is filled in the grid-shaped groove; the thickness of the silicon oxide layer is 2 microns; the size of the independent unit is 32mm*25mm.

[0027] The method for preparing the low stress silicon-based thick film based on silicon on insulator described in this embodiment specifically comprises the following steps:

[0028] (1) A silicon wafer with a thickness of 750 μm is provided as a substrate. A silicon dioxide layer grown by thermal oxidation is provided on the surface of the substrate. The thickness of the silicon dioxide layer is 2 μm. A cleaning agent containing an alkaline solution is used to clean the semiconductor substrate and the silicon dioxide film.

[0029] (2) The substrate pretreated in step (1) was deposited with a layer of Si with a thickness of 500 nm by PECVD equipment.3 N 4 Thin film layer; In this embodiment, the silicon-based thick film material is deposited by plasma enhanced chemical vapor deposition, and any suitable deposition process may also be used, which are all conventional methods and the present invention is not limited thereto.

[0030] (3) Through the etching process, grooves are etched at equal intervals in the vertical and horizontal directions. The width of the groove is 200 nm and the length spans the entire substrate. 3 N 4 The film is divided into several film blocks of 32mm*25mm in size.

[0031] (4) After desizing and cleaning, a second deposition is performed using a PECVD deposition method to deposit a low-stress silicon dioxide layer with a thickness of 800 nanometers.

[0032] (5) By reverse etching SiO 2 The coating layer exposes the Si covered by the silicon dioxide layer. 3 N 4 After the film is formed, a chemical mechanical planarization process is used to obtain a flat upper surface; then, steps (2) to (5) are repeated 2 times to obtain a Si film with a thickness of 1 micron. 3 N 4 film and keep the wafer warpage low.

[0033] In the semiconductor manufacturing process, the stress of the wafer can be expressed by the degree of wafer bending; when the wafer bending radius is less than a certain value (generally 50 meters), the wafer will not be able to be processed normally in the machine; in this embodiment, the original 8-inch Si wafer (thickness 725um) has a bending radius of 270±30 meters. 10um silicon dioxide is directly deposited on the original 8-inch Si wafer (thickness 725um) by conventional methods, and the bending radius is 30±5 meters; on the original 8-inch Si wafer (thickness 725um), 10um silicon dioxide is deposited by the scheme of Example 1, and the bending radius is 150±20 meters; it can also be seen that the present invention releases stress by forming grooves, reduces the accumulation of thick film stress, and increases the maximum thickness of the thick film that can be deposited.

[0034] Example 2

[0035] The low-stress silicon-based thick film based on silicon on insulator described in this embodiment includes a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer. A silicon oxide layer is provided on the substrate silicon layer, a silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is provided on the silicon-based thick film layer, the grid-shaped groove divides the silicon-based film into several independent units, and the coating layer is filled in the grid-shaped groove; the thickness of the silicon oxide layer is 2 microns; the size of the independent unit is 25mm*30mm.

[0036] The method for preparing a silicon-based thick film described in this embodiment is as described in Implementation Example 1, wherein the difference from Implementation Example 1 is that the material of the low-stress coating layer is SiON.

[0037] Example 3

[0038] The low-stress silicon-based thick film based on silicon on insulator described in this embodiment includes a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer. A silicon oxide layer is provided on the substrate silicon layer, a silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is provided on the silicon-based thick film layer, the grid-shaped groove divides the silicon-based film into several independent units, and the grid-shaped groove is filled with the coating layer; the thickness of the silicon oxide layer is 2 microns; the size of the independent unit is 5mm*5mm.

[0039] The method for preparing a silicon-based thick film in this embodiment is as in Example 1, wherein the difference from Example 1 is that steps (2) to (5) are repeated 4 times to obtain a 2 μm thick Si film. 3 N 4 film.

[0040] Example 4

[0041] The method for preparing a silicon-based thick film described in this embodiment is as described in Implementation Example 1, wherein the difference from Implementation Example 1 is that the deposited silicon-based material is a polycrystalline silicon material.

[0042] Example 5

[0043] In the semiconductor manufacturing process, the stress of the wafer can be expressed by the degree of wafer bending; when the wafer bending radius is less than a certain value (generally 50 meters), the wafer will not be able to be processed normally in the machine; in this embodiment, the original 8-inch Si wafer (thickness 725um) has a bending radius of 270±30 meters. 10um silicon dioxide is directly deposited on the original 8-inch Si wafer (thickness 725um) by conventional methods, and the bending radius is 30±5 meters; on the original 8-inch Si wafer (thickness 725um), 10um silicon dioxide is deposited by the scheme of Example 1, and the bending radius is 150±20 meters; it can also be seen that the present invention releases stress by forming grooves, reduces the accumulation of thick film stress, and increases the maximum thickness of the thick film that can be deposited.

Claims

1. A low-stress silicon-based thick film on silicon-on-insulator, characterized in that: it includes a substrate silicon layer, a silicon oxide layer, a coating layer and a silicon-based thick film layer. A silicon oxide layer is grown on the substrate silicon layer, a silicon-based thick film layer is deposited on the silicon oxide layer, a grid-shaped groove is provided on the silicon-based thick film layer, and the grid-shaped groove divides the silicon-based thin film into several independent units, and the grid-shaped groove is filled with a coating layer; The preparation method of the low-stress silicon-based thick film on silicon-on-insulator specifically includes the following steps: (1) Form a silicon oxide layer on a silicon substrate, then deposit a layer of silicon-based thin film layer. Along the x direction of the silicon-based thin film layer, a groove is etched every 5-25 mm, and along the y direction of the silicon-based thin film layer, a groove is etched every 5-32 mm. After removing the photoresist and cleaning, it is reserved for use; (2) Deposit a layer of low-stress coating layer above the thin film, and the thickness of the coating layer material is higher than that of the silicon-based thin film material; fill the groove with the low-stress coating layer material; (3) Remove the coating layer material on the silicon-based thin film layer by reverse coating layer etching process and chemical mechanical planarization process, and retain the coating layer material in the groove to obtain a flat upper surface; (4) Repeat steps (1), (2) and (3) multiple times to make the thickness of the silicon-based film reach more than 1 μm and keep the warpage of the wafer low.

2. The low-stress silicon-based thick film on silicon-on-insulator according to claim 1, characterized in that: the thickness of the silicon-based thick film layer is more than 1 micron, and the thickness of the silicon oxide layer is 2-3 microns.

3. The low-stress silicon-based thick film on silicon-on-insulator according to claim 1, characterized in that: the size of each independent unit is 5-25 mm × 5-32 mm; the width of the groove is 180-220 nm, and the length spans the entire substrate.

4. The low-stress silicon-based thick film on silicon-on-insulator according to claim 1, characterized in that: The components of the thick film material are SiN, Si 3 N 4 , SiN 2 , Si(OH) 4 or polysilicon.

5. The low-stress silicon-based thick film on silicon-on-insulator according to claim 1, characterized in that: The trench filling material is SiO 2 or SiON.

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