A C-band ultra-wideband high-gain low-noise amplifier chip
By designing a current multiplexing and parallel negative feedback structure in the C band combined with a low-noise amplifier chip of a high-pass filter network, the problem of insufficient gain and noise flatness in the prior art is solved, and high gain and low in the C band are achieved The flatness and impedance matching of noise improves the receiver sensitivity and communication quality of the communication system.
Patent Information
- Application Number
- CN202010613231.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-06-30
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2040-06-30
AI Technical Summary
Existing low-noise amplifiers are difficult to achieve high gain and low noise flatness in the C-band, and the impedance matching is insufficient, which affects the receiver sensitivity and communication quality of the communication system.
A C-band ultra-wideband high-gain low-noise amplifier chip is designed, using current multiplexing structure and parallel negative feedback structure, combined with a high-pass filtering network to achieve matching of RF input and output terminals, and the gain is controlled through parallel negative feedback network to ensure that the gain is Low noise and high gain flatness are achieved in the 4-8GHz frequency band.
In the C band, noise is less than 1dB, gain is greater than 25dB, impedance matching is good, standing wave is less than 1.8, and gain flatness is less than ±0.3dB, which improves the receiver sensitivity and communication quality of the communication system.
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Figure CN111817670B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of microwave monolithic integrated circuits, and in particular relates to the design of a C-band ultra-wideband high-gain low-noise amplifier chip. Background Art
[0002] Microwave monolithic integrated circuits (MMIC) have been increasingly used in various wireless communication systems due to their small size, good consistency, high yield rate, and high reliability. Low noise amplifiers are important components in modern radar, RF communication, test instruments, and electronic warfare systems. They mainly amplify weak signals received by the receiver to reduce noise interference. The low noise amplifier is located at the front end of the RF receiver and plays a decisive role in the noise characteristics of the entire system, which requires its noise coefficient to be as small as possible; in order to suppress the impact of the subsequent noise levels on the system, a certain gain is also required; at the same time, according to the requirements of the satellite communication system, the low noise amplifier must achieve wide-band impedance matching and provide sufficient gain flatness. Therefore, designing a low noise amplifier with excellent performance is of great significance to improving the sensitivity of the communication system receiver and the communication quality. Summary of the invention
[0003] The purpose of the present invention is to achieve lower noise and higher gain in the entire C-band 4-8GHz frequency band and ensure broadband impedance matching, and proposes a C-band ultra-wideband high-gain low-noise amplifier chip.
[0004] The technical scheme of the present invention is: a C-band ultra-wideband high-gain low-noise amplifier chip, comprising a transistor M1, a gate of the transistor M1 connected to the output end of a first high-pass filter network through an inductor L2, a source of the transistor M1 connected to a first self-biased network of the M1 tube and a second self-biased network of the M1 tube, a drain of the transistor M1 connected to the input end of a current multiplexing network through a microstrip line TL1, the input end of the first high-pass filter network is a radio frequency input end RFIN of the low-noise amplifier chip; the output end of the current multiplexing network is respectively connected to one end of a capacitor C7, one end of a parallel negative feedback network and a power supply filter network, the other end of the parallel negative feedback network is connected to the current multiplexing network, the other end of the capacitor C7 is connected to the input end of a second high-pass filter network, and the output end of the second high-pass filter network is a radio frequency output end RFOUT of the low-noise amplifier chip.
[0005] Furthermore, the first high-pass filter network includes a capacitor C1 and a ground inductor L1. One end of the capacitor C1 serves as an input end of the first high-pass filter network, and the other end of the capacitor C1 is connected to the ground inductor L1 and serves as an output end of the first high-pass filter network.
[0006] Furthermore, the first self-biasing network of transistor M1 includes a grounding resistor R1 and a grounding capacitor C2, and both the grounding resistor R1 and the grounding capacitor C2 are connected to the source of transistor M1.
[0007] Furthermore, the second self-biasing network of transistor M1 includes a grounding resistor R2 and a grounding capacitor C3, and both the grounding resistor R2 and the grounding capacitor C3 are connected to the source of transistor M1.
[0008] Furthermore, the current multiplexing network includes a transistor M2, a gate of the transistor M2 is respectively connected to one end of the resistor R3 and one end of the capacitor C4 through the microstrip line TL2, a source of the transistor M2 is respectively connected to one end of the inductor L4 and the grounding capacitor C6 through the microstrip line TL3, a drain of the transistor M2 is connected to one end of the microstrip line TL4, and the other end of the microstrip line TL4 serves as an output end of the current multiplexing network; the other end of the resistor R3 is respectively connected to one end of the inductor L3, the other end of the inductor L4 and the grounding resistor R4, the other end of the inductor L3 is connected to the other end of the capacitor C4, and serves as an input end of the current multiplexing network.
[0009] Furthermore, the parallel negative feedback network includes a resistor R5, an inductor L5 and a capacitor C5 connected in sequence, one end of the resistor R5 is connected to one end of the inductor L5, and the other end thereof is connected to the gate of the transistor M2 through the microstrip line TL2, one end of the capacitor C5 is connected to the other end of the inductor L5, and the other end thereof is connected to the drain of the transistor M2 through the microstrip line TL4.
[0010] Furthermore, the power supply filtering network includes an inductor L6, one end of which is connected to the output end of the current multiplexing network, and the other end of which is respectively connected to one end of a resistor R7, a grounding capacitor C9 and a power supply VDD, and the other end of the resistor R7 is connected to a grounding capacitor C8.
[0011] Furthermore, the second high-pass filter network includes a capacitor C10 and a ground inductor L7. One end of the capacitor C10 serves as an output end of the second high-pass filter network, and the other end of the capacitor C10 is connected to the ground inductor L7 and serves as an input end of the second high-pass filter network.
[0012] The beneficial effects of the present invention are:
[0013] (1) The present invention combines a parallel negative feedback structure with a current multiplexing structure, and adopts a high-pass filter network at both the input and output ends of the RF circuit to achieve good noise (less than 1dB) and high gain (greater than 25dB) in the entire C-band 4-8GHz frequency band, and can achieve impedance matching in the 4-8GHz ultra-wideband (standing wave less than 1.8) and improve gain flatness (flatness less than ±0.3dB).
[0014] (2) The present invention adopts a current multiplexing structure to improve the output impedance matching of the amplifier and broaden the frequency band, so that the amplifier can achieve higher gain and higher reverse isolation within a wider frequency range.
[0015] (3) The present invention connects a parallel negative feedback network between the drain and gate of the transistor M2 of the current multiplexing network, which makes it easy to achieve better input and output matching, and can control the gain through the resistor R5 in the low frequency band and reduce the negative feedback depth in the high frequency band, thereby obtaining a flat gain.
[0016] (4) The present invention adopts high-pass filter networks at both the RF input and output ends. On the one hand, this can suppress low-frequency gain and improve gain flatness. On the other hand, the use of a high-pass filter network at the output end of transistor M2 can reduce the low-frequency output impedance of the transistor, making it easier to achieve broadband impedance matching. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] Figure 1 Shown is a schematic diagram of a C-band ultra-wideband high-gain low-noise amplifier chip circuit provided by an embodiment of the present invention. DETAILED DESCRIPTION
[0018] Now, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. It should be understood that the embodiments shown and described in the accompanying drawings are only exemplary and are intended to explain the principles and spirit of the present invention, rather than to limit the scope of the present invention.
[0019] The embodiment of the present invention provides a C-band ultra-wideband high-gain low-noise amplifier chip, such as Figure 1 As shown, it includes a transistor M1, the gate of the transistor M1 is connected to the output end of the first high-pass filter network through the inductor L2, the source of the transistor M1 is respectively connected to the first self-biased network of the M1 tube and the second self-biased network of the M1 tube, and the drain of the transistor M1 is connected to the input end of the current multiplexing network through the microstrip line TL1. The input end of the first high-pass filter network is the radio frequency input end RFIN of the low-noise amplifier chip; the output end of the current multiplexing network is respectively connected to one end of the capacitor C7, one end of the parallel negative feedback network and the power supply filter network, the other end of the parallel negative feedback network is connected to the current multiplexing network, the other end of the capacitor C7 is connected to the input end of the second high-pass filter network, and the output end of the second high-pass filter network is the radio frequency output end RFOUT of the low-noise amplifier chip.
[0020] In the embodiment of the present invention, the first high-pass filter network includes a capacitor C1 and a ground inductor L1. One end of the capacitor C1 serves as the input end of the first high-pass filter network, and the other end is connected to the ground inductor L1 and serves as the output end of the first high-pass filter network.
[0021] In the embodiment of the present invention, the first self-biasing network of the transistor M1 includes a grounding resistor R1 and a grounding capacitor C2, and both the grounding resistor R1 and the grounding capacitor C2 are connected to the source of the transistor M1.
[0022] In the embodiment of the present invention, the second self-biasing network of the transistor M1 includes a grounding resistor R2 and a grounding capacitor C3, and both the grounding resistor R2 and the grounding capacitor C3 are connected to the source of the transistor M1.
[0023] In an embodiment of the present invention, the current multiplexing network includes a transistor M2, a gate of the transistor M2 is respectively connected to one end of a resistor R3 and one end of a capacitor C4 through a microstrip line TL2, a source thereof is respectively connected to one end of an inductor L4 and a grounding capacitor C6 through a microstrip line TL3, a drain thereof is connected to one end of a microstrip line TL4, and the other end of the microstrip line TL4 serves as an output end of the current multiplexing network; the other end of the resistor R3 is respectively connected to one end of the inductor L3, the other end of the inductor L4 and the grounding resistor R4, the other end of the inductor L3 is connected to the other end of the capacitor C4, and serves as an input end of the current multiplexing network.
[0024] In an embodiment of the present invention, the parallel negative feedback network includes a resistor R5, an inductor L5 and a capacitor C5 connected in sequence, one end of the resistor R5 is connected to one end of the inductor L5, and the other end thereof is connected to the gate of the transistor M2 through the microstrip line TL2, one end of the capacitor C5 is connected to the other end of the inductor L5, and the other end thereof is connected to the drain of the transistor M2 through the microstrip line TL4.
[0025] In an embodiment of the present invention, the power supply filtering network includes an inductor L6, one end of which is connected to the output end of the current multiplexing network, and the other end of which is respectively connected to one end of a resistor R7, a grounding capacitor C9 and a power supply VDD, and the other end of the resistor R7 is connected to a grounding capacitor C8.
[0026] In the embodiment of the present invention, the second high-pass filter network includes a capacitor C10 and a ground inductor L7. One end of the capacitor C10 serves as the output end of the second high-pass filter network, and the other end is connected to the ground inductor L7 and serves as the input end of the second high-pass filter network.
[0027] In the embodiment of the present invention, the C-band ultra-wideband high-gain low-noise amplifier chip has an operating frequency band of 4 to 8 GHz, the size of the selected transistor M1 is 4*75um, the drain voltage is 1.3V, and the gate voltage is -460mV; the size of the selected transistor M2 is 6*55um, the drain voltage is 2.2V, and the gate voltage is -570mV. The amplifier gain can finally be 26dB, with a 0.5dB positive slope, a noise figure of 0.7dB, a P_1 of 14.5dBm, an input standing wave of 1.5, an output standing wave of 1.7, and a power consumption of +5V / 55mA.
[0028] Combine the following Figure 1 The working principle and process of the present invention are described in detail:
[0029] like Figure 1 As shown, the present invention combines a parallel negative feedback structure with a current multiplexing structure, and adopts a high-pass filter network at the input and output ends of the RF circuit. It can achieve better noise (less than 1dB) and higher gain (greater than 25dB) in the full frequency band of 4 to 8GHz in the C band, and can achieve impedance matching in the ultra-wide band of 4 to 8GHz (standing wave less than 1.8) and improve gain flatness (flatness less than ±0.3dB).
[0030] In the embodiment of the present invention, the transistor M1 and the current multiplexing network together constitute a current multiplexing structure, which improves the output impedance matching of the amplifier, widens the frequency band, and enables the amplifier to achieve higher gain and higher reverse isolation in a wider frequency range. During the design, for the transistor M1 in the current multiplexing structure, the best noise matching is met as much as possible, and for the transistor M2, the highest gain matching is met as much as possible, so that the amplifier can have better noise and achieve higher gain. At the same time, the use of the current multiplexing structure can also reduce the power consumption of the circuit.
[0031] The basic circuit form of the parallel negative feedback network is to load a resistor R5 between the drain and gate of transistor M2 to form a negative feedback loop. Its function is to stabilize the device and make the input and output impedance close to 50 ohms, so that it is easy to achieve better input and output matching. At the same time, the parallel negative feedback technology can control the gain size through the resistor R5 in the low frequency band and reduce the negative feedback depth in the high frequency band, thereby obtaining a flat gain.
[0032] Furthermore, the embodiment of the present invention adopts high-pass filter networks at both the RF input and output ends. On the one hand, this can suppress low-frequency gain and improve gain flatness. On the other hand, using a high-pass filter network at the output end of transistor M2 can reduce the low-frequency output impedance of the transistor, making it easier to achieve broadband impedance matching.
[0033] Those skilled in the art will appreciate that the embodiments described herein are intended to help readers understand the principles of the present invention, and should be understood that the protection scope of the present invention is not limited to such specific statements and embodiments. Those skilled in the art can make various other specific variations and combinations that do not deviate from the essence of the present invention based on the technical revelations disclosed by the present invention, and these variations and combinations are still within the protection scope of the present invention.
Claims
1. A C-band ultra-wideband high-gain low-noise amplifier chip, characterized in that: It includes a transistor M1, the gate of the transistor M1 is connected to the output end of the first high-pass filter network through an inductor L2, the source of the transistor M1 is respectively connected to the first self-biased network of the M1 tube and the second self-biased network of the M1 tube, and the drain of the transistor M1 is connected to the input end of the current multiplexing network through a microstrip line TL1, and the input end of the first high-pass filter network is the radio frequency input end RFIN of the low-noise amplifier chip; the output end of the current multiplexing network is respectively connected to one end of the capacitor C7, one end of the parallel negative feedback network and the power filter network, the other end of the parallel negative feedback network is connected to the current multiplexing network, the other end of the capacitor C7 is connected to the input end of the second high-pass filter network, and the output end of the second high-pass filter network is the radio frequency output end RFOUT of the low-noise amplifier chip; The current multiplexing network includes a transistor M2, a gate of the transistor M2 is respectively connected to one end of a resistor R3 and one end of a capacitor C4 through a microstrip line TL2, a source of the transistor M2 is respectively connected to one end of an inductor L4 and a grounding capacitor C6 through a microstrip line TL3, a drain of the transistor M2 is connected to one end of a microstrip line TL4, and the other end of the microstrip line TL4 serves as an output end of the current multiplexing network; the other end of the resistor R3 is respectively connected to one end of the inductor L3, the other end of the inductor L4 and the grounding resistor R4, the other end of the inductor L3 is connected to the other end of the capacitor C4, and serves as an input end of the current multiplexing network; The first high-pass filter network includes a capacitor C1 and a ground inductor L1. One end of the capacitor C1 serves as an input end of the first high-pass filter network, and the other end of the capacitor C1 is connected to the ground inductor L1 and serves as an output end of the first high-pass filter network.
2. The C-band ultra-wideband high-gain low-noise amplifier chip according to claim 1, characterized in that: The first self-biasing network of the transistor M1 includes a grounding resistor R1 and a grounding capacitor C2, and both the grounding resistor R1 and the grounding capacitor C2 are connected to the source of the transistor M1.
3. The C-band ultra-wideband high-gain low-noise amplifier chip according to claim 1, characterized in that: The second self-biasing network of the transistor M1 includes a grounding resistor R2 and a grounding capacitor C3, and both the grounding resistor R2 and the grounding capacitor C3 are connected to the source of the transistor M1.
4. The C-band ultra-wideband high-gain low-noise amplifier chip according to claim 1, characterized in that: The parallel negative feedback network includes a resistor R5, an inductor L5 and a capacitor C5 connected in sequence, one end of the resistor R5 is connected to one end of the inductor L5, and the other end thereof is connected to the gate of the transistor M2 through a microstrip line TL2, one end of the capacitor C5 is connected to the other end of the inductor L5, and the other end thereof is connected to the drain of the transistor M2 through a microstrip line TL4.
5. The C-band ultra-wideband high-gain low-noise amplifier chip according to claim 1, characterized in that: The power supply filter network includes an inductor L6, one end of which is connected to the output end of the current multiplexing network, and the other end of which is respectively connected to one end of a resistor R7, a grounding capacitor C9 and a power supply VDD. The other end of the resistor R7 is connected to a grounding capacitor C8.
6. The C-band ultra-wideband high-gain low-noise amplifier chip according to claim 1, characterized in that: The second high-pass filter network includes a capacitor C10 and a ground inductor L7. One end of the capacitor C10 serves as the output end of the second high-pass filter network, and the other end of the capacitor C10 is connected to the ground inductor L7 and serves as the input end of the second high-pass filter network.