Piezoelectric drive circuit and piezoelectric drive method
By combining a full-bridge circuit and a power stage circuit, the control supply voltage signal tracks the reference voltage waveform, solving the problem of large size and difficulty in integration of existing piezoelectric drive circuits, and realizing the miniaturization and multi-channel drive capability of piezoelectric drive circuits.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-08-20
- Publication Date
- 2026-06-12
AI Technical Summary
Existing piezoelectric drive circuits contain a large number of inductors and capacitors, resulting in large circuit size and difficulty in integration.
By employing a full-bridge circuit and a power stage circuit, and controlling the operating state of the full-bridge circuit, the supply voltage signal is made to track the reference voltage waveform, reducing inductor components and achieving circuit integration.
It reduces the size of the piezoelectric drive circuit, improves the integration level of the circuit, reduces costs, and can drive multiple piezoelectric loads without interference.
Smart Images

Figure CN111934580B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power electronics, and more specifically, to a piezoelectric drive circuit and a piezoelectric drive method. Background Technology
[0002] Piezoelectric ceramics, as a type of piezoelectric load or piezoelectric actuator, are increasingly widely used. Piezoelectric ceramics can convert electrical energy into mechanical energy; for example, when used in a mobile phone, they cause the phone to vibrate when activated. Existing piezoelectric drive circuits for driving piezoelectric ceramics generally contain a large number of inductors and capacitors. Piezoelectric drive circuits with many inductors and capacitors are generally quite large, especially when they contain a large number of inductors, making them difficult to integrate into a chip and hindering circuit integration. Summary of the Invention
[0003] In view of this, the present invention proposes a piezoelectric drive circuit and piezoelectric drive method that are conducive to integration, so as to solve the technical problem that the existence of a lot of inductance in the prior art is not conducive to circuit integration.
[0004] In a first aspect, embodiments of the present invention provide a piezoelectric driving circuit for driving a piezoelectric load, comprising: a power stage circuit for receiving an input voltage to generate an output voltage at its output terminal; a full-bridge circuit coupled to the output terminal of the power stage circuit for charging and discharging the piezoelectric load; and controlling the operating state of the full-bridge circuit such that, in a first operating interval of a working cycle, the supply voltage signal provided to the piezoelectric load corresponds to a first interval of a reference voltage; and in a second operating interval of the working cycle, the supply voltage signal corresponds to a second interval of the reference voltage.
[0005] Preferably, during a portion of the first operating interval, the full-bridge circuit reverse-discharges the piezoelectric load, and during another portion of the first operating interval, the full-bridge circuit forward-charges the piezoelectric load.
[0006] Preferably, during a portion of the second operating interval, the full-bridge circuit forward discharges the piezoelectric load, and during another portion of the second operating interval, the full-bridge circuit reverse charges the piezoelectric load.
[0007] Preferably, the full-bridge circuit includes a first power switch, a second power switch, a third power switch, and a fourth power switch. The first power switch and the second power switch are connected in series at the output terminal of the power stage circuit, and the third power switch and the fourth power switch are connected in series at the output terminal of the power stage circuit. The piezoelectric load is connected between a first node and a second node. The first node is the common terminal of the first power switch and the second power switch, and the second node is the common terminal of the third power switch and the fourth power switch.
[0008] Preferably, in the first operating range, the second power switch and the third power switch are controlled to be turned off, and the operating states of the first power switch and the fourth power switch are controlled, so that the supply voltage signal corresponds to the first range of the reference voltage; in the second operating range, the first power switch and the fourth power switch are controlled to be turned off, and the operating states of the second power switch and the third power switch are controlled, so that the supply voltage signal corresponds to the second range of the reference voltage.
[0009] Preferably, in the first operating range, the second power switch and the third power switch are controlled to be turned off, and the first power switch and the fourth power switch operate in a linear state so that the supply voltage signal corresponds to the first range of the reference voltage.
[0010] Preferably, in the second operating range, the first power switch and the fourth power switch are turned off, and the second power switch and the third power switch operate in a linear state, so that the supply voltage signal corresponds to the second range of the reference voltage.
[0011] Preferably, the operating state of the power stage circuit is controlled in the first operating interval and the second operating interval so that the output voltage of the power stage circuit is always the first voltage.
[0012] Preferably, during a portion of the first operating interval, the second power switch and the third power switch are controlled to be turned off, and the first power switch and the fourth power switch operate in a linear state; during another portion of the first operating interval, the second power switch and the third power switch are controlled to be turned off, and the first power switch and the fourth power switch are turned on, so that during the first operating interval, the supply voltage signal corresponds to the first interval of the reference voltage.
[0013] Preferably, during a portion of the second operating interval, the first power switch and the fourth power switch are controlled to be turned off, and the second power switch and the third power switch operate in a linear state; during another portion of the second operating interval, the first power switch and the fourth power switch are controlled to be turned off, and the second power switch and the third power switch are controlled to be turned on, so that during the second operating interval, the supply voltage signal corresponds to the second interval of the reference voltage.
[0014] Preferably, the operating state of the power stage circuit is controlled during another part of the first operating interval and another part of the second operating interval, so that the output voltage of the power stage circuit is the supply voltage signal.
[0015] Preferably, the first interval of the reference voltage is the rising portion of the reference voltage within one cycle, and the second interval of the reference voltage is the falling portion of the reference voltage within the same cycle.
[0016] Preferably, the reference voltage is an AC signal.
[0017] Preferably, the waveform of the reference voltage is a sine wave.
[0018] Preferably, the piezoelectric drive circuit further includes an energy storage capacitor, which is coupled to the output terminal of the power stage circuit and is used to store the output voltage of the power stage circuit.
[0019] Preferably, the piezoelectric drive circuit includes N full-bridge circuits, which are connected in parallel to the output of the power stage circuit to provide the corresponding power supply voltage signal for the N piezoelectric loads, where N is greater than or equal to 1.
[0020] Preferably, the piezoelectric drive circuit further includes a control circuit, which generates a first drive voltage and a second drive voltage according to a compensation signal to control the operating states of the first power switch, the second power switch, the third power switch and the fourth power switch. The compensation signal represents the error between the reference signal and the sampled signal representing the power supply voltage signal.
[0021] Preferably, the control circuit includes a first control circuit and a second control circuit, which are used to generate a first driving voltage and a second driving voltage, respectively.
[0022] In the first operating range, the first control circuit generates a first driving voltage based on the compensation signal to control the resistance of the first power switch and the fourth power switch, and the second control circuit controls the second driving voltage to be invalid to control the second power switch and the third power switch to be turned off; in the second operating range, the first control circuit controls the first driving voltage to be invalid to control the first power switch and the fourth power switch to be turned off, and the second control circuit generates a second driving voltage based on the compensation signal to control the resistance of the second power switch and the third power switch.
[0023] Preferably, the power stage circuit is one of a buck circuit, a boost circuit, a flyback circuit, a forward circuit, a boost-buck circuit, and a buck-boost circuit.
[0024] Secondly, embodiments of the present invention also provide a piezoelectric driving method applied to a piezoelectric driving circuit. The piezoelectric driving circuit includes a power stage circuit and a full-bridge circuit. The power stage circuit receives an input voltage to generate an output voltage at its output terminal. The full-bridge circuit is coupled to the output terminal of the power stage circuit to charge and discharge the piezoelectric load. The piezoelectric driving method includes:
[0025] The operating state of the full-bridge circuit is controlled such that, in the first operating interval of a working cycle, the supply voltage signal provided to the piezoelectric load corresponds to the first interval of the reference voltage, and in the second operating interval of the working cycle, the supply voltage signal corresponds to the second interval of the reference voltage.
[0026] Compared with the prior art, the technical solution of the present invention has the following advantages: The piezoelectric drive circuit of the present invention includes a power stage circuit and a full-bridge circuit. The power stage circuit receives an input voltage to generate an output voltage at its output terminal. The full-bridge circuit is coupled to the output terminal of the power stage circuit to charge and discharge the piezoelectric load. The operating state of the full-bridge circuit is controlled so that in a first operating interval of a working cycle, the supply voltage signal provided to the piezoelectric load corresponds to a first interval of a reference voltage; in a second operating interval of the working cycle, the supply voltage signal corresponds to a second interval of the reference voltage. The reference voltage is alternating current. Optionally, the first interval of the reference voltage is the rising portion of the reference voltage in one cycle, and the second interval of the reference voltage is the falling portion of the reference voltage in that cycle. Preferably, the waveform of the reference voltage is a sine wave. The present invention controls the switching state of the full-bridge circuit according to the reference voltage, so that the supply voltage signal tracks the reference voltage. The full-bridge circuit in the piezoelectric drive circuit of the present invention is not coupled with an inductor, which reduces the size of the piezoelectric drive circuit and is beneficial to circuit integration. Attached Figure Description
[0027] The above and other objects, features and advantages of the present invention will become clearer from the following description of embodiments of the invention with reference to the accompanying drawings, in which:
[0028] Figure 1 This is a circuit diagram of a first embodiment of the piezoelectric drive circuit of the present invention;
[0029] Figure 2 This is a working waveform diagram of a first embodiment of the piezoelectric drive circuit of the present invention;
[0030] Figure 3 This is another working waveform diagram of the piezoelectric drive circuit of the present invention (Embodiment 1).
[0031] Figure 4 This is a schematic diagram of the working circuit of Embodiment 1 of the piezoelectric drive circuit of the present invention in the first working range;
[0032] Figure 5 This is a schematic diagram of the working circuit of Embodiment 1 of the piezoelectric drive circuit of the present invention in the second working range;
[0033] Figure 6 This is a schematic diagram of an embodiment of the control circuit of the piezoelectric drive circuit of the present invention;
[0034] Figure 7 This is a circuit diagram of a second embodiment of the piezoelectric drive circuit of the present invention. Detailed Implementation
[0035] The present invention is described below based on embodiments, but the invention is not limited to these embodiments. In the detailed description of the invention below, certain specific details are described in detail. Those skilled in the art will fully understand the invention even without these details. To avoid obscuring the essence of the invention, well-known methods, processes, flows, elements, and circuits are not described in detail.
[0036] Furthermore, those skilled in the art should understand that the accompanying drawings provided herein are for illustrative purposes only and are not necessarily drawn to scale.
[0037] Furthermore, it should be understood that in the following description, "circuit" refers to a conductive loop consisting of at least one element or sub-circuit connected by electrical or electromagnetic connections. When an element or circuit is said to be "connected" to another element or "connected" between two nodes, it can be directly coupled or connected to another element, or there may be intermediate elements. The connection between elements can be physical, logical, or a combination thereof. Conversely, when an element is said to be "directly coupled to" or "directly connected" to another element, it means that there are no intermediate elements between them.
[0038] This invention provides a piezoelectric drive circuit for driving a piezoelectric load, comprising:
[0039] The power stage circuit receives the input voltage and uses it to generate the output voltage at its output terminal;
[0040] A full-bridge circuit is coupled to the output terminal of the power stage circuit to charge and discharge the piezoelectric load.
[0041] The operating state of the full-bridge circuit is controlled such that, in a first operating interval of a working cycle, the supply voltage signal provided to the piezoelectric load corresponds to a first interval of the reference voltage; and in a second operating interval of the working cycle, the supply voltage signal corresponds to a second interval of the reference voltage.
[0042] The first interval of the reference voltage is the rising portion of the reference voltage within one cycle, and the second interval of the reference voltage is the falling portion of the reference voltage within the same cycle. Optionally, the reference voltage is an AC signal. Preferably, the waveform of the reference voltage is a sine wave.
[0043] The power stage circuit includes buck circuits, boost circuits, flyback circuits, forward circuits, boost-buck circuits, and buck-boost circuits, etc.
[0044] Furthermore, the piezoelectric drive circuit includes N full-bridge circuits, which are connected in parallel to the output of the power stage circuit to provide the corresponding power supply voltage signal for the N piezoelectric loads, thereby driving the N piezoelectric loads, where N is greater than or equal to 1.
[0045] The piezoelectric load described in this invention includes piezoelectric ceramics and piezoelectric actuators, among other piezoelectric devices. The power switch and selection switch in this invention are not limited to MOSFETs but can also be implemented using BJTs or IGBTs, etc., and this invention does not impose any limitations on them. The control principle of the piezoelectric drive circuit of this invention is to control the switching state of the full-bridge circuit according to the reference voltage, thereby making the supply voltage signal track the reference voltage, i.e., the reference voltage is the desired value of the supply voltage signal. Specifically, by controlling the operating state of the full-bridge circuit, the supply voltage signal provided to the piezoelectric load corresponds to the first interval of the reference voltage in the first operating interval of a working cycle; in the second operating interval of the working cycle, the supply voltage signal corresponds to the second interval of the reference voltage. The first interval of the reference voltage in this invention is the rising portion of the reference voltage within one cycle, and the second interval of the reference voltage is the falling portion of the reference voltage within that cycle. Optionally, the reference voltage is an AC signal. Preferably, the waveform of the reference voltage is a sine wave. Subsequent embodiments of this invention use a sine wave as an example for illustration, but the reference voltage can be in other forms, and this invention does not impose any limitations on it. The full-bridge circuit in the piezoelectric drive circuit of this invention is not coupled to an inductor, reducing the size of the piezoelectric drive circuit and facilitating circuit integration. Increasing the number of piezoelectric loads driven by this invention is simple, and the outputs do not interfere with each other. It can be used to drive one or multiple piezoelectric loads. For ease of explanation, subsequent embodiments using two piezoelectric loads as an example when driving multiple piezoelectric loads are used, but this invention does not limit this. The piezoelectric drive circuit of this invention has a simple manufacturing process, uses fewer components, reduces circuit size, lowers cost, and increases circuit power density.
[0046] Figure 1 A circuit diagram of an embodiment of the piezoelectric drive circuit of the present invention, wherein the piezoelectric drive circuit is used to drive a piezoelectric load or a piezoelectric actuator C. load Provide a power supply voltage signal to drive the piezoelectric load C. load It includes: a power stage circuit 1 and a full-bridge circuit 2, wherein the power stage circuit 1 receives an input voltage Vin to generate an output voltage V at its output terminal. bus The full-bridge circuit 2 is coupled to the output of the power stage circuit 1 to supply power to the piezoelectric load C. load Perform charging and discharging; control the operating state of the full-bridge circuit 2 so that, in the first operating interval of a working cycle, it provides power to the piezoelectric load C. loadThe supply voltage signal corresponds to a first interval of the reference voltage; in the second operating interval of the operating cycle, the supply voltage signal corresponds to a second interval of the reference voltage. In this embodiment, the waveform of the reference voltage is a sine wave. The first interval of the reference voltage is the rising portion of the reference voltage within one cycle, and the second interval of the reference voltage is the falling portion of the reference voltage within that cycle.
[0047] Furthermore, during a portion of the first operating interval, the full-bridge circuit 1 supplies power to the piezoelectric load C. load During a portion of the first operating interval, the full-bridge circuit 1 performs reverse discharge to the piezoelectric load C. load Forward charging is performed. During a portion of the second operating interval, the full-bridge circuit 1 charges the piezoelectric load C. load During a forward discharge, for another portion of the second operating interval, the full-bridge circuit 1 discharges to the piezoelectric load C. load Perform reverse charging.
[0048] The full-bridge circuit 2 includes a first power switch Q1, a second power switch Q2, a third power switch Q3, and a fourth power switch Q4. The first power switch Q1 and the second power switch Q2 are connected in series with the output terminal of the power stage circuit 1, and the third power switch Q3 and the fourth power switch Q4 are connected in series with the output terminal of the power stage circuit 1. The piezoelectric load C... load Connected between a first node and a second node, the first node being the common terminal of the first power switch Q1 and the second power switch Q2, and the second node being the common terminal of the third power switch Q3 and the fourth power switch Q4. Optionally, the piezoelectric load C load The positive terminal is connected to the first node, and the piezoelectric load C load The negative terminal is connected to the second node, but this invention does not limit this. Further, the supply voltage signal is the voltage difference between the first node and the second node, and its value is equal to or close to the piezoelectric load C. load The pressure difference between the two ends.
[0049] The piezoelectric drive circuit in this embodiment also includes a control circuit (not shown in the figure). In the first operating range, the second power switch Q2 and the third power switch Q3 are controlled to be turned off, and the operating states of the first power switch Q1 and the fourth power switch Q4 are controlled so that the supply voltage signal corresponds to the first range of the reference voltage. In the second operating range, the first power switch Q1 and the fourth power switch Q4 are controlled to be turned off, and the operating states of the second power switch Q2 and the third power switch Q3 are controlled so that the supply voltage signal corresponds to the second range of the reference voltage.
[0050] Furthermore, various control methods can achieve the above objectives. Two specific control methods are given below, but this invention does not limit them.
[0051] The first control method is as follows: In the first operating range, the second power switch Q2 and the third power switch Q3 are turned off, and the first power switch Q1 and the fourth power switch Q4 are controlled to operate in a linear state, so that the supply voltage signal corresponds to the first range of the reference voltage. In the second operating range, the first power switch Q1 and the fourth power switch Q4 are turned off, and the second power switch Q2 and the third power switch Q3 are controlled to operate in a linear state, so that the supply voltage signal corresponds to the second range of the reference voltage. Further, in the first operating range, the resistance of the first power switch Q1 and the fourth power switch Q4 is controlled by controlling the driving voltage of the first power switch Q1 and the fourth power switch Q4, so that the supply voltage signal corresponds to the first range of the reference voltage; in the second operating range, the resistance of the second power switch Q2 and the third power switch Q3 is controlled by controlling the driving voltage of the second power switch Q2 and the third power switch Q3, so that the supply voltage signal corresponds to the second range of the reference voltage. Furthermore, in the first operating interval, the driving voltages of the first power switch Q1 and the fourth power switch Q4 can be the same or different. Similarly, in the second operating interval, the driving voltages of the second power switch Q2 and the third power switch Q3 can be the same or different. This invention does not impose limitations on this, but for ease of description, the following explanation will use the example of the first power switch Q1 and the fourth power switch Q4 having the same driving voltage, and the second power switch Q2 and the third power switch Q3 having the same driving voltage. Furthermore, in both the first and second operating intervals, the operating state of the power stage circuit 1 is controlled so that the power stage circuit 1 operates in PWM mode, thereby causing the output voltage V... bus The voltage is constantly the first voltage V1. The first voltage V1 is the output voltage V of power stage circuit 1. bus The voltage after stabilization.
[0052] The second control method is as follows: During a portion of the first operating interval, the second power switch Q2 and the third power switch Q3 are turned off, while the first power switch Q1 and the fourth power switch Q4 operate in a linear state. During another portion of the first operating interval, the second power switch Q2 and the third power switch Q3 are turned off, while the first power switch Q1 and the fourth power switch Q4 are turned on, so that the supply voltage signal in the first operating interval corresponds to the first interval of the reference voltage. During a portion of the second operating interval, the first power switch Q1 and the fourth power switch Q4 are turned off, while the second power switch Q2 and the third power switch Q3 operate in a linear state. During another portion of the second operating interval, the first power switch Q1 and the fourth power switch Q4 are turned off, while the second power switch Q2 and the third power switch Q3 are turned on, so that the supply voltage signal in the second operating interval corresponds to the second interval of the reference voltage. During another portion of the first operating interval and another portion of the second operating interval, the operating state of the power stage circuit 1 is controlled so that the power stage circuit 1 operates in PWM mode, so that the output voltage V... bus The power supply voltage signal, i.e., the output voltage V bus Corresponding to the reference voltage within this range, the output voltage V is adjusted by controlling the duty cycle of the power switch in power stage circuit 1 within this range. bus Corresponding to the reference voltage within this interval. During a portion of the first operating interval and a portion of the second operating interval, the power stage circuit 1 is controlled to be inactive, and the corresponding power switch is controlled to operate in a linear state. By controlling the drive voltage of the corresponding power switch, the resistance of the corresponding power switch is controlled so that the supply voltage signal corresponds to the reference voltage within this interval.
[0053] In this embodiment, the power stage circuit 1 is a boost circuit, and the power stage circuit 1 includes a power switch Q. b The diode D and the inductor L, and the power switch Q b The power switch Q is connected in series with the inductor L across the input power supply. b The common terminal of the input power supply is grounded, and the first terminal of the diode D is connected to the inductor L and the power switch Q. bThe common terminal of the diode D is used as the high-potential terminal of the output of the power stage circuit 1, and the low-potential terminal of the output of the power stage circuit 1 is grounded. Since the voltage at the low-potential terminal of the output of the power stage circuit 1 is zero, the voltage at the high-potential terminal of the output of the power stage circuit 1 is the voltage of the output of the power stage circuit 1. The input power supply is used to provide the input voltage Vin. In other embodiments, the diode D is a power switch. In other embodiments, the power stage circuit can be any other power stage circuit topology such as a buck circuit, flyback circuit, forward circuit, boost-buck circuit, and buck-boost circuit, and the present invention is not limited thereto.
[0054] Corresponding to the first control method, the output terminal of the power stage circuit 1 can be coupled to an energy storage capacitor or not. In one embodiment, the piezoelectric drive circuit further includes an energy storage capacitor C1, which is coupled to the output terminal of the power stage circuit 1 to store the first voltage V1, making it easier to keep the voltage at the output terminal of the power stage circuit 1 constant. In another embodiment, the output terminal of the power stage circuit 1 is not coupled to an energy storage capacitor, and the output voltage of the power stage circuit 1 is directly applied to the piezoelectric load C through the full-bridge circuit 2. load Charging is performed, reducing energy loss. Corresponding to the second control method, the output terminal of the power stage circuit 1 is not coupled to the energy storage capacitor.
[0055] Combination Figure 2 , Figure 4 and Figure 5 The piezoelectric drive circuit embodiment one describes the working process corresponding to the first control method, where V bus The voltage across the energy storage capacitor C1 (in embodiments without an energy storage capacitor C1, V) bus V1 is the voltage across the energy storage capacitor C1, where V is the voltage at the output terminal of the power stage circuit 1. bus The first voltage after stabilization (in an embodiment without energy storage capacitor C1, V1 is the voltage V at the output terminal of power stage circuit 1) bus The first voltage after stabilization will be described using an embodiment with an energy storage capacitor C1 for ease of description, but this invention is not limited to this. ref The reference voltage is a sine wave, V. gQ1 This is the drive signal for power switch Q1, V gQ2 This is the drive signal for power switch Q2, V gQ3 This is the drive signal for power switch Q3, V gQ4 This is the drive signal for power switch Q4, V load The piezoelectric load C loadThe voltage difference between the two ends (in this embodiment, it is the voltage at the positive end of the piezoelectric load minus the voltage at the negative end). The piezoelectric load C load The voltage difference between the two ends can be used to characterize the supply voltage signal.
[0056] Starting at time t0, the power switch Q of the power stage circuit 1... b Operating in PWM mode, so that the voltage V of the energy storage capacitor C1 is... bus Starting from zero, the voltage V of the energy storage capacitor C1 increases until time t1. bus After reaching the first voltage V1, the power switch Q of the first power stage circuit 1... b It still operates in PWM mode so that the voltage V of the energy storage capacitor C1 is... bus It stabilizes at the first voltage V1.
[0057] The voltage V of the energy storage capacitor C1 bus At any point after stabilizing at the first voltage V1, the reference voltage can be output, and the power switches in the full-bridge circuit 2 can be driven. Figure 2 The voltage V of the energy storage capacitor C1 is equal to the voltage V at time t1. bus The reference voltage is output at the moment when the first voltage V1 is reached, and the power switch in the full-bridge circuit 2 is started to be driven, but the present invention does not limit this.
[0058] During the interval t1-t4, V gQ2 and V gQ3 When the voltage level is low, the second power switch Q2 and the third power switch Q3 are turned off, and the first power switch Q1 and the fourth power switch Q4 operate in a linear state. The piezoelectric drive circuit is as follows: Figure 4 The operation is as shown. Within this range, the full-bridge circuit 2 supplies power to the piezoelectric load C. load Forward charging is achieved by controlling the driving voltages of the first power switch Q1 and the fourth power switch Q4, thereby controlling the resistance of the first power switch Q1 and the fourth power switch Q4, and thus controlling the forward charging rate, so that the supply voltage signal follows the reference voltage V in this range. ref The voltage difference V across the piezoelectric load increases continuously until time t4. load Reaching the reference voltage V ref The maximum value of the voltage difference V across the piezoelectric load is within this range. load like Figure 2 As shown.
[0059] In the interval t4-t5, V gQ1 and V gQ4When the voltage level is low, the first power switch Q1 and the fourth power switch Q4 are turned off, and the second power switch Q2 and the third power switch Q3 operate in a linear state. The piezoelectric drive circuit is as follows: Figure 5 The operation is as shown. Within this range, the full-bridge circuit 2 supplies power to the piezoelectric load C. load Forward discharge is achieved by controlling the driving voltages of the second power switch Q2 and the third power switch Q3, thereby controlling the resistance of the second power switch Q2 and the third power switch Q3, and thus controlling the rate of forward discharge, so that the supply voltage signal follows the reference voltage V in this range. ref The voltage difference V across the piezoelectric load decreases continuously until time t5. load With reference voltage V ref The voltage drop to zero occurs within this range, where the voltage difference V across the piezoelectric load decreases to zero. load like Figure 2 As shown.
[0060] In the interval t5-t6, V gQ1 and V gQ4 When the voltage level is low, the first power switch Q1 and the fourth power switch Q4 are turned off, and the second power switch Q2 and the third power switch Q3 operate in a linear state. The piezoelectric drive circuit is as follows: Figure 5 The operation is as shown. Within this range, the full-bridge circuit 2 supplies power to the piezoelectric load C. load Reverse charging is achieved by controlling the driving voltages of the second power switch Q2 and the third power switch Q3, thereby controlling the resistance of the second power switch Q2 and the third power switch Q3, and thus controlling the reverse charging rate, so that the supply voltage signal follows the reference voltage V in this range. ref The voltage difference V across the piezoelectric load decreases continuously until time t6. load The voltage drops to the reference voltage V ref The minimum value of V is within this range, representing the voltage difference V across the piezoelectric load. load like Figure 2 As shown.
[0061] In the interval t6-t7, V gQ2 and V gQ3 When the voltage level is low, the second power switch Q2 and the third power switch Q3 are turned off, and the first power switch Q1 and the fourth power switch Q4 operate in a linear state. The piezoelectric drive circuit is as follows: Figure 4 The operation is as shown. Within this range, the full-bridge circuit 2 supplies power to the piezoelectric load C. loadReverse discharge is achieved by controlling the driving voltages of the first power switch Q1 and the fourth power switch Q4, thereby controlling the resistance of the first power switch Q1 and the fourth power switch Q4, and thus controlling the rate of reverse discharge, so that the supply voltage signal follows the reference voltage V in this range. ref The voltage difference V across the piezoelectric load increases continuously until time t7. load With reference voltage V ref The voltage rises to zero. During this interval, the voltage difference V across the piezoelectric load... load like Figure 2 As shown.
[0062] The interval t1-t7 constitutes one working cycle. The working process within the t1-t7 interval is repeated, causing the supply voltage signal to follow the reference voltage V. ref The waveform of the supply voltage signal changes, and it is a sine wave. Until time t9, after which the reference voltage is zero, the first power switch Q1, the fourth power switch Q4, the second power switch Q2, and the third power switch Q3 are all turned off, and the piezoelectric load C... load The voltage difference V across the piezoelectric load is no longer connected to the circuit. load It is 0.
[0063] Therefore, the first operating interval includes the t6-t7 interval and the t1-t4 interval (or t7-t8). Within the first operating interval, the reference voltage continuously rises. In the t6-t7 interval, the full-bridge circuit 2 discharges in reverse to the piezoelectric load, and in the t1-t4 interval (or t7-t8), the full-bridge circuit 2 charges the piezoelectric load in the forward direction. The second operating interval includes the t4-t5 interval and the t5-t6 interval. Within the second operating interval, the reference voltage continuously decreases. In the t4-t5 interval, the full-bridge circuit 2 discharges in the forward direction to the piezoelectric load, and in the t5-t6 interval, the full-bridge circuit 2 charges the piezoelectric load in reverse direction.
[0064] Combination Figure 3 , Figure 4 and Figure 5 The working process of the piezoelectric drive circuit embodiment one corresponding to the second control method is explained, wherein V ref The reference voltage is a sine wave, V. gQb For power switch Q in power stage circuit 1 b The drive signal, V gQ1 This is the drive signal for power switch Q1, V gQ1 This is the drive signal for power switch Q1, V gQ2 This is the drive signal for power switch Q2, V gQ3 This is the drive signal for power switch Q3, V gQ4This is the drive signal for power switch Q4, V load The piezoelectric load C load The voltage difference between the two ends (in this embodiment, it is the voltage at the positive end of the piezoelectric load minus the voltage at the negative end). The piezoelectric load C load The voltage difference between the two ends can be used to characterize the supply voltage signal.
[0065] During the interval t1-t4, V gQ2 and V gQ3 V is low level. gQ1 and V gQ4 When the voltage level is high, the second power switch Q2 and the third power switch Q3 are off, and the first power switch Q1 and the fourth power switch Q4 are on. The piezoelectric drive circuit is as follows: Figure 4 The operation is as shown. Within this range, the piezoelectric drive signal is the output voltage of the power stage circuit 1, which operates in PWM mode. The full-bridge circuit 2 supplies power to the piezoelectric load C. load Forward charging is achieved by controlling the power switch Q. b The duty cycle is such that the supply voltage signal follows the reference voltage V in that interval. ref The voltage difference V across the piezoelectric load increases continuously until time t4. load Reaching the reference voltage V ref The maximum value of the voltage difference V across the piezoelectric load is within this range. load like Figure 3 As shown.
[0066] In the interval t4-t5, V gQ1 and V gQ4 When the voltage level is low, the first power switch Q1 and the fourth power switch Q4 are turned off, and the second power switch Q2 and the third power switch Q3 operate in a linear state. The piezoelectric drive circuit is as follows: Figure 5 The operation is as shown. During this interval, the power stage circuit 1 is not operational, i.e., the power switch Q... b When the full-bridge circuit 2 is turned off, the piezoelectric load C is... load Forward discharge is achieved by controlling the driving voltages of the second power switch Q2 and the third power switch Q3, thereby controlling the resistance of the second power switch Q2 and the third power switch Q3, and thus controlling the rate of forward discharge, so that the supply voltage signal follows the reference voltage V in this range. ref The voltage difference V across the piezoelectric load decreases continuously until time t5. load With reference voltage V ref The voltage drop to zero occurs within this range, where the voltage difference V across the piezoelectric load decreases to zero. load like Figure 3 As shown.
[0067] In the interval t5-t6, V gQ1 and V gQ4 V is low level. gQ2 and V gQ3 When the voltage level is high, the first power switch Q1 and the fourth power switch Q4 are off, and the second power switch Q2 and the third power switch Q3 are on. The piezoelectric drive circuit is as follows: Figure 5 The operation is as shown. Within this range, the piezoelectric drive signal is the output voltage of the power stage circuit 1, which operates in PWM mode. The full-bridge circuit 2 supplies power to the piezoelectric load C. load Reverse charging is achieved by controlling the power switch Q. b The duty cycle is such that the supply voltage signal follows the reference voltage V in that interval. ref The voltage difference V across the piezoelectric load decreases continuously until time t6. load The voltage drops to the reference voltage V ref The minimum value of V is within this range, representing the voltage difference V across the piezoelectric load. load like Figure 3 As shown.
[0068] In the interval t6-t7, V gQ2 and V gQ3 When the voltage level is low, the second power switch Q2 and the third power switch Q3 are turned off, and the first power switch Q1 and the fourth power switch Q4 operate in a linear state. The piezoelectric drive circuit is as follows: Figure 4 The operation is as shown. During this interval, the power stage circuit 1 is not operational, i.e., the power switch Q... b When the full-bridge circuit 2 is turned off, the piezoelectric load C is... load Reverse discharge is achieved by controlling the driving voltages of the first power switch Q1 and the fourth power switch Q4, thereby controlling the resistance of the first power switch Q1 and the fourth power switch Q4, and thus controlling the rate of reverse discharge, so that the supply voltage signal follows the reference voltage V in this range. ref The voltage difference V across the piezoelectric load increases continuously until time t7. load With reference voltage V ref The voltage rises to zero. During this interval, the voltage difference V across the piezoelectric load... load like Figure 3 As shown.
[0069] The interval t1-t7 constitutes one working cycle. The working process within the t1-t7 interval is repeated, causing the supply voltage signal to follow the reference voltage V. refThe waveform of the supply voltage signal changes, and it is a sine wave. Until time t9, after which the reference voltage is zero, the first power switch Q1, the fourth power switch Q4, the second power switch Q2, and the third power switch Q3 are all turned off, and the piezoelectric load C... load The voltage difference V across the piezoelectric load is no longer connected to the circuit. load It is 0.
[0070] Therefore, the first operating interval includes the t6-t7 interval and the t1-t4 interval (or t7-t8). Within the first operating interval, the reference voltage continuously rises. In the t6-t7 interval, the full-bridge circuit 2 discharges in reverse to the piezoelectric load, and in the t1-t4 interval (or t7-t8), the full-bridge circuit 2 charges the piezoelectric load in the forward direction. The second operating interval includes the t4-t5 interval and the t5-t6 interval. Within the second operating interval, the reference voltage continuously decreases. In the t4-t5 interval, the full-bridge circuit 2 discharges in the forward direction to the piezoelectric load, and in the t5-t6 interval, the full-bridge circuit 2 charges the piezoelectric load in reverse. Furthermore, when the piezoelectric load is charging (including forward charging and reverse charging), the corresponding power switch in the charging path operates in the on state, and the power switch Q in the power stage circuit 1 is controlled by... b The duty cycle is adjusted so that the supply voltage signal follows the reference voltage of the corresponding interval; when the piezoelectric load discharges (including forward discharge and reverse discharge), the corresponding power switch in the discharge path operates in a linear state, and the resistance of the corresponding power switch in the discharge path is controlled by controlling the drive voltage of the corresponding power switch, so that the supply voltage signal follows the reference voltage of the corresponding interval.
[0071] It should be noted that, Figure 2 and Figure 3 The black squares in the diagram are only used to represent that the corresponding power switch is operating in a linear state, and are not used to represent the actual value of the drive voltage when the corresponding power switch is operating in a linear state. Specifically, the drive voltage when the corresponding power switch is operating in a linear state varies with a compensation signal, which represents the error between the reference voltage and the sampled signal representing the supply voltage signal. Furthermore, the initial value of the drive voltage can be zero or other preset values.
[0072] Figure 6This is an embodiment diagram of the control circuit of a piezoelectric drive circuit according to a first embodiment of the present invention. The control circuit corresponds to the first control method. The control circuit includes a first control circuit 81 and a second control circuit 82, which generate a first driving voltage V11a and a second driving voltage V12a according to a compensation signal Vc, respectively. The first driving voltage V11a is output to the control terminals of the first power switch Q1 and the fourth power switch Q4 to control the operating state (i.e., linear operation and off state) of the first power switch Q1 and the fourth power switch Q4. The second driving voltage V12a is output to the control terminals of the second power switch Q2 and the third power switch Q3 to control the operating state (i.e., linear operation and off state) of the second power switch Q2 and the third power switch Q3. The compensation signal Vc represents the reference voltage Vc. ref The error between the sampled signal Vs, which characterizes the supply voltage signal, and the control circuit is also used to control the power switch Q of the power stage circuit 1. b The switching state can be controlled by any conventional control method, and the power switch Q can be controlled by any conventional control method. b Therefore, it will not be elaborated here.
[0073] Specifically, in the first operating range, the first control circuit 81 generates a first driving voltage V11a based on the compensation signal Vc to control the resistance of the first power switch Q1 and the fourth power switch Q4, and the second control circuit 82 controls the second driving voltage V12a to be invalid, thereby controlling the second power switch Q2 and the third power switch Q3 to be turned off; in the second operating range, the first control circuit 81 controls the first driving voltage V11a to be invalid, thereby controlling the first power switch Q1 and the fourth power switch Q4 to be turned off, and the second control circuit 82 generates a second driving voltage V12a based on the compensation signal Vc to control the resistance of the second power switch Q2 and the third power switch Q3.
[0074] The first control circuit 81 includes a first signal generation circuit 811, which generates a first signal V11 based on the compensation signal Vc. When the first enable signal Ven1 is valid, the first signal V11 is a first driving voltage V11a. Optionally, when the first enable signal Ven1 is invalid, the first driving voltage V11a is equal to 0.
[0075] When the reference voltage continuously rises or the slope of the reference voltage is greater than zero (i.e., corresponding to the first working interval), the first enable signal Ven1 becomes effective.
[0076] The second control circuit 82 includes a second signal generation circuit 821, which generates a second signal V12 based on the compensation signal Vc. When the second enable signal Ven2 is enabled, the second signal V12 is the second driving voltage V12a. Optionally, when the second enable signal Ven2 is invalid, the second driving voltage V12a is equal to 0.
[0077] When the reference voltage continuously decreases or the slope of the reference voltage is less than zero (i.e., corresponding to the second operating range), the second enable signal Ven2 becomes effective.
[0078] Both the first signal generation circuit 811 and the second signal generation circuit 821 include an integrator circuit 8111 and a multiplier. Both the integrator circuit 8111 and the multiplier receive a compensation signal Vc. The signal resulting from the superposition of the output signal Vi of the integrator circuit 8111 and the output signal Vp of the multiplier is either the first signal V11 or the second signal V12. The compensation signal Vc represents the reference voltage V. ref The error between the sampled signal Vs, which characterizes the power supply voltage signal.
[0079] The integrator circuit 8111 includes a voltage-controlled current source I1 and a capacitor C11. The voltage-controlled current source I1 receives the compensation signal Vc, and its output current charges the capacitor C11. The voltage on the capacitor C11 is the output signal Vi of the integrator circuit 8111.
[0080] The control circuit described in Embodiment 1 of the present invention may take other forms or structures in other embodiments. For example, the control circuit may include four control circuits that generate four driving voltages to drive the first power switch Q1, the fourth power switch Q4, the second power switch Q2, and the third power switch Q3, respectively. The present invention does not limit this.
[0081] The piezoelectric drive circuit of this invention, in embodiment one, is used to drive one piezoelectric load, and therefore includes only one voltage output circuit, making it a single-output circuit. The piezoelectric drive circuit described above can also be used to drive multiple piezoelectric loads, i.e., multiple outputs. Specifically, the piezoelectric drive circuit includes at least two parallel full-bridge circuits. By controlling the operating state of the corresponding full-bridge circuits, the corresponding power supply voltage signal is provided to the corresponding piezoelectric load, thereby driving the corresponding piezoelectric load. In subsequent embodiments of this invention, for ease of explanation, the multiple outputs are two outputs used to drive two piezoelectric loads, but this invention does not impose limitations on this.
[0082] Figure 7This is a circuit diagram of Embodiment 2 of the piezoelectric drive circuit of the present invention. The difference between Embodiment 1 and Embodiment 2 is that the piezoelectric drive circuit includes two full-bridge circuits connected in parallel to the output of the power stage circuit 1. By controlling the operating state of the corresponding full-bridge circuits, a first supply voltage signal and a second supply voltage signal are generated to drive the piezoelectric load C respectively. load1 and C load2 .
[0083] The piezoelectric drive circuit includes a full-bridge circuit 21 and a full-bridge circuit 22, which are connected in parallel to the output terminal of the power stage circuit 1.
[0084] The full-bridge circuit 21 includes power switches Q1, Q2, Q3, and Q4. Power switches Q1 and Q2 are connected in series at the output terminal of the power stage circuit 1, and power switches Q3 and Q4 are also connected in series at the output terminal of the power stage circuit 1. The piezoelectric load C... load1 Connected between a first node and a second node, the first node being the common terminal of power switches Q1 and Q2, and the second node being the common terminal of power switches Q3 and Q4. The full-bridge circuit 22 includes power switches Q... 11 Power switch Q 12 Power switch Q 13 and power switch Q 14 The power switch Q 11 and power switch Q 12 The power switch Q is connected in series with the output terminal of the power stage circuit 1. 13 and power switch Q 14 The piezoelectric load C is connected in series with the output terminal of the power stage circuit 1. load2 Connected between the third node and the fourth node, the third node being the power switch Q. 11 and power switch Q 12 The common terminal, the fourth node is the power switch Q. 13 and the common terminal Q of the power switch 14 .
[0085] In both Examples 2, control can be performed using control methods 1 and 2 described in Example 1. The piezoelectric load C load1 and piezoelectric load C load2They can be driven simultaneously or separately. When using control method one, if the two piezoelectric loads are driven separately, the working process and control principle of driving a single piezoelectric load in Embodiment 2 are similar to those in Embodiment 1, and therefore will not be elaborated here. When the two piezoelectric loads are driven simultaneously, the first voltage V1 output by power stage circuit 1 does not change with the voltage or number of the piezoelectric loads. Therefore, even when the two piezoelectric loads are driven simultaneously, Embodiment 2 can be divided into completely independent drives for the piezoelectric load C. load1 The full-bridge circuit 21 and the piezoelectric load C load2 The full-bridge circuit 22 and the two full-bridge circuits operate completely independently. That is, the first supply voltage signal is generated by controlling the operating state of the full-bridge circuit 21 to drive the piezoelectric load C. load1 The second supply voltage signal is generated by controlling the operating state of the full-bridge circuit 22 to drive the piezoelectric load C. load2 .
[0086] When using control method two, the working process and control principle of driving a single piezoelectric load in Embodiment 2 and Embodiment 3 are similar when two piezoelectric loads are driven separately, so they will not be described in detail here. When two piezoelectric loads are driven simultaneously, the piezoelectric load C... load1 and / or piezoelectric load C load2 During charging (including forward charging and reverse charging), the power stage circuit 1 is used for charging, which is used to drive the piezoelectric load C. load1 The first supply voltage signal and the signal used to drive the piezoelectric load C load2 The second supply voltage signal is the output voltage of the first power stage circuit 1. For the piezoelectric load C... load1 and piezoelectric load C load2 During discharge (including forward and reverse discharge), the control of the two full-bridge circuits operates completely independently. That is, the first supply voltage signal is generated by controlling the operating state of the full-bridge circuit 21 to drive the piezoelectric load C. load1 The second supply voltage signal is generated by controlling the operating state of the full-bridge circuit 22 to drive the piezoelectric load C. load2 .
[0087] This invention also provides a piezoelectric driving method applied to a piezoelectric driving circuit. The piezoelectric driving circuit includes a power stage circuit and a full-bridge circuit. The power stage circuit receives an input voltage to generate an output voltage at its output terminal. The full-bridge circuit is coupled to the output terminal of the power stage circuit to charge and discharge the piezoelectric load. The driving method includes controlling the operating state of the full-bridge circuit such that, in a first operating interval of a working cycle, the supply voltage signal provided to the piezoelectric load corresponds to a first interval of a reference voltage, and in a second operating interval of the working cycle, the supply voltage signal corresponds to a second interval of the reference voltage. Preferably, the reference voltage is an AC signal.
[0088] Furthermore, during a portion of the first operating interval, the full-bridge circuit reverse-discharges the piezoelectric load, and during another portion of the first operating interval, the full-bridge circuit forward-charges the piezoelectric load. Optionally, during a portion of the second operating interval, the full-bridge circuit forward-discharges the piezoelectric load, and during another portion of the second operating interval, the full-bridge circuit reverse-charges the piezoelectric load.
[0089] Furthermore, the first interval of the reference voltage is the rising portion of the reference voltage within one cycle, and the second interval of the reference voltage is the falling portion of the reference voltage within the same cycle. Preferably, the waveform of the reference voltage is a sine wave.
[0090] Although the embodiments are described and illustrated separately above, some common technologies are involved. Those skilled in the art can replace and integrate them between the embodiments. If there is any content not explicitly described in one embodiment, then another embodiment that is described can be referred to.
[0091] As described above, these embodiments of the present invention do not exhaustively cover all details, nor do they limit the invention to the specific embodiments described. Clearly, many modifications and variations can be made based on the above description. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to effectively utilize the invention and its modifications. The invention is limited only by the claims and their full scope and equivalents.
Claims
1. A piezoelectric drive circuit for driving a piezoelectric load, characterized in that, include: The power stage circuit receives the input voltage and uses it to generate the output voltage at its output terminal; A full-bridge circuit is coupled to the output terminal of the power stage circuit to charge and discharge the piezoelectric load. The operating state of the full-bridge circuit is controlled such that, in the first operating interval of a working cycle, the supply voltage signal provided to the piezoelectric load corresponds to the first interval of the reference voltage; and in the second operating interval of the working cycle, the supply voltage signal corresponds to the second interval of the reference voltage; wherein the waveform of the reference voltage is a sine wave. The full-bridge circuit includes a first power switch, a second power switch, a third power switch, and a fourth power switch. The first power switch and the second power switch are connected in series in sequence at the output terminal of the power stage circuit. The third power switch and the fourth power switch are connected in series in sequence at the output terminal of the power stage circuit. The piezoelectric load is directly connected between the first node and the second node. The first node is the common terminal of the first power switch and the second power switch, and the second node is the common terminal of the third power switch and the fourth power switch. Specifically, at least during a portion of the first operating interval, the second power switch and the third power switch are controlled to be turned off, the first power switch and the fourth power switch operate in a linear state, and the resistance of the first power switch and the fourth power switch is controlled by controlling the driving voltage of the first power switch and the fourth power switch. At least during a portion of the second operating interval, the first power switch and the fourth power switch are controlled to be turned off, the second power switch and the third power switch operate in a linear state, and the resistance of the second power switch and the third power switch is controlled by controlling the driving voltage of the second power switch and the third power switch.
2. The piezoelectric drive circuit according to claim 1, characterized in that: During a portion of the first operating interval, the full-bridge circuit reverse-discharges the piezoelectric load, and during another portion of the first operating interval, the full-bridge circuit forward-charges the piezoelectric load.
3. The piezoelectric drive circuit according to claim 1, characterized in that: During a portion of the second operating interval, the full-bridge circuit forward discharges the piezoelectric load, and during another portion of the second operating interval, the full-bridge circuit reverse charges the piezoelectric load.
4. The piezoelectric drive circuit according to claim 1, characterized in that: In the first working range, the second power switch and the third power switch are controlled to be turned off, and the working state of the first power switch and the fourth power switch is controlled so that the power supply voltage signal corresponds to the first range of the reference voltage. In the second operating range, the first power switch and the fourth power switch are turned off, and the operating states of the second power switch and the third power switch are controlled so that the power supply voltage signal corresponds to the second range of the reference voltage.
5. The piezoelectric drive circuit according to claim 1, characterized in that: During the first operating range, the second power switch and the third power switch are turned off, and the first power switch and the fourth power switch operate in a linear state so that the supply voltage signal corresponds to the first range of the reference voltage.
6. The piezoelectric drive circuit according to claim 1, characterized in that: In the second operating range, the first power switch and the fourth power switch are turned off, and the second power switch and the third power switch operate in a linear state so that the supply voltage signal corresponds to the second range of the reference voltage.
7. The piezoelectric drive circuit according to claim 5 or 6, characterized in that: In the first operating range and the second operating range, the operating state of the power stage circuit is controlled so that the output voltage of the power stage circuit is always the first voltage.
8. The piezoelectric drive circuit according to claim 1, characterized in that: During a portion of the first operating interval, the second and third power switches are controlled to turn off, while the first and fourth power switches operate in a linear state; during another portion of the first operating interval, the second and third power switches are controlled to turn off, while the first and fourth power switches are turned on, so that during the first operating interval, the supply voltage signal corresponds to the first interval of the reference voltage.
9. The piezoelectric drive circuit according to claim 1, characterized in that: During a portion of the second operating interval, the first power switch and the fourth power switch are turned off, and the second power switch and the third power switch operate in a linear state; during another portion of the second operating interval, the first power switch and the fourth power switch are turned off, and the second power switch and the third power switch are turned on, so that during the second operating interval, the supply voltage signal corresponds to the second interval of the reference voltage.
10. The piezoelectric drive circuit according to claim 8 or 9, characterized in that: During another portion of the first operating interval and another portion of the second operating interval, the operating state of the power stage circuit is controlled so that the output voltage of the power stage circuit is the supply voltage signal.
11. The piezoelectric drive circuit according to claim 1, characterized in that: The first interval of the reference voltage is the rising portion of the reference voltage within one cycle, and the second interval of the reference voltage is the falling portion of the reference voltage within the same cycle.
12. The piezoelectric drive circuit according to claim 1, characterized in that: The reference voltage is an AC signal.
13. The piezoelectric drive circuit according to claim 1, characterized in that: The piezoelectric drive circuit also includes an energy storage capacitor, which is coupled to the output terminal of the power stage circuit and is used to store the output voltage of the power stage circuit.
14. The piezoelectric drive circuit according to claim 1, characterized in that: The piezoelectric drive circuit includes N full-bridge circuits, which are connected in parallel to the output of the power stage circuit to provide the corresponding power supply voltage signal for the N piezoelectric loads, where N is greater than or equal to 1.
15. The piezoelectric drive circuit according to claim 1, characterized in that: The piezoelectric drive circuit also includes a control circuit, which generates a first drive voltage and a second drive voltage based on a compensation signal to control the operating states of the first power switch, the second power switch, the third power switch, and the fourth power switch. The compensation signal represents the error between the reference voltage and the sampled signal representing the supply voltage signal.
16. The piezoelectric drive circuit according to claim 15, characterized in that: The control circuit includes a first control circuit and a second control circuit, which are used to generate a first driving voltage and a second driving voltage, respectively. In the first working range, the first control circuit generates a first driving voltage according to the compensation signal to control the resistance of the first power switch and the fourth power switch, and the second control circuit controls the second driving voltage to be invalid to control the second power switch and the third power switch to be turned off. In the second operating range, the first control circuit disables the first driving voltage to control the first power switch and the fourth power switch to turn off, and the second control circuit generates a second driving voltage according to the compensation signal to control the resistance of the second power switch and the third power switch.
17. The piezoelectric drive circuit according to any one of claims 1-14, characterized in that: The power stage circuit is one of the following: buck circuit, boost circuit, flyback circuit, forward circuit, boost-buck circuit, and buck-boost circuit.
18. A piezoelectric driving method applied to a piezoelectric driving circuit, the piezoelectric driving circuit including a power stage circuit and a full-bridge circuit, the power stage circuit receiving an input voltage to generate an output voltage at its output terminal, the full-bridge circuit being coupled to the output terminal of the power stage circuit for charging and discharging a piezoelectric load, the full-bridge circuit including a first power switch, a second power switch, a third power switch, and a fourth power switch, the first power switch and the second power switch being connected in series at the output terminal of the power stage circuit, the third power switch and the fourth power switch being connected in series at the output terminal of the power stage circuit, the piezoelectric load being directly connected between a first node and a second node, the first node being the common terminal of the first power switch and the second power switch, and the second node being the common terminal of the third power switch and the fourth power switch, characterized in that... include: The operating state of the full-bridge circuit is controlled such that, in the first operating interval of a working cycle, the supply voltage signal provided to the piezoelectric load corresponds to the first interval of the reference voltage, and in the second operating interval of the working cycle, the supply voltage signal corresponds to the second interval of the reference voltage; wherein, the waveform of the reference voltage is a sine wave. Specifically, at least during a portion of the first operating interval, the second power switch and the third power switch are controlled to be turned off, the first power switch and the fourth power switch operate in a linear state, and the resistance of the first power switch and the fourth power switch is controlled by controlling the driving voltage of the first power switch and the fourth power switch. At least during a portion of the second operating interval, the first power switch and the fourth power switch are controlled to be turned off, the second power switch and the third power switch operate in a linear state, and the resistance of the second power switch and the third power switch is controlled by controlling the driving voltage of the second power switch and the third power switch.
Citation Information
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