Acceleration of model / weight programming in memristor crossbar arrays

By designing the memory resist point accumulation system for vector processing, using the comparator processor to compare the input and output vector data to determine and write the change of the data value, solve the problem of inefficient data processing during the training stage/weight data processing, realized the realization, and realized it. More efficient calculation processing.

CN112041928BActive Publication Date: 2025-01-28HEWLETT PACKARD ENTERPRISE DEV LP
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Patent Information

Application Number
CN201880092735.8
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2018-04-30
Publication Date
2025-01-28
Estimated Expiration
2038-04-30

AI Technical Summary

Technical Problem

Updating the model/weight data already included in the memristor crossbar array during the training phase can lead to inefficient processing.

Method used

A vector processing system with a vector processing includes a cross rod array, a vector input register, a vector output register, a modulus converter, a digital modulus and a comparator processor. The system determines the change data value by comparing the vector data and output vector data, and writes it into the storage element of the cross rod array to optimize the update operation.

Benefits of technology

The system reduces the number of writing operations of the cross rod array, improves the overall computing processing efficiency, and reduces the overall processing time in the training phase of the neural network.

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Abstract

The crossbar array includes a plurality of memory elements. An analog-to-digital converter (ADC) is electrically coupled to the vector output register. A digital-to-analog converter (DAC) is electrically coupled to the vector input register. A processor is electrically coupled to the ADC and the DAC. The processor may be configured to determine whether a quotient of input vector data and output vector data from the crossbar array is within a threshold, and if not within the threshold, determine a change data value between the output vector data and the input vector data, and write the change data value to the memory element of the crossbar array.
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Description

[0001] Government Support Statement

[0002] This invention was made with government support under Contract No. 2017-17013000002 awarded by IARPA. The government has certain rights in this invention. Technical Field

[0003] The present disclosure generally relates to the acceleration of model / weight programming in memristor crossbar arrays. Background Art

[0004] Memristor crossbar arrays can be used to accelerate computations in the generation of deep neural networks. Computational workloads associated with deep neural networks typically include a training phase and a classification phase. The training phase builds a model as a result of computations on a large training data set. The classification phase receives the model generated by the training phase to determine a solution based on the evaluation of new data applied to the model.

[0005] The training phase is computationally and data intensive. During the training phase, the memristor crossbar array can be used for matrix dot product calculations. In the backward calculation of the training phase, the model / weight changes are implemented from the last layer of the model to the first layer of the model. The memristor crossbar array can be iteratively updated and the matrix dot product calculation is performed to determine the best model.

[0006] Compared to traditional integrated circuits such as complementary metal oxide semiconductor (CMOS) circuits, the matrix dot product calculation structure using a memristor crossbar array provides lower external memory bandwidth requirements. However, in some cases, updating the model / weight data already contained in the memristor crossbar array during the training phase may cause processing inefficiencies. Summary of the invention

[0007] According to one aspect of the present disclosure, a memristor dot product system for vector processing is provided, comprising: a crossbar array, the crossbar array having a plurality of memory elements, the crossbar array having N rows, M columns, and N×M memory elements; a vector input register, the vector input register comprising N voltage inputs to the crossbar array; a vector output register, the vector output register comprising M voltage outputs from the crossbar array; and an analog-to-digital converter (ADC), the analog-to-digital converter being electrically coupled to the vector output register; a digital-to-analog converter (DAC), the digital-to-analog converter being electrically coupled to the vector input register; a comparator processor, the comparator processor being electrically coupled to the ADC and the DAC, the comparator processor being configured to: compare output vector data from the vector output register with input vector data from a memory register; determine a change data value between the output vector data and the input vector data; and write the change data value to the memory element of the crossbar array.

[0008] According to another aspect of the present disclosure, a method for applying a memristor crossbar array is provided, comprising: receiving a set of output vector data from the output of the memristor crossbar array, the memristor crossbar array having a plurality of memory elements, the crossbar array having N rows, M columns, and N×M memory elements; receiving a set of input vector data from a memory register; evaluating the set of output vector data relative to the set of input vector data; determining a change data value between the output vector data and the input vector data; and writing the change data value to the memory element of the crossbar array.

[0009] According to another aspect of the present disclosure, a non-transitory computer storage device is provided, which stores instructions capable of being operated to cause one or more computer methods to perform the following operations: receiving a set of output vector data from the output of a memristor crossbar array, the memristor crossbar array having multiple memory elements, the crossbar array having N rows, M columns, and N×M memory elements; receiving a set of input vector data from a memory register; comparing the set of output vector data with the set of input vector data; determining a change data value between the output vector data and the input vector data; and writing the change data value to the memory element of the crossbar array. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The present disclosure can be best understood from the following detailed description when read in conjunction with the accompanying drawings. It is emphasized that, in accordance with standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of various features may be arbitrarily increased or reduced for clarity of discussion.

[0011] Figure 1 is a diagram of an exemplary memristor dot product engine with a comparator processor.

[0012] Figure 2 is a flow chart of an example method for comparing input vector data with vector data previously loaded into a memristor memory.

[0013] Figure 3 is a flow chart of an example method for comparing and / or evaluating input vector data relative to vector data previously loaded into a memristor memory.

[0014] Figure 4 is an example computing device having a hardware process with machine-readable instructions for comparing and / or evaluating input vector data relative to vector data previously loaded into a memristor memory.

[0015] Figure 5 is a flow chart of an example method for evaluating incremental input vector data relative to vector data previously loaded into a memristor memory. Summary of the invention

[0016] Embodiments of the present disclosure are directed to a memristive dot product system for vector processing, and related methods and non-transitory computer storage devices storing instructions operable to cause one or more computer processors to perform the method.

[0017] In one embodiment, a crossbar array includes a plurality of memory elements. Each memory element may include a memristor and a transistor connected in series with each other. The crossbar array has N rows, M columns, and N×M memory elements. A vector input register has N voltage inputs to the crossbar array. A vector output register has M voltage outputs from the crossbar array. An analog-to-digital converter (ADC) is electrically coupled to the vector output register. A digital-to-analog converter (DAC) is electrically coupled to the vector input register. A comparator processor is electrically coupled to the ADC and the DAC. The comparator processor is configured to compare output vector data from the vector output register with input vector data from the memory register, determine a change data value between the output vector data and the input vector data, and write the change data value to the memory element of the crossbar array.

[0018] The comparator processor may include circuitry for retrieving output vector data for a row in the crossbar array via the ADC. The comparator processor may include an EXOR circuit that calculates an exclusive OR between the input vector data and the output vector data to determine a change data value. The comparator processor may include circuitry for writing the change data value to a memory element of the crossbar array via a DAC. The memory register for the input vector data may be a memory location different from the memory element of the crossbar array. The input vector data may be data representing an n-dimensional numerical vector, for example, data describing a plurality of model weights for training a neural network.

[0019] In another embodiment, the crossbar array includes a plurality of memory elements. Each memory element may include a memristor and a transistor connected in series with each other. The crossbar array has N rows, M columns, and N×M memory elements. The vector input register has N voltage inputs to the crossbar array. The vector output register has M voltage outputs from the crossbar array. An analog-to-digital converter (ADC) is electrically coupled to the vector output register. A digital-to-analog converter (DAC) is electrically coupled to the vector input register. A processor is electrically coupled to the ADC and the DAC. The processor is configured to determine whether the absolute value of the new weight increment divided by the old weight is less than a threshold value. For a weight change greater than the threshold value, the processor determines a change data value and writes the change data value to the memory element of the crossbar array. DETAILED DESCRIPTION

[0020] Examples of the subject matter claimed below will now be disclosed. For the sake of clarity, not all features of actual implementations are described in this specification. It will be appreciated that in the development of any such actual examples, many implementation-specific decisions may be made to achieve the developer's particular goals, such as compliance with system-related and business-related constraints, which vary from one implementation to another. Furthermore, it will be appreciated that such development work, even if complex and time-consuming, is a routine undertaking for those of ordinary skill in the art having the benefit of this disclosure.

[0021] The computational workload associated with creating a deep neural network typically includes a training phase and a classification phase. During training, the neural network attempts to learn from a set of input training data. Each layer of the untrained model is assigned some random weights and the classifier is forwarded by the input training data. This forward pass predicts the class label and uses the weights to determine the score. The class score is compared to the actual label and the error is calculated using a loss function. Then, in the backward pass, the error is back-propagated through the neural network and the weights are updated. For example, the weights can be updated by an algorithm such as gradient descent. The gradient descent algorithm is an optimization algorithm for finding parameter values ​​(i.e., coefficients) of a function that minimizes a cost function.

[0022] An epoch is a complete forward and backward computation through all samples of the input training data. Typically, these computations are very expensive using traditional CMOS-based CPUs and are performed with a single weight update after processing each sample. In this case, the training data is divided into batches and the weights are updated after each batch.

[0023] The common computational structure (matrix dot product) used in deep learning workloads has led to the application of GPUs to provide accelerated performance over traditional CPUs. GPUs are more capable of processing vector and matrix calculations than CPUs. Single or parallel graphics processing units (GPUs) can be used to speed up processing. However, GPUs built for graphics applications have not been fully optimized for deep learning workload requirements and suffer from performance and energy inefficiencies.

[0024] The use of a memristor crossbar array further reduces processing time on the GPU, and the memristor crossbar array provides higher computational performance with lower energy requirements. During the training phase, the memristor crossbar array can be used for matrix dot product calculations. During the backward calculations in the training phase, model / weight changes can be implemented from the last layer of the model to the first layer of the model. The memory memristor crossbar array can be iteratively updated with the model / weights, and matrix dot product calculations are performed to determine the best model.

[0025] A comparator circuit electrically coupled to the vector output register of the memristor crossbar array can compare the data already available in the memristor crossbar array with the new model / weight data written to the crossbar array. In one example, only the mismatched values ​​in the memristor crossbar array are updated while the matched values ​​remain unchanged. In another example, the absolute delta weight value of the new model weight is evaluated against a threshold to determine whether to update the crossbar array.

[0026] In deep learning processing, the comparator circuit reduces the number of write operations to the crossbar array, thereby accelerating the overall computing processing efficiency and reducing the overall processing time of the training phase of the neural network.

[0027] An example memristive crossbar array for neural network deep learning applications is now described. Although a specific example of a memristive crossbar array is described, other configurations of a memristive crossbar array may be used. Figure 1 A memristive dot product engine 100 with a single voltage vector is shown. The dot product engine 100 includes a crossbar array 102 having N row electrodes 104 and M column electrodes 106. Each crossbar junction of the entire crossbar array 102 includes a memristive element 108, thereby forming a memory element of the dot product engine. Each memory element may include a memristor and a transistor connected in series with each other. The dot product engine 100 includes a vector input register or vector input 110 for applying a voltage to the row electrodes 104, and a vector output register or vector output 114 for receiving an output voltage generated by the current flow in the column electrodes 106. The vector input can be connected to a digital-to-analog converter 111, which converts a digital value into an analog value to be written to the crossbar array 102. The vector output 114 can include an analog-to-digital converter 115, which converts the analog value into a digital value. The dot product engine 100 also includes a sensing circuit 116 for converting the current in the column electrode 106 into a voltage. In an example, the sensing circuit 116 includes an operational amplifier 118 and a resistor 120 , which may be arranged to represent a virtual ground for a read operation.

[0028] 0022The dot product engine 100 may also include other peripheral circuits associated with the crossbar array 102 used as a storage device. For example, the vector input 110 may include a driver connected to the row electrode 104. The address decoder may be used to select the row electrode 104 and activate the driver corresponding to the selected row electrode 104. The driver of the selected row electrode 104 may drive the corresponding row electrode 104 with different voltages corresponding to the vector matrix multiplication or the process of setting the resistance value in the memristor element 108 of the crossbar array 102. The column electrode 106 may include similar driver and decoder circuits. The control circuit may also be used to control the application of the voltage at the input and the reading of the voltage at the output of the dot product engine 100. Digital-to-analog circuits and analog-to-digital circuits may be used at the vector input 110 and the vector output 114. The input signals to the row electrode 104 and the column electrode 106 may be analog or digital. The above peripheral circuits may be manufactured using semiconductor processing technology in the same integrated structure or semiconductor chip as the crossbar array 102 in the above example. As described in further detail below, there are two main operations that occur during the operation of the dot product engine. The first operation is programming the memristors in the crossbar array to map the mathematical values ​​in the N×M matrix to the array. In one example, only one memristor is programmed at a time during the programming operation. The second operation is a dot product or matrix multiplication operation. In this operation, an input voltage is applied and an output voltage is obtained that corresponds to the result of multiplying the N×M matrix with the N×1 vector. The input voltage is below the threshold of the programming voltage, so the resistance value of the memristors in the array 102 does not change during the matrix multiplication operation.

[0029] The dot product engine 100 may include an analog-to-digital converter 115 to convert the analog signal of the vector output register 114 to a digital value. The dot product engine 100 may include a digital-to-analog converter 111 to convert the digital value to an analog value to the vector input register 110.

[0030] The dot product engine 100 may be electrically coupled to a comparator processor 160. The comparator processor 160 may be integrally connected to the dot product engine 100 and form a part thereof. The comparator processor 160 may be a separate component, such as an integrated circuit, or a separate processor. The comparator processor 160 may be one or more central processing units (CPUs), semiconductor-based microprocessors, and / or other hardware devices suitable for retrieving and executing instructions stored in a machine-readable storage medium. The comparator processor may retrieve, decode, and execute instructions to control a process for comparing and / or evaluating data received from the dot product engine 115 (as shown by arrow 115) relative to an input data source (as shown by arrow 150 to the comparator processor). As an alternative or in addition to retrieving and executing instructions, the comparator processor 160 may include one or more electronic circuits including electronic components for performing the functions of one or more instructions, such as a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC). The comparator processor may include a memory for storing executable instructions, and / or be connected to a separate storage medium 162.

[0031] Machine-readable storage media such as 162 may include volatile and non-volatile, removable and non-removable media, and may be any electronic, magnetic, optical, or other physical storage device that contains or stores executable instructions, data structures, program modules, or other data accessible to the comparator processor 160, such as firmware, erasable programmable read-only memory (EPROM), random access memory (RAM), non-volatile random access memory (NVRAM), optical disks, solid-state drives (SSD), flash memory chips, etc. Machine-readable storage media may be non-transitory storage media, where the term “non-transitory” does not include transient propagating signals.

[0032] The comparator processor 160 may perform a method for comparing and / or evaluating input vector data (as indicated by arrow 150) that has been loaded into the memristor memory of the dot product engine 100 relative to the output vector data (as indicated by arrow 155). The comparator processor 160 may provide the changed data value (as indicated by arrow 165) to another circuit or processor 170 to write the changed data value back to the memristor memory of the dot product engine 100.

[0033] The input vector data may be received by the comparator processor 160 from another processor or program. Additionally, the comparator processor 160 may retrieve the input vector data from a storage register (not shown) distinct from the memory elements of the memristor crossbar array. The input vector data may be data in the form of an n-dimensional numeric vector.

[0034] Other aspects of the neural network will now be described. A neural network is a composite differentiable function that represents the flow of data from its input to its output in the form of a directed acyclic graph (or computation graph). Each node in such a graph is a simple function that implements a specific data transformation. For the sake of clarity, the neural network computation graph is represented in this specification as a linear graph and the nodes in the graph are called layers (a linear graph is a graph with only one path from its input to its output; if the computation graph is not linear, it can be linearized by adding adjacent nodes). The input layer of the neural network directly uses the received input data for operation, and the output layer provides neural network decisions based on the layers (also called hidden layers) between the input layer and the output layer. The hidden layer transforms the input data to the output layer. The output layer can then be used for subsequent processing and / or decision making. The processing flow can be shown as input→layer 1→layer 2→layer 3→…→layer N-1 →Output layer →Decision making.

[0035] Neural networks can generally be represented by two types of objects. The first type of object defines a computational structure (e.g., a computational graph) that connects inputs to outputs via a series of operators (e.g., transformations or functions). The second type of object is the weights that are referenced by the operators in the computational graph by name or index. During training of a neural network, the weights of the neural network can be updated. Since the error is calculated at the output layer and then distributed backwards through the hidden layers, one way to update the weights is through a technique called error backpropagation.

[0036] The weights of a neural network can be represented as a collection of indices or a collection of numerical named tensors. If the weights are represented as a collection of named tensors, the operators of the neural network can reference the data by name. If the weights are represented as a list of tensors where each tensor has an associated index in the list, the operators of the neural network can reference the data by index. There are no restrictions on how the numerical values ​​of the tensors are stored (e.g., conventional single precision format (float32), half precision format (float16), integer format (int8), or any other format suitable for a particular computing device). Each tensor is a collection of one or more matrices. For example, a scalar number (a tensor of rank 0) is a matrix of dimension 1×1. A vector (a tensor of rank 1) is a matrix of dimension N×1. A matrix (a tensor of rank 2) is a matrix of dimension N×M. A digital cube (a tensor of rank 3) is a collection of k matrices of dimension N×M, etc. The compiler takes the computational graph of the neural network and maps the operators to the available crossbar arrays. Once this mapping is completed, the data tensors associated with the operators can be written to the memory cells of the associated crossbar array.

[0037] A typical i-th weight update can be expressed as follows: i =w i -α*dwi , where w i is the i-th weight of the neural network, α is the learning rate and dw i is the i-th weight gradient. The formula can be rewritten as: in, is a weight update (delta) that can be written to the memristor memory. The delta of weights in a particular layer can be calculated based on the delta from the upstream layer, i.e., this is a recursive dependency. For example,

[0038]

[0039] some_function depends on the specific type of layer and may vary from layer to layer. error_function provides the starting point, and error_function provides the error (same as delta) of the output layer.

[0040] For example, suppose that for a classification problem, decisions is a vector of length K containing the conditional probability that the input data belongs to a particular class. For example, if the neural network has 4 categories - dog, cat, car, and tree and wants to identify the main object in the input image, the decisions vector may look like this: [0.1, 0.1, 0.8, 0.0]. These values ​​represent that the neural network has a 10% probability of determining that the input image is a dog, a 10% probability of a cat, an 80% probability of a car, and a 0% probability of a tree. If the input image is indeed a car, the correct_decisions vector will look like this: [0.0, 0.0, 1.0, 0.0]. In this example, to calculate the array using deltas, the following formula can be used:

[0041] For all i=1…4

[0042] This calculation determines the cross entropy loss (error, delta). In this particular example, there are four deltas (for all outputs), and for the "true" output corresponding to "car", it will basically never be zero (for other categories, correct_decisions contains zero).

[0043] The deltas for layer L determine the error for that layer L. Layer L can be either an output layer or a hidden layer. To correct errors in a neural network, the deltas are back-propagated to the previous layer L-1 according to some function and the parameters of layer L are updated conditional on these deltas. If there are no parameters, the weight update is skipped and only the deltas are propagated back through the layer.

[0044] The method now described below is particularly suitable for updating a memristor crossbar array during the backward (i.e., reverse) propagation phase for a neural network layer having weights. The method described restricts the update of weights previously stored in the crossbar array. The method determines whether the output of the vector data stored in the crossbar array is different from the input vector data being written to the crossbar array. Figure 2 In one example described in , the method compares a specific value between the input vector data to the output vector from the memristor (block 230) and only updates the value changes. Figure 5 In another example described in , the method compares the input vector data increment divided by the output vector data stored in the memristor array to a threshold value (block 530). Specific processing of the method is now described below.

[0045] The following pseudo code shows an example comparison of input vector data with data already loaded into the memristor memory. The vector input data is received from an upstream layer of the neural network. The curly braces {} indicate the grouping of logical units of code within the curly braces. The forward slash / / indicates a text comment following the curly braces.

[0046] Line 001: Comparison_function()

[0047] Line 002: {for i=0; i<number_of_rows; i++ / /

[0048] Line 003: {data_to_comp = memristor[i]; / / read the first line

[0049] Line 004: If data_to_comp == new_data_to_write / / No need to write new data

[0050] Line 005: { / / Does nothing, but increments the row index in XBAR}

[0051] Line 006: Else / / Write new data to a specific cell

[0052] Line 007: {changed_columns_bits = data_to_comp^new_data_to_write; / / Perform XOR operation to detect the difference between the input data and the read data from the memristor

[0053] Line 008: for j=0; j<number_of_column bits; j++

[0054] Line 009: {lf changed_columns_bits[j] == 1 / / The column bits have changed relative to the input data

[0055] Line 010: write_to_memristor[i][j] <= new_data_to_write[j]; / / Write the specific change bit to the cell in the row}}}}

[0056] The comparison_function of line 001 is called or executed by the comparator processor 160 via a control circuit or an executive program, application, daemon or service. At line 002, the method iterates through a predetermined number of rows of the memristor array. The method uses a for loop logic construct, for i=0; i<number_of_rows; i++, to evaluate each row and increment to the row number value for each successive iteration. The value i is an index value used to reference a specific row number.

[0057] In line 003, the method sets the variable data_to_comp to the data value of memristor row [index i]. For example, if index i is set to 0, the data_to_comp variable is set to the value of memristor row [0]. If index i is set to 1, the data_to_comp variable is set to the value of memristor row [1].

[0058] At line 004, the method compares the variable new_data_to_write with the data_to_comp variable to determine if the values ​​are equal. new_data_to_write is the sub-vector of the input vector data corresponding to the current index i. If the data_to_comp value is equal to the new_data_to_write value, then the memristor row [index i] has been set to the new_data_to_write value. In this case, the method does not need to update the memristor. In other words, the memristor will not be updated with the new weight value.

[0059] The method then increments the index value i of the for loop logic in line 002.

[0060] At line 006, if the data_to_comp values ​​are not equal, the method otherwise performs the following steps. At line 007, the variable changed_columns_bits is set to the value of the XOR operation of the data_to_comp value and the new_data_to_write value. The method performs an XOR operation to detect the difference in the input vector data compared to the data from the memristor.

[0061] At row 002, the method iterates through a predetermined number of column bits of the memristor array. The method uses a for loop logic construct, for j=0; j<number_of_column bits; j++, to evaluate each row and increment the row number value for each successive iteration. The value i is an index value used to reference a specific changing column bit.

[0062] At line 009, the method determines whether a particular changed_column_bits indexed by value j is equal to value 1. Here, the method determines whether the column bit has changed. At line 010, if the particular column bit has changed, then the expression changed_columns_bits[j] == 1 is true, and the method will perform a write operation to the memristor.

[0063] The for loop logic constructs a loop and increments the value of j. write_to_memristor[i][j] updates the memristor with the value of the specific updated column bit. This method writes the specific changed bit to a cell in a memristor row.

[0064] Figure 2 2 is a flow chart of an example method 200 for comparing input vector data with vector data previously loaded into a memristor memory. The method 200 starts (block 205) and initializes a set of variables (block 210). The variable NEW_DATA_TO_WRITE is the received data input. The variable NUM_OF_ROWS is the sum of the rows and columns of the data received. Figure 1 The variable NUM_OF_COL_BITS is determined by the number of memristor rows (N) shown in the memristor array. Figure 1 The number of memristor column bits (M) is determined by the number of memristor array columns shown. The memristor column bits are the data read from the M column elements of the memristor array. The variables I and J are used as index values ​​for the next for loop counter. The variable CHANGED_COLUMN_BITS is initialized to NULL or can be initialized to FALSE.

[0065] The method determines whether the NUM_OF_ROWS value is greater than the value of variable I (box 215). The first instance of this evaluation I will be set to zero. If the NUM_OF_ROWS value is greater than I, the method will end (box 220). If the NUM_OF_ROWS value is less than or equal to I, the method will continue. The method then sets the variable DATA_TO_COMP to MEMRISTOR[index I] (box 225). In the first instance, the variable DATA_TO_COMP is set to the value of MEMRISTOR[index 0]. In this step, the first row of the memristor is read and the value is stored in the variable DATA_TO_COMP. The data type of the variable MEMRISTOR[] can support adjustable bits per cell, so any commonly used computer programming data type (such as integers or floating point numbers) can be easily stored in the memristor cell.

[0066] The method then compares whether the value of the row of vector data stored in the variable DATA_TO_COMP is equal to the new input vector data stored in the variable NEW_DATA_TO_WRITE (block 230).

[0067] If the value of the variable DATA_TO_COMP is equal to the value of the variable NEW_DATA_TO_WRITE, the method continues to box 265. If these two values ​​are equal, it means that there is no need to update the memristor row with the input data. At box 265, the value of the variable I is incremented by 1. The method then continues to box 215 as described above.

[0068] If the value of the variable DATA_TO_COMP is not equal to the value of the variable NEW_DATA_TO_WRITE, the method continues to box 235. The variable CHANGED_COLUMN_BITS is set to the output value of the EXOR operation of the variable DATA_TO_COMP and the variable NEW_DATA_TO_WRITE (box 225). Here, the method determines the change of the new input data relative to the data in a particular row of memristors. In the next step (box 240), the variable J is initialized to a value of 0.

[0069] Then, the method continues and updates the specific changed column position of the memristor row. In box 245, the method determines whether the value of (NUM_OF_COL_BITS-1) is greater than the value of variable J. If not, the method proceeds to box 265 and increases the value of variable I by 1. If the value of (NUM_OF_COL_BITS-1) is less than or equal to the value of variable J, the method will determine whether CHANGED_COL_BITS[index J] is equal to 1. If CHANGED_COL_BITS[index J] is equal to zero, it means that the data value of the column position has not changed. Then the method continues to box 260 and increases the value of variable J by 1. If CHANGED_COL_BITS[index J] is equal to 1, it means that the data value of the column position has changed. In this case, the method proceeds to box 255. In box 255, the memristor memory location is written. WRITE_TO_MEMRISTOR[index I][index J] is called or executed with the value from variable NEW_DATA_TO_WRITE[index J]. Next, the method continues to block 260 and increments the variable J by a value of one.

[0070] Figure 3 is a flow chart of an example method 300 for comparing and / or evaluating input vector data with vector data previously loaded into a memristor memory. The method begins at box 310. A first set of input vector data is received into a memory register or some other storage location (box 320). The memory register is a separate memory distinct from the memristor memory element. A set of output vector data is received from the output of a row of memristors (box 330). The method determines whether the output vector data is different from the input vector data. The method then updates the memristor array with the data determined to be different between the output vector data and the input vector data. The method then receives additional input vector data and begins again (box 320).

[0071] Figure 4 4 is an example computing device 440 having a hardware processor 405 with machine-readable instructions 410 for comparing and / or evaluating input vector data with vector data previously loaded into a memristor memory. As described in detail below, a machine-readable storage medium may be encoded with executable instructions 420-450 for performing a comparison of received vector data and comparing with vector data residing in a memristor memory.

[0072] The executable instructions include instructions for receiving a set of input vector data (block 420). Instructions for receiving a set of output vector data from an output of the memory array (block 430). Instructions for determining whether the output vector data is different from the input vector data (block 440). Instructions for updating the memristor array with data determined to be different from the output vector data and the input vector data.

[0073] The following pseudo code shows an example evaluation of input vector data relative to vector data already loaded into the memristor memory. Curly braces {} indicate grouping of logic units of code within the braces. Forward slashes / / indicate a text comment following the braces.

[0074] Line 101: Comparison_function()

[0075] Line 102: {for i=0; i<number_of_rows; i++ / /

[0076] Line 103: {data_to_comp = memristor[i]; / / read the first line

[0077] Line 104: if (|(Δnew_data_to_write) / data_from_memristor|<threshold) / / No need to write new data (may be programmable); this operation can be performed in parallel on all bits

[0078] Line 105: { / / Does nothing, but increments the row index in XBAR}

[0079] Line 106: Else / / Write new data to a specific cell

[0080] Line 107: {changed_columns_bits=column values_that_doesn't_meet_above_threshold_comparison;

[0081] Line 108: for j=0; j <number_of_columnbits;j++

[0082] Line 109: {If changed_columns_bits[j] == 1 / / Column bits changed relative to input data

[0083] Line 110: write_to_memristor[i][j] <= new_data_to_write[j]; / / write the specific change bit to the cell in the row}}}}

[0084] The comparator processor 160 calls or executes the comparison_function at line 101 via a control circuit or an executive program, application, daemon or service. At line 102, the method iterates through a predetermined number of rows of the memristor array. The method uses a for loop logic construct, fori=0; i<number_of_rows; i++, to evaluate each row and increment the row number value for each successive iteration. The value i is an index value used to reference a specific row number.

[0085] At line 103, the method sets the variable data_to_comp to the data value of memristor row [index i]. For example, if index i is set to 0, the data_to_comp variable is set to the value of memristor row [0]. If index i is set to 1, the data_to_comp variable is set to the value of memristor row [1].

[0086] At line 104, the method determines the new_data_to_write increment divided by the calculated absolute value of data_to_comp from the memristor. new_data_to_write is a sub-vector of the input vector data corresponding to the current index i. The input vector data can be vector data from an upstream layer of the neural network. If |(Δnew_data_to_write) / data_to_comp|<threshold, then the memristor row [index i] has been set to the new_data_to_write value. In this case, the method does not need to update the memristor. In other words, the memristor will not be updated with the new weight value.

[0087] The method then increases the index value i of the for loop logic in line 102. The evaluation may be performed in parallel for all bits of the comparison data.

[0088] An example threshold value may be 0.001. For example, a threshold value may be determined as where weight ≥ 1000*Δ weight , i.e., in this example, if the weight is too large compared to the increment (e.g., three orders of magnitude), no update is made.

[0089] The threshold value may be a predetermined value stored in a memory register, or may be a dynamic value based on the size of a neural network node or layer. The threshold value may be a static threshold value that is constant for all weights and is set in advance.

[0090] The threshold can be a dynamic weight specific threshold, which is calculated based on the absolute weight value, the current learning rate, or the layer type, for example. For convolutional layers, the threshold can be larger, while for fully connected layers, the threshold can be smaller.

[0091] The threshold may be a layer specific threshold. For example, the threshold may be based on all weights in a layer of a neural network depending on factors such as the layer type (convolutional, fully connected), statistical properties of the weights in the layer, and the position of the layer in the neural network (e.g., layers closer to the input should have a larger threshold, while layers closer to the output should have a smaller threshold).

[0092] Additionally, the threshold can be adjusted as the neural network trains. For example, in the beginning stages of processing, a larger threshold can be used to perform more frequent updates of the crossbar array, and the threshold can be reduced to converge to a certain stable state, and then reduced to reduce the update rate. From a mathematical point of view, threshold-based selective updating is a form of regularization that helps achieve better generalization (classification accuracy on previously unseen input data).

[0093] At line 106, if the data_to_comp values ​​are not equal, the method otherwise performs the following steps. At line 107, the variable changed_columns_bits is set to the value of the XOR operation of the data_to_comp value and the new_data_to_write value. The method performs an XOR operation to detect the difference between the input vector data and the data from the memristor. For example, the value changed_columns_bits=column_values ​​that does not meet the threshold is updated.

[0094] At row 102, the method iterates through a predetermined number of column bits of the memristor array. The method uses a for loop logic construct, for j=0; j<number_of_column bits; j++, to evaluate each row and increment the row number value for each successive iteration. The value j is an index value used to reference a specific changing column bit.

[0095] At line 109, the method determines whether a particular changed_column_bits indexed by value j is equal to value 1. Here, the method determines whether a column bit has changed. At line 110, if a particular column bit has changed, where the expression changed_columns_bits[j] == 1 is true, then the method will perform a write to the memristor.

[0096] The for loop logic constructs a loop and increments the value of j. write_to_memristor[i][j] updates the memristor with the value of the specific updated column bit. This method writes the specific changed bit to a cell in a memristor row.

[0097] Figure 5is a flow chart of an example method 500 for evaluating input vector data relative to vector data previously loaded into a memristor memory. The method 500 starts (block 505) and a set of variables are initialized (block 510). The variable NEW_DATA_TO_WRITE is the data input received. The variable NUM_OF_ROWS is the value of Figure 1 The number of memristor rows (N) is determined by the number of rows (N) of the memristor array shown. The variable NUM_OF_COL_BITS is determined by Figure 1 The number of memristor column bits (M) is determined by the number of columns of the memristor array shown. The memristor column bits are the data read from the M column elements of the memristor array. The variables I and J are used as index values ​​for the next for loop counter. The variable CHANGED_COLUMN_BITS is initialized to NULL, or can be initialized to FALSE.

[0098] In the method, it is determined whether the NUM_OF_ROWS value is greater than the value of variable I (box 515). The first instance of this evaluation I will be set to zero. If the NUM_OF_ROWS value is greater than I, the method will end (box 520). If the NUM_OF_ROWS value is less than or equal to I, the method will continue. The method then sets the variable DATA_TO_COMP to MEMRISTOR[index I] (box 525). In the first instance, the variable DATA_TO_COMP is set to the value of MEMRISTOR[index 0]. In this step, the first row of the memristor is read and the value is stored in the variable DATA_TO_COMP. The data type of the variable MEMRISTOR[] can support adjustable bits per cell, so any commonly used computer programming data type (such as integers or floating point numbers) can be easily stored in a memristor cell.

[0099] The method then evaluates whether |(DELTA NEW_DATA_TO_WRITE / DATA_TO_COMP)|<threshold (block 530).

[0100] If the value of the absolute value of (DELTA NEW_DATA_TO_WRITE / DATA_TO_COMP) is less than the value of the threshold (THRESHOLD) variable, the method continues to box 565. If the above expression is true, it means that there is no need to update the memristor row with the input data. At box 565, the value of the variable I is increased by 1. The method then continues to box 515 as described above.

[0101] If the value of the absolute value of (DELTA NEW_DATA_TO_WRITE / DATA_TO_COMP) is greater than or equal to the value of the threshold (THRESHOLD) variable, then the method continues to box 535. The variable CHANGED_COLUMN_BITS is set to the output value of the EXOR operation on the variable DATA_TO_COMP and the variable NEW_DATA_TO_WRITE (box 525). Here, the method determines the change of the new input data relative to the data in a particular row of the memristor. In the next step (box 540), the variable J is initialized to a value of 0.

[0102] The method then continues and updates the specific changed column position of the memristor row. In box 555, the method determines whether the value of (NUM_OF_COL_BITS-1) is greater than the value of variable J. If not, the method proceeds to box 265 and increases the value of variable I by 1. If the value of (NUM_OF_COL_BITS-1) is less than or equal to the value of variable J, the method determines whether CHANGED_COL_BITS[index J] is equal to 1. If CHANGED_COL_BITS[index J] is equal to zero, it means that the data value of the column position has not changed. The method then continues to box 560 and increases the value of variable J by 1. If CHANGED_COL_BITS[index J] is equal to 1, it means that the data value of the column position has changed. In this case, the method proceeds to box 555. In box 555, the memristor storage location is written. Using the value from the variable NEW_DATA_TO_WRITE[index J], call or execute the write function of WRITE_TO_MEMRISTOR[index I][index J]. Next, the method continues to block 250 and increments the variable J by a value of one.

[0103] For the purpose of illustration, the foregoing description uses specific terms to provide a thorough understanding of the present disclosure. However, it will be apparent to those skilled in the art that specific details are not required to practice the systems and methods described herein. The foregoing description of specific examples is given for the purpose of illustration and description. They are not intended to be exhaustive or limit the present disclosure to the precise form described. Obviously, in view of the above teachings, many modifications and variations are possible. Examples are shown and described to best explain the principles and practical applications of the present disclosure, so that other technical personnel in the art can best utilize the present disclosure and various examples with various modifications suitable for the intended specific purpose. The scope of the present disclosure is intended to be defined by the following claims and their equivalents.

Claims

1. A memristor dot product system for vector processing, comprising: a crossbar array having a plurality of memory elements, the crossbar array having N rows, M columns, and N×M memory elements; a vector input register including N voltage inputs to the crossbar array; a vector output register comprising M voltage outputs from the crossbar array; as well as an analog-to-digital converter (ADC) electrically coupled to the vector output register; a digital-to-analog converter (DAC) electrically coupled to the vector input register; a comparator processor electrically coupled to the ADC and the DAC, the comparator processor being configured to: comparing output vector data from the vector output register with input vector data from a memory register; determining a change data value between the output vector data and the input vector data; as well as The changed data values ​​are written to the memory elements of the crossbar array.

2. The dot product system of claim 1, wherein: The comparator processor includes an EXOR circuit that calculates an exclusive OR between the input vector data and the output vector data to determine the change data value.

3. The dot product system of claim 1, wherein: The comparator processor includes circuitry for retrieving output vector data for a row of the crossbar array via the ADC.

4. The dot product system of claim 1, wherein: The comparator processor includes circuitry for writing the changing data values ​​to memory elements of the crossbar array via the DAC.

5. The dot product system of claim 1, wherein: The memory registers for the input vector data are distinct memory locations from the memory elements of the crossbar array.

6. The dot product system of claim 1, wherein: The input vector data is data representing an n-dimensional numerical vector.

7. The dot product system of claim 1, wherein: The input vector data describes a plurality of model weights used to train a neural network.

8. A method for applying a memristor crossbar array, comprising: receiving a set of output vector data from an output of a memristor crossbar array having a plurality of memory elements, the crossbar array having N rows, M columns, and N×M memory elements; receiving a set of input vector data from a memory register; evaluating the set of output vector data relative to the set of input vector data; determining a change data value between the output vector data and the input vector data; as well as The changed data values ​​are written to the memory elements of the crossbar array.

9. The method according to claim 8, wherein: Evaluating the set of output vector data relative to the set of input vector data comprises: An operation of determining whether an absolute value of the input vector data divided by the output vector data is less than a predetermined threshold is performed, wherein the output vector data represents a weight value and the input vector data represents an incremental weight value.

10. The method according to claim 8, wherein: The set of output vector data is received via an analog-to-digital converter electrically coupled to the crossbar array.

11. The method according to claim 8, wherein: The changing data values ​​are written to the memory elements of the crossbar array via a digital-to-analog converter electrically coupled to the crossbar array.

12. The method according to claim 8, wherein: The memory register for the input vector data is a different memory location than the memory element of the memristor.

13. The method according to claim 8, wherein: The input vector data is data representing an n-dimensional numerical vector.

14. The method according to claim 8, wherein: The input vector data describes a plurality of model weights used to train a neural network.

15. A non-transitory computer storage device storing instructions operable to cause one or more computer methods to perform operations comprising: receiving a set of output vector data from an output of a memristor crossbar array having a plurality of memory elements, the crossbar array having N rows, M columns, and N×M memory elements; receiving a set of input vector data from a memory register; comparing the set of output vector data to the set of input vector data; determining a change data value between the output vector data and the input vector data; as well as The changed data values ​​are written to the memory elements of the crossbar array.

16. The non-transitory computer storage device of claim 15, wherein: Comparing the set of output vector data with the set of input vector data comprises: An exclusive-OR operation is performed between the input vector data and the output vector data to determine the change data value.

17. The non-transitory computer storage device of claim 15, wherein: The set of output vector data is received via an analog-to-digital converter electrically coupled to the crossbar array.

18. The non-transitory computer storage device of claim 15, wherein: The changing data values ​​are written to the memory elements of the crossbar array via a digital-to-analog converter electrically coupled to the crossbar array.

19. The non-transitory computer storage device of claim 15, wherein: The memory register for the input vector data is a different memory location than the memory element of the memristor.

20. The non-transitory computer storage device of claim 15, wherein: The input vector data is data representing an n-dimensional numerical vector.

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