Battery undervoltage protection circuit and power module

Abstract

The present invention discloses a battery undervoltage protection circuit and a power supply module, which can be applied in electronic circuit technology, wherein the battery undervoltage protection circuit comprises a first input end, a second input end, a first output end, a second output end, a first resistor, a second resistor, a third resistor, a PMOS tube, an NMOS tube, an NPN transistor, a PNP transistor, a first voltage regulator tube, a second voltage regulator tube and a third voltage regulator tube; the present invention can realize undervoltage protection and hysteresis functions, and can avoid output instability caused by battery voltage fluctuation at a critical point.

Description

Technical Field

[0001] The invention relates to electronic circuit technology, in particular to a battery undervoltage protection circuit and a power supply module. Background Art

[0002] Rechargeable batteries, such as lithium batteries, are commonly found in various electronic devices. Most rechargeable batteries are damaged by over-discharge. In order to prevent the over-discharge state of rechargeable batteries, some protection measures are usually adopted, such as the over-discharge protection IC. Assuming that the battery is connected to a load, when the battery voltage is lower than its over-discharge voltage detection point, the over-discharge protection IC triggers the protection, so that the power MOSFET at the output end changes from on to off and cuts off the discharge to avoid the over-discharge of the battery and keep the battery in a standby mode with low quiescent current. However, the operating voltage of the IC is limited and the cost is relatively high. At present, there are also battery voltage protection circuits built with discrete devices, but they are only implemented with a simple comparison circuit. When the battery voltage fluctuates near the trigger point, the output will be unstable. Summary of the invention

[0003] In order to solve the above technical problems, the object of the present invention is to provide a low-cost battery undervoltage protection circuit and a power module with a hysteresis function.

[0004] In one aspect, the technical solution adopted by the present invention is:

[0005] A battery undervoltage protection circuit comprises a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first resistor, a second resistor, a third resistor, a PMOS transistor, an NMOS transistor, an NPN transistor, a PNP transistor, a first voltage regulator transistor, a second voltage regulator transistor and a third voltage regulator transistor;

[0006] The first input terminal is connected to the source of the PMOS tube, the first output terminal is connected to the drain of the PMOS tube, the second input terminal is connected to the second output terminal, the cathode of the first voltage regulator tube is connected to the first input terminal through the first resistor, the anode of the first voltage regulator tube is connected to the cathode of the second voltage regulator tube, and the anode of the second voltage regulator tube is connected to the second input terminal through the second resistor;

[0007] The third resistor is connected between the first input terminal and the gate of the PMOS tube, the gate of the PMOS tube is connected to the base of the PNP transistor, the emitter of the PNP transistor is connected to the first input terminal, and the collector of the PNP transistor is connected to the negative electrode of the second voltage regulator tube;

[0008] The source of the NMOS tube is connected to the positive electrode of the second voltage regulator tube, the drain of the NMOS tube is connected to the negative electrode of the third voltage regulator tube, the gate of the NMOS tube is connected to the first input end, the positive electrode of the third voltage regulator tube is connected to the base of the NPN transistor, the emitter of the NPN transistor is connected to the second input end, and the collector of the NPN transistor is connected to the gate of the PMOS tube.

[0009] In some embodiments, the circuit further includes a fourth resistor, and the gate of the PMOS transistor is connected to the base of the PNP transistor through the fourth resistor.

[0010] In some embodiments, at least one of the first voltage regulator tube, the second voltage regulator tube, or the third voltage regulator tube is an adjustable voltage regulator tube.

[0011] In some embodiments, at least one of the first resistor or the second resistor is an adjustable resistor.

[0012] On the other hand, the technical solution adopted by the present invention is:

[0013] A power module comprises a battery and the battery undervoltage protection circuit, wherein the positive electrode of the battery is connected to the first input terminal, and the negative electrode of the battery is connected to the second input terminal.

[0014] The beneficial effects of the present invention are as follows: the present solution sets a first resistor, a second resistor, a third resistor, a PMOS tube, an NMOS tube, an NPN transistor, a PNP transistor, a first voltage regulator tube, a second voltage regulator tube and a third voltage regulator tube. When the voltage difference between the first input terminal and the second input terminal is less than a first threshold value, the PMOS tube is turned off, thereby realizing undervoltage protection. Under the action of the first resistor, the second resistor, the third resistor, the NMOS tube, the NPN transistor, the PNP transistor, the first voltage regulator tube, the second voltage regulator tube and the third voltage regulator tube, the PMOS tube can be turned on again only when the voltage recovers to a second threshold value greater than the first threshold value, thereby realizing a hysteresis function. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 A battery undervoltage protection circuit provided by an embodiment of the present invention;

[0016] Figure 2 A power module is provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0017] The present invention will be further described below with reference to the accompanying drawings and specific embodiments.

[0018] Reference Figure 1A battery undervoltage protection circuit includes a first input terminal VIN+, a second input terminal VIN-, a first output terminal VO+, a second output terminal VO-, a first resistor R1, a second resistor R2, a third resistor R3, a PMOS transistor Q1, an NMOS transistor Q2, an NPN transistor Q3, a PNP transistor Q4, a first voltage regulator D1, a second voltage regulator D2 and a third voltage regulator D3;

[0019] The first input terminal VIN+ is connected to the source of the PMOS tube Q1, the first output terminal VO+ is connected to the drain of the PMOS tube Q1, the second input terminal VIN- is connected to the second output terminal VO-, the cathode of the first voltage regulator tube D1 is connected to the first input terminal VIN+ through the first resistor R1, the anode of the first voltage regulator tube D1 is connected to the cathode of the second voltage regulator tube D2, and the anode of the second voltage regulator tube D2 is connected to the second input terminal VIN- through the second resistor R2;

[0020] The third resistor R3 is connected between the first input terminal VIN+ and the gate of the PMOS tube Q1, the gate of the PMOS tube Q1 is connected to the base of the PNP transistor Q4, the emitter of the PNP transistor Q4 is connected to the first input terminal VIN+, and the collector of the PNP transistor Q4 is connected to the negative electrode of the second voltage regulator tube D2;

[0021] The source of the NMOS tube Q2 is connected to the positive electrode of the second voltage regulator tube D2, the drain of the NMOS tube Q2 is connected to the negative electrode of the third voltage regulator tube D3, the gate of the NMOS tube Q2 is connected to the first input end, the positive electrode of the third voltage regulator tube D3 is connected to the base of the NPN transistor Q3, the emitter of the NPN transistor Q3 is connected to the second input end, and the collector of the NPN transistor Q3 is connected to the gate of the PMOS tube Q1.

[0022] The working principle of the present invention includes:

[0023] First, when using the present circuit, a battery is connected between the first input terminal VIN+ and the second input terminal VIN-, and the first output terminal VO+ and the second output terminal VO- are used as load terminals.

[0024] During normal power supply, the PNP transistor Q4 is in a saturated amplification state. At this time, the first resistor R1 and the first voltage regulator D1 are short-circuited by the PNP transistor Q4, and the gate and drain voltages of the NMOS transistor Q2 are higher than its conduction threshold and turned on; the collector of the PNP transistor Q4 forms a path through the second voltage regulator D2, the third voltage regulator D3, and the base and emitter of the NPN transistor Q3. Therefore, the path resistance is relatively low, which will cause the PNP transistor Q4 to saturate and amplify, and at the same time make the base current of the NPN transistor Q3 relatively large, and the NPN transistor Q3 is deeply saturated and turned on. The collector voltage of the NPN transistor Q3 will be pulled close to the ground potential. At this time, the voltage difference between the gate and source of the PMOS tube Q1 is less than its turn-on voltage, so the source and drain are normally turned on, and the battery can supply power to the output end normally.

[0025] During use, the battery voltage continues to decrease, and the collector voltage of the PNP transistor Q4 will also decrease. When it drops to the first threshold, it will destroy the voltage regulation path, that is, the balance of the second voltage regulator D2, the third voltage regulator D3, the NPN transistor Q3 and the NMOS transistor Q2, causing the base current of the NPN transistor Q3 to decrease, causing the collector voltage of the NPN transistor Q3 to rise, thereby exacerbating the reduction of the conduction current of the PNP transistor Q4, and then causing the collector voltage of the PNP transistor Q4 to be lower. The reduction in the gate voltage and source voltage difference of the NMOS tube Q2 will accelerate the positive feedback effect, and eventually cause the source and drain of the NMOS tube Q2 to be cut off, and the NPN transistor Q3 to be cut off. The gate voltage of the PMOS tube Q1 is approximately equal to the source voltage, and the PMOS tube Q1 is cut off. In this way, the battery can no longer output to the outside, so it is in a protected state.

[0026] When the protection is triggered and then restored, only when the battery voltage rises to a certain value (by adjusting the device parameters, the value can be configured to be greater than the first threshold), can the gate voltage and source voltage difference of the NMOS tube Q2 be higher than the turn-on threshold, and the NPN transistor Q3 and the PNP transistor Q4 re-enter the saturation amplification state, and then the PMOS tube Q1 can be turned on, and the battery can supply power normally.

[0027] In some embodiments, the circuit further includes a fourth resistor R4, and the gate of the PMOS transistor Q1 is connected to the base of the PNP transistor Q4 through the fourth resistor R4. The fourth resistor R4 is mainly used for current limiting.

[0028] In some embodiments, at least one of the first resistor R1 or the second resistor R2 is an adjustable resistor. In this embodiment, the first resistor R1 or the second resistor R2 is configured as an adjustable resistor, and the source voltage of the NMOS tube Q2 when the protection is triggered can be adjusted, so that the user can configure the protection voltage and the hysteresis voltage according to actual needs.

[0029] In some embodiments, at least one of the first voltage regulator D1, the second voltage regulator D2 or the third voltage regulator D3 is an adjustable voltage regulator. This embodiment allows users to adjust circuit parameters according to actual needs, such as adjusting protection voltage and hysteresis voltage.

[0030] Reference Figure 2 , a power module, comprising a battery BAT and the battery undervoltage protection circuit, wherein the positive electrode of the battery BAT is connected to the first input terminal VIN+, and the negative electrode of the battery is connected to the second input terminal VIN-.

[0031] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the described embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A battery undervoltage protection circuit, characterized in that: It includes a first input terminal, a second input terminal, a first output terminal, a second output terminal, a first resistor, a second resistor, a third resistor, a PMOS transistor, an NMOS transistor, an NPN transistor, a PNP transistor, a first voltage regulator transistor, a second voltage regulator transistor and a third voltage regulator transistor; The first input terminal is connected to the source of the PMOS tube, the first output terminal is connected to the drain of the PMOS tube, the second input terminal is connected to the second output terminal, the cathode of the first voltage regulator tube is connected to the first input terminal through the first resistor, the anode of the first voltage regulator tube is connected to the cathode of the second voltage regulator tube, and the anode of the second voltage regulator tube is connected to the second input terminal through the second resistor; The third resistor is connected between the first input terminal and the gate of the PMOS tube, the gate of the PMOS tube is connected to the base of the PNP transistor, the emitter of the PNP transistor is connected to the first input terminal, and the collector of the PNP transistor is connected to the negative electrode of the second voltage regulator tube; The source of the NMOS tube is connected to the positive electrode of the second voltage regulator tube, the drain of the NMOS tube is connected to the negative electrode of the third voltage regulator tube, the gate of the NMOS tube is connected to the first input terminal, the positive electrode of the third voltage regulator tube is connected to the base of the NPN transistor, the emitter of the NPN transistor is connected to the second input terminal, and the collector of the NPN transistor is connected to the gate of the PMOS tube; wherein, when the input voltage between the first input terminal and the second input terminal is greater than a preset voltage, the PNP transistor is in a saturated amplification state.

2. A battery undervoltage protection circuit according to claim 1, characterized in that: The circuit further includes a fourth resistor, and the gate of the PMOS tube is connected to the base of the PNP transistor through the fourth resistor.

3. A battery undervoltage protection circuit according to claim 1, characterized in that: At least one of the first resistor or the second resistor is an adjustable resistor.

4. A battery undervoltage protection circuit according to claim 1, characterized in that: At least one of the first voltage regulator tube, the second voltage regulator tube or the third voltage regulator tube is an adjustable voltage regulator tube.

5. A power module, characterized in that: The invention comprises a battery and a battery undervoltage protection circuit as claimed in any one of claims 1 to 4, wherein the positive electrode of the battery is connected to the first input terminal, and the negative electrode of the battery is connected to the second input terminal.

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