Light detecting device and current recycling method

Abstract

A light detecting device and a current recycling method are disclosed. The light detecting device includes a first light detector, a second light detector, a first modulated signal generating circuit, and a second modulated signal generating circuit. The first light detector is configured to generate at least a first detection signal based on a first modulated signal. The second light detector is configured to generate a second detection signal based on a second modulated signal. The first modulated signal generating circuit is coupled to the first light detector and is configured to generate the first modulated signal between a first voltage and a second voltage. The second modulated signal generating circuit is coupled to the second light detector and is configured to generate the second modulated signal between the second voltage and a third voltage. The second voltage is between the first voltage and the third voltage.

Description

TECHNICAL FIELD

[0001] The present application relates to time of flight (ToF) applications, and in particular to an apparatus and method for current recycling. BACKGROUND

[0002] In a time of flight sensor, photodetectors are the basic elements and can be collectively formed as a pixel array to detect the arrival time of reflected light to determine the distance between the time of flight sensor and a target object. Generally, all photodetectors in this pixel array are directly coupled to a low-dropout (LDO) voltage generated by a low-dropout regulator, where the power consumption under this low-dropout regulator is determined based on its output voltage and load. Under this concept, when the time of flight sensor needs a high-resolution pixel array, more photodetectors need to be added under this low-dropout regulator, which continuously increases the overall power consumption.

[0003] One way to reduce power consumption is to directly minimize the output voltage of the low-dropout regulator, however, this way will sacrifice the demodulation contrast (Cd) of the photodetector. In addition, adjusting power consumption by simply reducing the direct current to direct current (DC-DC) voltage cannot solve the problem of current spikes, for example, the maximum current spike is still very high.

[0004] Therefore, there is a need for a novel solution to reduce overall power consumption and reduce current spikes of the light sensor. SUMMARY

[0005] An object of the present application is to reduce overall power consumption and reduce current spikes of the light sensor, and the present application provides the following embodiments to achieve this object.

[0006] An embodiment of the present application provides a light detecting device, which includes a first light detector, a second light detector, a first modulated signal generating circuit, and a second modulated signal generating circuit. The first light detector belongs to a first column, and the first light detector is used to generate at least a first detecting signal according to a first modulated signal. The second light detector is coupled to the first light detector and belongs to a second column, and the second light detector is used to generate a second detecting signal according to a second modulated signal. The first modulated signal generating circuit is coupled to the first light detector and operates between a first voltage and a second voltage, and the first modulated signal generating circuit is used to generate the first modulated signal. The second modulated signal generating circuit is coupled to the second light detector and operates between the second voltage and a third voltage, and the second modulated signal generating circuit is used to generate the second modulated signal. In addition, the second voltage is between the first voltage and the third voltage, and the output current of the first light detector is reused by the second light detector.

[0007] An embodiment of the present application provides a current reuse method, which includes the following steps: receiving a plurality of first modulated signals by a plurality of first input terminals of a first light detector, and outputting a plurality of first detecting signals by a plurality of first output terminals of the first light detector; receiving a plurality of second modulated signals by a plurality of second input terminals of a second light detector, and outputting a plurality of second detecting signals by a plurality of second output terminals of the second light detector; generating the plurality of first modulated signals by a first modulated signal generating circuit; generating the plurality of second modulated signals by a second modulated signal generating circuit; and generating a current flowing through the first modulated signal generating circuit, the plurality of first input terminals, the second modulated signal generating circuit, and the plurality of second input terminals.

[0008] An advantage of the present application is that the current reuse system not only doubles the overall operation efficiency, but also effectively eliminates the current surge problem. In addition, the method and architecture provided by the present application do not significantly increase the cost, and can achieve the goal in an economical way. BRIEF DESCRIPTION OF DRAWINGS

[0009] Figure 1A FIG. 1 is a schematic diagram of a light detecting device.

[0010] Figure 1B For Figure 1A The light detecting device shown in FIG. 1 shows a current path.

[0011] Figure 2 FIG. 4 is a cross-sectional view of a light detector including a readout circuit and a current buffer transistor.

[0012] Figure 3A cross-sectional view of a photodetector including a readout circuit and a current buffer transistor.

[0013] Figure 4 A flowchart of a current recycling method for a photodetecting device according to an embodiment of the present application.

[0014] REFERENCE SIGNS: 100 - photodetecting device; 101, 102 - modulation signal generating circuit; 111, 112 - photodetector; 113 - low dropout regulator; 1011, 1012, 1021, 1022 - buffer circuit; 160 - isolation unit; 170 - capacitor; 111A, 111B, 112A, 112B - input terminal; 111C, 111D, 112C, 112D - output terminal; SIl l, SIl2, SI21, SI22 - modulation signal; SOl l, SOl2, SO21, SO22 - detection signal; CKP, CKN - frequency signal; V1, V2, V3 - voltage; C - collection region; M - modulation region; 200 - architecture; 201 - silicon region; 1501, 1502 - readout circuit; 130 - current buffer transistor; 140 - reset transistor; 300 - architecture; 301 - germanium region; 111' - photodetector; 401, 402, 403, 404, 405 - step. DETAILED DESCRIPTION

[0015] Certain terms are used throughout the description and following claims to refer to certain feature in accordance with embodiments. As one skilled in the art will appreciate, different manufacturers can refer to a certain feature by different names and the naming conventions used for the name of elements are not intended to limit the scope of the application, but are consistent with the principles of the application. Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. It will be further understood that terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning that is consistent with their meaning in the context of the relevant art and the present disclosure and will not be interpreted in an overly literal sense unless expressly so defined herein.

[0016] Reference will now be made to Figure 1Awhich is a schematic diagram of a light detecting device 100. The light detecting device 100 includes a low-dropout regulator 113, a first photodetector 111, a second photodetector 112, a first modulated signal generation circuit 101, a second modulated signal generation circuit 102, an isolation unit 160, and a capacitor 170. The low-dropout regulator 113 is used to generate a first voltage V1 to bias the first modulated signal generation circuit 101. A second voltage V2 to bias the second modulated signal generation circuit 102 can be generated by the first modulated signal generation circuit 101. In particular, the present disclosure redirects the output current of odd-column pixels (labeled as "Pixel_o") to even-column pixels (labeled as "Pixel_e") so that the output current is reused by the even-column pixels (e.g., the current output by the photodetector 111 is reused by the photodetector 112). In this operation, the peak current can be reduced by half. For example, the operating voltage range of the odd-column pixels can be 1.2V~0.6V, and the operating voltage range of the even-column pixels can be 0.6V~0V.

[0017] Certain modifications based on the above concept are also within the scope of the present disclosure. For example, by setting the operating voltage range of the odd-column pixels to be higher than the operating voltage range of the odd-column pixels, the current output from the even-column pixels can be reused by the odd-column pixels. In this way, the operating voltage range of the even-column pixels can be 1.2V~0.6V, and the operating voltage range of the odd-column pixels can be 0.6V~0V.

[0018] The isolation unit 160 in the present embodiment is used to provide isolation between pixel to pixel to avoid leakage current between pixels. The isolation unit 160 can use doped isolation, back-side deep trench isolation (BDTI), or any other alternative to achieve the isolation effect.

[0019] The first modulation signal generation circuit 101 is configured to generate modulation signals SI11 and SI12 on input terminals 111A and 111B, where the first modulation signal generation circuit 101 operates between a first voltage VI and a second voltage V2. In the present embodiment, a low dropout regulator 113 is coupled to a direct current to direct current (DC-DC) power supply, for example, providing a 1.8V DC voltage. A 0.6V mid-power rail can be used for the drivers of the odd / even column of pixels. For example, the first voltage VI can be set to 1.2V and the second voltage V2 can be set to 0.6V. In this way, the modulation signals SI11 and SI12 can swing between 1.2V and 0.6V.

[0020] For another example, the second voltage V2 can be designed to be an intermediate level between the first voltage VI and a third voltage V3 (e.g., VI = 1.2V, V2 = 0.6V, and V3 = 0V), or the second voltage V2 can be designed to be a voltage between the first voltage VI and the third voltage V3 and outside the intermediate level (e.g., VI = 1.2V, V2 = 0.8V, and V3 = 0V), and the like.

[0021] The second modulation signal generation circuit 102 is configured to generate modulation signals SI21 and SI22 on input terminals 112A and 112B, where the second modulation signal generation circuit 102 operates between the second voltage V2 and a third voltage V3. In the present embodiment, the second voltage V2 can be set to 0.6V and the third voltage V3 can be set to 0V. In this way, the modulation signals SI21 and SI22 can swing between 0.6V and 0V.

[0022] The symbol "C" represents a collection region, and "M" represents a modulation region. Input terminals 111A, 111B, 112A, and 112B are used to receive modulation signals SI11, SI12, SI21, and SI22, respectively. Output terminals 111C, 111D, 112C, and 112D are used to collect photo-generated electron-hole carriers in the first photodetector 111 and the second photodetector 112, and to output detection signals SO11, SO12, SO21, and SO22, respectively. In an example, the input terminals 111A, 111B, 112A, and 112B can be doped or un-doped, for example, the input terminals 111A, 111B, 112A, and 112B can be doped with N-type or P-type dopants. In an example, the output terminals 111C, 111D, 112C, and 112D can be doped, for example, the output terminals 111C, 111D, 112C, and 112D can be doped with N-type or P-type dopants.

[0023] The present embodiment only demonstrates a two-pixel (2x) stack architecture (e.g., the photodetector device 100 stacks two pixels on a current path), but the present application is not limited thereto, and a higher degree (>2x) of pixel stack design (e.g., a three-pixel (3x) or a four-pixel (4x) stack) is also a possible implementation. For example, one way is to design a four-pixel stack architecture operating in a 1.2V voltage space, in which a first pixel operates between 1.2V and 0.9V, a second pixel operates between 0.9V and 0.6V, a third pixel operates between 0.6V and 0.3V, and a fourth pixel operates between 0.3V and 0V; and at least one current flows from the first pixel to the fourth pixel.

[0024] In one example, the first modulation signal generating circuit 101 can include buffer circuits 1011 and 1012, and the second modulation signal generating circuit 102 can include buffer circuits 1021 and 1022. In one example, the buffer circuits 1011, 1012, 1021 and 1022 can be implemented by using complementary metal-oxide-semiconductor (CMOS) inverters. In addition, the metal-oxide-semiconductor field-effect transistors (MOSFETs) in the buffer circuits 1011, 1012, 1021 and 1022 can be triple well MOSFETs, for example, which can be implemented by adding a deep N-well.

[0025] The first photodetector 111 is configured to generate first detection signals SO11 and SO12 at output terminals 111C and 111D according to the first modulation signals SI11 and SI12. The second photodetector 112 is configured to generate second detection signals SO21 and SO22 at output terminals 112C and 112D according to the second modulation signals SI21 and SI22.

[0026] In one example, the modulation signals SI11, SI12, SI21 and SI22 can be frequency signals with a predetermined duty cycle or a duty ratio (e.g., 50% or less than 50%), for example, the frequency signals CKN and CKP can be controlled to have a duty cycle of 50% or less than 50%. In another example, the modulation signals SI11, SI12, SI21 and SI22 can be sinusoidal signals. During operation, a current generated from the low-dropout regulator 113 flows through the first modulation signal generating circuit 101, the input terminals 111A and 111B, the second modulation signal generating circuit 102, and the input terminals 112A and 112B, and this current path can be represented by the bold line added in FIG. 1. By the above configuration, the current flowing through the at least two photodetectors 111 and 112 and their respective two modulation signal generating circuits 101 and 102 can be reused. Figure 1B

[0027] In addition to the above-described elements, a capacitor 170 can be additionally employed to reduce voltage ripple / bouncing of the voltage V2. One terminal of the capacitor 170 is coupled to the terminals of the buffer circuits 1011 and 1012, and the other terminal of the capacitor is coupled to a ground voltage or the voltage V3.

[0028] ​Reference is made to Figure 2 Fig. 9 is a cross-sectional view of a photodetector 111 including a readout circuit 1501 and a readout circuit 1502, according to an embodiment of the present application. In this embodiment, a current buffer transistor 130 can be added between the reset transistor 140 and the photodetector 111 for connecting / disconnecting the photodetector 111 and the reset transistor 140. The current buffer transistor 130 can control the operating voltage of the output terminal 111D, and the output terminal 111D of the first photodetector 111 can be substantially / roughly maintained at a fixed voltage during operation.

[0029] In an example, the output terminals 111C and 111D can be biased at 1.6V, and the output terminals 112C and 112D can be biased at 1V. During operation, the voltage generated at the output terminals 111C and 111D of the photodetector 111 and the voltage generated at the output terminals 112C and 112D of the photodetector 112 can be different. The circuit in the readout circuit 1502 is symmetrical to the circuit in the readout circuit 1501, and the related icons are omitted for simplicity.

[0030] According to this embodiment, the photodetector 111 uses silicon as the light-absorbing material, and the input terminals 111A and 111B and the output terminals 111C and 111D are formed in a silicon region 201 (such as a silicon substrate). Similarly, the photodetector 112 also uses silicon as the light-absorbing material, and the input terminals 112A and 112B and the output terminals 112C and 112D are also formed in a silicon region 201 (such as a silicon substrate). According to some embodiments, the silicon region 201 can be replaced by other materials, for example, III-V semiconductor materials.

[0031] Figure 3 Fig. 10 is a cross-sectional view of a photodetector 111' including a readout circuit 1501 and a readout circuit 1502, according to another embodiment of the present application. The photodetector 111' of this embodiment uses germanium as the light-absorbing material, where a germanium region 301 (which can be regarded as a germanium well) is formed in a silicon region 201 (such as a silicon substrate), and the input terminals 111A and 111B and the output terminals 111C and 111D are formed in the germanium region 301. Similarly, the photodetector 112 also uses germanium as the light-absorbing material, and the input terminals 112A and 112B and the output terminals 112C and 112D are also formed in another germanium region (not shown).

[0032] According to some embodiments, the photodetector 111' can be designed such that the input terminals 111A and 111B are formed in the Ge region 301, and the output terminals 111C and 111D are formed in the Si region 201. According to some embodiments, the Ge region 301 can be replaced by other materials, such as III-V semiconductor materials.

[0033] The physical structures of the output terminals 111C, 111D, 112C and 112D are similar to those of the input terminals 111A, 111B, 112A and 112B, and their cross-sectional views are omitted here for simplicity. The voltages operating at the input terminals 111A, 111B, 112A and 112B and the output terminals 111C, 111D, 112C and 112D of the architecture 300 can refer to the above-described embodiments, and thus the relevant details are omitted here for simplicity.

[0034] Figure 4 A flowchart of a current recycling method for a photodetector device according to an embodiment of the present application, which can include the following steps in the present embodiment.

[0035] Step 401: receiving a plurality of first modulated signals by a plurality of first input terminals of a first photodetector, and outputting a plurality of first detected signals by a plurality of first output terminals of the first photodetector.

[0036] Step 402: receiving a plurality of second modulated signals by a plurality of second input terminals of a second photodetector, and outputting a plurality of second detected signals by a plurality of second output terminals of the second photodetector.

[0037] Step 403: generating the plurality of first modulated signals by a first modulated signal generation circuit.

[0038] Step 404: generating the plurality of second modulated signals by a second modulated signal generation circuit.

[0039] Step 405: generating a current flowing through the first modulated signal generation circuit, the plurality of first input terminals, the second modulated signal generation circuit and the plurality of second input terminals.

[0040] In particular, in some embodiments, the first photodetector operates between a first voltage and a second voltage; and the second photodetector operates between the second voltage and a third voltage, wherein the second voltage is between the first voltage and the third voltage.

[0041] In some embodiments, the voltage difference between the first voltage and the second voltage is equal to the voltage difference between the second voltage and the third voltage.

[0042] In some embodiments, the first plurality of modulated signals and the second plurality of modulated signals are frequency signals with a predetermined duty cycle (e.g., 50% or less); or the first plurality of modulated signals and the second plurality of modulated signals are sinusoidal signals.

[0043] In some embodiments, the first plurality of input terminals of the first photodetector and the first plurality of output terminals of the first photodetector are embedded in a silicon region (e.g., a silicon substrate).

[0044] In some embodiments, the first plurality of input terminals of the first photodetector and the first plurality of output terminals of the first photodetector are embedded in a silicon region (e.g., a silicon substrate).

[0045] The current recycling method for a photodetector device can have other implementations, which can be referred to the disclosure of the above-mentioned embodiments of the photodetector device. For the sake of brevity, the relevant details are not repeated here.

[0046] The present disclosure provides a way to redirect the current output from the odd column of pixels to the even column of pixels. In addition to saving power consumption, the peak current can be halved in the case of stacking two pixels. Furthermore, by employing the solution proposed in the present disclosure, a time of flight (ToF) system with a collection region and a modulation region pixel (e.g., a pixel arranged in the order of collection region, modulation region, modulation region, collection region) can obtain many improvements such as the peak current can be reduced, so the power / ground routing requirement can be simplified or reduced. In addition, in the case of using the same available DC-DC power supply, the device and method employing the present disclosure can greatly reduce the power consumption.

[0047] The above description is only the preferred embodiment of the present disclosure, and any equivalent changes and modifications made within the scope of the present disclosure should be covered by the present disclosure.

Claims

1. A light detection device, characterized in that, Include: A first optical detector is used to generate at least one first detection signal based on a first modulation signal; A second photodetector, coupled to the first photodetector, is used to generate a second detection signal based on a second modulation signal; A first modulation signal generation circuit is coupled to the first photodetector and operates between a first voltage and a second voltage to generate the first modulation signal. as well as A second modulation signal generation circuit is coupled to the second photodetector and operates between the second voltage and a third voltage to generate the second modulation signal. The second voltage is between the first voltage and the third voltage; During operation, a current is generated and flows through the first modulation signal generation circuit, the first photodetector, the second modulation signal generation circuit, and the second photodetector.

2. The optical detection device as described in claim 1, characterized in that, The voltage difference between the first voltage and the second voltage is equal to the voltage difference between the second voltage and the third voltage.

3. The optical detection device as described in claim 2, characterized in that, The voltage difference between the first voltage and the second voltage is 0.6V.

4. The optical detection device as described in claim 2, characterized in that, The voltage difference between the first voltage and the second voltage is a value other than 0.6V.

5. The optical detection device as described in claim 1, characterized in that, An isolation unit is configured between the first photodetector and the second photodetector.

6. The optical detection device as described in claim 1, characterized in that, It also includes a current buffer transistor coupled between an output terminal of the first photodetector and a reset transistor.

7. The optical detection device as described in claim 6, characterized in that, The voltage at the output terminal of the first photodetector is maintained at a fixed voltage during operation.

8. The optical detection device as claimed in claim 1, characterized in that, The first modulation signal and the second modulation signal are frequency signals with a predetermined operating period.

9. The optical detection device as described in claim 8, characterized in that, The planned work cycle is less than 50%.

10. The optical detection device as claimed in claim 1, characterized in that, The first modulation signal and the second modulation signal are sinusoidal signals.

11. The optical detection device as claimed in claim 1, characterized in that, The first photodetector has multiple input terminals and multiple output terminals formed in a silicon substrate.

12. The optical detection device as claimed in claim 1, characterized in that, The plurality of input terminals and the plurality of output terminals of the first photodetector are formed in a germanium region, and the germanium region is formed on a silicon substrate.

13. A method for reusing electric current, characterized in that, Include: A first light detector is used to receive a plurality of first modulation signals using a plurality of first input terminals, and to output a plurality of first detection signals using a plurality of first output terminals of the first light detector. Multiple second modulation signals are received using multiple second input terminals of a second photodetector, and multiple second detection signals are output using multiple second output terminals of the second photodetector; The plurality of first modulation signals are generated using a first modulation signal generation circuit; The plurality of second modulation signals are generated using a second modulation signal generation circuit; as well as A current is generated that flows through the first modulation signal generation circuit, the plurality of first input terminals, the second modulation signal generation circuit, and the plurality of second input terminals.

14. The current reuse method as described in claim 13, characterized in that, The first photodetector operates between a first voltage and a second voltage; and the second photodetector operates between the second voltage and a third voltage, wherein the second voltage is between the first voltage and the third voltage.

15. The current reuse method as described in claim 14, characterized in that, The voltage difference between the first voltage and the second voltage is equal to the voltage difference between the second voltage and the third voltage.

16. The current reuse method as described in claim 13, characterized in that, The plurality of first modulation signals and the plurality of second modulation signals are frequency signals having a predetermined operating period.

17. The current reuse method as described in claim 13, characterized in that, The plurality of first modulation signals and the plurality of second modulation signals are sinusoidal signals.

18. The current reuse method as described in claim 13, characterized in that, The plurality of first input terminals and the plurality of first output terminals of the first photodetector are formed in a silicon substrate.

19. The current reuse method as described in claim 13, characterized in that, The plurality of first input terminals and the plurality of first output terminals of the first photodetector are formed in a germanium region, and the germanium region is formed on a silicon substrate.

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