A method and device for IO processing

Abstract

The present application provides a method for processing IO requests, which is applied to an external device, the external device includes a processor and a first hardware interface, the first hardware interface is an interface supporting the PCIE protocol, the external device communicates with the physical host through the first hardware interface, and the method includes: the processor synchronizes the queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first hardware interface, wherein the queue information includes one or more input and output IO requests; the processor sends the one or more IO requests to a storage server or a network server for processing. The technical solution provided by the present application can use all the hardware resources of the physical host to provide virtual machine services to users, thereby improving the utilization rate of the hardware resources of the physical host.

Description

Technical Field

[0001] The present application relates to the field of virtualization, and more specifically, to an IO processing method, device and computer-readable storage medium. Background Art

[0002] Virtualization technology virtualizes the hardware resources of computer devices and shares them with multiple users, allowing users to use the hardware resources of computer devices conveniently and flexibly under the premise of secure isolation, and can greatly improve the utilization rate of hardware resources.

[0003] Computing virtualization technology can convert the hardware computing resources of computer devices into virtual computing resources to share with users on multiple virtual machines. IO virtualization technology converts physical storage resources and network resources into virtual storage resources and virtual network resources to process IO requests issued by virtual machines running on computer devices.

[0004] In the above process of virtualizing computer devices, IO virtualization consumes certain hardware computing resources, so it is impossible to share all the hardware resources on the computer devices with users. And because the consumption of hardware resources by IO virtualization technology will increase with the increase of the number of virtual machine IOs, in multi-user scenarios such as public clouds, when the number of IOs of multiple users is large, resource competition caused by insufficient hardware resources will occur, resulting in significant fluctuations in business performance and reduced user experience.

[0005] Therefore, how to share all the hardware resources on the computer devices with users and avoid competition between the hardware resources of the computer devices has become a problem that urgently needs to be solved. Summary of the invention

[0006] The present application provides a method and device for processing IO requests, which can use all the hardware resources of a physical host to provide virtual machine services to users, thereby improving the utilization rate of the hardware resources of the physical host.

[0007] In a first aspect, a method for processing IO requests is provided, the method being applied to an external device, the external device comprising a processor and a first hardware interface, the first hardware interface being an interface supporting a high-speed serial computer expansion bus standard PCIE protocol, the external device communicating with the physical host via the first hardware interface, the method comprising: the first processor synchronizing queue information in a storage space of a virtual machine running on the physical host to a storage space of the external device via the first hardware interface, wherein the queue information comprises one or more input / output IO requests sent by the virtual machine; the processor sending the one or more IO requests to a storage server or a network server for processing.

[0008] In the above technical solution, an external device is connected to the physical host, and the external device processes the IO sent by the virtual machine running on the physical host. In this way, the IO request sent by the virtual machine is directly passed to the external device of the physical host for processing, thereby avoiding the consumption of physical computing resources caused by IO virtualization of the physical host, so that all the hardware resources on the physical host are used to provide virtual machine services for users, thereby improving the utilization rate of the hardware resources of the physical host.

[0009] In a possible implementation, the method further includes: the processor receiving a configuration message, the configuration message being used to instruct that a protocol type of a first IO interface of the external device be configured as a first IO protocol, wherein a plurality of the first IO interfaces are run on the first hardware interface, the first IO interface being a virtual interface of the first hardware interface, the first IO interface corresponding to the virtual machine, and being used to process one or more IO requests sent by the virtual machine to the first IO interface, the data type and / or data size of the one or more IO requests in a storage space of the virtual machine being associated with the first IO protocol; and the first processor configuring, according to the configuration message, the protocol type of the first IO interface to the first IO protocol.

[0010] In the above technical solution, the IO interface protocol of the external device of the physical host can be dynamically configured, and the IO interface protocol presented by the external device to the virtual machine running on the physical host can be flexibly defined, so as to meet the needs of different users for multiple IO protocols without modifying the hardware system. At the same time, the virtual machine can also get rid of the constraint that the IO protocol of the IO interface of the external device is strongly bound, thereby improving the flexibility of the virtual machine.

[0011] In another possible implementation, before the processor synchronizes the queue information in the storage space of the virtual machine on the physical host to the storage space of the external device through the first hardware interface, the method also includes: the first hardware interface receives a PCIE message sent by the physical host, and the PCIE message is used to indicate that the external device has an IO request to be processed; the first hardware interface sends an interrupt request to the processor according to the PCIE message; and the first processor synchronizes the queue information in the storage space of the virtual machine to the storage space of the external device through the first hardware interface according to the interrupt request.

[0012] In the above technical solution, after the physical host notifies the virtual machine storage space that there are pending IO requests stored in the virtual machine storage space, the external device can synchronize the queue information in the virtual machine storage space to the storage space of the external device through the first hardware interface, thereby reducing the number of PCIE messages on the PCIE link between the physical host and the external device.

[0013] In another possible implementation, the processor instructs the first hardware interface to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device through direct memory access (DMA) technology.

[0014] In another possible implementation, the method further includes: the processor storing the number of IO requests processed by the first IO interface; and when the number of IO requests is 0, the processor reloading the first IO protocol.

[0015] In the above technical solution, the update or upgrade of the protocol is completed without interrupting the virtual machine IO business.

[0016] In another possible implementation, the method further includes: the processor obtaining an IO response corresponding to the IO request from the storage server or the network server; and the processor storing the IO response in a storage space of the virtual machine through the first hardware interface.

[0017] In another possible implementation manner, the processor instructs the first hardware interface to store the IO response in the storage space of the virtual machine through DMA technology.

[0018] In another possible implementation, the method also includes: the processor stores the IO responses corresponding to the multiple IO requests in the storage space of the virtual machine through the first hardware interface, and sends a notification message to the physical host through the first hardware interface, wherein the notification message is used to notify the physical host that the multiple IO requests have been processed.

[0019] In the above technical solution, after storing the IO responses corresponding to the multiple IO requests in the storage space of the virtual machine, a notification message may be triggered again to reduce the overhead of interrupt processing of the physical host.

[0020] In a second aspect, a method for processing IO requests is provided, the method being applied to a physical host, wherein one or more virtual machines are running on the physical host, the physical host comprising a processor and a second hardware interface, the second hardware interface being an interface supporting a high-speed serial computer expansion bus standard PCIE protocol, the physical host communicating with an external device via the second hardware interface, the method comprising: the processor storing one or more input and output IO requests issued by the virtual machine into a storage space of the virtual machine; the processor synchronizing one or more IO requests in the storage space of the virtual machine to the storage space of the external device via the second hardware interface.

[0021] In another possible implementation, the method further includes: the processor sending a PCIE message to the external device through the second hardware interface, where the PCIE message is used to indicate that the external device has an IO request to be processed.

[0022] In another possible implementation, the method further includes: the processor receiving an IO response sent by the external device through the second hardware interface, the IO response corresponding to the IO request, and the IO response is obtained by the external device from a storage server or a network server.

[0023] In another possible implementation, the method further includes: the processor receiving a notification message sent by the external device through the second hardware interface, wherein the notification message is used to notify the physical host that the processing of the plurality of IO requests has been completed.

[0024] In a third aspect, an external device is provided, the external device comprising an acquisition module, a sending module, and a first interface module, wherein:

[0025] The first interface module is used to communicate with the physical host; the first interface module is an interface module that supports the high-speed serial computer expansion bus standard PCIE protocol;

[0026] The acquisition module is used to synchronize queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first interface module, wherein the queue information includes one or more input and output IO requests sent by the virtual machine;

[0027] The sending module is used to send the one or more IO requests to the storage server or the network server for processing.

[0028] In the above technical solution, an external device is connected to the physical host, and the external device processes the IO sent by the virtual machine running on the physical host. In this way, the IO request sent by the virtual machine is directly passed to the external device of the physical host for processing, thereby avoiding the consumption of physical computing resources caused by IO virtualization of the physical host, so that all the hardware resources on the physical host are used to provide virtual machine services for users, thereby improving the utilization rate of the hardware resources of the physical host.

[0029] In a possible implementation, the external device further includes: a first receiving module, configured to receive a configuration message, wherein the configuration message is used to instruct to configure a protocol type of a first IO interface of the external device to be a first IO protocol, wherein a plurality of the first IO interfaces are run on the first interface module, the first IO interface is a virtual interface of the first interface module, the first IO interface corresponds to the virtual machine, and is configured to process one or more IO requests sent by the virtual machine to the first IO interface, wherein a data type and / or a data size of the one or more IO requests in a storage space of the virtual machine is associated with the first IO protocol;

[0030] The external device further includes: a configuration module, configured to configure the protocol type of the first IO interface to the first IO protocol according to the configuration message.

[0031] In another possible implementation, the first interface module is further used to: receive a PCIE message sent by the physical host, where the PCIE message is used to indicate that the external device has an IO request to be processed; and send an interrupt request to a processor in the external device according to the PCIE message;

[0032] The acquisition module is specifically used to: synchronize the queue information in the virtual machine storage space to the storage space of the external device through the first interface module according to the interrupt request.

[0033] In another possible implementation, the acquisition module is specifically configured to instruct the first interface module to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device by directly calling the storage access DMA technology.

[0034] In another possible implementation, the external device further includes: a first storage module, configured to store the number of IO requests processed by the first IO interface;

[0035] A loading module is used to reload the first IO protocol when the number of IO requests is 0.

[0036] In another possible implementation, the acquisition module is further used to: acquire an IO response corresponding to the IO request from the storage server or the network server;

[0037] The external device also includes: a second storage module, used to store the IO response in the storage space of the virtual machine through the first interface module.

[0038] In another possible implementation, the second storage module is specifically configured to: instruct the first interface module to store the IO response in the storage space of the virtual machine through DMA technology.

[0039] In another possible implementation, the first storage module is further used to: store IO responses corresponding to the plurality of IO requests in a storage space of the virtual machine;

[0040] The first interface module is further used to send a notification message to the physical host, where the notification message is used to notify the physical host that the plurality of IO requests have been processed.

[0041] In a fourth aspect, a physical host is provided, the physical host comprising a storage module and a second interface module, wherein:

[0042] The second interface module is an interface supporting the high-speed serial computer expansion bus standard PCIE protocol, and is used to communicate with an external device;

[0043] The storage module is used to store one or more input / output (IO) requests issued by the virtual machine running on the physical host into the storage space of the virtual machine;

[0044] The second interface module is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0045] In a possible implementation, the second interface module is further used to: send a PCIE message to the external device, where the PCIE message is used to indicate that the external device has an IO request to be processed.

[0046] In another possible implementation, the second interface module is further used to: receive an IO response sent by the external device, where the IO response corresponds to the IO request and is obtained by the external device from a storage server or a network server.

[0047] In another possible implementation, the second interface module is further used to: receive, through the second interface module, a notification message sent by the external device, where the notification message is used to notify the physical host that the plurality of IO requests have been processed.

[0048] In a fifth aspect, a computer system is provided, characterized in that the computer system includes a physical host and an external device, wherein the external device is the external device in the third aspect or any possible implementation of the third aspect, and the physical host is the physical host in the fourth aspect or any possible implementation of the fourth aspect.

[0049] In a sixth aspect, an external device is provided, the external device comprising a processor, a first hardware interface and a memory, the memory being used to store a computer program, the processor being used to call and run the computer program instructions from the memory to execute:

[0050] Synchronizing queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first hardware interface, the queue information including one or more input / output IO requests sent by the virtual machine;

[0051] The one or more IO requests are sent to a storage server or a network server for processing.

[0052] Optionally, the processor may be a general-purpose processor, which may be implemented by hardware or software. When implemented by hardware, the processor may be a logic circuit, an integrated circuit, etc.; when implemented by software, the processor may be a general-purpose processor implemented by reading software code stored in a memory, which may be integrated in the processor or located outside the processor and exist independently.

[0053] In a possible implementation, the processor is further used to: receive a configuration message, where the configuration message is used to instruct that a protocol type of a first IO interface of the external device is configured as a first IO protocol, wherein a plurality of the first IO interfaces are run on the first hardware interface, the first IO interface is a virtual interface of the first hardware interface, the first IO interface corresponds to the virtual machine, and is used to process one or more IO requests sent by the virtual machine to the first IO interface, and a data type and / or data size of the one or more IO requests in a storage space of the virtual machine is associated with the first IO protocol; and according to the configuration message, configure the protocol type of the first IO interface to the first IO protocol.

[0054] In another possible implementation, the first hardware interface is used to: receive a PCIE message sent by the physical host, the PCIE message being used to indicate that the external device has an IO request to be processed; and send an interrupt request to the processor;

[0055] The processor is further configured to: synchronize the queue information in the virtual machine storage space to the storage space of the external device through the first hardware interface according to the interrupt request.

[0056] In another possible implementation manner, the processor is specifically configured to: instruct the first hardware interface to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device through direct memory access (DMA) technology.

[0057] In another possible implementation manner, the processor is further configured to: store the number of IO requests processed by the first IO interface; and when the number of IO requests is 0, reload the first IO protocol.

[0058] In another possible implementation, the processor is further configured to: obtain an IO response corresponding to the IO request from the storage server or the network server; and store the IO response in the storage space of the virtual machine through the first hardware interface.

[0059] In another possible implementation manner, the processor is specifically configured to: instruct the first hardware interface to store the IO response in a storage space of the virtual machine through DMA technology.

[0060] In another possible implementation, the processor is also used to: store the IO responses corresponding to the multiple IO requests in the storage space of the virtual machine through the first hardware interface, and send a notification message to the physical host through the first hardware interface, wherein the notification message is used to notify the physical host that the multiple IO requests have been processed.

[0061] In a seventh aspect, a physical host is provided, comprising: a processor, a second hardware interface, and a memory, wherein the memory is used to store a computer program, and the processor is used to call and run the computer program instructions from the memory to execute:

[0062] One or more input / output (IO) requests issued by the virtual machine running on the physical host are stored in the storage space of the virtual machine;

[0063] The second hardware interface is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0064] Optionally, the processor may be a general-purpose processor, which may be implemented by hardware or software. When implemented by hardware, the processor may be a logic circuit, an integrated circuit, etc.; when implemented by software, the processor may be a general-purpose processor implemented by reading software code stored in a memory, which may be integrated in the processor or located outside the processor and exist independently.

[0065] In a possible implementation, the second hardware interface is further used to: send a PCIE message to the external device through the second hardware interface, where the PCIE message is used to indicate that the external device has an IO request to be processed.

[0066] In another possible implementation, the second hardware interface is further used to: receive an IO response sent by the external device through the second hardware interface, the IO response corresponds to the IO request, and the IO response is obtained by the external device from a storage server or a network server.

[0067] In another possible implementation, the second hardware interface is further used to: receive a notification message sent by the external device through the second hardware interface, where the notification message is used to notify the physical host that the plurality of IO requests have been processed.

[0068] In an eighth aspect, a computer system is provided, characterized in that the computer system includes a physical host and an external device, wherein the external device is an external device in the sixth aspect or any possible implementation of the sixth aspect, and the physical host is a physical host in the seventh aspect or any possible implementation of the seventh aspect.

[0069] In a ninth aspect, a computer program product is provided, comprising: a computer program code, which, when executed on a computer, enables the computer to execute the method in the first aspect or a possible implementation of the first aspect.

[0070] In a tenth aspect, a computer program product is provided, comprising: a computer program code, which, when executed on a computer, enables the computer to execute the method in the second aspect or a possible implementation of the second aspect.

[0071] In the eleventh aspect, a computer-readable medium is provided, wherein the computer-readable medium stores a program code, and when the computer program code runs on a computer, the computer executes the method in the above-mentioned first aspect or a possible implementation manner of the first aspect.

[0072] In a twelfth aspect, a computer-readable medium is provided, wherein the computer-readable medium stores a program code, and when the computer program code runs on a computer, the computer executes the method in the above-mentioned second aspect or a possible implementation of the second aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 It is a schematic diagram of the hardware structure of a computer device 100 provided in an embodiment of the present application.

[0074] Figure 2 This is a system architecture diagram of a virtualized computer device 100 provided in an embodiment of the present application.

[0075] Figure 3 It is a schematic diagram of a configuration of a computer device 100 after virtualization provided in an embodiment of the present application.

[0076] Figure 4 This is an architecture diagram of a computer device 100 connected to an external device provided in an embodiment of the present application.

[0077] Figure 5 It is a schematic architecture diagram of a physical server 100 connected to a software-hardware collaborative offload card 400 provided in an embodiment of the present application.

[0078] Figure 6 It is a schematic flow chart of a method for processing an IO request provided in an embodiment of the present application.

[0079] Figure 7 It is a schematic flowchart of another method for processing IO requests provided in an embodiment of the present application.

[0080] Figure 8 It is a schematic flowchart of another method for processing IO requests provided in an embodiment of the present application.

[0081] Fig. 9 It is a schematic flowchart of another method for processing IO requests provided in an embodiment of the present application.

[0082] Fig.10 It is a schematic block diagram of an external device 1000 provided in an embodiment of the present application.

[0083] Fig.11 It is a schematic block diagram of a physical host 1100 provided in an embodiment of the present application.

[0084] Fig.12 It is a schematic block diagram of an external device 1200 provided in an embodiment of the present application.

[0085] Fig.13 It is a schematic block diagram of a physical host 1300 provided in an embodiment of the present application. DETAILED DESCRIPTION

[0086] The technical solution in this application will be described below in conjunction with the accompanying drawings.

[0087] Virtualization technology virtualizes the hardware resources of computer devices and shares them with multiple users, allowing users to use the hardware resources of computer devices conveniently and flexibly under the premise of secure isolation, and can greatly improve the utilization rate of hardware resources. Virtualization technology can be widely used in public cloud, private cloud and cloud terminal scenarios. Public cloud (publiccloud) is a cloud infrastructure provided by a third party to the general public or large industries for collective use, and can provide cloud services. Private cloud (private cloud) is a cloud infrastructure and software and hardware resources established within a firewall so that departments within an organization or enterprise can share resources in the data center. A private cloud can be a cloud infrastructure operated for a specific organization. The manager may be the organization itself or a third party; the location of the cloud server may be inside the organization or outside the organization. Taking cloud phones as an example, cloud phones are simulated virtual phones that provide smartphone users with diversified and comprehensive virtual mobile phone applications and services based on the outstanding advantages of cloud computing in large-scale computing, powerful storage capabilities, virtualization applications, etc. The following is combined with Figure 1 , describes the hardware structure of computer equipment in detail.

[0088] Figure 1 1 is a schematic diagram of the hardware structure of a computer device 100 provided in an embodiment of the present application. Figure 1 As shown, the computer device 100 includes components such as a processor 110, a memory 120, and a network interface 130 (also referred to as a network card or a network adapter, etc.). Among them, the processor 110 can be a single-core processor or a multi-core processor. When the processor 110 is a multi-core processor, the method provided in the present application can be run on one core or distributed on different cores. The processor 110 can be one or more, and the types of the multiple processors can be the same or different.

[0089] It should be understood that in the embodiment of the present application, the processor 110 may be a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may be any conventional processor, etc. Alternatively, the processor 110 may be one or more integrated circuits.

[0090] The memory 120 may include a read-only memory and a random access memory, and provides instructions and data to the processor 110. The memory 120 may include a volatile memory and a non-volatile memory. The memory 120 may store a virtualization software program 121 and other program modules 122. The virtualization software program 121 is read and executed by the processor 110 to implement the virtualization of the computer device 100, including creating a host machine layer and multiple virtual computers, etc., which will be described below in conjunction with Figure 2 The logical structure diagram of the virtualized physical host 100 is described in detail and will not be repeated here.

[0091] The network interface 130 is used to connect to other network devices, including wireless connection and wired connection.

[0092] The above components are connected via a bus 140. The bus 140 may be one or more. The bus 140 includes an advanced microcontroller bus architecture (AMBA) industry standard architecture (ISA) bus, a micro channel architecture (MCA) bus, an extended-ISA bus, a video electronics standards association (VESA) local bus, and a peripheral component interconnect (PCI) bus.

[0093] Figure 2 This is a system architecture diagram of a virtualized computer device 100 provided in an embodiment of the present application.

[0094] It should be understood that in computers, virtualization technology is to achieve "virtualization" and "isolation" of the physical computer hardware by adding specific software layers to a physical computer, including a host layer and a virtual computer layer. In this way, various physical resources of the computer, such as computing resources, network resources, and storage resources, can be abstracted or converted and shared with multiple users. This allows users to use the hardware resources of the physical computer conveniently and flexibly under the premise of safe isolation, greatly improving the utilization rate of hardware resources.

[0095] like Figure 2 As shown, computing virtualization technology can convert physical computing resources of computer device 100 into virtual computing resources to share with users on multiple virtual machines. For example, Figure 1 The processor 110 shown is converted into a virtual processor, and the memory is converted into virtual memory to be shared with users on VM101, VM102, and VM103. Input output (IO) virtualization technology can convert physical storage resources and network resources into virtual storage resources and virtual network resources. For example, Figure 1 The memory 120 shown is converted into a virtual storage resource, and other network devices connected to the network interface 130 are converted into virtual network resources to be shared with users on VM101, VM102, and VM103.

[0096] For details, see Figure 3 After virtualization, the computer device 100 may include a hardware layer, a host machine layer and a virtualization layer, which are described in detail below.

[0097] Hardware layer: the hardware platform on which the virtualized environment runs. The hardware layer may include various hardware, such as the processor 110, the memory 120, the network interface 130, and other hardware, and may also include a network interface card (NIC), input / output (I / O) devices, and the like.

[0098] It should be understood that the embodiment of the present application does not specifically limit the number of processors in the hardware layer. For the convenience of description, Figure 3 In the description, two processors 110 are taken as an example.

[0099] The processor 110 may include one or more physical cores (a physical core may sometimes be referred to as a core in this application) and a plurality of registers, for example, Figure 3 The processor 110 includes two physical cores, namely core 0 and core 1. A physical core in this application may represent a minimum processing unit.

[0100] It should be noted that, in some other embodiments, the number of cores included in the processor may be more or less, and the number of cores included in each processor may also be different.

[0101] Virtualization layer: includes one or more virtual computers. It should be understood that a virtual computer is a general term for the operating environment virtualized by software in all types of virtualization devices. Virtual computers can include virtual machines (VMs), containers, etc.

[0102] Take the virtualization layer as a virtual machine VM as an example. The virtual machine may include a virtual hardware layer, a client operating system, and multiple applications. The virtual hardware layer includes virtual memory (not shown in the figure), virtual processors, and other virtual hardware. Figure 3 As shown, for ease of description, the virtualization layer includes two virtual machines (virtual machine 101, virtual machine 103) as an example. Each virtual machine includes one or more virtual processors. The virtual processor is implemented by combining software and hardware, and its operation is actually implemented by the physical core reading and running the software program. For example, a physical core reads the software program and runs the software program in a specific mode of the hardware-assisted virtualization of the physical core (such as the non-root mode of x86) to implement a virtual processor.

[0103] It should be understood that the virtual machine VM is equivalent to an independent computer, so the virtual machine VM executing an action can also be considered as a virtual processor executing the action, and the virtual processor is implemented by software, so the virtual processor executing an action is actually the physical processor or physical core running the virtual processor executing the action. In multiple embodiments of the present invention, in order to follow the technical expression habits of the current scenario, the above expression will be selectively used.

[0104] It should also be understood that a virtual processor can be a physical processing unit provided to a virtual computer in a shared or sharded manner under virtualization technology, such as a virtual central processing unit (vCPU). A virtual machine VM can have one or more virtual processors serving it. When there are multiple virtual processors, usually one virtual processor is the master virtual processor and the others are slave virtual processors.

[0105] Host layer: As a management layer, it is used to complete the management and allocation of hardware resources in the hardware layer, present a virtual hardware platform to the virtual machine, and implement the scheduling and isolation of the virtual machine. In some implementations, the host layer includes a host operating system and a virtual monitoring device, such as a virtual machine monitor (VMM) or a hypervisor. The virtual monitoring device can be deployed within the host operating system or outside the host operating system. The virtual hardware platform provides various hardware resources to each virtual computer running on it, such as a virtual processor, virtual memory, virtual disk, virtual network card, etc. The virtual computer runs on the virtual hardware platform prepared for it by the host layer. In this application, the host layer is sometimes referred to as the host.

[0106] In the above process of virtualizing computer devices, the realization of IO virtualization requires the consumption of certain physical computing resources, so it is impossible to share all the hardware resources of the physical host with users. In addition, since the consumption of hardware resources by IO virtualization technology will increase with the increase of the number of virtual machine IOs, in multi-user scenarios such as public clouds, when the number of IOs of multiple users is large, resource competition caused by insufficient hardware resources will occur, resulting in significant fluctuations in business performance and reduced user experience.

[0107] In the embodiment of the present application, an external device can be connected to the virtualized computer device, and the virtual machine running on the computer device can directly connect to the external device, and the external device processes the IO sent by the virtual machine. In this way, by directly connecting the IO request sent by the virtual machine to the external device of the computer device for processing, the consumption of the physical computing resources of the computer device by IO virtualization is reduced, and the proportion of resources used to provide virtual machine services to users in the resources of the computer device can be increased, thereby improving the utilization rate of physical server resources.

[0108] In the embodiment of the present application, the computer device 100 may be a physical server. Figure 4 The software and hardware collaborative offload card 400 is an external device of the physical server 100, and the IO request sent by the virtual machine is directly sent to the software and hardware collaborative offload card 400 for processing. For example, the software and hardware collaborative offload card 400 is connected to the storage resource (storage server) or network resource (network server) through the network card, and the software and hardware collaborative offload card 400 can send the IO request to the storage server or network server through the network card for IO processing.

[0109] Specifically, Figure 5As shown, the hardware system of the physical server 100 may include a memory, at least one processor, and a hardware interface supporting a high-speed serial computer expansion bus standard (peripheral component interconnect express, PCIE) protocol, such as a root multiplexer (root complex, RC) chip. It should be understood that for ease of description, Figure 5 The hardware system of the physical server 100 includes two CPUs as an example. The RC chip in the physical server 100 is a hardware interface defined in the PCIE specification, which is responsible for sending the PCIE message of the physical server 100 to an external device (e.g., the software and hardware collaborative offload card 400), or the hardware interface can also be responsible for receiving the PCIE message sent by the external device (e.g., the software and hardware collaborative offload card 400).

[0110] The hardware system of the external device of the physical server 100 (e.g., the software and hardware collaborative offloading card 400) may include a memory, at least one processor, a network card, and a hardware interface supporting the PCIE protocol, such as an endpoint (EP) chip. The software and hardware collaborative offloading card 400 may be connected to storage resources (storage servers) or network resources (network servers) via the network card. It should be understood that for ease of description, Figure 5 The hardware system of the software and hardware collaborative offloading card 400 includes two CPUs as an example. The EP chip is a hardware interface defined in the PCIE specification. As a peripheral interface of the software and hardware collaborative offloading card 400, it is responsible for sending PCIE messages to the physical server 100, or can also receive PCIE messages sent by the physical server 100.

[0111] The embodiments of the present application do not limit the specific implementation of the RC chip and the EP chip. Any RC chip and EP chip implemented in accordance with the PCIE specification can be used.

[0112] See also Figure 5 , the soft and hard collaborative offloading card 400 communicates with the physical server 100 through the PCIE protocol. Specifically, at least one processor in the soft and hard collaborative offloading card 400 can process the IO request issued by the virtual machine on the physical server 100 by running the software program stored in the memory. The software system of the soft and hard collaborative offloading card 400 can include five sub-modules: PCIE protocol processing module, PCIE adapter module, protocol processing module, protocol processing framework module, and dynamic configuration module. The above-mentioned software modules are described in detail below.

[0113] It should be understood that the PCIE protocol processing module and the PCIE adapter module may be located in the kernel state, and the protocol processing module, the protocol processing framework module, and the dynamic configuration module may be located in the user state.

[0114] (1) PCIE protocol processing module:

[0115] The PCIE protocol processing module is strongly related to the EP chip, and different manufacturers provide different EP chips. The PCIE protocol processing module is used to write different registers on the EP chip according to different manufacturers.

[0116] (2) PCIE adapter module:

[0117] The PCIE adapter module mainly defines a set of abstract functional interfaces for the upper-layer IO protocol processing module to call. Specific functional interfaces may include but are not limited to: peripheral component interconnect (PCI) configuration space read and write interface, PCI base address registers (BAR) mapping configuration interface, PCI message signaled interrupt (MSI) / MSI-X interrupt configuration interface, PCI single root I / O virtualization and sharing (SR-IOV) capability configuration interface, direct memory access (DMA) read and write interface and interrupt sending interface. The above functional interfaces are described in detail below.

[0118] PCI configuration space read and write interface: used to allocate PCI configuration space in memory for the external interface of the soft and hard collaborative unloading card 400. The total length of the configuration space defined by the PCI bus specification is 256 bytes, which is actually a set of continuous registers. In the embodiment of the present application, the correspondence between the external interface of the soft and hard collaborative unloading card 400 and the IO protocol of the interface can be recorded by writing to the registers in the PCI configuration space.

[0119] PCI BAR mapping configuration interface: There are 6 base address registers BAR in the PCI configuration space header, and the base address register BAR records the type, address and other attributes of the PCI configuration space. In the embodiment of the present application, a memory space can be allocated to the base address register BAR in the memory of the soft-hard collaborative unloading card 400, and the relationship between the allocated memory and BAR can be mapped through the PCI BAR mapping configuration interface.

[0120] Interrupt sending interface: The CPU of the software-hard collaborative offload card 400 can send an interrupt to the front-end physical server 100 through the interrupt sending interface.

[0121] PCI MSI / MSI-X interrupt configuration interface: Compared with MSI interrupts, MSI-X interrupts can support more interrupts per device and can be configured independently. In the embodiment of the present application, the number of interrupts that can be executed by the CPU of the soft-hard collaborative offload card 400 can be configured through the PCI MSI / MSI-X interrupt configuration interface.

[0122] DMA read / write interface: DMA is a mechanism for fast data transmission. When memory access is required, the memory information of the physical server can be directly accessed through the DMA read / write interface without the CPU participating in accessing data from the memory. When the CPU of the soft / hard collaborative offload card 400 obtains the IO request stored in the memory of the front-end physical server 100, it can call the DMA read / write interface to write the register in the EP chip, thereby obtaining the IO request stored in the memory of the front-end physical server 100.

[0123] (3)IO protocol processing module:

[0124] The IO protocol processing module is based on the underlying PCIE communication protocol and can implement various IO protocols. The embodiment of the present application does not specifically limit the IO protocol. As an example, the IO protocol may be a virtualization IO (VirtIO) protocol, and correspondingly, the IO protocol processing module is a VirtIO protocol processing module. Specifically, the VirtIO protocol may include the VirtIO-blk storage protocol and the VirtIO-net network protocol. As another example, the IO protocol may also be a non-volatile memory express (NVMe) protocol, and correspondingly, the IO protocol processing module is an NVMe protocol processing module.

[0125] It should be understood that the VirtIO protocol is an IO protocol defined in the field of traditional virtualization technology. The protocol has good ecological support, and the current mainstream operating system (OS) distributions all provide front-end drivers that support the protocol. The NVMe protocol is an IO protocol defined by Intel for high-performance storage media.

[0126] It should also be understood that when the external interface of the software and hardware collaborative offload card 400 is configured as the VirtIO protocol, that is, the IO protocol presented to the outside by the software and hardware collaborative offload card 400 is the VirtIO protocol, the software and hardware collaborative offload card 400 can act as a VirtIO device to process the IO requests issued by the virtual machine.

[0127] It should be noted that in the embodiments of the present application, other IO protocols may be allowed to be connected to the upper-layer protocol processing template as extended protocol processing modules, thereby realizing protocol extension to meet the user's demand for different IO interface protocols corresponding to the IO interface.

[0128] (4) Protocol processing framework module:

[0129] As the top-level module of the system, this module processes the IO requests sent by the front-end system in parallel in a multi-threaded manner and feeds back the completed requests to the front-end system. Specifically, the IO response carrying the IO operation results can be fed back to the front-end system. The protocol processing framework module can select one of the CPUs with a smaller load to process the IO requests sent by the virtual machine on the front-end system according to the current load of multiple CPUs.

[0130] (5) Dynamic configuration module:

[0131] This module, as a system external management interface, can configure the software and hardware collaborative offload card 400. As an example, the IO protocol type corresponding to one or more IO interfaces of the software and hardware collaborative offload card 400 can be configured during the initialization phase.

[0132] Combine the following Figure 6 The technical solution in the document describes in detail the implementation process of the software-hardware collaborative offload card 400 processing the IO requests sent by the virtual machine on the physical server 100.

[0133] Figure 6 FIG. 1 is a schematic flow chart of a method for processing an IO request provided in an embodiment of the present application. Figure 6 As shown, the method may include steps 610-620, and steps 610-620 are described in detail below.

[0134] Step 610 : The CPU of the software and hardware collaborative offloading card 400 synchronizes the queue information in the storage space of the virtual machine running on the physical server 100 to the storage space of the software and hardware collaborative offloading card 400 through the EP chip.

[0135] It should be understood that the queue information in the storage space of the virtual machine in the embodiment of the present application may include one or more IO requests, and the IO request is one or more IO requests issued by the virtual machine on the physical server 100.

[0136] As an example, the storage space of the virtual machine may be the memory of the virtual machine, and the storage space of the software-hard collaborative offload card 400 may be the memory of the software-hard collaborative offload card 400 .

[0137] There are many specific implementation methods for the soft-hard collaborative unloading card 400 to synchronize the queue information in the storage space of the virtual machine, which is not specifically limited in the embodiments of the present application. As an example, the soft-hard collaborative unloading card 400 can synchronize the queue information in the storage space of the virtual machine to the storage space of the soft-hard collaborative unloading card 400 by polling. For example, the CPU of the soft-hard collaborative unloading card 400 can synchronize the queue information in the storage space of the virtual machine to the storage space of the soft-hard collaborative unloading card 400 by writing to the register included in the EP chip. As another example, after the EP chip sends an interrupt request to the CPU of the soft-hard collaborative unloading card 400, the CPU can synchronize the queue information in the storage space of the virtual machine to the storage space of the soft-hard collaborative unloading card 400 by writing to the register included in the EP chip.

[0138] It can be understood that the storage space of the virtual machine is a part of the storage space of the physical server 100 .

[0139] Step 620: The CPU of the software-hardware collaborative offload card 400 sends the IO request included in the queue information to the storage server or the network server for processing.

[0140] Optionally, in some embodiments, before the CPU of the software-hard collaborative offloading card 400 synchronizes the queue information in the storage space of the virtual machine to the storage space of the software-hard collaborative offloading card 400 through the EP chip, the CPU of the software-hard collaborative offloading card 400 may also receive a configuration message, which is used to indicate that the protocol type of the first IO interface of the software-hard collaborative offloading card 400 is configured as the first IO protocol.

[0141] Combine the following Figure 7 , the method for configuring the protocol of the IO interface of the software and hardware collaborative offloading card 400 is described in detail, such as Figure 7 As shown, the method includes steps 710-730, and steps 710-730 are described in detail below.

[0142] Step 710: The software and hardware collaborative offloading card 400 receives the configuration command issued by the cloud management platform.

[0143] The cloud management platform may issue a protocol configuration command to the dynamic configuration module in the software and hardware collaborative offload card 400 according to the IO protocol expected to be presented to the user, or the cloud management platform may also issue a protocol configuration command to the software and hardware collaborative offload card 400 according to the needs of the user. For example, the configuration command indicates that the protocol type of the first IO interface is configured as the VirtIO-blk protocol.

[0144] It should be understood that the software-hard collaborative offload card 400 can be configured with multiple IO interfaces, wherein one IO interface can be configured as one or more IO protocols according to the configuration command. Different IO interface protocols indicate that the software-hard collaborative offload card 400 provides different functions to the outside. For example, when the IO interface of the software-hard collaborative offload card 400 is configured as the VirtIO-blk protocol, the software-hard collaborative offload card 400 can be used as a VirtIO device to provide VirtIO-blk storage functions for IO requests issued by virtual machines.

[0145] Step 720: The software-hardware collaborative offload card 400 configures the protocol type of the first IO interface according to the configuration command.

[0146] Optionally, after receiving the configuration command issued by the cloud management platform, the soft-hard collaborative unloading card 400 can notify the protocol processing framework module to find out whether the protocol is supported based on the IO interface and IO protocol type included in the configuration command. If supported, the protocol processing framework module will record the correspondence between the first IO interface and the IO protocol. If not supported, the dynamic configuration module in the soft-hard collaborative unloading card 400 returns a configuration failure to the outside.

[0147] Specifically, the dynamic configuration module in the software-hardware collaborative offload card 400 determines that the protocol in the configuration command can be supported, and the PCI configuration space and the BAR space can be allocated to the first IO interface.

[0148] Take the configuration command instructing the dynamic configuration module to configure the protocol type of the first IO interface as the VirtIO-blk protocol as an example. The dynamic configuration module can call the PCIE configuration space read-write interface of the PCIE adapter module to allocate a PCI configuration space object, and configure the identification (ID) of the vendor register in the PCI configuration space to 0x1af4, and configure the ID of the device register in the PCI configuration space to 0x1001. The dynamic configuration module can also allocate a certain size of memory as the VirtIO BAR space, and call the PCI BAR mapping configuration interface of the adapter module to establish a mapping relationship between the memory and the VirtIO BAR, that is, all subsequent front-end operations on the BAR will be mapped to the memory by the EP chip in the back-end soft and hard collaborative unloading card 400.

[0149] It should be understood that the PCI configuration space is a set of registers, wherein configuring the vendor_ID in the PCI configuration space to 0x1af4 and the device_ID to 0x1001 can be understood as configuring the first IO interface to the VirtIO-blk protocol.

[0150] Step 730: The PCIE adapter module synchronizes the mapping relationship between the first IO interface and the corresponding IO protocol to the register in the EP chip.

[0151] The EP chip may include multiple physical registers, and the PCIE adapter module may call the PCIE protocol processing module to synchronously write the mapping relationship between the first IO interface and the corresponding IO protocol into the physical register of the EP chip. In this way, the front-end physical server 100 may determine the IO protocol type of the first IO interface by scanning the mapping relationship between the first IO interface and the corresponding IO protocol recorded in the physical register of the EP chip.

[0152] In the embodiment of the present application, the IO interface protocol of the soft-hard collaborative offload card 400 can be dynamically configured, and the IO interface protocol presented to the outside by the soft-hard collaborative offload card 400 can be flexibly defined, so as to meet the needs of different users for multiple IO protocols without modifying the hardware system. At the same time, the virtual machine can also get rid of the constraint that the IO protocol corresponding to the IO interface is strongly bound, thereby improving the flexibility of the virtual machine.

[0153] Combine the following Figure 8 , the implementation process of the soft-hard collaborative offload card 400 processing the IO request issued by the virtual machine on the physical server 100 is described in detail. Figure 8 As shown, the IO request processing flow may include steps 810-860, and steps 810-860 are described in detail below.

[0154] For ease of description, the following description takes the storage space of the software and hardware collaborative offloading card 400 as the memory of the software and hardware collaborative offloading card 400 and the storage space of the virtual machine as the memory of the virtual machine as an example.

[0155] It should also be understood that the memory of the virtual machine is part of the memory of the physical server 100. For ease of description, the following description takes the memory of the virtual machine as the memory of the physical server 100 as an example.

[0156] Step 810 : The physical server 100 stores the IO request sent by the virtual machine in the memory of the physical server 100 .

[0157] The virtual machine on the physical server 100 sends an IO request, and the physical CPU running the virtual machine stores the IO request in the memory of the physical server 100 .

[0158] Specifically, the physical server 100 can scan the IO interface of the soft and hard collaborative offloading card 400 stored in the register in the EP chip through the link between the RC chip and the EP chip, and obtain the IO protocol corresponding to the IO interface. The physical server 100 can record the correspondence between the virtual machine running on the physical server 100 and the IO interface of the soft and hard collaborative offloading card 400. If the virtual machine that issues an IO request needs to send the IO request to the IO interface 1 for processing, the IO protocol corresponding to the IO interface 1 is the VirtIO protocol, and the virtual machine can send the IO request to the driver corresponding to the VirtIO protocol, and the driver can determine the data structure of the IO request in the memory of the physical server 100 according to the VirtIO protocol. For example, the data structure of the IO request in the memory of the physical server 100 is an IO ring. The IO ring contains a data structure of an available queue and a used queue. Among them, the available queue is used to store IO requests, and the used queue is used to store IO responses corresponding to the IO requests.

[0159] Step 820: The external device connected to the physical server 100 synchronizes the queue information in the memory of the physical server 100 to the memory of the external device.

[0160] Optionally, the software-hard collaborative offloading card 400, as an external device connected to the physical server 100, can also receive second configuration information, which is used to instruct the software-hard collaborative offloading card 400 to synchronize the queue information in the memory of the physical server 100 to the memory of the software-hard collaborative offloading card 400 through polling or interruption.

[0161] Take the example that the soft-hard collaborative offloading card 400 can synchronize the queue information in the memory of the virtual machine physical server 100 to the memory of the soft-hard collaborative offloading card 400 by polling. For the IO interface 1 of the soft-hard collaborative offloading card 400, the soft-hard collaborative offloading card 400 can determine the size of the IO request stored in the memory of the virtual machine physical server 100 according to the IO protocol corresponding to the IO interface 1. The CPU in the soft-hard collaborative offloading card 400 can obtain the queue information in the memory of the virtual machine physical server 100 by writing to the register in the EP chip. Specifically, the CPU in the soft-hard collaborative offloading card 400 can call the DMA interface provided by the PCIE adapter module to write to the register in the EP chip, for example, write the back-end address and front-end address of the queue information that needs to be synchronized in the register of the EP chip. For another example, write the size of the queue information that needs to be synchronized in the register of the EP chip. The EP chip can send a PCIE message to the RC chip in the physical server 100 based on the content written in its register, and the PCIE message includes the queue information that the soft-hard collaborative offloading card 400 needs to synchronize. After receiving the PCIE message sent by the EP chip, the RC chip obtains the queue information from the memory of the physical server 100 through the bus, and sends the queue information to the EP chip through the link between the RC chip and the EP chip. The EP chip can store the received queue information in the memory of the soft-hard collaborative offload card 400 through the bus.

[0162] It should be noted that, in the above-mentioned polling process, after the software and hardware collaborative offloading card 400 synchronizes the queue information in the memory of the physical server 100 to the memory of the external device, it can also call the IO protocol processing module corresponding to the IO protocol of the IO interface 1 to read the synchronized queue information from the memory of the software and hardware collaborative offloading card 400 to determine whether there are any IO requests to be processed.

[0163] Take the example that the soft-hard collaborative offloading card 400 can synchronize the queue information in the memory of the physical server 100 to the memory of the soft-hard collaborative offloading card 400 by means of an interrupt. After the RC chip in the physical server 100 determines that there are IO requests to be processed stored in the memory of the physical server 100, the RC chip can send a PCIE message to the EP chip through the link between the EP chip, and the PCIE message is used to instruct the EP chip to wake up the CPU in the soft-hard collaborative offloading card 400. The EP chip can send an interrupt request to the CPU in the soft-hard collaborative offloading card 400 according to the PCIE message sent by the RC chip, and the interrupt request is used to instruct the CPU in the soft-hard collaborative offloading card 400 to synchronize the queue information in the memory of the physical server 100. After receiving the interrupt request, the CPU in the soft-hard collaborative offloading card 400 obtains the queue information in the memory of the physical server 100 by writing the register in the EP chip. The specific process is similar to the above-mentioned polling process. For details, please refer to the specific implementation method of the CPU in the soft-hard collaborative offloading card 400 obtaining the queue information in the memory of the physical server 100 by writing the register in the EP chip in the above text, which will not be repeated here.

[0164] The polling method can reduce the notification delay between the front-end physical server 100 and the back-end software and hardware coordinated unloading card 400. The interrupt method can reduce the number of PCIE messages on the PCIE link between the RC chip and the EP chip.

[0165] In the above technical solution, the overall copy method can be used to ensure that all pending IO requests can be obtained by executing a DMA operation once, which can improve the performance of IO processing in scenarios with a high number of IOs.

[0166] Step 830: The external device connected to the physical server 100 forwards the IO request to the storage server or network server connected to it through the network card for IO processing.

[0167] As an external device connected to the physical server 100, the soft-hard collaborative offload card 400 can read the synchronous IO request from the memory of the soft-hard collaborative offload card 400, and can choose to send the IO request to the storage server or network server through the network card for IO processing according to the content in the IO request. Specifically, if the IO protocol of the IO interface 1 is the VirtIO protocol, the CPU in the soft-hard collaborative offload card 400 can call the VirtIO protocol processing module, read the synchronous IO request from its memory, and parse the IO request. According to the content in the IO request, it is determined to send the IO request to the storage server or network server through the network card for IO processing.

[0168] Step 840: The external device connected to the physical server 100 obtains an IO response corresponding to the IO request.

[0169] After the storage resource or network resource completes processing the pending IO request, an IO response corresponding to the IO request can be generated. As an external device connected to the physical server 100, the soft and hard collaborative offload card 400 has multiple specific implementation methods for obtaining the IO response, which is not specifically limited in the present embodiment.

[0170] As an example, the CPU of the soft-hard collaborative offloading card 400 can determine whether the storage resource or network resource has completed the processing of the pending IO request by polling. Specifically, the CPU of the soft-hard collaborative offloading card 400 can send a query message to the storage server or network server connected thereto through the network card, and the query message is used to query the storage server or network server whether there is an IO response corresponding to the IO request. If the storage server or network server has completed the processing of the pending IO request, the storage server or network server can send a message to the CPU of the soft-hard collaborative offloading card 400 through the network card that the IO request processing has been completed. After receiving the message, the CPU of the soft-hard collaborative offloading card 400 can obtain the IO response from the storage server or network server connected thereto through the network card.

[0171] As another example, the CPU of the soft-hard collaborative offloading card 400 can also obtain the IO response corresponding to the IO request by way of an interrupt. If the storage server or the network server has completed the processing of the pending IO request, the storage server or the network server can send the IO response to the soft-hard collaborative offloading card 400 through the network card. The network card can store the IO response in the memory of the soft-hard collaborative offloading card 400 through the bus, and send an interrupt request to the CPU of the soft-hard collaborative offloading card 400, and the interrupt request instructs the CPU of the soft-hard collaborative offloading card 400 to synchronize the IO response stored in the memory to the memory of the physical server 100.

[0172] Step 850 : The external device connected to the physical server 100 synchronizes the IO response to the memory of the physical server 100 .

[0173] The CPU of the soft-hard collaborative offloading card 400 can synchronize the IO response in its memory to the memory of the physical server 100 by writing to the register in the EP chip. Specifically, the CPU in the soft-hard collaborative offloading card 400 can write to the register in the EP chip through the DMA interface provided by the PCIE adapter module, for example, write the relevant information of the IO response that needs to be synchronized to the memory of the physical server 100 in the register of the EP chip. The EP chip can send a PCIE message to the RC chip in the physical server 100 based on the content written in its register, and the PCIE message includes the IO response stored by the EP chip from the memory of the soft-hard collaborative offloading card 400. After receiving the PCIE message sent by the EP chip, the RC chip stores the IO response carried by the PCIE message in the memory of the physical server 100 through the bus.

[0174] In the embodiment of the present application, the execution thread for processing the IO response can be the same as the execution thread for processing the IO request, that is, the IO response can also be handed over to the execution thread to which the IO request belongs for processing. This can avoid locking the threads to which they belong when the IO request is issued in parallel with the IO response, which can reduce CPU overhead and improve throughput performance.

[0175] Step 860: The external device notifies the physical server 100 that the processing of the IO request sent by the virtual machine has been completed.

[0176] The soft-hard collaborative offloading card 400 is an external device connected to the physical server 100. After synchronizing the IO response to the memory of the physical server 100, the CPU of the soft-hard collaborative offloading card 400 can send a notification that the IO request processing has been completed to the CPU of the physical server 100 through the EP chip. Specifically, the CPU of the soft-hard collaborative offloading card 400 can call the interrupt sending interface provided by the PCIE adapter module to write the register in the EP chip, for example, write the relevant information that the IO request processing has been completed in the register of the EP chip. The EP chip can send a PCIE message to the RC chip in the physical server 100 according to the content written in its register. The PCIE message is used to notify the soft-hard collaborative offloading card 400 that the IO request processing has been completed. After receiving the PCIE message sent by the EP chip, the RC chip sends an interrupt request to the CPU of the physical server 100, and the interrupt request is used to indicate that the IO request processing has been completed. After receiving the interrupt request, the CPU of the physical server 100 will notify the virtual machine that the IO request has been processed. After the virtual machine takes out the IO response from the memory of the physical server 100, it notifies the application in the virtual machine of the IO processing result.

[0177] Optionally, in some embodiments, for the case of concurrent processing of multiple IOs, the CPU of the soft-hard collaborative offload card 400 may notify the physical server 100 that the IO request processing is completed after multiple IO responses are synchronized to the used queue of the physical server 100 memory.

[0178] In the above technical solution, an interrupt notification can be triggered after multiple IO responses are placed in the front-end communication queue, avoiding the large signaling overhead caused by triggering a notification of IO request processing completion every time an IO response is placed.

[0179] Optionally, in some embodiments, other IO protocols can be connected to the upper layer protocol processing module as an extended protocol processing module to achieve protocol extension. In the process of adding other IO protocol processing modules or upgrading existing software, the embodiments of the present application can make the virtual machine user feel no IO interruption, thereby achieving the demand for zero service interruption during the software upgrade process. Fig. 9 Describe in detail.

[0180] See also Fig. 9 The method for implementing software upgrade or IO protocol expansion may include steps 910-920, and steps 910-920 are described in detail below.

[0181] Step 910: Save the status information of the device in the normal working state.

[0182] When adding IO protocols or upgrading existing software modules during the normal use of the software and hardware collaborative offloading card 400, when the software and hardware collaborative offloading card 400 is in normal working state, the CPU of the software and hardware collaborative offloading card 400 will open up a memory space in the memory to save all device status information. The status information may include the IO count and queue information processed by each IO interface.

[0183] Step 920: Add a new IO protocol or upgrade an existing software module.

[0184] When a new protocol module needs to be added or the software needs to be upgraded, the CPU of the software-hardware collaborative offloading card 400 will suspend the processing of IO and check the IO count recorded in the device status information.

[0185] If the IO calculation is not zero, it means that there are still IO requests being processed in the storage resources or network resources, and you need to wait for their processing to be completed. The CPU of the soft and hard collaborative unloading card 400 will restart the entire software system and reload the software module to upgrade the existing software module or add a new IO protocol. It will also obtain the read queue information from the status information saved in the memory and resume the IO processing of the soft and hard collaborative unloading card 400.

[0186] If the IO calculation is zero, it means that there is no IO request being processed in the storage resource or network resource, and the CPU of the soft-hard collaborative offloading card 400 can directly restart the software system and reload each software module to upgrade the existing software module or add a new IO protocol. It can also obtain the read queue information from the status information saved in the memory and resume the IO processing of the soft-hard collaborative offloading card 400.

[0187] In the above technical solution, the protocol can be updated or upgraded without interrupting the virtual machine IO service.

[0188] It is understandable that some or all of the steps in the above embodiments may be performed, and these steps or operations are merely examples, and the embodiments of the present application may also perform other operations or variations of various operations. In addition, the various steps may be performed in different orders presented in the above embodiments, and it is possible that not all of the operations in the above embodiments need to be performed.

[0189] Combination of the above Figures 1 to 9 , describes in detail the IO request processing method provided by the embodiment of the present application, and will now be combined with Figures 10 to 13 , describes in detail the embodiment of the device of the present application. It should be understood that the description of the method embodiment corresponds to the description of the device embodiment, so the parts not described in detail can refer to the previous method embodiment.

[0190] Fig.10 1 is a schematic block diagram of an external device 1000 provided in an embodiment of the present application. The external device 1000 includes an acquisition module 1010, a sending module 1020, and a first interface module 1030, wherein:

[0191] The first interface module 1030 is used to communicate with the physical host; the first interface module 1030 is an interface module that supports the high-speed serial computer expansion bus standard PCIE protocol;

[0192] The acquisition module 1010 is used to synchronize queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first interface module 1030, wherein the queue information includes one or more input and output IO requests sent by the virtual machine;

[0193] The sending module 1020 is used to send the one or more IO requests to the storage server or the network server for processing.

[0194] In the above technical solution, an external device is connected to the physical host, and the external device processes the IO sent by the virtual machine running on the physical host. In this way, the IO request sent by the virtual machine is directly passed to the external device of the physical host for processing, thereby avoiding the consumption of physical computing resources caused by IO virtualization of the physical host, so that all the hardware resources on the physical host are used to provide virtual machine services for users, thereby improving the utilization rate of the hardware resources of the physical host.

[0195] Optionally, the external device 1000 further includes: a first receiving module 1040, configured to receive a configuration message, wherein the configuration message is used to instruct to configure the protocol type of the first IO interface of the external device to be a first IO protocol, wherein a plurality of the first IO interfaces are run on the first interface module, the first IO interface is a virtual interface of the first interface module, the first IO interface corresponds to the virtual machine, and is configured to process one or more IO requests sent by the virtual machine to the first IO interface, wherein the data type and / or data size of the one or more IO requests in the storage space of the virtual machine is associated with the first IO protocol;

[0196] The external device 1000 further includes: a configuration module 1050, configured to configure the protocol type of the first IO interface to the first IO protocol according to the configuration message.

[0197] Optionally, the first interface module 1030 is further used to: receive a PCIE message sent by the physical host, the PCIE message being used to indicate that the external device has an IO request to be processed; and send an interrupt request to a processor in the external device according to the PCIE message;

[0198] The acquisition module 1010 is specifically used to: synchronize the queue information in the virtual machine storage space to the storage space of the external device through the first interface module according to the interrupt request.

[0199] Optionally, the acquisition module 1010 is specifically used to instruct the first interface module to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device by directly calling the storage access DMA technology.

[0200] Optionally, the external device 1000 further includes: a first storage module 1060, configured to store the number of IO requests processed by the first IO interface;

[0201] The loading module 1070 is used to reload the first IO protocol when the number of IO requests is 0.

[0202] Optionally, the acquisition module 1010 is further used to: acquire an IO response corresponding to the IO request from the storage server or the network server;

[0203] The external device 1000 further includes: a second storage module 1080, configured to store the IO response in the storage space of the virtual machine through the first interface module.

[0204] Optionally, the second storage module 1080 is specifically used to: instruct the first interface module to store the IO response in the storage space of the virtual machine through DMA technology.

[0205] Optionally, the first storage module 1060 is further used to: store the IO responses corresponding to the multiple IO requests in the storage space of the virtual machine;

[0206] The first interface module 1030 is further used to send a notification message to the physical host, where the notification message is used to notify the physical host that the multiple IO requests have been processed.

[0207] Fig.11 1 is a schematic block diagram of a physical host 1100 provided in an embodiment of the present application. The physical host 1100 includes a storage module 1110 and a second interface module 1120, wherein:

[0208] The second interface module 1120 is an interface supporting the high-speed serial computer expansion bus standard PCIE protocol, and is used to communicate with an external device;

[0209] The storage module 1110 is used to store one or more input / output (IO) requests issued by the virtual machine running on the physical host 1100 in the storage space of the virtual machine;

[0210] The second interface module 1120 is used to send one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0211] Optionally, the second interface module 1120 is further used to: send a PCIE message to the external device, where the PCIE message is used to indicate that the external device has an IO request to be processed.

[0212] Optionally, the second interface module 1120 is further used to: receive an IO response sent by the external device, where the IO response corresponds to the IO request and is obtained by the external device from a storage server or a network server.

[0213] Optionally, the second interface module 1120 is further used to: receive a notification message sent by the external device through the second interface module, where the notification message is used to notify the physical host 1100 that the plurality of IO requests have been processed.

[0214] Fig.12 1 is a schematic block diagram of an external device 1200 provided in an embodiment of the present application. The external device 1200 may include: a processor 1210, a first hardware interface 1220 and a memory 1230, wherein:

[0215] The processor 1210, the first hardware interface 1220 and the memory 1230 are connected via an internal connection path, the memory 1230 is used to store program instructions, and the processor 1210 is used to call and run the computer program instructions from the memory 1230 to execute:

[0216] Synchronize queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first hardware interface 1220, wherein the queue information includes one or more input and output IO requests sent by the virtual machine;

[0217] The one or more IO requests are sent to a storage server or a network server for processing.

[0218] It should be understood that in the embodiment of the present application, the processor 1210 may adopt a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. Alternatively, the processor 1210 may adopt one or more integrated circuits to execute relevant programs to implement the technical solutions provided in the embodiment of the present application.

[0219] The memory 1230 may include a read-only memory and a random access memory, and provides instructions and data to the processor 1210. A portion of the processor 1210 may also include a nonvolatile random access memory. For example, the processor 1210 may also store information on the device type.

[0220] Optionally, the processor 1210 is further used to: receive a configuration message, the configuration message being used to instruct that a protocol type of a first IO interface of the external device 1200 be configured as a first IO protocol, wherein a plurality of the first IO interfaces are run on the first hardware interface 1220, the first IO interface being a virtual interface of the first hardware interface 1220, the first IO interface corresponding to the virtual machine and being used to process one or more IO requests sent by the virtual machine to the first IO interface, the data type and / or data size of the one or more IO requests in a storage space of the virtual machine being associated with the first IO protocol; and according to the configuration message, configuring the protocol type of the first IO interface to the first IO protocol.

[0221] Optionally, the first hardware interface 1220 is used to: receive a PCIE message sent by the physical host, the PCIE message is used to indicate that the external device 1200 has an IO request to be processed; send an interrupt request to the processor;

[0222] The processor 1210 is further configured to: synchronize the queue information in the virtual machine storage space to the storage space of the external device 1200 through the first hardware interface 1220 according to the interrupt request.

[0223] Optionally, the processor 1210 is specifically configured to: instruct the first hardware interface 1220 to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device 1200 through direct memory access (DMA) technology.

[0224] Optionally, the processor 1210 is further configured to: store the number of IO requests processed by the first IO interface; and reload the first IO protocol when the number of IO requests is 0.

[0225] Optionally, the processor 1210 is further configured to: obtain an IO response corresponding to the IO request from the storage server or the network server; and store the IO response in the storage space of the virtual machine through the first hardware interface 1220 .

[0226] Optionally, the processor 1210 is specifically configured to: instruct the first hardware interface 1220 to store the IO response in the storage space of the virtual machine through DMA technology.

[0227] Optionally, the processor 1210 is also used to: store the IO responses corresponding to the multiple IO requests in the storage space of the virtual machine through the first hardware interface 1220, and send a notification message to the physical host through the first hardware interface 1220, wherein the notification message is used to notify the physical host that the multiple IO requests have been processed.

[0228] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in the processor 1210 or an instruction in the form of software. The method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in the processor for execution. The software module can be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 1230, and the processor 1210 reads the information in the memory 1230 and completes the steps of the above method in conjunction with its hardware.

[0229] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0230] Fig.13 1 is a schematic block diagram of a physical host 1300 provided in an embodiment of the present application. The physical host 1300 may include: a processor 1310, a second hardware interface 1320 and a memory 1330, wherein:

[0231] The processor 1310, the second hardware interface 1320 and the memory 1330 are connected via an internal connection path, the memory 1330 is used to store program instructions, and the processor 1310 is used to call and run the computer program instructions from the memory 1330 to execute:

[0232] One or more input / output (IO) requests issued by the virtual machine running on the physical host 1300 are stored in the storage space of the virtual machine;

[0233] The second hardware interface 1320 is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device.

[0234] It should be understood that in the embodiment of the present application, the processor 1310 may adopt a central processing unit (CPU), and the processor may also be other general-purpose processors, digital signal processors (DSP), application specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gates or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or the processor may also be any conventional processor, etc. Alternatively, the processor 1310 may adopt one or more integrated circuits to execute relevant programs to implement the technical solutions provided in the embodiment of the present application.

[0235] The memory 1330 may include a read-only memory and a random access memory, and provides instructions and data to the processor 1310. A portion of the processor 1310 may also include a nonvolatile random access memory. For example, the processor 1310 may also store information on the device type.

[0236] Optionally, the second hardware interface 1320 is further used to: send a PCIE message to the external device, where the PCIE message is used to indicate that the external device has an IO request to be processed.

[0237] Optionally, the second hardware interface 1320 is further used to: receive an IO response sent by the external device, where the IO response corresponds to the IO request and is obtained by the external device from a storage server or a network server.

[0238] Optionally, the second hardware interface 1320 is further used to: receive a notification message sent by the external device, where the notification message is used to notify the physical host that the multiple IO requests have been processed.

[0239] In the implementation process, each step of the above method can be completed by an integrated logic circuit of hardware in the processor 1310 or an instruction in the form of software. The method disclosed in conjunction with the embodiment of the present application can be directly embodied as a hardware processor for execution, or a combination of hardware and software modules in the processor for execution. The software module can be located in a mature storage medium in the art such as a random access memory, a flash memory, a read-only memory, a programmable read-only memory or an electrically erasable programmable memory, a register, etc. The storage medium is located in the memory 1330, and the processor 1310 reads the information in the memory 1330 and completes the steps of the above method in conjunction with its hardware.

[0240] It should be understood that in the various embodiments of the present application, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0241] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0242] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0243] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0244] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0245] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0246] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in the various embodiments of the present application. The aforementioned storage media include: various media that can store program codes, such as USB flash drives, mobile hard disks, read-only memories (ROM), random access memories (RAM), magnetic disks or optical disks.

[0247] The above is only a specific implementation of the present application, but the protection scope of the present application is not limited thereto. Any person skilled in the art who is familiar with the present technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A method for processing an IO request, characterized in that: The method is applied to an external device, the external device includes a processor and a first hardware interface, the first hardware interface is an endpoint EP chip supporting a high-speed serial computer expansion bus standard PCIE protocol, the external device communicates with a physical host through the first hardware interface, and the method includes: The processor synchronizes queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first hardware interface, wherein the queue information includes one or more input / output (IO) requests sent by the virtual machine, and the synchronization includes performing a write operation on a register in the first hardware interface; The processor sends the one or more IO requests to a storage server or a network server for processing.

2. The method according to claim 1, characterized in that The method further comprises: The processor receives a configuration message, where the configuration message is used to instruct to configure a protocol type of a first IO interface of the external device to be a first IO protocol, where a plurality of the first IO interfaces are run on the first hardware interface, the first IO interface is a virtual interface of the first hardware interface, the first IO interface corresponds to the virtual machine, and is used to process one or more IO requests sent by the virtual machine to the first IO interface, where a data type and / or a data size of the one or more IO requests in a storage space of the virtual machine is associated with the first IO protocol; The processor configures the protocol type of the first IO interface to the first IO protocol according to the configuration message.

3. The method according to claim 1 or 2, characterized in that: Before the processor synchronizes the queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first hardware interface, the method further includes: The first hardware interface receives a PCIE message sent by the physical host, where the PCIE message is used to indicate that the external device has an IO request to be processed; The first hardware interface sends an interrupt request to the processor; The processor synchronizes the queue information in the virtual machine storage space to the storage space of the external device through the first hardware interface according to the interrupt request.

4. The method according to claim 1 or 2, characterized in that: The processor synchronizes queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first hardware interface, including: The processor instructs the first hardware interface to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device through direct memory access (DMA) technology.

5. The method according to claim 1 or 2, characterized in that: The method further comprises: The processor stores the number of IO requests processed by the first IO interface; When the number of IO requests is 0, the processor reloads the first IO protocol.

6. The method according to claim 1 or 2, characterized in that: The method further comprises: The processor obtains an IO response corresponding to the IO request from the storage server or the network server; The processor stores the IO response in the storage space of the virtual machine through the first hardware interface.

7. The method according to claim 6, characterized in that The processor stores the IO response in the storage space of the virtual machine through the first hardware interface, including: The processor instructs the first hardware interface to store the IO response in the storage space of the virtual machine through the DMA technology.

8. The method according to claim 6, characterized in that The method further comprises: The processor stores the IO responses corresponding to the multiple IO requests in the storage space of the virtual machine through the first hardware interface, and sends a notification message to the physical host through the first hardware interface, wherein the notification message is used to notify the physical host that the multiple IO requests have been processed.

9. A method for processing an IO request, characterized in that: The method is applied to a physical host, one or more virtual machines are running on the physical host, the physical host includes a processor and a second hardware interface, the second hardware interface is an interface supporting a high-speed serial computer expansion bus standard PCIE protocol, the physical host communicates with an external device through the second hardware interface, and the method includes: The processor stores one or more input / output (IO) requests sent by the virtual machine in a storage space of the virtual machine; The processor synchronizes one or more IO requests in the storage space of the virtual machine to the storage space of the external device through the second hardware interface, and the synchronization includes performing a write operation on a register in an endpoint EP chip of the external device.

10. The method according to claim 9, characterized in that The method further comprises: The processor sends a PCIE message to the external device through the second hardware interface, where the PCIE message is used to indicate that the external device has an IO request to be processed.

11. The method according to claim 9 or 10, characterized in that: The method further comprises: The processor receives an IO response sent by the external device through the second hardware interface, where the IO response corresponds to the IO request and is obtained by the external device from a storage server or a network server.

12. The method according to claim 9 or 10, characterized in that: The method further comprises: The processor receives a notification message sent by the external device through the second hardware interface, where the notification message is used to notify the physical host that the plurality of IO requests have been processed.

13. An external device, characterized in that: The external device includes an acquisition module, a sending module, and a first interface module, wherein: The first interface module is used to communicate with the physical host; the first interface module is an endpoint EP chip that supports the high-speed serial computer expansion bus standard PCIE protocol; The acquisition module is used to synchronize queue information in the storage space of the virtual machine running on the physical host to the storage space of the external device through the first interface module, wherein the queue information includes one or more input and output IO requests sent by the virtual machine, and the synchronization includes performing a write operation on a register in the first interface module; The sending module is used to send the one or more IO requests to the storage server or the network server for processing.

14. The external device according to claim 13, characterized in that: The external device also includes: A first receiving module is configured to receive a configuration message, wherein the configuration message is used to instruct to configure the protocol type of the first IO interface of the external device to be a first IO protocol, wherein a plurality of the first IO interfaces are run on the first interface module, the first IO interface is a virtual interface of the first interface module, the first IO interface corresponds to the virtual machine, and is configured to process one or more IO requests sent by the virtual machine to the first IO interface, wherein the data type and / or data size of the one or more IO requests in the storage space of the virtual machine is associated with the first IO protocol; The external device also includes: A configuration module is used to configure the protocol type of the first IO interface to the first IO protocol according to the configuration message.

15. The external device according to claim 13 or 14, characterized in that: The first interface module is also used for: Receiving a PCIE message sent by the physical host, wherein the PCIE message is used to indicate that the external device has an IO request to be processed; Sending an interrupt request to a processor in the external device according to the PCIE message; The acquisition module is specifically used for: According to the interrupt request, the queue information in the virtual machine storage space is synchronized to the storage space of the external device through the first interface module.

16. The external device according to claim 13 or 14, characterized in that: The acquisition module is specifically used for: By directly calling the storage access DMA technology, the first interface module is instructed to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device.

17. The external device according to claim 13 or 14, characterized in that: The external device also includes: A first storage module, used to store the number of IO requests processed by the first IO interface; The loading module is used to reload the first IO protocol when the number of IO requests is 0.

18. The external device according to claim 13 or 14, characterized in that: The acquisition module is also used for: Obtaining an IO response corresponding to the IO request from the storage server or the network server; The external device also includes: a second storage module, used to store the IO response in the storage space of the virtual machine through the first interface module.

19. The external device according to claim 18, characterized in that: The second storage module is specifically used for: By using DMA technology, the first interface module is instructed to store the IO response in the storage space of the virtual machine.

20. The external device according to claim 17, characterized in that: The first storage module is also used for: Storing the IO responses corresponding to the plurality of IO requests in the storage space of the virtual machine; The first interface module is also used for: A notification message is sent to the physical host, where the notification message is used to notify the physical host that the plurality of IO requests have been processed.

21. A physical host, comprising a storage module and a second interface module, wherein: The second interface module is an interface supporting the high-speed serial computer expansion bus standard PCIE protocol, and is used to communicate with an external device; The storage module is used to store one or more input / output (IO) requests issued by the virtual machine running on the physical host into the storage space of the virtual machine; The second interface module is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device, and the synchronization includes performing a write operation on a register in an endpoint EP chip of the external device.

22. The physical host according to claim 21, characterized in that: The second interface module is also used for: A PCIE message is sent to the external device, where the PCIE message is used to indicate that the external device has an IO request to be processed.

23. The physical host according to claim 21 or 22, characterized in that: The second interface module is also used for: An IO response sent by the external device is received, where the IO response corresponds to the IO request and is obtained by the external device from a storage server or a network server.

24. The physical host according to claim 21 or 22, characterized in that: The second interface module is also used for: A notification message sent by the external device is received through the second interface module, where the notification message is used to notify the physical host that the multiple IO requests have been processed.

25. A computer system, characterized in that: The computer system includes a physical host and an external device, wherein the external device is the external device described in any one of claims 13 to 20, and the physical host is the physical host described in any one of claims 21 to 24.

26. An external device, characterized in that: include: A processor, a first hardware interface and a memory, wherein the first hardware interface is an endpoint EP chip supporting a high-speed serial computer expansion bus standard PCIE protocol, the memory is used to store a computer program, and the processor is used to call and run the computer program from the memory to execute: Synchronizing queue information in a storage space of a virtual machine running on a physical host to a storage space of the external device through the first hardware interface, wherein the queue information includes one or more input / output (IO) requests sent by the virtual machine, and the synchronization includes performing a write operation on a register in the first hardware interface; The one or more IO requests are sent to a storage server or a network server for processing.

27. The external device according to claim 26, characterized in that: The processor is further configured to: Receive a configuration message, where the configuration message is used to instruct that a protocol type of a first IO interface of the external device is configured as a first IO protocol, where a plurality of the first IO interfaces are run on the first hardware interface, the first IO interface is a virtual interface of the first hardware interface, the first IO interface corresponds to the virtual machine, and is used to process one or more IO requests sent by the virtual machine to the first IO interface, and a data type and / or a data size of the one or more IO requests in a storage space of the virtual machine is associated with the first IO protocol; According to the configuration message, the protocol type of the first IO interface is configured to be the first IO protocol.

28. The external device according to claim 26 or 27, characterized in that: The first hardware interface is used for: Receiving a PCIE message sent by the physical host, wherein the PCIE message is used to indicate that the external device has an IO request to be processed; sending an interrupt request to the processor; The processor is further configured to: synchronize the queue information in the virtual machine storage space to the storage space of the external device through the first hardware interface according to the interrupt request.

29. The external device according to claim 26 or 27, characterized in that: The processor is specifically used for: By using direct memory access (DMA) technology, the first hardware interface is instructed to synchronize the queue information in the storage space of the virtual machine to the storage space of the external device.

30. The external device according to claim 26 or 27, characterized in that: The processor is further configured to: Store the number of IO requests processed by the first IO interface; When the number of IO requests is 0, the first IO protocol is reloaded.

31. The external device according to claim 26 or 27, characterized in that: The processor is further configured to: Obtaining an IO response corresponding to the IO request from the storage server or the network server; The IO response is stored in the storage space of the virtual machine through the first hardware interface.

32. The external device according to claim 31, characterized in that: The processor is specifically used for: By using DMA technology, the first hardware interface is instructed to store the IO response in the storage space of the virtual machine.

33. The external device according to claim 31, characterized in that: The processor is further configured to: After storing the IO responses corresponding to the multiple IO requests in the storage space of the virtual machine through the first hardware interface, a notification message is sent to the physical host through the first hardware interface, wherein the notification message is used to notify the physical host that the multiple IO requests have been processed.

34. A physical host, comprising: A processor, a second hardware interface and a memory, wherein the memory is used to store a computer program, and the processor is used to call and run the computer program from the memory to execute: One or more input / output (IO) requests issued by the virtual machine running on the physical host are stored in the storage space of the virtual machine; The second hardware interface is used to synchronize one or more IO requests in the storage space of the virtual machine to the storage space of the external device, and the synchronization includes performing a write operation on a register in an endpoint EP chip of the external device.

35. The physical host according to claim 34, characterized in that: The second hardware interface is also used for: A PCIE message is sent to the external device, where the PCIE message is used to indicate that the external device has an IO request to be processed.

36. The physical host according to claim 34 or 35, characterized in that: The second hardware interface is also used for: An IO response sent by the external device is received, where the IO response corresponds to the IO request and is obtained by the external device from a storage server or a network server.

37. The physical host according to claim 34 or 35, characterized in that: The second hardware interface is also used for: A notification message sent by the external device is received, where the notification message is used to notify the physical host that the plurality of IO requests have been processed.

38. A computer system, characterized in that: The computer system includes a physical host and an external device, wherein the external device is the external device described in any one of claims 26 to 33, and the physical host is the physical host described in any one of claims 34 to 37.

39. A computer-readable storage medium, characterized in that: The invention comprises a computer program which, when being run on a computer, causes the computer to execute the method according to any one of claims 1 to 8 or any one of claims 9 to 12.

40. A computer program product, characterized in that The method comprises a computer program code, and when the computer program code is run on a computer, the method of any one of claims 1 to 8 or any one of claims 9 to 12 is executed.

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