Display device

Abstract

The present disclosure provides a display device, which includes: a display panel, including a light-emitting area and a non-light-emitting area adjacent to the light-emitting area; a first insulating layer, arranged on the display panel, the first insulating layer having a first refractive index and having a first opening, the first opening being defined in a region overlapping with the light-emitting area; a second insulating layer, covering the display panel and the first insulating layer and having a second refractive index greater than the first refractive index of the first insulating layer; a third insulating layer, arranged on the second insulating layer, the third insulating layer having the first refractive index and having a second opening, the second opening being defined in a region overlapping with the light-emitting area; and a fourth insulating layer, covering the second insulating layer and the third insulating layer and the fourth insulating layer having the second refractive index.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0079385 filed on Jul. 2, 2019, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Herein, the present disclosure relates to a display device with improved light efficiency. Background Art

[0004] The display device can be classified into a self-luminous display device in which the light-emitting element itself emits light and a light-receiving display device that controls the transmittance of the received light. The self-luminous display device may be, for example, an organic light-emitting display device. The light generated in the light-emitting layer of the organic light-emitting display device may be emitted in the side direction as well as in the front direction. The light efficiency may be determined based on the light emitted in the front direction. That is, the light emitted in the side direction may lead to the degradation of the light efficiency.

[0005] It will be understood that this background technology section is intended, in part, to provide a useful background for understanding the technology. However, this background technology section may also include ideas, concepts or cognitions that were not part of what was known or understood by a person skilled in the relevant art before the corresponding effective filing date of the subject matter disclosed herein. Summary of the invention

[0006] The present disclosure provides a display device with improved light efficiency.

[0007] An embodiment provides a display device, comprising: a display panel, comprising a plurality of light-emitting areas and non-light-emitting areas adjacent to the plurality of light-emitting areas; a first insulating layer, disposed on the display panel, the first insulating layer having a first refractive index and having a plurality of first openings, the plurality of first openings being defined in an area overlapping with the plurality of light-emitting areas; a second insulating layer, covering the display panel and the first insulating layer and having a second refractive index greater than the first refractive index of the first insulating layer; a third insulating layer, disposed on the second insulating layer, the third insulating layer having the first refractive index and having a plurality of second openings, the plurality of second openings being defined in an area overlapping with the plurality of light-emitting areas; and a fourth insulating layer, covering the second insulating layer and the third insulating layer, the fourth insulating layer having the second refractive index.

[0008] In an embodiment, each of the second insulating layer and the fourth insulating layer may overlap the plurality of first openings in a plane.

[0009] In an embodiment, the first refractive index may be in a range of about 1.45 to about 1.55, and the second refractive index may be in a range of about 1.65 to about 1.80.

[0010] In an embodiment, the first insulating layer and the third insulating layer may include a first organic matter, and the second insulating layer and the fourth insulating layer may include a second organic matter different from the first organic matter.

[0011] In an embodiment, the first organic substance may include acrylic resin.

[0012] In an embodiment, the second organic substance may include zirconium oxide.

[0013] In an embodiment, a thickness of the first insulating layer may be in a range of about 1.5 μm to about 5 μm, and a maximum thickness of the second insulating layer may be in a range of about 3 μm to about 20 μm.

[0014] In an embodiment, the first insulating layer may include a first through surface defining each of the plurality of first openings, and an angle between the first through surface and a surface on which the first insulating layer is disposed may be in a range of about 60° to about 80°.

[0015] In an embodiment, an absolute value of a difference between a width of each of the plurality of first openings and a width of each of the plurality of light emitting regions may be about 3 μm or less.

[0016] In an embodiment, the display device may further include an input sensing layer between the display panel and the first insulating layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The accompanying drawings are included to provide a further understanding of the present disclosure and are incorporated into and constitute a part of this specification. The accompanying drawings illustrate embodiments and together with the description serve to explain the principles of the present disclosure. In the drawings:

[0018] Figure 1 is a perspective view of a display device according to an embodiment;

[0019] FIG. 2A to FIG. 2E is a schematic cross-sectional view of a display device according to an embodiment;

[0020] Figure 3 is a plan view of a display panel according to an embodiment;

[0021] Figure 4 is a schematic diagram of an equivalent circuit of a pixel according to an embodiment;

[0022] Figure 5is a schematic cross-sectional view showing a part of the configuration of a display panel according to the embodiment;

[0023] Figure 6 is a plan view showing a portion of a display panel and a portion of an optical layer according to an embodiment;

[0024] Figure 7 It is along Figure 6 A schematic cross-sectional view taken along line II' of ;

[0025] Figure 8 is along with Figure 6 A schematic cross-sectional view of a region corresponding to a region intercepted by line II';

[0026] Fig. 9 is a plan view showing a portion of a display panel and a portion of an optical layer according to an embodiment;

[0027] Fig.10 It is along Fig. 9 A schematic cross-sectional view taken along line II-II';

[0028] Fig.11 It is along Fig. 9 A schematic cross-sectional view taken along line III-III';

[0029] Fig.12 is along with Figure 6 A schematic cross-sectional view of a region corresponding to a region intercepted by line II';

[0030] Fig.13 is a plan view of an input sensing layer according to an embodiment;

[0031] Fig.14 It shows Fig.13 a plan view of an enlarged view of area AA; and

[0032] Fig.15 It is along Fig.14 Schematic cross-sectional view of the area cut along line IV-IV'. DETAILED DESCRIPTION

[0033] Although the present disclosure can be modified in various ways and have additional embodiments, the embodiments are shown in the drawings and will be mainly described in the specification. However, the scope of the present disclosure is not limited to the embodiments in the drawings and the specification, and should be interpreted as including all changes, equivalents and substitutions included in the spirit and scope of the present disclosure.

[0034] For the purpose of describing the embodiments, some parts that are not related to the description may not be provided, and the same reference numerals refer to the same elements throughout the specification.

[0035] In the present disclosure, when an element (or region, layer, part, etc.) is referred to as being "on" another element, "connected to" or "coupled to" another element, this means that the element can be directly set on the other element / directly connected to / directly coupled to the other element, or a third element can be set between the element and the other element.

[0036] The same reference numerals refer to the same elements. In the drawings, in order to effectively describe the technical contents and for the sake of clarity, the thickness, ratio and size of elements may be exaggerated.

[0037] In addition, in the specification, the phrase "in a plan view" refers to when the object portion is observed from above, and the phrase "in a schematic cross-sectional view" refers to a schematic cross section intercepted by vertically cutting the object portion when observed from the side. In addition, the term "overlap" or "overlapping" refers to that the first object can be located above or below the second object or on the side of the second object, and vice versa. In addition, the term "overlap" can include stacking, stacking, facing or facing, extending above, covering or partially covering or any other suitable term as will be appreciated and understood by those of ordinary skill in the art. The terms "facing" and "facing" refer to that the first element can be directly or indirectly opposite to the second element. In the case where the third element is between the first element and the second element, the first element and the second element can be understood as facing each other, but indirectly opposite to each other. When an element is described as "not overlapping" another element or "not overlapping" another element, this can include that these elements are spaced apart from each other, offset from each other or separated from each other or any other suitable term as will be appreciated and understood by those of ordinary skill in the art.

[0038] The term "and / or" includes all combinations that can be defined by one or more of its related configurations.

[0039] It will be understood that although the terms "first", "second", etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another element. For example, without departing from the scope of the embodiment, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. Unless the context clearly indicates otherwise, a term in the singular may include a plural form.

[0040] In addition, terms such as "below", "lower", "above", and "on" may be used to describe the relationship of the configurations shown in the drawings. However, these terms are used as relative concepts, and although these terms are described with reference to the directions indicated in the drawings, the embodiments are not limited thereto.

[0041] As used herein, "about" or "approximately" includes the stated value and means within an acceptable range of deviation for the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value.

[0042] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that, unless explicitly defined in the specification, terms defined in general dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the relevant art and are explicitly defined herein, and the terms will not be interpreted in an idealized or overly formalized sense.

[0043] It should be understood that the terms “include,” “comprises,” and “contains” are intended to illustrate the presence of the features, integers, steps, operations, elements, components, or combinations thereof stated in the present disclosure, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

[0044] Hereinafter, embodiments will be described with reference to the accompanying drawings.

[0045] Figure 1 is a perspective view of a display device DD according to the embodiment.

[0046] Reference Figure 1 , the display device DD can be used for large electronic devices such as televisions, monitors, and external billboards, and the display device DD can also be used for small and medium-sized electronic devices such as personal computers, notebook computers, personal digital terminals, vehicle navigation system units, game consoles, portable electronic devices, and cameras. However, it should be understood that these are only examples, and the display device DD can be incorporated into other electronic devices without departing from the spirit and scope of the present disclosure.

[0047] In the display device DD, a display area DA and a non-display area NDA may be defined.

[0048] The display area DA on which the image IM is displayed may be parallel to a surface defined by the first direction DR1 and the second direction DR2. The normal direction of the display area DA (i.e., the thickness direction of the display device DD) may be indicated by a third direction DR3. The front surface (or upper surface) and the rear surface (or lower surface) of each member may be distinguished by the third direction DR3. The third direction DR3 may be a direction that intersects the first direction DR1 and the second direction DR2. For example, the first direction DR1, the second direction DR2, and the third direction DR3 may be perpendicular to each other.

[0049] Meanwhile, the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3 are relative. They may be converted into different directions or expressed in different directions. Hereinafter, the first direction to the third direction refer to the same directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3, respectively, and refer to the same reference numerals. In this specification, the surface defined by the first direction DR1 and the second direction DR2 is defined as a plane, and "plan view" or the like may refer to a view shown from the third direction DR3.

[0050] The non-display area NDA is an area adjacent to the display area DA, and may be an area on which the image IM is not displayed. A bezel area of ​​the display device DD may be defined by the non-display area NDA.

[0051] The non-display area NDA may surround the display area DA. However, the embodiment is not limited thereto. In other embodiments, the shape of the display area DA and the shape of the non-display area NDA may be changed.

[0052] FIG. 2A to FIG. 2E is a schematic cross-sectional view of a display device DD according to an embodiment. FIG. 2A to FIG. 2E Cross sections drawn in the second direction DR2 and the third direction DR3 are shown. FIG. 2A to FIG. 2E It is shown to describe the stacking relationship of functional components that can constitute the display device DD.

[0053] The display device DD according to the embodiment may include a display panel, an optical layer, an anti-reflector, and a window. At least some of the display panel, the optical layer, the anti-reflector, and the window may be formed by a continuous process, or at least some of the display panel, the optical layer, the anti-reflector, and the window may be coupled to each other by an adhesive member. FIG. 2A to FIG. 2E An optically transparent adhesive member OCA is exemplarily shown as an adhesive member. The adhesive member described hereinafter may include a typical adhesive or a typical pressure-sensitive adhesive. In an embodiment, the anti-reflector and the window may be replaced by other components, or may be omitted.

[0054] like Figure 2AAs shown in , the display device DD may include a display panel DP, an optical layer OPL, an anti-reflection panel RPP, and a window panel WP.

[0055] The display panel DP may generate an image IM (see Figure 1 ). The display panel DP according to the embodiment may be a light-emitting display panel, but is not specifically limited thereto. For example, the display panel DP may be an organic light-emitting display panel or a quantum dot light-emitting display panel. The light-emitting layer of the organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of the quantum dot light-emitting display panel may include quantum dots and quantum rods, etc. Hereinafter, the display panel DP is described as an organic light-emitting display panel.

[0056] The optical layer OPL may be disposed on the display panel DP. The optical layer OPL may change a path of light emitted from the display panel DP.

[0057] The anti-reflection panel RPP can reduce the reflectivity of external light incident from the upper side of the window panel WP. The anti-reflection panel RPP according to an embodiment may include a phase retarder and a polarizer. The phase retarder may be a film type or a liquid crystal coating type, and may include a λ / 2 phase retarder and / or a λ / 4 phase retarder. The polarizer may also be a film type or a liquid crystal coating type. The film type polarizer may include a stretchable synthetic resin film, and the liquid crystal coating type polarizer may include liquid crystals arranged in a predetermined layout. The phase retarder and the polarizer may include a protective film. The phase retarder and the polarizer themselves or the protective film may be defined as a base layer of the anti-reflection panel RPP.

[0058] The anti-reflection panel RPP according to the embodiment may include a color filter. The color filter may have a predetermined layout. The layout of the color filter may be determined in consideration of the light emission color of the pixels included in the display panel DP. The anti-reflection panel RPP may include a black matrix adjacent to the color filter.

[0059] The anti-reflection panel RPP according to the embodiment may include an offset-interference structure. For example, the offset-interference structure may include a first reflective layer and a second reflective layer disposed on different layers. The first reflected light and the second reflected light respectively reflected from the first reflective layer and the second reflective layer may be offset-interferenced, and thus, the external light reflectivity may be reduced.

[0060] The window panel WP according to the embodiment may include a base layer WP-BS and a light blocking pattern WP-BZ. The base layer WP-BS may include a glass substrate and / or a synthetic resin film. The base layer WP-BS is not limited to a single layer. The base layer WP-BS may include two or more films or layers joined by an adhesive member.

[0061] The light blocking pattern WP-BZ may overlap or partially overlap with the base layer WP-BS. The light blocking pattern WP-BZ may be disposed on the rear surface of the base layer WP-BS. The light blocking pattern WP-BZ may roughly define a non-display area NDA of the display device DD. An area on which the light blocking pattern WP-BZ is not disposed may define a display area DA of the display device DD.

[0062] The light blocking pattern WP-BZ may have a multilayer structure. The multilayer structure may include a color layer and a light blocking layer. The color layer may have a color, and the light blocking layer may be black. The color layer and the light blocking layer may be formed, for example, by deposition, printing, and coating processes. Although not shown separately, the window panel WP may further include a functional coating disposed on the front surface of the base layer WP-BS. The functional coating may include, for example, an anti-fingerprint layer, an anti-reflection layer, a hard coating, and the like.

[0063] Reference FIG. 2B to FIG. 2E , the display device DD may include an input sensing sensor. FIG. 2B to FIG. 2E In the input sensing sensor, anti-reflector and window, a component formed by a continuous process with another component may be referred to as a layer. In the input sensing sensor, anti-reflector and window, a component joined to another component by an adhesive member may be referred to as a panel. The panel may include a base layer that provides a substrate surface, such as a synthetic resin film, a composite material film, and a glass substrate, etc., but the layer may not have a base layer. In other words, the elements and / or components referred to as one or more layers may be provided on a base layer, which may be provided by other elements and / or components or include other elements and / or components.

[0064] Hereinafter, the input sensing sensor, the anti-reflector and the window may be respectively referred to as an input sensing panel ISP, an anti-reflection panel RPP and a window panel WP or an input sensing layer ISL, an anti-reflection layer RPL and a window layer WL according to the presence of the base layer.

[0065] like Figure 2B As shown in , the display device DD may include a display panel DP, an input sensing layer ISL, an optical layer OPL, an anti-reflection panel RPP, and a window panel WP. The input sensing layer ISL may be disposed between the display panel DP and the optical layer OPL. The input sensing layer ISL may obtain coordinate information of an external input (e.g., a touch event).

[0066] An optically transparent adhesive member OCA may be disposed between the optical layer OPL and the anti-reflection panel RPP and between the anti-reflection panel RPP and the window panel WP.

[0067] exist FIG. 2C to FIG. 2E, the window panel WP and the window layer WL are shown without distinguishing the base layer WP-BS and the light blocking pattern WP-BZ.

[0068] like Figure 2C to Figure 2D As shown in the figure, the display device DD may include a display panel DP, an optical layer OPL, an input sensing panel ISP, an anti-reflection panel RPP and a window panel WP. The stacking order of the input sensing panel ISP and the anti-reflection panel RPP is not limited to the embodiment shown in the drawings, but may be changed.

[0069] like Figure 2E As shown in , the display device DD may include a display panel DP, an input sensing layer ISL, an optical layer OPL, an anti-reflection panel RPP, and a window layer WL. Figure 2B Compared with the display device DD shown in the figure, the optically transparent adhesive member OCA can be omitted, and the input sensing layer ISL, the optical layer OPL, the anti-reflection layer RPL and the window layer WL can be formed by a continuous process. The stacking order of the input sensing layer ISL and the anti-reflection layer RPL is not limited to the embodiment shown in the drawings, but can be changed.

[0070] Figure 3 is a plan view of a display panel DP according to an embodiment.

[0071] Reference Figure 3 The display panel DP may include a driving circuit GDC, a signal line SGL (hereinafter, referred to as a “signal line”), a signal pad DP-PD (hereinafter, referred to as a “signal pad”), and a pixel PX (hereinafter, referred to as a “pixel”).

[0072] The display area DP-DA of the display panel DP may be defined as an area on which the pixels PX are disposed. The display area DP-DA of the display panel DP may be a region corresponding to the display device DD (see Figure 1 ) of the display area DA (see Figure 1 ), and the non-display area DP-NDA of the display panel DP may be an area corresponding to the display device DD (see Figure 1 )'s non-display area NDA (see Figure 1 ) corresponding to the area.

[0073] The driving circuit GDC may include a scan driving circuit. The scan driving circuit generates a scan signal and may sequentially output the scan signal to the scan lines SL.

[0074] The scan driving circuit may include a thin film transistor formed by the same process as that of the driving circuit of the pixel PX, for example, a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

[0075] The signal lines SGL may include scan lines SL, data lines DL, power lines PL, emission control lines ECL, and control signal lines CSL.

[0076] Each of the scan lines SL is connected to a corresponding one of the pixels PX. Each of the data lines DL is connected to a corresponding one of the pixels PX. The power line PL is connected to the pixel PX. Each of the light emission control lines ECL is connected to a corresponding one of the pixels PX. The control signal line CSL may provide a control signal to the scan drive circuit. Although the power line PL is described as a singular in the present embodiment, the power line PL may be plural in other embodiments.

[0077] The signal line SGL may overlap the display area DP-DA and the non-display area DP-NDA. The signal line SGL may include a pad unit and a line unit. The line unit may overlap the display area DP-DA and the non-display area DP-NDA. The pad unit may be disposed at one end of the line unit. The pad unit may be disposed in the non-display area DP-NDA and may overlap with a corresponding signal pad DP-PD in the signal pad DP-PD. In the non-display area DP-NDA, an area in which the signal pad DP-PD is disposed may be defined as a pad area DP-PA. A circuit board (not shown) may be connected to the pad area DP-PA.

[0078] Figure 4 is a schematic diagram of an equivalent circuit of a pixel PX according to an embodiment. Figure 4 A pixel PX connected to an i-th scan line SLi and an i-th emission control line ECLi is shown.

[0079] The pixel PX may include an organic light emitting diode OLED and a pixel circuit CC. The pixel circuit CC may include transistors T1 to T7 and a capacitor CP. The pixel circuit CC may control the amount of current flowing through the organic light emitting diode OLED according to a data signal.

[0080] The organic light emitting diode OLED may emit light of predetermined brightness according to the amount of current supplied from the pixel circuit CC. To this end, the level of the first power source ELVDD may be set to be higher than that of the second power source ELVSS.

[0081] Each of the transistors T1 to T7 may include an input electrode (or source electrode), an output electrode (or drain electrode), and a control electrode (or gate electrode).

[0082] The first electrode of the first transistor T1 may be connected to the power line PL via the fifth transistor T5. The power line PL may provide the first power ELVDD to the first electrode of the first transistor T1 via the fifth transistor T5. The second electrode of the first transistor T1 may be connected to the anode electrode of the organic light emitting diode OLED via the sixth transistor T6.

[0083] The first transistor T1 may control the amount of current flowing through the organic light emitting diode OLED according to a voltage applied to a control electrode of the first transistor T1 .

[0084] The second transistor T2 may be connected between the data line DL and the first electrode of the first transistor T1. The control electrode of the second transistor T2 may be connected to the i-th scan line SLi. When the i-th scan line SLi is provided with the i-th scan signal, the second transistor T2 may be turned on to electrically connect the data line DL and the first electrode of the first transistor T1.

[0085] The third transistor T3 may be connected between the second electrode of the first transistor T1 and the control electrode of the first transistor T1. The control electrode of the third transistor T3 may be connected to the i-th scan line SLi. When the i-th scan signal is provided to the i-th scan line SLi, the third transistor T3 may be turned on to electrically connect the second electrode of the first transistor T1 and the control electrode of the first transistor T1. Therefore, when the third transistor T3 is turned on, the first transistor T1 may be connected in the form of a diode.

[0086] The fourth transistor T4 may be connected between the node ND and the initialization power generation unit (not shown). The control electrode of the fourth transistor T4 may be connected to the i-1th scan line SLi-1. When the i-1th scan signal is provided to the i-1th scan line SLi-1, the fourth transistor T4 may be turned on to provide the initialization voltage Vint to the node ND.

[0087] The fifth transistor T5 may be connected between the power line PL and the first electrode of the first transistor T1. A control electrode of the fifth transistor T5 may be connected to the i-th light emission control line ECLi.

[0088] The sixth transistor T6 may be connected between the second electrode of the first transistor T1 and the anode electrode of the organic light emitting diode OLED. A control electrode of the sixth transistor T6 may be connected to the i-th emission control line ECLi.

[0089] The seventh transistor T7 may be connected between the initialization power generation unit (not shown) and the anode electrode of the organic light emitting diode OLED. The control electrode of the seventh transistor T7 may be connected to the i+1th scan line SLi+1. When the i+1th scan signal is provided to the i+1th scan line SLi+1, the seventh transistor T7 may be turned on to provide the initialization voltage Vint to the anode electrode of the organic light emitting diode OLED.

[0090] The seventh transistor T7 can improve the ability of black representation or display by the pixel PX. For example, when the seventh transistor T7 is turned on, the parasitic capacitor (not shown) of the organic light emitting diode OLED is discharged. Then, when black brightness is achieved or the pixel PX displays black, the organic light emitting diode OLED does not emit light due to the leakage current from the first transistor T1, and therefore, the ability of representing or displaying black can be improved.

[0091] in addition, Figure 4 It is shown that the control electrode of the seventh transistor T7 is connected to the i+1th scan line SLi+1, but the embodiment is not limited thereto. In other embodiments, the control electrode of the seventh transistor T7 may be connected to the i-th scan line SLi or the i-1th scan line SLi-1.

[0092] although Figure 4 A PMOS transistor is shown by way of example, but the embodiment is not limited thereto. In another embodiment, the pixel circuit CC may include an NMOS transistor. In another embodiment, the pixel circuit CC may be formed by a combination of an NMOS transistor and a PMOS transistor.

[0093] The capacitor CP may be provided between the power line PL and the node ND. The capacitor CP may store a voltage corresponding to the data signal. When the fifth transistor T5 and the sixth transistor T6 are turned on according to the voltage stored in the capacitor CP, the amount of current flowing through the first transistor T1 may be determined. In the present disclosure, the equivalent circuit of the pixel PX is not limited to Figure 4 The equivalent circuit shown in .

[0094] Figure 5 is a schematic cross-sectional view showing a part of the configuration of the display panel DP according to the embodiment.

[0095] Reference Figure 5 , the display panel DP may include a base layer BL, a circuit layer ML, a pixel defining film PDP, a light emitting element layer EL and an encapsulation layer TFE.

[0096] The base layer BL may include a synthetic resin film. The synthetic resin film may be formed on a working substrate for manufacturing the display panel DP. Therefore, a conductive layer, an insulating layer, etc. may be formed on the synthetic resin film. After removing the working substrate, the synthetic resin film may correspond to the base layer BL. The synthetic resin film may include a thermosetting resin. For example, the synthetic resin film may be a polyimide-based resin layer, but the material of the synthetic resin film is not limited thereto. The base layer BL may include an organic / inorganic composite material substrate, etc.

[0097] The circuit layer ML may include Figure 3 The driving circuit GDC, the signal line SGL and the signal pads DP-PD. Figure 5 Some components of the circuit layer ML are shown. The circuit layer ML may include a transistor TR and insulating layers BFL, L1, L2, L3 and L4.

[0098] The insulating layer BFL is disposed on the base layer BL, and the transistor TR may be disposed on the insulating layer BFL. Figure 5 The transistor TR can be Figure 4 The transistor TR may include a semiconductor layer ACL, a control electrode GED, a first electrode ED1, and a second electrode ED2.

[0099] The semiconductor layer ACL may be disposed on the insulating layer BFL. The insulating layer BFL may be a barrier layer for protecting the lower surface of the semiconductor layer ACL. The insulating layer BFL may block pollutants or moisture in the base layer BL from penetrating into the semiconductor layer ACL, or may block external pollutants or moisture from penetrating into the semiconductor layer ACL through the base layer BL. In an embodiment, the insulating layer BFL may be selectively disposed or omitted.

[0100] The semiconductor layer ACL includes a semiconductor material, which may be selected from amorphous silicon, polycrystalline silicon, metal oxide semiconductors, and combinations thereof.

[0101] The first insulating layer L1 may be disposed on the insulating layer BFL and may cover the semiconductor layer ACL. The first insulating layer L1 may include an organic material or an inorganic material.

[0102] The control electrode GED may be disposed on the first insulating layer L1. The second insulating layer L2 may be disposed on the first insulating layer L1 and may cover the control electrode GED. The second insulating layer L2 may include an inorganic material. In an embodiment, the second insulating layer L2 may be omitted.

[0103] The third insulating layer L3 may be disposed on the second insulating layer L2. The first electrode ED1 and the second electrode ED2 may be disposed on the third insulating layer L3. The first electrode ED1 and the second electrode ED2 may be connected to the semiconductor layer ACL through a through hole passing through the first insulating layer L1, the second insulating layer L2, and the third insulating layer L3.

[0104] The fourth insulating layer L4 may be disposed on the third insulating layer L3 and may cover the first electrode ED1 and the second electrode ED2. The fourth insulating layer L4 may be formed of a single layer or a plurality of layers. For example, a single layer may include an organic layer. The plurality of layers may be provided by stacking an organic layer and an inorganic layer. The fourth insulating layer L4 may be a planarization layer for providing a flat surface on an upper portion thereof.

[0105] The pixel defining film PDP and the light emitting element layer EL may be disposed on the fourth insulating layer L4.

[0106] The pixel defining film PDP may be disposed on the circuit layer ML. An opening OP may be defined in the pixel defining film PDP. A light emitting area PXA may be defined therein in the organic light emitting diode OLED (see Figure 4 ) in an area where light is generated. In an embodiment, the light emitting area PXA may be defined in an area corresponding to the opening OP. The opening OP may expose at least a portion of the first electrode E1. The display panel DP may include a non-light emitting area NPXA in which light is not generated. The non-light emitting area NPXA may be an area that does not serve as the light emitting area PXA.

[0107] The light emitting element layer EL may include a first electrode E1, a light emitting layer EM, and a second electrode E2. Figure 4 The described organic light emitting diode corresponds to OLED.

[0108] The first electrode E1 may be disposed on the fourth insulating layer L4 and may be electrically connected to the second electrode ED2 through a through hole defined in the fourth insulating layer L4. Figure 4 The described organic light emitting diode OLED corresponds to the anode electrode.

[0109] The light emitting layer EM may be disposed between the first electrode E1 and the second electrode E2. The light emitting layer EM may have a single layer structure having a single layer formed of a single material or a multilayer structure having a plurality of layers formed of different materials.

[0110] The light emitting layer EM may include an organic material. The organic material is not particularly limited as long as the organic material is a material in the related art. For example, the light emitting layer EM may be formed of at least one of materials emitting red, green, and blue, and may include a fluorescent material or a phosphorescent material.

[0111] The second electrode E2 may be disposed on the light emitting layer EM and the pixel defining film PDP. The second electrode E2 may receive a second power source ELVSS (see Figure 4 ).

[0112] The encapsulation layer TFE may be disposed on the second electrode E2. Although not shown, a cover layer for covering the second electrode E2 may be disposed between the encapsulation layer TFE and the second electrode E2. The encapsulation layer TFE may directly cover the cover layer.

[0113] The encapsulation layer TFE may include a first inorganic layer ECL1, an organic layer ECL2, and a second inorganic layer ECL3 stacked in sequence. The organic layer ECL2 may be disposed between the first inorganic layer ECL1 and the second inorganic layer ECL3. The first inorganic layer ECL1 and the second inorganic layer ECL3 may be formed by depositing an inorganic material, and the organic layer ECL2 may be formed by depositing, printing, or coating an organic material.

[0114] The first inorganic layer ECL1 and the second inorganic layer ECL3 may include at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide, and aluminum oxide. The organic layer ECL2 may include a polymer, for example, an acrylic resin. However, this is merely an example, and the embodiment is not limited thereto.

[0115] Figure 5 The encapsulation layer TFE including two inorganic layers and one organic layer is shown, but the embodiment is not limited thereto. For example, the encapsulation layer TFE may include three inorganic layers and two organic layers. For example, the encapsulation layer TFE may have a structure in which inorganic layers and organic layers are alternately stacked.

[0116] Figure 6 is a plan view showing a portion of a display panel DP and a portion of an optical layer OPL according to an embodiment, and Figure 7 It is along Figure 6 Schematic cross-sectional view taken along line II'.

[0117] Reference Figure 6 and Figure 7 , a plurality of light emitting regions PXA may be provided. The light emitting regions PXA may be arranged along a fourth direction DR4. The fourth direction DR4 may be a direction intersecting the first direction DR1 and the second direction DR2. The light emitting regions PXA may be arranged along a fifth direction DR5 intersecting the fourth direction DR4. Figure 6 Each of the light emitting regions PXA having the same area is shown. However, the embodiment is not limited thereto. Each of the light emitting regions PXA according to the embodiment may have a different area.

[0118] The optical layer OPL may be disposed on the display panel DP. The optical layer OPL may include a first insulating layer IL1, a second insulating layer IL2, a third insulating layer IL3, and a fourth insulating layer IL4.

[0119] The first insulating layer IL1 may be disposed on the display panel DP. The first insulating layer IL1 may include a first organic matter. The first organic matter may include an acrylic resin. However, this is merely an example. The first organic matter is not limited to the above example.

[0120] The first insulating layer IL1 may have a first opening OPa defined in a region overlapping the light emitting area PXA. The first insulating layer IL1 may have a mesh shape in a plan view. Figure 7 One first opening OPa and a light emitting region PXA corresponding to the first opening OPa among the light emitting regions PXA are shown.

[0121] The first insulating layer IL1 may have a first refractive index. The first refractive index may be in a range of about 1.45 to about 1.55. The first insulating layer IL1 may have a thickness TK1a in a range of about 1.5 μm to about 5 μm. The first insulating layer IL1 may include a first through-surface SW-IL1 defining a first opening OPa. A minimum angle θ1 between the first through-surface SW-IL1 and a surface on which the first insulating layer IL1 is disposed may be in a range of about 60° to about 80°. The surface on which the first insulating layer IL1 is disposed may be an upper surface of the display panel DP.

[0122] An absolute value of a difference DS1 between a width WT-OPa of the first opening OPa and a width WT-PXA of the light emitting region PXA may be about 3 μm or less.

[0123] The second insulating layer IL2 may cover the display panel DP and the first insulating layer IL1. The second insulating layer IL2 may include a second organic different from the first organic. The second organic may include zirconium oxide. However, this is merely an example. The second organic is not limited to the above example. The second insulating layer IL2 may have a second refractive index. The second refractive index may be greater than the first refractive index. The second refractive index may be in the range of about 1.65 to about 1.80. The second insulating layer IL2 may have a maximum thickness TK2a greater than the thickness TK1a of the first insulating layer IL1. The maximum thickness TK2a of the second insulating layer IL2 may be in the range of about 3 μm to about 20 μm. The second insulating layer IL2 may overlap with the first opening OPa in a plane. The second insulating layer IL2 may be filled in the first opening OPa. The second insulating layer IL2 may provide a flat surface on its upper portion.

[0124] The third insulating layer IL3 may be disposed on the second insulating layer IL2. The third insulating layer IL3 and the first insulating layer IL1 may include the same material. The third insulating layer IL3 may have a second opening OPb, which is defined in a region overlapping the light emitting region PXA. In an embodiment, the third insulating layer IL3 and the first insulating layer IL1 may have the same shape on a plane. For example, on a plane, the third insulating layer IL3 may have a grid shape. Figure 7 One second opening OPb and one of the light emitting areas PXA corresponding to the second opening OPb are shown. The second opening OPb may overlap the first opening OPa on a plane.

[0125] The third insulating layer IL3 may have a first refractive index. The third insulating layer IL3 may have a thickness TK1b in the range of about 1.5 μm to about 5 μm. The third insulating layer IL3 may include a second through-surface SW-IL3 defining a second opening OPb. A minimum angle θ2 between the second through-surface SW-IL3 and a surface on which the third insulating layer IL3 is disposed may be in the range of about 60° to about 80°. The surface on which the third insulating layer IL3 is disposed may be an upper surface of the second insulating layer IL2.

[0126] An absolute value of a difference between a width WT-OPb of the second opening OPb and a width WT-PXA of the light emitting region PXA may be about 3 μm or less. Figure 7 A case where a difference between the width WT-OPb of the second opening OPb and the width WT-PXA of the light emitting area PXA is about zero is shown.

[0127] The fourth insulating layer IL4 may cover the second insulating layer IL2 and the third insulating layer IL3. The fourth insulating layer IL4 may include a second organic substance. The fourth insulating layer IL4 may have a second refractive index. The fourth insulating layer IL4 may have a maximum thickness TK2b greater than the thickness TK1b of the third insulating layer IL3. The maximum thickness TK2b of the fourth insulating layer IL4 may be in the range of about 3 μm to about 20 μm. The fourth insulating layer IL4 may overlap each of the first opening OPa and the second opening OPb on a plane. The fourth insulating layer IL4 may be filled in the second opening OPb. The fourth insulating layer IL4 may provide a flat surface on its upper portion.

[0128] For ease of explanation, Figure 7A first light LT1 and a separate second light LT2 according to a path of light generated in the light emitting layer EM are shown. The first light LT1 and the second light LT2 may be emitted in a lateral direction. The first light LT1 may be provided from the light emitting layer EM to the third insulating layer IL3. Due to the difference in refractive index between the third insulating layer IL3 and the fourth insulating layer IL4 and the minimum angle θ2 between the second through-surface SW-IL3 and the surface on which the third insulating layer IL3 is disposed, the first light LT1 may be refracted or reflected in the third direction DR3 from the second through-surface SW-IL3. When the minimum angle θ2 between the second through-surface SW-IL3 and the surface on which the third insulating layer IL3 is disposed is less than about 60° or greater than about 80°, the first light LT1 may not be refracted or reflected in the third direction DR3. However, this is merely an example. In an embodiment, the first light LT1 may be provided from the light emitting layer EM to the first insulating layer IL1. Due to the refractive index difference between the first insulating layer IL1 and the second insulating layer IL2 and the minimum angle θ1 between the first through-surface SW-IL1 and the surface on which the first insulating layer IL1 is disposed, the first light LT1 may be refracted or reflected from the first through-surface SW-IL1 in the third direction DR3. When the minimum angle θ1 between the first through-surface SW-IL1 and the surface on which the first insulating layer IL1 is disposed is less than about 60° or greater than about 80°, the first light LT1 may not be refracted or reflected in the third direction DR3. The second light LT2 may be light having an incident path toward the lower surface of the third insulating layer IL3. Due to the refractive index difference between the second insulating layer IL2 and the third insulating layer IL3, the second light LT2 may be reflected from the lower surface of the third insulating layer IL3. Therefore, the second light LT2 may not be visible from the outside.

[0129] According to the present disclosure, due to the refractive index difference between the first insulating layer IL1 and the second insulating layer IL2, the refractive index difference between the second insulating layer IL2 and the third insulating layer IL3, and the refractive index difference between the third insulating layer IL3 and the fourth insulating layer IL4, the display device DD (see Figure 1 ) can be refracted or reflected so that the light path can be changed. For example, the light path can be changed in the third direction DR3 or in a direction close to the third direction DR3 or in a direction in which the light is not visible. Due to the changed light path, the display device DD (see Figure 1 ) and can improve the straightness of light in the front direction. Therefore, the present disclosure can provide a display device DD with improved light efficiency (see Figure 1 ).

[0130] Figure 8 is along with Figure 6 A schematic cross-sectional view of a region corresponding to the region intercepted by line II'. Figure 6 and Figure 7 The described elements are given the same reference numerals, and description thereof is omitted.

[0131] Reference Figure 8 The optical layer OPL-1 may be disposed on the display panel DP. The optical layer OPL-1 may include a buffer layer BFL-1, an interlayer insulating layer IL-C, a first insulating layer IL1, a second insulating layer IL2, a third insulating layer IL3, a fourth insulating layer IL4, a fifth insulating layer IL5, and a sixth insulating layer IL6.

[0132] The buffer layer BFL-1 may be disposed on the encapsulation layer TFE. The buffer layer BFL-1 may include an inorganic substance. For example, the inorganic substance may be silicon nitride. However, this is merely an example. In an embodiment, the buffer layer BFL-1 may be omitted.

[0133] The interlayer insulating layer IL-C may be disposed on the buffer layer BFL-1. The interlayer insulating layer IL-C may include an inorganic substance. For example, the inorganic substance may be silicon nitride. However, this is only an example. In an embodiment, the interlayer insulating layer IL-C may be omitted.

[0134] The fifth insulating layer IL5 may be disposed on the fourth insulating layer IL4. The fifth insulating layer IL5 and the first insulating layer IL1 may include the same material. The fifth insulating layer IL5 may have a third opening OPc defined in a region overlapping the light emitting region PXA. The fifth insulating layer IL5 may have a mesh shape in a plan view. Figure 8 One third opening OPc and one of the light emitting areas PXA corresponding to the third opening OPc are shown.

[0135] The fifth insulating layer IL5 may have a refractive index in the range of about 1.45 to about 1.55. The fifth insulating layer IL5 may have a thickness TK1c in the range of about 1.5 μm to about 5 μm. The fifth insulating layer IL5 may include a third through-surface SW-IL5 defining a third opening OPc. A minimum angle θ3 between the third through-surface SW-IL5 and a surface on which the fifth insulating layer IL5 is disposed may be in the range of about 60° to about 80°. The surface on which the fifth insulating layer IL5 may be disposed may be an upper surface of the fourth insulating layer IL4.

[0136] An absolute value of a difference between a width WT-OPc of the third opening OPc and a width WT-PXA of the light emitting region PXA may be about 3 μm or less. Figure 8 A case in which a difference between the width WT-OPc of the third opening OPc and the width WT-PXA of the light emitting area PXA is about zero is shown.

[0137] The sixth insulating layer IL6 may cover the fourth insulating layer IL4 and the fifth insulating layer IL5. The sixth insulating layer IL6 may have a refractive index greater than that of the fifth insulating layer IL5. The sixth insulating layer IL6 may have a refractive index in the range of about 1.65 to about 1.80. The sixth insulating layer IL6 may have a maximum thickness TK2c greater than the thickness TK1c of the fifth insulating layer IL5. The maximum thickness TK2c of the sixth insulating layer IL6 may be in the range of about 3 μm to about 20 μm. The sixth insulating layer IL6 may overlap each of the first opening OPa, the second opening OPb, and the third opening OPc on a plane. The sixth insulating layer IL6 may be filled in the third opening OPc. The sixth insulating layer IL6 may provide a flat surface on its upper portion.

[0138] For ease of explanation, Figure 8 A first light LT1-1 and a separate second light LT2-1 according to a path of light generated in the light emitting layer EM are shown. The first light LT1-1 and the second light LT2-1 may be emitted in a lateral direction. The first light LT1-1 may be provided from the light emitting layer EM to the fifth insulating layer IL5. Due to the difference in refractive index between the fifth insulating layer IL5 and the sixth insulating layer IL6 and the minimum angle θ3 between the third through-surface SW-IL5 and the surface on which the fifth insulating layer IL5 is disposed, the first light LT1-1 may be refracted or reflected in a third direction DR3 from the third through-surface SW-IL5. When the minimum angle θ3 between the third through-surface SW-IL5 and the surface on which the fifth insulating layer IL5 is disposed is less than about 60° or greater than about 80°, the first light LT1-1 may not be refracted or reflected in the third direction DR3.

[0139] The second light LT2-1 may be light having an incident path toward the lower surface of the fifth insulating layer IL5. Due to the refractive index difference between the fourth insulating layer IL4 and the fifth insulating layer IL5, the second light LT2-1 may be reflected from the lower surface of the fifth insulating layer IL5. Therefore, the second light LT2-1 may not be visible from the outside.

[0140] In other embodiments, due to the difference in refractive index between the fourth insulating layer IL4 and the fifth insulating layer IL5 and the difference in refractive index between the fifth insulating layer IL5 and the sixth insulating layer IL6, the display device DD (see Figure 1) may be refracted or reflected so that the optical path may be changed. The fifth insulating layer IL5 and the sixth insulating layer IL6 may refract or reflect the light from the fifth insulating layer IL5 so that the light that is not refracted or reflected from the first insulating layer IL1 and the third insulating layer IL3 may be refracted or reflected from the fifth insulating layer IL5. For example, the optical path may be changed in the third direction DR3 or in a direction close to the third direction DR3 or in a direction in which the light is not visible. Due to the changed optical path, the display device DD (see Figure 1 ) and can improve the straightness of light in the front direction. Therefore, the display device DD (see Figure 1 ) in the light efficiency.

[0141] Fig. 9 is a plan view showing a portion of the display panel DP and a portion of the optical layer OPL-2 according to the embodiment, and Fig.10 It is along Fig. 9 A schematic cross-sectional view taken along line II-II'. Figures 6 to 8 The described elements are given the same reference numerals, and description thereof is omitted.

[0142] Reference Fig. 9 and Fig.10 , the optical layer OPL-2 may be disposed on the display panel DP. The optical layer OPL-2 may include a buffer layer BFL-1, an interlayer insulating layer IL-C, a first insulating layer IL1, a second insulating layer IL2, a third insulating layer IL3-1, a fourth insulating layer IL4-1, a fifth insulating layer IL5-1, and a sixth insulating layer IL6-1.

[0143] The third insulating layer IL3-1 may be disposed on the second insulating layer IL2. The third insulating layer IL3-1 and the first insulating layer IL1 may be formed of the same material. The third insulating layer IL3-1 may have second openings OPd spaced apart in the fourth direction DR4 and extending in a fifth direction DR5 intersecting the fourth direction DR4 on a plane. The third insulating layer IL3-1 may have a stripe shape on a plan view. Fig.10 A second opening OPd is shown.

[0144] The third insulating layer IL3-1 may have a refractive index in the range of about 1.45 to about 1.55. The third insulating layer IL3-1 may have a thickness TK1b-1 in the range of about 1.5 μm to about 5 μm. The third insulating layer IL3-1 may include a second through-surface SW-IL31 defining a second opening OPd. A minimum angle θ21 between the second through-surface SW-IL31 and a surface on which the third insulating layer IL3-1 is disposed may be in the range of about 60° to about 80°. The surface on which the third insulating layer IL3-1 is disposed may be an upper surface of the second insulating layer IL2.

[0145] The fourth insulating layer IL4-1 may cover the second insulating layer IL2 and the third insulating layer IL3-1. The fourth insulating layer IL4-1 and the second insulating layer IL2 may be formed of the same material. The fourth insulating layer IL4-1 may have a refractive index greater than that of the third insulating layer IL3-1. The fourth insulating layer IL4-1 may have a refractive index in the range of about 1.65 to about 1.80. The fourth insulating layer IL4-1 may have a maximum thickness TK2b-1 greater than the thickness TK1b-1 of the third insulating layer IL3-1. The maximum thickness TK2b-1 of the fourth insulating layer IL4-1 may be in the range of about 3 μm to about 20 μm. The fourth insulating layer IL4-1 may overlap each of the first opening OPa and the second opening OPd on a plane. The fourth insulating layer IL4-1 may be filled in the second opening OPd. The fourth insulating layer IL4-1 may provide a flat surface on its upper portion.

[0146] For ease of explanation, Fig.10The first light LT1-2 and the separate second light LT2-2 according to the path of the light generated in the light emitting layer EM are shown. The first light LT1-2 and the second light LT2-2 may be emitted in the lateral direction. The first light LT1-2 may be provided from the light emitting layer EM to the first insulating layer IL1. Due to the difference in refractive index between the first insulating layer IL1 and the second insulating layer IL2 and the minimum angle θ1 between the first through-surface SW-IL1 and the surface on which the first insulating layer IL1 is disposed, the first light LT1-2 may be refracted or reflected in the third direction DR3 from the first through-surface SW-IL1. When the minimum angle θ1 between the first through-surface SW-IL1 and the surface on which the first insulating layer IL1 is disposed is less than about 60° or greater than about 80°, the first light LT1-2 may not be refracted or reflected in the third direction DR3. However, this is merely an example. In an embodiment, the first light LT1-2 may be provided from the light emitting layer EM to the third insulating layer IL3-1. Due to the refractive index difference between the third insulating layer IL3-1 and the fourth insulating layer IL4-1 and the minimum angle θ21 between the second through-surface SW-IL31 and the surface on which the third insulating layer IL3-1 is disposed, the first light LT1-2 may be refracted or reflected in the third direction DR3 from the second through-surface SW-IL31. When the minimum angle θ21 between the second through-surface SW-IL31 and the surface on which the third insulating layer IL3-1 is disposed is less than about 60° or greater than about 80°, the first light LT1-2 may not be refracted or reflected in the third direction DR3.

[0147] The second light LT2-2 may be light having an incident path toward the lower surface of the third insulating layer IL3-1. Due to the difference in refractive index between the second insulating layer IL2 and the third insulating layer IL3-1, the second light LT2-2 may be reflected from the lower surface of the third insulating layer IL3-1. Therefore, the second light LT2-2 may not be visible from the outside.

[0148] Fig.11 It is along Fig. 9 A schematic cross-sectional view taken along line III-III'. Figures 6 to 8 The described elements are given the same reference numerals, and description thereof is omitted.

[0149] Reference Figures 9 to 11 , the fifth insulating layer IL5-1 may be disposed on the fourth insulating layer IL4-1. The fifth insulating layer IL5-1 and the first insulating layer IL1 may be formed of the same material. The fifth insulating layer IL5-1 may have third openings OPe spaced apart in the fifth direction DR5 and extending in the fourth direction DR4 on a plane. The fifth insulating layer IL5-1 may have a stripe shape in a plan view. Fig.11 A third opening OPe is shown.

[0150] The fifth insulating layer IL5-1 may have a refractive index in the range of about 1.45 to about 1.55. The fifth insulating layer IL5-1 may have a thickness TK1c-1 in the range of about 1.5 μm to about 5 μm. The fifth insulating layer IL5-1 may include a third through-surface SW-IL51 defining a third opening OPe. A minimum angle θ31 between the third through-surface SW-IL51 and a surface on which the fifth insulating layer IL5-1 is disposed may be in the range of about 60° to about 80°. The surface on which the fifth insulating layer IL5-1 is disposed may be an upper surface of the fourth insulating layer IL4-1.

[0151] The sixth insulating layer IL6-1 may cover the fourth insulating layer IL4-1 and the fifth insulating layer IL5-1. The sixth insulating layer IL6-1 and the second insulating layer IL2 may be formed of the same material. The sixth insulating layer IL6-1 may have a refractive index greater than that of the fifth insulating layer IL5-1. The sixth insulating layer IL6-1 may have a refractive index in the range of about 1.65 to about 1.80. The sixth insulating layer IL6-1 may have a maximum thickness TK2c-1 greater than the thickness TK1c-1 of the fifth insulating layer IL5-1. The maximum thickness TK2c-1 of the sixth insulating layer IL6-1 may be in the range of about 3 μm to about 20 μm. The sixth insulating layer IL6-1 may overlap each of the first opening OPa and the third opening OPe on a plane. The sixth insulating layer IL6-1 may be filled in the third opening OPe. The sixth insulating layer IL6-1 may provide a flat surface on its upper portion.

[0152] For ease of explanation, Fig.11The first light LT1-3 and the separate second light LT2-3 according to the path of the light generated in the light emitting layer EM are shown. The first light LT1-3 and the second light LT2-3 may be emitted in the lateral direction. The first light LT1-3 may be provided from the light emitting layer EM to the first insulating layer IL1. Due to the difference in refractive index between the first insulating layer IL1 and the second insulating layer IL2 and the minimum angle θ1 between the first through-surface SW-IL1 and the surface on which the first insulating layer IL1 is disposed, the first light LT1-3 may be refracted or reflected in the third direction DR3 from the first through-surface SW-IL1. When the minimum angle θ1 between the first through-surface SW-IL1 and the surface on which the first insulating layer IL1 is disposed is less than about 60° or greater than about 80°, the first light LT1-3 may not be refracted or reflected in the third direction DR3. However, this is merely an example. In an embodiment, the first light LT1-3 may be provided from the light emitting layer EM to the fifth insulating layer IL5-1. At this time, due to the refractive index difference between the fifth insulating layer IL5-1 and the sixth insulating layer IL6-1 and the minimum angle θ31 between the third through-surface SW-IL51 and the surface on which the first insulating layer IL5-1 is disposed, the first light LT1-3 may be refracted or reflected in the third direction DR3 from the third through-surface SW-IL51. When the minimum angle θ31 between the third through-surface SW-IL51 and the surface on which the fifth insulating layer IL5-1 is disposed is less than about 60° or greater than about 80°, the first light LT1-3 may not be refracted or reflected in the third direction DR3.

[0153] The second light LT2-3 may be light having an incident path toward the lower surface of the fifth insulating layer IL5-1. Due to the difference in refractive index between the fourth insulating layer IL4-1 and the fifth insulating layer IL5-1, the second light LT2-3 may be reflected from the lower surface of the fifth insulating layer IL5-1. Therefore, the second light LT2-3 may not be visible from the outside.

[0154] Due to the difference in refractive index between the first to sixth insulating layers IL1 to IL6, the display device DD (see Figure 1 ) can be refracted or reflected so that the light path can be changed. For example, the light path can be changed in the third direction DR3 or in a direction close to the third direction DR3 or in a direction in which the light is not visible. Due to the changed light path, the display device DD (see Figure 1 ) and can improve the straightness of light in the front direction. Figure 1 ) can have improved light efficiency.

[0155] Fig.12 is along with Figure 6A schematic cross-sectional view of a region corresponding to the region intercepted by line II'. Figure 6 and Figure 7 The described elements are given the same reference numerals, and description thereof is omitted.

[0156] Reference Fig.12 , the optical layer OPL-3 may be disposed on the display panel DP. The optical layer OPL-3 may include a first insulating layer IL1-2, a second insulating layer IL2-2, a third insulating layer IL3-2, and a fourth insulating layer IL4-2.

[0157] The first insulating layer IL1-2 may be disposed on the display panel DP. The first insulating layer IL1-2 may include a first organic substance. In an embodiment, the first organic substance may include a porous acrylic resin. However, this is merely an example. The first organic substance is not limited to the above example. The first insulating layer IL1-2 may have a first opening OPa-2, which is defined in an area overlapping the non-luminous area NPXA.

[0158] The first insulating layer IL1-2 may have a first refractive index. For example, the first refractive index may be in a range of about 1.45 to about 1.55. The first insulating layer IL1-2 may have a thickness in a range of about 1.5 μm to about 5 μm. The first insulating layer IL1-2 may include a first through surface SW-IL12 defining a first opening OPa-2. The maximum angle θ4 between the first through surface SW-IL12 and the surface on which the first insulating layer IL1-2 is disposed may be in a range of about 90° to about 120°. The surface on which the first insulating layer IL1-2 is disposed may be the upper surface of the display panel DP.

[0159] The second insulating layer IL2-2 may cover the display panel DP and the first insulating layer IL1-2. The second insulating layer IL2-2 may include a second organic different from the first organic. The second organic may include porous zirconia. However, this is merely an example. The second organic is not limited to the above example. The second insulating layer IL2-2 may have a second refractive index. The second refractive index may be less than the first refractive index. For example, the second refractive index may be in the range of about 1.1 to about 1.3. The second insulating layer IL2-2 may have a maximum thickness TK2a-2 greater than the thickness TK1a-2 of the first insulating layer IL1-2. The maximum thickness TK2a-2 of the second insulating layer IL2-2 may be in the range of about 3 μm to about 20 μm. The second insulating layer IL2-2 may overlap with the first opening OPa-2 on a plane. The second insulating layer IL2-2 may be filled in the first opening OPa-2. The second insulating layer IL2-2 may provide a flat surface on its upper portion.

[0160] The third insulating layer IL3-2 may be disposed on the second insulating layer IL2-2. The third insulating layer IL3-2 and the first insulating layer IL1-2 may include the same material. The third insulating layer IL3-2 may have a second opening OPb-2 defined in a region overlapping the non-light emitting area NPXA.

[0161] The third insulating layer IL3-2 may have a first refractive index. The third insulating layer IL3-2 may have a thickness TK1b-2 in the range of about 1.5 μm to about 5 μm. The third insulating layer IL3-2 may include a second through-surface SW-IL32 defining a second opening OPb-2. A maximum angle θ5 between the second through-surface SW-IL32 and the surface on which the third insulating layer IL3-2 is disposed may be in the range of about 90° to about 120°. The surface on which the third insulating layer IL3-2 is disposed may be an upper surface of the second insulating layer IL2-2.

[0162] The fourth insulating layer IL4-2 may cover the second insulating layer IL2-2 and the third insulating layer IL3-2. The fourth insulating layer IL4-2 and the second insulating layer IL2-2 may include the same material. The fourth insulating layer IL4-2 may have a second refractive index. The fourth insulating layer IL4-2 may have a maximum thickness TK2b-2 greater than the thickness TK1b-2 of the third insulating layer IL3-2. The maximum thickness TK2b-2 of the fourth insulating layer IL4-2 may be in the range of about 3 μm to about 20 μm. The fourth insulating layer IL4-2 may overlap each of the first opening OPa-2 and the second opening OPb-2 on a plane. The fourth insulating layer IL4-2 may be filled in the second opening OPb-2. The fourth insulating layer IL4-2 may provide a flat surface on its upper portion.

[0163] For ease of explanation, Fig.12The first light LT1-4 according to the path of the light generated in the light emitting layer EM is shown. The first light LT1-4 may be emitted in a lateral direction. The first light LT1-4 may be provided from the light emitting layer EM to the first insulating layer IL1-2. Due to the difference in refractive index between the first insulating layer IL1-2 and the second insulating layer IL2-2 and the minimum angle θ4 between the first through-surface SW-IL12 and the surface on which the first insulating layer IL1-2 may be disposed, the first light LT1-4 may be refracted or reflected in the third direction DR3 from the first through-surface SW-IL12. When the maximum angle θ4 between the first through-surface SW-IL12 and the surface on which the first insulating layer IL1-2 is disposed is less than about 90° or greater than about 120°, the first light LT1-4 may not be refracted or reflected in the third direction DR3. However, this is merely an example. In an embodiment, the first light LT1-4 may be provided from the light emitting layer EM to the third insulating layer IL3-2. At this time, due to the refractive index difference between the third insulating layer IL3-2 and the fourth insulating layer IL4-2 and the maximum angle θ5 between the second through-surface SW-IL32 and the surface on which the third insulating layer IL3-2 is disposed, the first light LT1-4 may be refracted or reflected in the third direction DR3 from the second through-surface SW-IL32. When the maximum angle θ5 between the second through-surface SW-IL32 and the surface on which the third insulating layer IL3-2 is disposed is less than about 90° or greater than about 120°, the first light LT1-4 may not be refracted or reflected in the third direction DR3.

[0164] Due to the difference in refractive index between the first insulating layer IL1-2 and the second insulating layer IL2-2 and the difference in refractive index between the third insulating layer IL3-2 and the fourth insulating layer IL4-2, the display device DD (see Figure 1 ) can be refracted or reflected so that the optical path can be changed. For example, the optical path can be changed in the third direction DR3 or in a direction close to the third direction DR3. Due to the changed optical path, the display device DD (see Figure 1 ) and can improve the straightness of light in the front direction. Figure 1 ) can have improved light efficiency.

[0165] Fig.13 1 is a plan view of an input sensing layer ISL according to an embodiment. The input sensing layer ISL to be described hereinafter may be similarly applied to an input sensing panel ISP (see Figure 2C ).

[0166] Reference Fig.13 , the input sensing layer ISL may include Figure 3The display area DP-DA of the display panel DP shown in FIG. 1 corresponds to the sensing area IS-DA and the sensing area IS-DA corresponding to the display area DP-DA of the display panel DP shown in FIG. Figure 3 The non-display area DP-NDA of the display panel DP shown in FIG.

[0167] The input sensing layer ISL may include: a first sensing electrode EG1; a second sensing electrode EG2; a first signal line group SG1 electrically connected to each corresponding electrode or some corresponding electrodes in the first sensing electrode EG1; a second signal line group SG2 electrically connected to each other electrode in the first sensing electrode EG1; and a third signal line group SG3 electrically connected to the second sensing electrode EG2.

[0168] Fig.13 The first signal line group SG1 and the second signal line group SG2 are shown, and the first signal line group SG1 and the second signal line group SG2 are arranged so that the sensing area IS-DA is interposed therebetween. However, in an embodiment, the first signal line group SG1 and the second signal line group SG2 may be arranged on the same side of the sensing area IS-DA. In other embodiments, each of the first signal line group SG1 and the second signal line group SG2 may be connected to the first sensing electrode EG1 in a dual routing structure.

[0169] The first sensing electrode EG1 and the second sensing electrode EG2 may be disposed in the sensing area IS-DA. The first signal line group SG1, the second signal line group SG2, and the third signal line group SG3 may be disposed in the line area IS-NDA.

[0170] In an embodiment, the input sensing layer ISL may be a capacitive touch sensor that senses external input in a mutual capacitance mode. Any one of the first sensing electrode EG1 and the second sensing electrode EG2 may receive a detection signal, and the other of the first sensing electrode EG1 and the second sensing electrode EG2 may output a change in capacitance between the first sensing electrode EG1 and the second sensing electrode EG2 as an output signal.

[0171] Each of the first sensing electrodes EG1 may extend along the second direction DR2. The first sensing electrodes EG1 may be disposed to be spaced apart in the first direction DR1. Each of the second sensing electrodes EG2 may extend along the first direction DR1. The second sensing electrodes EG2 may be disposed to be spaced apart in the second direction DR2.

[0172] The first sensing electrode EG1 may include first sensor cells SP1 and first connection units CP1. The first sensor cells SP1 may be arranged along the second direction DR2. Each of the first connection units CP1 may connect two adjacent first sensor cells SP1 among the first sensor cells SP1.

[0173] The second sensing electrode EG2 may include second sensor cells SP2 and second connection units CP2. The second sensor cells SP2 may be arranged along the first direction DR1. Each of the second connection units CP2 may connect two adjacent second sensor cells SP2 among the second sensor cells SP2.

[0174] The first signal line group SG1, the second signal line group SG2, and the third signal line group SG3 may be electrically connected to the corresponding signal pads IS-PD. In the line area IS-NDA, the area in which the signal pads IS-PD are disposed may be defined as a pad area IS-PA. A circuit board (not shown) may be connected to the pad area IS-PA.

[0175] Fig.14 It is shown that Fig.13 Corresponding plan view of an enlarged view of area AA. Fig.14 The layout relationship of the first light emitting region PXA-R, the second light emitting region PXA-B, and the third light emitting region PXA-G is shown. The first light emitting region PXA-R, the second light emitting region PXA-B, and the third light emitting region PXA-G may be defined as Figure 5 The described light emitting areas PXA are the same.

[0176] Reference Fig.14 In an embodiment, the first light emitting region PXA-R, the second light emitting region PXA-B, and the third light emitting region PXA-G may have different areas. The first light emitting region PXA-R may have a first area, the second light emitting region PXA-B may have a second area, and the third light emitting region PXA-G may have a third area. The second area may be greater than the first area, and the first area may be greater than the third area.

[0177] Reference Figure 3 The described pixel PX may include a red pixel for generating red light, a blue pixel for generating blue light, and a green pixel for generating green light. In an embodiment, the first light emitting region PXA-R may correspond to a red pixel, the second light emitting region PXA-B may correspond to a blue pixel, and the third light emitting region PXA-G may correspond to a green pixel.

[0178] The first light emitting region PXA-R and the second light emitting region PXA-B may be alternately arranged along the second direction DR2. In an embodiment, a plurality of third light emitting regions PXA-G may be provided, and the plurality of third light emitting regions PXA-G may be arranged along the first direction DR1 and the second direction DR2. The first light emitting region PXA-R and the third light emitting region PXA-G may be alternately arranged along the fourth direction DR4. The second light emitting region PXA-B and the third light emitting region PXA-G may be alternately arranged along the fourth direction DR4.

[0179] Fig.14 The first light emitting region PXA-R, the second light emitting region PXA-B, and the third light emitting region PXA-G arranged in a pentile form are shown as an example. However, the embodiment is not limited thereto. For example, the first light emitting region PXA-R, the second light emitting region PXA-B, and the third light emitting region PXA-G may be arranged in a stripe form. The stripe form may mean that the first light emitting region PXA-R, the second light emitting region PXA-B, and the third light emitting region PXA-G are alternately arranged along the second direction DR2, and the same light emitting region is arranged in the first direction DR1.

[0180] The first sensor unit SP1 and the second sensor unit SP2 (see Fig.13 ) may have a mesh shape. The first sensor unit SP1 and the second sensor unit SP2 may each have openings OP-MR, OP-MG, and OP-MB. Therefore, on a plane or in a plan view, the first sensor unit SP1 and the second sensor unit SP2 (see Fig.13 ) may not overlap with the first light emitting region PXA-R, the second light emitting region PXA-B, and the third light emitting region PXA-G. For example, the region corresponding to the first light emitting region PXA-R may have a first opening OP-MR, the region corresponding to the second light emitting region PXA-B may have a second opening OP-MB, and the region corresponding to the third light emitting region PXA-G may have a third opening OP-MG.

[0181] Fig.15 It is along Fig.14 A schematic cross-sectional view of the region cut along line IV-IV'. Figure 7 The described elements are given the same reference numerals, and description thereof is omitted.

[0182] Reference Fig.15 The input sensing layer ISL may be disposed between the display panel DP and the optical layer OPL-3. The input sensing layer ISL may include a buffer layer BFL-2, an interlayer insulating layer IL-C1, and a first sensor unit SP1.

[0183] The buffer layer BFL-2 may be disposed on the encapsulation layer TFE. The buffer layer BFL-2 may include an inorganic substance. For example, the inorganic substance may be silicon nitride. The first connection unit CP1 may be disposed on the buffer layer BFL-2. In an embodiment, the buffer layer BFL-2 may be omitted.

[0184] The interlayer insulating layer IL-C1 may be disposed on the buffer layer BFL-2. The interlayer insulating layer IL-C1 may include an inorganic substance. For example, the inorganic substance may be silicon nitride.

[0185] The first sensor unit SP1, the second sensor unit SP2 (see Fig.13 ) and the second connection unit CP2 (see Fig.13 ) may be disposed on the interlayer insulating layer IL-C1. Fig.15 It is shown that the first sensor unit SP1 is disposed on the interlayer insulating layer IL-C1.

[0186] The first insulating layer IL1 may be disposed on the interlayer insulating layer IL-C1. The first insulating layer IL1 may cover the first sensor unit SP1. The first insulating layer IL1 may have a first opening OPa-R defined in a region overlapping the first light emitting region PXA-R. Fig.14 , showing a second opening OPa-B defined in an area overlapping with the second light emitting region PXA-B and a third opening OPa-G defined in an area overlapping with the third light emitting region PXA-G. The first area of ​​the first opening OPa-R, the second area of ​​the second opening OPa-B, and the third area of ​​the third opening OPa-G may be different from each other on a plane or in a plan view. The second area may be larger than the first area, and the first area may be larger than the third area.

[0187] According to the present disclosure, a display device may include: a first insulating layer having a first opening and having a first refractive index; a second insulating layer covering the first insulating layer and having a second refractive index greater than the first refractive index; a third insulating layer disposed on the second insulating layer, having a second opening and having a first refractive index; and a fourth insulating layer covering the third insulating layer and having a second refractive index. Due to the difference in refractive index, light emitted from the light-emitting layer of the display device may be refracted or reflected at the boundary of each of the first to fourth insulating layers, so that the light path may be changed. For example, the light path may be changed in a third direction or in a direction close to the third direction. Due to the changed light path, the light-emitting efficiency of the display device may be improved, and the straightness of the light in the front direction may be improved. Therefore, the display device may have improved light efficiency.

[0188] Although the present disclosure has been described with reference to the embodiments, it will be appreciated by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the present disclosure. Therefore, the technical scope of the present disclosure is not intended to be limited to the contents set forth in the detailed description of the specification, but is intended to be limited by the present disclosure.

Claims

1. A display device, in, The display device comprises: A display panel comprising a plurality of light-emitting areas and a non-light-emitting area adjacent to the plurality of light-emitting areas; a first insulating layer disposed on the display panel, the first insulating layer having a first refractive index and having a plurality of first openings, wherein the plurality of first openings are defined in a region overlapping the plurality of light emitting regions; a second insulating layer covering the display panel and the first insulating layer and having a second refractive index greater than the first refractive index of the first insulating layer; a third insulating layer disposed on the second insulating layer, the third insulating layer having the first refractive index and having a plurality of second openings, the plurality of second openings being defined in a region overlapping the plurality of light emitting regions; and The fourth insulating layer covers the second insulating layer and the third insulating layer and has the second refractive index.

2. The display device according to claim 1, in, Each of the second insulating layer and the fourth insulating layer overlaps the plurality of first openings in a plane.

3. The display device according to claim 1, in, The first refractive index is in the range of 1.45 to 1.55, and the second refractive index is in the range of 1.65 to 1.

80.

4. The display device according to claim 1, in, The first insulating layer and the third insulating layer include a first organic substance, and The second insulating layer and the fourth insulating layer include a second organic substance different from the first organic substance.

5. The display device according to claim 4, in, The first organic substance includes acrylic resin.

6. The display device according to claim 4, in, The second organic substance includes zirconium oxide.

7. The display device according to claim 1, in, The thickness of the first insulating layer is in the range of 1.5 μm to 5 μm, and the maximum thickness of the second insulating layer is in the range of 3 μm to 20 μm.

8. The display device according to claim 1, in, The first insulating layer includes a first through-surface defining each of the plurality of first openings, and An angle between the first through surface and a surface on which the first insulating layer is disposed is in a range of 60° to 80°.

9. The display device according to claim 8, in, An absolute value of a difference between a width of each of the plurality of first openings and a width of each of the plurality of light emitting regions is 3 μm or less.

10. The display device according to claim 1, in, The display device further includes an input sensing layer between the display panel and the first insulating layer.

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