Dynamic common mode control

Abstract

Embodiments of this disclosure generally relate to dynamic common-mode control. An apparatus, such as an electronic circuit, includes an input operable to receive an input signal; a dynamic common-mode regulator operable to: i) derive a differential signal from the received input signal, and ii) control an offset of the differential signal based on the received input signal to generate an offset differential signal; and an output operable to output the offset differential signal. In one arrangement, the offset differential signal output from the output includes a first signal and a second signal; the difference between the second signal and the first signal varies proportionally to the received input signal.

Description

BACKGROUND

[0001] Conventional differential DACs (digital-to-analog converters) generally have a fixed common mode DC voltage setting at their respective outputs. For example, a conventional differential digital-to-analog converter device can be configured to receive an input signal. The digital-to-analog converter produces an output voltage whose amplitude varies according to the input signal.

[0002] Generally, the common mode setting of a conventional digital-to-analog converter is selected to be an appropriate fixed common mode DC value to optimize its full-scale output signal swing. Since the common mode setting of a conventional digital-to-analog converter is constant or fixed, it generally does not provide peak performance at low level signals (i.e., signals of relatively low amplitude). SUMMARY

[0003] The present disclosure includes the observation that the operation of electronic circuitry, such as digital-to-analog converters and / or corresponding circuitry, is generally more efficient when the output voltage is set to an appropriate common mode voltage. In certain instances, this means that the common mode voltage can be expected to vary according to the amplitude of the output voltage being generated.

[0004] Embodiments herein include providing novel ways to improve circuit performance associated with digital-to-analog converters and / or related circuitry. For example, one embodiment herein includes dynamically controlling the common mode setting of a differential signal at least in part according to the amplitude of an input signal from which an output signal is derived. Providing signal dependent common mode control as described herein improves system performance of parameters such as noise, distortion, and power consumption associated with corresponding electronic circuitry.

[0005] More particularly, in one embodiment, an apparatus (such as an electronic circuit) that provides improved system performance includes: an input operable to receive an input signal; a dynamic common mode adjuster operable to: i) derive a differential signal from the received input signal, and ii) vary an offset of the differential signal according to an amplitude or level of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. As previously discussed, controlling the offset (such as the common mode setting) associated with the differential signal provides improved system performance of parameters such as noise, distortion, and power consumption for corresponding electronic circuitry.

[0006] Generally, the dynamic common mode adjuster described herein is exemplified as electronic circuitry associated with digital-to-analog converters, amplifiers, and the like. However, the dynamic common mode adjuster can be implemented in any suitable manner according to embodiments.

[0007] In other example embodiments, the offset differential signal output from the output includes a first signal component and a second signal component; the dynamic common mode adjuster is operable to apply the generated offset value (common mode adjustment) to both the first signal and the second signal to control the respective common mode settings.

[0008] Still further, the magnitude of the difference between the second signal and the first signal varies in proportion to the magnitude of the received input signal. In other words, in one embodiment, the dynamic common mode adjuster varies the magnitude of the differential signal as a function of the magnitude or level of the received input signal. Thus, certain embodiments herein include controlling the common mode settings of the differential output signal and the magnitude of the differential output signal as a function of the magnitude or level of the input signal being converted.

[0009] In one embodiment, the received input signal is a digital signal; the differential signal derived from the received input signal is an analog signal.

[0010] The adjustment of the common mode settings or offset associated with the differential output signal can include any of a variety of techniques. For example, in one embodiment, the dynamic common mode adjuster includes or has access to mapping information. The mapping information provides a mapping of input values to corresponding differential output values. During operation, the dynamic common mode adjuster derives the differential signal via a mapping of the magnitude of the received input signal to first and second values specified by the mapping information. In one embodiment, the first and second values represent a pair of signals that represent the differential output signal whose common mode settings are adjusted.

[0011] According to other embodiments, the dynamic common mode adjuster can be configured to apply a piecewise linear mathematical function to derive the offset (common mode setting) associated with the differential signal.

[0012] In yet other embodiments, the dynamic common mode adjuster is operable to implement one or more polynomial (mathematical) functions to produce an offset that is applied to the respective differential signal derived from the received input signal.

[0013] According to other embodiments, in addition to the dynamic common mode adjuster, the electronic circuit as described herein can be configured to include a digital-to-analog converter circuit that is operable to receive the offset differential signal. The digital-to-analog converter generates a respective differential analog output signal (current signal or voltage signal) as a function of the offset differential signal received from the dynamic common mode adjuster.

[0014] It should also be noted that the digital-to-analog converter circuit can be configured to include a first digital-to-analog converter and a second digital-to-analog converter. In such an instance, the first digital-to-analog converter converts a first digital value to a first analog output signal (voltage signal or current signal); the second digital-to-analog converter is operable to convert a second digital value to a second analog output signal (voltage signal or current signal). The corresponding differential analog output signal includes the first analog output signal (such as a voltage signal or current signal) and the second analog output signal (such as a voltage signal or current signal).

[0015] In yet other embodiments, the dynamic common mode regulator includes an offset regulator operable to generate an offset for controlling a common mode setting associated with the differential signal. In one embodiment, during an operating state in which an amplitude or level of the received input signal falls within a first amplitude range (such as when the absolute value of the input signal is less than a threshold value), the offset regulator generates (or controls) the amplitude of the offset to be a fixed value. The offset regulator can be configured to vary the amplitude or level of the offset during an operating state in which the amplitude of the received input signal falls within a second amplitude range. As such, the dynamic common mode regulator can be configured to adjust the common mode setting of the output signal (such as a voltage signal or current signal) to ensure further efficient processing of the output signal (voltage signal or current signal).

[0016] These and other more specific embodiments are disclosed in more detail below.

[0017] It should also be noted that while the embodiments discussed herein can be applicable to those electronic circuits such as implementing digital-to-analog converters, amplifiers, differential signal generators, etc., the concepts disclosed herein can be advantageously applied to any other suitable topology and general power control applications.

[0018] Further, it should be noted that the embodiments herein can include computer processor hardware (which executes corresponding switching instructions) for performing and / or supporting any or all of the method operations disclosed herein. In other words, one or more computerized devices or processors (computer processor hardware) can be programmed and / or configured to operate as explained herein to perform different embodiments of the invention.

[0019] Other embodiments herein include software programs, which, when executed on computerized devices, carry out steps and operations described hereinabove and disclosed in detail below. One such embodiment includes a computer program product having a non-transitory computer storage medium (e.g., memory, disk, flash, etc.) encoded with computer programming instructions and / or logic that, when executed in a computerized device having a processor and corresponding memory, programs the processor to perform any of the operations disclosed herein. Such arrangements are typically provided as software instructions and / or other data (e.g., data structures) arranged on computer-readable storage media or non-transitory computer-readable media such as optical media (e.g., CD-ROM), floppy or hard disk, or other media such as firmware or microcode in one or more ROM or RAM or PROM chips, special-purpose integrated circuits (ASICs), circuitry logic, etc. The software or firmware or other such configurations can be installed onto a respective controller circuit so as to cause the controller circuit (such as logic) to perform the techniques illustrated herein.

[0020] Accordingly, one embodiment of the present disclosure relates to a computer program product comprising a computer readable medium having instructions stored thereon for supporting operations such as controlling one or more phases in a power supply. For example, in one embodiment, the instructions, when executed by computer processor hardware (one or more computer devices, control logic, digital circuitry, etc.), cause the computer processor hardware to: receive an input signal; derive a difference signal from the received input signal; control an offset of the difference signal in accordance with the received input signal to produce an offset difference signal; and output the offset difference signal.

[0021] For the sake of clarity, the ordering of operations described herein has been added. The operations can be performed in any suitable order.

[0022] It should be appreciated that systems, methods, devices, apparatuses, logic, etc. as discussed herein can be embodied strictly as hardware (such as analog circuitry, digital circuitry, logic, etc.), as a mix of software and hardware, or solely as software (such as within a processor, within an operating system, or within a software application).

[0023] It should be noted that although each of the different features, techniques, configurations, etc. herein described can be discussed in different places in the specification, it is intended that each of the concepts can be executed independently of each other or in combination with each other. Accordingly, it is intended that one or more of the present applications described herein can be embodied strictly as hardware (such as analog circuitry, digital circuitry, logic, etc.), as a mix of software and hardware, or solely as software (such as within a processor, within an operating system, or within a software application).

[0024] Furthermore, it should be noted that this preliminary discussion of embodiments herein is not intended to serve as an objective or a (multiple) claimed invention's or (multiple) claimed application's each embodiment and / or incrementally novel aspect. Instead, this summary of the invention merely presents general embodiments and corresponding novel points over conventional technologies. For additional details and / or a potential perspective (array) of the (multiple) invention(s), the reader is directed to the Specific Embodiment section and corresponding drawings as further discussed below. BRIEF DESCRIPTION OF DRAWINGS

[0025] Figure 1 is an example diagram illustrating a dynamic common mode regulator according to embodiments herein.

[0026] Figure 2 is an example diagram illustrating an implementation of a dynamic common mode regulator and a digital to analog converter according to embodiments herein.

[0027] Figure 3 is an example diagram illustrating an implementation of a dynamic common mode regulator and a digital to analog converter circuit according to embodiments herein.

[0028] Figure 4 is an example diagram illustrating a common mode setting according to a change in input according to embodiments herein.

[0029] Figure 5 is an example diagram illustrating an implementation of a dynamic common mode regulator and a differential digital to analog converter according to embodiments herein.

[0030] Figure 6 is an example diagram illustrating an implementation of a dynamic common mode regulator and a differential digital to analog converter according to embodiments herein.

[0031] Figure 7 is an example diagram illustrating a computer processor hardware and related software instructions or logic circuitry for performing a method according to embodiments herein.

[0032] Figure 8 is an example diagram illustrating a method according to embodiments herein.

[0033] The foregoing and other objects, features and advantages of the embodiments herein will be apparent to those skilled in the art, in view of the following detailed description of the embodiments, taken in conjunction with the accompanying drawings, in which like reference numbers refer to like parts throughout the several views. The drawings are not necessarily to scale, emphasis instead being placed upon illustrating the embodiments, principles, concepts, etc. DETAILED DESCRIPTION

[0034] According to one embodiment, an apparatus, such as an electronic circuit, includes an input operable to receive an input signal; a dynamic common mode regulator operable to: i) derive a differential signal from the received input signal, and ii) vary an offset of the differential signal as a function of an amplitude or level of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal. In one configuration, the offset differential signal output from the output includes a first signal and a second signal. An amplitude or amount of a difference between the second signal and the first signal varies proportionally with respect to the amplitude or level of the received input signal.

[0035] Now, more specifically, Figure 1 is an example diagram illustrating general components of a multi-stage amplifier device according to conventional techniques.

[0036] As previously discussed, embodiments herein include providing novel ways of providing improved circuit performance associated with digital-to-analog converters and / or related circuitry. For example, one embodiment herein includes dynamically controlling a common mode setting of a differential DAC as a function of an amplitude of an input signal that is being converted into a corresponding analog signal, such as a differential output signal proportional to the input. As described herein, providing signal dependent common mode control provides improved system performance with respect to parameters such as noise, distortion, and power consumption. In other words, dynamically modifying a common mode setting (or offset) associated with a generated signal, such as a voltage signal or a current signal, supports lower noise, less distortion, and less power consumption.

[0037] In this example embodiment, an apparatus, such as a circuit, device, hardware, software, etc., includes a dynamic common mode regulator 140. Generally, the dynamic common mode regulator 140 as described herein is instantiated as electronic circuitry associated with a digital-to-analog converter, an amplifier, etc. However, according to embodiments, the dynamic common mode regulator 140 can be implemented in any suitable manner.

[0038] Further, in this example embodiment, the dynamic common mode regulator 140 includes an input 105, such as a port, pin, etc., that receives an input signal 115, such as a signal x. The dynamic common mode regulator 140 also includes an output 108, such as outputs 108-1 and 108-2, that outputs an output signal 118, such as a signal y.

[0039] In one embodiment, the output signal 108 is a differential signal that includes a digital differential signal component 118-1, such as a signal yp, and a digital differential signal component 118-2, such as a signal yn.

[0040] During operation, as previously discussed, the dynamic common-mode regulator 140: i) derives the differential signal 118 (differential signal y) from the received input signal 115, and ii) varies the offset of the differential signal 118 as a function of the amplitude or level of the received input signal 115.

[0041] For example, the dynamic common-mode regulator 140 outputs the offset differential signal 118 from the output 108. More specifically, the dynamic common-mode regulator 140 outputs a digital differential signal component 118-1 (first signal, such as yp) from output 108-1 to an entity such as circuit 125; the dynamic common-mode regulator 140 outputs a digital differential signal component 118-2 (second signal, such as yn) from output 108-2 to an entity such as circuit 125.

[0042] According to other embodiments, the received input signal 115 is an analog signal or a digital signal; the derived differential signal from the received input signal is an analog signal or a digital signal.

[0043] As previously discussed, controlling the offset (such as the common-mode setting) associated with the differential signal 118 provides improved system performance with respect to parameters such as noise, distortion, and power consumption.

[0044] Figure 2 is an example diagram illustrating an implementation of a dynamic common-mode regulator and digital-to-analog converter according to embodiments herein.

[0045] As shown in this example embodiment, the offset differential signal 118 output from the output 108 of the dynamic common-mode regulator 140 includes a first signal yp (such as digital differential signal component 118-1) and a second signal yn (such as digital differential signal component 118-2).

[0046] As previously discussed, the dynamic common-mode regulator 140 applies the generated offset (common-mode adjustment value) to control the respective common-mode setting of the output signal 118 (such as the differential signal including digital differential signal component 118-1 and digital differential signal component 118-2) to be output downstream to the differential digital-to-analog converter 260.

[0047] As further shown, the differential digital-to-analog converter 260 receives the differential signal 118 and converts it to an analog output signal 218 (such as an analog voltage Vd).

[0048] In one embodiment, the output signal 218 is a differential analog signal that includes an analog differential signal component 218-1 (signal yp) and an analog differential signal component 218-2 (signal yn). In such an instance, the digital differential signal component 118-1 (yp) is converted to a corresponding equivalent analog voltage or current signal vp (such as differential signal component 218-1) via a differential digital-to-analog converter 260; the digital differential signal component 118-2 (yn) is converted to a corresponding equivalent analog voltage or current signal vn (such as differential signal component 218-2) via a differential digital-to-analog converter 260.

[0049] Still further, as previously discussed, the difference between the values yp and yn (and vp and vn) varies proportionally with respect to the amplitude of the received input signal 115. In other words, in one embodiment, the dynamic common mode adjuster 140 varies the amplitude of the differential signal Vd in accordance with the amplitude or level of the received input signal 115.

[0050] Thus, certain embodiments herein include controlling the common mode setting of the differential output signal pair vp and vn (such as [vp+vn] / 2) and the amplitude of the differential output signal Vd in accordance with the amplitude of the input signal 115 (signal x) being converted.

[0051] In one embodiment, the amplitude of the voltage Vd (the difference between the voltage vp and the voltage vn) is proportional to the input signal x (such as over a range of input values of the signal x). Additionally or alternatively, the amplitude of the output voltage proportionally tracks the amplitude of the input signal 115.

[0052] Thus, in addition to the dynamic common mode adjuster 140, embodiments herein can be configured to include a digital-to-analog converter 260 that receives the offset differential signal 118 and generates a corresponding differential analog output voltage signal 218 (analog voltage Vd) from the offset differential signal 118.

[0053] It should be noted that adjustment of the common mode setting or offset associated with the differential output signal 118, and thus the differential output signal 218, can include any of a variety of techniques.

[0054] For example, in one embodiment, the dynamic common mode adjuster 140 includes or has access to adjustment information 250. The adjustment information 250 includes any appropriate information that enables generation of appropriate offset values (or common mode settings) to apply to the differential signal 118, 218.

[0055] Figure 3 is an example diagram illustrating an implementation of a dynamic common mode adjuster and digital-to-analog converter in accordance with embodiments herein.

[0056] In this example embodiment, the differential digital-to-analog converter 260 comprises two digital-to-analog converters (i.e., digital-to-analog converter 260-1 and digital-to-analog converter 260-2).

[0057] During operation, the first digital-to-analog converter 260-1 converts the first digital value 118-1 (such as signal yp) to a first analog output signal 218-1 (such as an analog voltage or current vp); the second digital-to-analog converter 260-2 converts the second digital value 118-2 to a second analog output signal 218-2 (such as an analog voltage or current vn).

[0058] In a similar manner as previously discussed, the amplitude and offset (common mode setting) of the respective differential analog output signal Vd varies as a function of the amplitude of the input signal 115 and the adjustment information 250.

[0059] Figure 4 is an example plot illustrating the variation of the common mode setting as a function of the input according to embodiments herein.

[0060] In one embodiment, the plot 400 and the corresponding functions 401, 402 and 410 represent an instance of the adjustment information 250 used to derive the differential signal 118 and / or the corresponding common mode adjustment setting from the input signal 115. As further illustrated, the adjustment information 250 can be implemented via one or more piecewise linear functions that provide different common mode adjustment settings over different ranges of input or output values.

[0061] More specifically, in this example embodiment, the X-axis represents different possible values of the input signal 115; the Y-axis represents the values of the corresponding offset / output signal.

[0062] The function 401 indicates one embodiment of mapping the input signal 115 (signal x) to corresponding values of signal yp over a range of different input values; the function 402 indicates an embodiment of mapping the input signal 115 (signal x) to corresponding values of signal yn over a range of different input values.

[0063] It should be noted that the properties of the functions 401 and 402 (slope, number of linear segments, offset, etc.) can be adjusted to accommodate any desired common mode setting.

[0064] As previously discussed, according to other embodiments, the combination of signals yn and yp is the differential signal 118. As illustrated by the function CM(x) in the plot 400, the application of function 401 to produce signal yn and the application of function 402 to produce signal yp result in a corresponding differential signal 118 having a common mode setting.

[0065] When the input signal 115 falls within a first range between -xl and xl, such as when the absolute value of the input signal is less than a threshold value xl, the common mode setting of the differential signals 118 and 218 is set to a fixed value -CM_MIN.

[0066] When the input signal 115 falls within a first range between -x2 and -xl or between the range xl and x2, the common mode setting of the differential signals 118 and 218 is varied as shown with respect to the input voltage 115.

[0067] When the received input signal 115 is less than -x2 or greater than x2, such as when the absolute value of the input signal is greater than a threshold value x2, the common mode setting of the differential signals 118 and 218 is substantially zero.

[0068] As previously discussed, the adjustment information 250 can be configured as mapping information that maps input values (associated with the signal x) to different corresponding differential output values. For example, during operation, the dynamic common mode adjuster 140 can be configured to derive the differential signals via a mapping of the received input signal 115 (signal x) to first and second values specified by the mapping information. As a more specific example, assume the input signal is 0.4. In this instance, the dynamic common mode adjuster 140 uses the adjustment information to map the value 0.2 to -0.2 (signal vp = -0.2) and -0.6 (signal vn = -0.6), where the common mode or offset is -0.4. The difference between the signals vp and vn is 0.4 (which is twice the input signal 0.2). Continuing with the same example, assume the input signal is changed to 0.4. The dynamic common mode adjuster 140 uses the adjustment information to map the value 0.4 to -0.0 (signal yp = -0.0) and -0.8 (signal vn = -0.8), where the common mode or offset is still -0.4. The difference between the signals yp and vn is 0.8 (which is twice the input signal 0.4).

[0069] Further discussion of example mappings is provided below.

[0070] In one embodiment, the dynamic common mode adjuster 140 represents the setting of a pair of signals (such as yp and yn) representative of the differential output signal 118 via the first and second signal values generated by the mapping.

[0071] It should be noted that the mapping information (such as a lookup table or the like) can include a piecewise linear mathematical function (as illustrated by the graph 400) to derive the offset (common mode setting) associated with the differential signals 118, 218.

[0072] In yet other embodiments, the dynamic common mode adjuster 140 implements (via signal processing) one or more polynomial (mathematical) functions to generate an offset that is applied to the respective differential signals 118, 218 derived from the received input signal 115.

[0073] Figure 5 is an example diagram illustrating an implementation of a dynamic common mode adjuster and a differential to digital converter, in accordance with embodiments herein.

[0074] As Figure 5 shown, an instance of the dynamic common mode adjuster 140 can be configured to include a summer 521, a summer 522, a sign inverter 550 (with a gain of -1), and an adjuster 540.

[0075] In this embodiment, during operation, the adjuster 540 receives the input signal 115. Via the function 410, the adjuster 540 outputs a respective common mode adjustment signal 535 [with a value of CM(x)] to both the summer 521 and the summer 522. The sign inverter 550 applies a gain of -1 to the input signal 115 to produce the signal 515 (-x).

[0076] As the name implies, the summer 521 adds the common mode adjustment signal 535 to the input signal 115 to produce the digital differential signal component 118-1 (the signal yp, where yp= x + CM(x)). The summer 522 adds the common mode adjustment signal 535 and the inverted input signal 515 (-x) to produce the digital differential signal component 118-2 (the signal yn, where yn= -x + CM(x)).

[0077] Thus, the dynamic common mode adjuster 140 modifies the common mode setting associated with the differential signals 118 and 218 as a function of the amplitude of the input signal 115.

[0078] As previously discussed, for amplitudes of the signal 115 between -xl and xl, the adjustment signal 535 (or offset 410) is constant (such as -CM_MIN); for amplitudes of the signal 115 between -x2 and -xl and xl and x2, the adjustment signal 535 (or offset 410) varies; for values of the signal 115 less than -x2 and greater than x2, the adjustment signal 535 (or offset 410) is set to zero.

[0079] Figure 6 is an example diagram illustrating an implementation of a dynamic common mode adjuster and a differential to digital converter, in accordance with embodiments herein.

[0080] In this example embodiment, the dynamic common mode adjuster 140 includes an adjuster 640-1 and an adjuster 640-2.

[0081] In this example of the dynamic common-mode regulator 140, regulator 640-1 implements function 401 to convert input signal 115 into digital differential signal component 118-1; regulator 640-2 implements function 402 to convert input signal 115 into digital differential signal component 118-2.

[0082] As further shown, the differential fractional-to-analog converter 660 receives the differential signal 118 and converts it into a corresponding analog differential signal 218. For example, in one embodiment, the differential fractional-to-analog converter 660 includes a modulator 621, a modulator 622, a remapper 670, and a 3-stage digital-to-analog converter 680.

[0083] Furthermore, during operation, modulator 621 receives digital differential signal component 118-1 and converts it into signal 631 (such as a serial stream representing digital differential signal component 118-1).

[0084] Modulator 622 receives digital differential signal component 118-2 and converts it into signal 632 (such as a serial stream representing digital differential signal component 118-2).

[0085] As further shown and as the name suggests, the remapper 670 converts the combination of received signals 631 and 632 into signal 671 representing the differential signal. Finally, the digital-to-analog converter 680 converts signal 671 into differential signal 218.

[0086] Therefore, functions 401 and 402, implemented by regulators 640-1 and 640-2, provide different common-mode adjustments based on the amplitude of the input signal 115. It should also be noted that functions 401 and 402 can be adjusted to accommodate any desired common-mode setting.

[0087] Figure 7 This is an example block diagram of a computer device for implementing any of the operations discussed herein, according to embodiments thereof.

[0088] As shown, the computer system 700 of this example (such as being implemented by any of one or more resources such as a dynamic common-mode regulator 140, a digital-to-analog converter, etc.) includes an interconnect 711 coupled to a computer-readable storage medium 712 (such as a non-transitory medium (or hardware storage medium) in which digital information can be stored and retrieved), a processor 713 (e.g., computer processor hardware such as one or more processor devices), an I / O interface 714, and a communication interface 717.

[0089] I / O interface 714 provides connectivity to any suitable resource, such as the corresponding resource storing the regulation information 250. As previously discussed, the regulation information 250 facilitates the generation of an offset value (common-mode setting) applied to the corresponding differential signal 118 based on the level or setting of the input signal 115.

[0090] The computer-readable storage medium 712 can be any hardware storage resource or device, such as a memory, optical storage device, hard disk drive, floppy disk, etc. In one embodiment, the computer-readable storage medium 712 stores instructions and / or data that are used by the dynamic common-mode regulator application 140-1 to perform any of the operations described herein.

[0091] Furthermore, in this example embodiment, the communication interface 717 enables the computer system 700 and the processor 713 to communicate via resources such as network 190 to retrieve information from remote sources and communicate with other computers.

[0092] As shown, the computer-readable storage medium 712 is encoded using a dynamic common-mode regulator application 140-1 (e.g., software, firmware, etc.) executed by the processor 713. The dynamic common-mode regulator application 140-1 can be configured to include instructions for implementing any of the operations discussed herein.

[0093] During operation in one embodiment, processor 713 accesses computer-readable storage medium 712 via interconnect 711 to initiate, run, execute, interpret, or otherwise perform instructions in the dynamic common-mode regulator application 140-1 stored on computer-readable storage medium 712.

[0094] The execution of the dynamic common-mode regulator application 140-1 produces processing functionality such as control process 140-2 in processor 713. In other words, the dynamic common-mode regulator process 140-2 associated with processor 713 represents the execution of one or more aspects of the dynamic common-mode regulator application 140-1 within or on processor 713 in computer system 700.

[0095] According to different embodiments, it should be noted that the computer system 700 may be a microcontroller device, logic, hardware processor, hybrid analog / digital circuit system, etc., configured to perform any of the operations described herein.

[0096] Now, via Figure 8 The flowcharts below discuss the functionality supported by different resources. It should be noted that the steps in the following flowcharts can be performed in any suitable order.

[0097] Figure 8 This is an example diagram illustrating a method according to an embodiment of the present document.

[0098] In processing operation 810, the dynamic common-mode regulator 140 receives input signal 115 (signal x).

[0099] In processing operation 820, the dynamic common-mode regulator 140 derives a differential signal 118 (a combination of signal 118-1 and signal 118-2) from the received input signal 115.

[0100] In processing operation 830, dynamic common-mode regulator 140 changes the offset of differential signal 118 according to the received input signal 115 to generate offset differential signal 118.

[0101] In processing operation 840, the dynamic common-mode regulator 140 outputs an offset differential signal 118.

[0102] It should also be noted that the techniques described herein are well-suited for use in differential signal generators, digital-to-analog converters, electronic circuits, etc. However, it should be pointed out that the embodiments described herein are not limited to such applications, and the techniques discussed herein are also well-suited for other applications.

[0103] Based on the description set forth herein, numerous specific details have been set forth to provide a thorough understanding of the claimed subject matter. However, those skilled in the art will understand that the claimed subject matter can be practiced without these specific details. In other instances, methods, apparatuses, systems, etc., known to those skilled in the art have not been described in detail so as not to obscure the claimed subject matter. Some portions of the specific embodiments have been presented based on algorithms or symbolic representations of operations on data bits or binary digital signals stored in the memory of a computing system, such as computer memory. These algorithmic descriptions or representations are examples of techniques used by those skilled in the art of data processing to convey the essence of their work to others skilled in the art. Generally, the algorithms described herein are considered to be self-consistent sequences of operations or similar processes that lead to desired results. In this context, the operation or process involves the physical manipulation of physical quantities. Typically, although not strictly necessary, these quantities may take the form of electrical or magnetic signals that can be stored, transmitted, combined, compared, or otherwise manipulated. For general reasons, it is sometimes more convenient to refer to such signals as bits, data, values, elements, symbols, characters, items, numbers, numbers, etc. However, it should be understood that all these and similar terms are associated with appropriate physical quantities and are merely convenient labels. Unless otherwise specified, it will be apparent from the following discussion that throughout the specification, discussions using terms such as “processing,” “computing,” “calculating,” “determining,” etc., refer to the actions or processes of a computing platform, such as a computer or similar electronic computing device, that manipulates or transforms data represented as physical electronic or magnetic quantities within the computing platform’s memory, registers, or other information storage, transmission, or display devices.

[0104] While the invention has been specifically shown and described with reference to preferred embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the invention as defined by the appended claims. Such changes are intended to be covered by the scope of the invention. Thus, the foregoing description of embodiments of the invention is not intended to be limiting. Rather, any limitations on the invention are set forth in the appended claims.

Claims

1. An apparatus comprising: an input operable to receive an input signal; a dynamic common-mode adjuster operable to: i) derive a differential signal from the received input signal, and ii) vary a common-mode setting of the differential signal as a function of the received input signal to produce an offset differential signal; and an output operable to output the offset differential signal, wherein the dynamic common-mode adjuster comprises an offset adjuster operable to generate an offset, the offset adjuster configured to: generate the common-mode setting as a fixed value during an operating condition in which an amplitude of the received input signal is less than a first threshold; vary the common-mode setting such that an amplitude of the common-mode setting linearly decreases from the fixed value to zero during an operating condition in which the amplitude of the received input signal is greater than the first threshold and less than a second threshold; and generate the common-mode setting as zero during an operating condition in which the amplitude of the received input signal is greater than the second threshold.

2. The apparatus of claim 1, wherein the dynamic common-mode adjuster varies the differential signal as a function of the received input signal.

3. The apparatus of claim 1, wherein the received input signal is a digital signal; and wherein the differential signal derived from the received input signal is an analog signal.

4. The apparatus of claim 1, further comprising: mapping information providing a mapping of input values to corresponding differential output values; and wherein the dynamic common-mode adjuster derives the differential signal via a mapping of the received input signal to first and second values specified by the mapping information.

5. The apparatus of claim 1, wherein the dynamic common-mode adjuster is operable to implement one or more polynomial mathematical functions to derive the offset differential signal from the received input signal.

6. The apparatus of claim 1, wherein the received input signal is a digital signal; and wherein the offset differential signal output from the output comprises a first signal and a second signal, a difference between the second signal and the first signal varying proportionally to the received input signal.

7. The apparatus of claim 1, further comprising: a digital-to-analog converter operable to receive the offset differential signal and generate a corresponding differential analog output signal.

8. The apparatus of claim 7, wherein the offset differential signal is a pair of signals comprising a first digital value and a second digital value; wherein the digital-to-analog converter comprises a first digital-to-analog converter operable to convert the first digital value to a first analog output voltage and a second digital-to-analog converter operable to convert the second digital value to a second analog output voltage; and wherein the corresponding differential analog output signal comprises the first analog output voltage and the second analog output voltage.

9. The apparatus of claim 1, wherein the differential signal comprises a first signal and a second signal derived from the input signal; and wherein the common-mode setting is an offset; and ​ ​ wherein the dynamic common-mode regulator is operable to apply the offset to both the first signal and the second signal, a difference between the first signal and the second signal being proportional to the received input signal.

10. A method comprising: receiving an input signal; deriving a difference signal from the received input signal; varying an offset of the difference signal as a function of the received input signal to produce an offset difference signal; and outputting the offset difference signal, wherein varying the offset of the difference signal comprises: generating a common-mode setting to a fixed value during an operating condition in which an amplitude of the received input signal is less than a first threshold value; varying the common-mode setting such that an amplitude of the common-mode setting linearly decreases from the fixed value to zero during an operating condition in which the amplitude of the received input signal is greater than the first threshold value and less than a second threshold value; and generating the common-mode setting to zero during an operating condition in which the amplitude of the received input signal is greater than the second threshold value.

11. The method of claim 10, further comprising: varying the difference signal proportionally as a function of the amplitude of the received input signal.

12. The method of claim 10, wherein the received input signal is a digital signal; and wherein the offset difference signal derived from the received input signal is an analog signal.

13. The method of claim 10, wherein deriving the offset difference signal from the received input signal comprises: mapping the received input signal to a first value and a second value via mapping information.

14. The method of claim 10, further comprising: implementing one or more polynomial mathematical functions to derive the offset difference signal from the received input signal.

15. The method of claim 10, wherein the received input signal is a digital signal, the method further comprising: producing the difference signal to include a first signal and a second signal, a difference between the second signal and the first signal varying proportionally as a function of the received input signal.

16. The method of claim 10, further comprising: converting the difference signal to a corresponding differential analog output voltage signal via a digital-to-analog converter.

17. The method of claim 16, wherein the difference signal is a pair of signals including a first digital value and a second digital value, the method further comprising: converting the first digital value to a first analog output voltage; converting the second digital value to a second analog output voltage, the corresponding differential analog output signal including the first analog output voltage and the second analog output voltage.

18. The method of claim 10, wherein the difference signal includes a first signal and a second signal derived from the input signal, the method further comprising: applying the offset to both the first signal and the second signal, a difference between the first signal and the second signal being proportional to the received input signal. ​ 19. Computer-readable storage hardware having stored thereon instructions that, when executed by computer processor hardware, cause the computer processor hardware to: receive an input signal; derive a difference signal from the received input signal; varying an offset of the differential signal according to the received input signal to produce an offset differential signal; and output the offset difference signal, wherein generating an offset of the difference signal comprises: during an operating condition in which an amplitude of the received input signal is less than a first threshold, generating a common mode setting to a fixed value; during an operating condition in which the amplitude of the received input signal is greater than the first threshold and less than a second threshold, varying the common mode setting such that an amplitude of the common mode setting linearly decreases from the fixed value to zero; and during an operating condition in which the amplitude of the received input signal is greater than the second threshold, generating the common mode setting to zero.

Images