Storage device, storage system including the same, and operating method thereof

Abstract

A storage device, a storage system including the same, and an operating method thereof are provided. The storage system includes a storage device including an accelerated write buffer and a user storage area implemented with a non-volatile memory, and a host configured to transmit a read request to the storage device. In response to the read request, the storage device transmits read data and read data information including attributes of the read data to the host.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0094002, filed on August 1, 2019, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Exemplary embodiments of the inventive concept described herein relate to a semiconductor memory device, and more specifically, to a storage device that outputs data information in response to a read request and a method for transmitting the response of the storage device. Background Technology

[0004] Semiconductor memory devices are classified as volatile memory devices that lose stored data when power is off (e.g., static random access memory (SRAM) or dynamic random access memory (DRAM)), or non-volatile memory devices that retain stored data even when power is off (e.g., flash memory devices, phase-change RAM (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), or ferroelectric RAM (FRAM)).

[0005] Flash memory devices have been widely used as high-capacity storage media in computing devices. Currently, various technologies are being developed to support the high-speed operation of flash memory devices. For example, the Universal Flash Storage (UFS) interface defined by the JEDEC standard can support much higher operating speeds compared to traditional flash-based storage devices. Summary of the Invention

[0006] According to an exemplary embodiment of the inventive concept, a storage system includes: a storage device including an accelerated write buffer implemented with non-volatile memory and a user storage area; and a host configured to transmit a read request to the storage device. In response to the read request, the storage device transmits read data and read data information including attributes of the read data to the host.

[0007] According to an exemplary embodiment of the inventive concept, a method of operating a storage system including an accelerated write buffer implemented with non-volatile memory and a user storage area includes: receiving a read request from a host; reading read data from the accelerated write buffer or the user storage area in response to the read request; transmitting the read data to the host using a data transfer packet; and transmitting read data information including location information of the read data to the host.

[0008] According to an exemplary embodiment of the inventive concept, a storage device configured to communicate with a host using a Universal Flash Storage (UFS) interface includes: a non-volatile storage device including an accelerated write buffer region and a user storage region; and a memory controller configured to read read data from the non-volatile storage device in response to a read request from the host, load attribute information about the read data onto a response data packet, and transmit the response data packet to the host.

[0009] According to an exemplary embodiment of the inventive concept, an operation method for a storage system including a host and a storage device, the storage device including an accelerated write buffer implemented with non-volatile memory and a user storage area, wherein the accelerated write buffer includes a fixed accelerated write buffer and a non-fixed accelerated write buffer. The operation method includes: the storage device receiving a read request from the host; the storage device reading read data from at least one of the fixed accelerated write buffer, the non-fixed accelerated write buffer, and the user storage area in response to the read request; the storage device transmitting the read data to the host using a data transfer packet; and the storage device transmitting read data information to the host. The read data information indicates location information and feedback information of the read data. The fixed accelerated write buffer is an area where data stored therein is prohibited from moving to the user storage area. The non-fixed accelerated write buffer is an area where data stored therein is allowed to move to the user storage area. Attached Figure Description

[0010] The above and other objects and features of the inventive concept will become apparent from the detailed description of exemplary embodiments of the inventive concept with reference to the accompanying drawings.

[0011] Figure 1 This is a block diagram illustrating an exemplary embodiment of a storage system according to the inventive concept.

[0012] Figure 2 This illustrates exemplary embodiments based on the inventive concept. Figure 1 A diagram showing the physical storage space of the storage device.

[0013] Figure 3A and Figure 3B The diagram is used to illustrate exemplary embodiments according to the inventive concept. Figure 2 The turbo write buffer type.

[0014] Figure 4A and Figure 4B The diagram is used to illustrate a configuration according to an exemplary embodiment of the inventive concept. Figure 1The mode of accelerating write buffers for storage devices.

[0015] Figure 5 This illustrates exemplary embodiments based on the inventive concept. Figure 1 The flowchart of the operation of the storage system.

[0016] Figure 6 This illustrates exemplary embodiments based on the inventive concept. Figure 1 The flowchart of the operation of the storage system.

[0017] Figure 7 This illustrates exemplary embodiments based on the inventive concept. Figure 1 A flowchart of the operation of the storage device.

[0018] Figure 8 This illustrates exemplary embodiments based on the inventive concept. Figure 1 A block diagram of the physical storage space of the storage device.

[0019] Figure 9 The illustrations show exemplary embodiments of a reference device according to the inventive concept. Figure 8 The physical storage space and logical storage space of the described storage device.

[0020] Figure 10A and Figure 10B The illustrated figures show exemplary embodiments according to the inventive concept. Figure 8 The operations within the physical storage space of the described storage device.

[0021] Figure 11 This is a diagram illustrating an operation method of a storage system according to an exemplary embodiment of the inventive concept.

[0022] Figure 12 This is an example of reading data information according to an exemplary embodiment of the inventive concept.

[0023] Figure 13 The illustration illustrates a query request process for a host to read the high four bits of data information according to an exemplary embodiment of the inventive concept.

[0024] Figure 14 An exemplary embodiment of a method for transmitting additional information via a response, according to the inventive concept, is illustrated.

[0025] Figure 15 This is a diagram illustrating an exemplary embodiment of a method for obtaining detailed information when a partial hit occurs in a storage system, according to an inventive concept.

[0026] Figure 16 References illustrating exemplary embodiments according to the inventive concept. Figure 15The table described is an expanded version of the table for reading data information.

[0027] Figure 17 An example of the hit status of data requested for reading according to an exemplary embodiment of the inventive concept is illustrated.

[0028] Figure 18 An example of the hit status of data requested for reading according to an exemplary embodiment of the inventive concept is illustrated.

[0029] Figure 19 An example of a data miss state in an exemplary embodiment of the inventive concept is illustrated.

[0030] Figure 20 An example illustrating the movement state of data requested for reading according to an exemplary embodiment of the inventive concept is shown.

[0031] Figure 21 An example of a partial hit state of data requested for reading according to an exemplary embodiment of the inventive concept is illustrated.

[0032] Figure 22 This illustrates exemplary embodiments based on the inventive concept. Figure 1 A diagram illustrating the hierarchical structure of the storage system.

[0033] Figure 23 The block diagram illustrates in detail exemplary embodiments according to the inventive concept. Figure 1 Storage system.

[0034] Figure 24 Exemplary embodiments of the inventive concept are illustrated and applied to Figure 1 A conceptual diagram of a storage system.

[0035] Figure 25 This is a block diagram illustrating a memory card using a storage system according to an exemplary embodiment of the inventive concept.

[0036] Figure 26 This is a block diagram illustrating a portable terminal including a storage device according to an exemplary embodiment of the inventive concept. Detailed Implementation

[0037] An exemplary embodiment of the inventive concept provides a storage system and a method of operation thereof, the storage system providing region information or hit / miss information about data read in a read operation of a storage device in which an accelerated write buffer is used.

[0038] Exemplary embodiments of the inventive concept will now be described in detail with reference to the accompanying drawings. Throughout this application, similar reference numerals may refer to similar elements.

[0039] Figure 1 This is a block diagram illustrating an exemplary embodiment of a storage system according to the inventive concept. (See reference) Figure 1 The storage system 1000 may include a host 1100 and a storage device 1200. In an exemplary embodiment of the inventive concept, the storage system 1000 may include one of various computing systems such as personal computers, laptops, tablets, smartphones, and wearable devices.

[0040] Host 1100 can store data in storage device 1200 or read data stored in storage device 1200. For example, host 1100 can send a write command and write data to storage device 1200 to store data in storage device 1200. Alternatively, in order to read data from storage device 1200, host 1100 can send a read command to storage device 1200 and receive data from storage device 1200.

[0041] Host 1100 may include a main processor such as a central processing unit (CPU) or an application processor (AP). Additionally, host 1100 may include auxiliary processors that assist the main processor, such as a graphics processing unit (GPU) or a neural processing unit (NPU).

[0042] Storage device 1200 can operate under the control of host 1100. For example, storage device 1200 may include controller 1210 and non-volatile storage device 1220. Controller 1210, also referred to as a memory controller, can operate in response to commands received from host 1100. For example, controller 1210 can receive write commands and write data from host 1100, and can store received write data in non-volatile storage device 1220 in response to a received write command.

[0043] Alternatively, controller 1210 may receive a read command from host 1100 and may read data stored in non-volatile storage device 1220 in response to the received read command. Thereafter, controller 1210 may transmit the read data to host 1100. In an exemplary embodiment of the inventive concept, non-volatile storage device 1220 may be a NAND flash memory device, but the inventive concept is not limited thereto.

[0044] In an exemplary embodiment of the inventive concept, host 1100 may communicate with storage device (e.g., UFS device) 1200 based on a Universal Flash Storage (UFS) interface or protocol defined by the JEDEC standard. For example, host 1100 and storage device 1200 may exchange packets in the form of UFS Protocol Information Units (UPIUs). A UPIU may include various information defined by the interface (e.g., UFS interface) between host 1100 and storage device 1200. However, the inventive concept is not limited thereto. Hereinafter, for ease of description, the terms “command,” “UPIU,” and “data” may be used interchangeably, and may have the same or different meanings according to the embodiments disclosed herein.

[0045] In an exemplary embodiment of the inventive concept, storage device 1200 may support a turbo write function or turbo write feature. The turbo write function can be enabled or disabled under the control of host 1100. When the turbo write function is enabled under the control of host 1100, storage device 1200 can perform a turbo write operation. The turbo write operation may be performed based on a single-level cell (SLC) buffer scheme, but is not limited thereto, and the turbo write operation can provide improved performance of storage device 1200 (particularly improved write performance). The turbo write operation will now be described more fully with reference to the accompanying drawings.

[0046] Figure 2 This is an example Figure 1 A diagram illustrating the physical storage space of storage device 1200. The physical storage space PS of storage device 1200 can refer to the physical area of ​​the non-volatile storage device 1220 that actually stores user data. In other words, the physical storage space PS can be the space recognized by host 1100 as the capacity of storage device 1200. Host 1100 and storage device 1200 can be implemented according to the UFS protocol proposed by JEDEC for communication with each other, but the inventive concept is not limited thereto.

[0047] In an exemplary embodiment of the inventive concept, the storage device 1200 includes, in addition to, Figure 2 In addition to the physical storage space PS illustrated herein, other storage spaces may also be included (e.g., spaces not recognized by host 1100 as part of the storage device 1200 capacity, such as reserved areas, meta areas for storing metadata, or overprovisioning areas for performance improvement). However, for ease of description, additional descriptions associated with other storage spaces will be omitted (or minimized), and the description will focus on the physical storage space PS for storing user data.

[0048] refer to Figure 1 and Figure 2The physical storage space PS of storage device 1200 may include a write-fast buffer area (TWB) (hereinafter referred to as the "write-fast buffer") and a user storage area (UST) (hereinafter referred to as the "user storage area"). The user storage area and the write-fast buffer may be referred to as the first area, the second area, the third area, etc.

[0049] The accelerated write buffer TWB may correspond to a portion of the physical storage space PS of the non-volatile storage device 1220 (e.g., "a"). The user storage area UST may correspond to the remaining portion of the physical storage space PS of the non-volatile storage device 1220 (e.g., "b"). Alternatively, the user storage area UST may correspond to the entire physical storage space PS of the non-volatile storage device 1220 (e.g., a+b).

[0050] In an exemplary embodiment of the inventive concept, each storage cell corresponding to the accelerated write buffer TWB can be an SLC, while each storage cell corresponding to the user storage area UST can be a three-level cell (TLC). Alternatively, each storage cell corresponding to the accelerated write buffer TWB can store n bits of data (n is a positive integer), while each storage cell corresponding to the user storage area UST can store m bits of data (m is a positive integer greater than n). In other words, compared to the user storage area UST, the accelerated write buffer TWB can be a region that supports higher write speeds.

[0051] The present invention is not limited to the above description of the accelerated write buffer TWB and the user storage area UST. For example, the number of bits (e.g., k) stored in each storage cell corresponding to the accelerated write buffer TWB may be greater than or equal to the number of bits (e.g., i) stored in each storage cell corresponding to the user storage area UST (e.g., k ≥ i). In an exemplary embodiment of the present invention, the number of bits to be stored in each storage cell can be determined based on various factors such as the reliability and lifespan of the storage device 1200. Alternatively, the accelerated write buffer TWB and the user storage area UST can be divided based on various factors such as the reliability and lifespan of the storage device 1200 and the number of bits to be stored in each storage cell.

[0052] In exemplary embodiments of the inventive concept, reference numerals "a" and "b" can both refer to the number of storage blocks in the corresponding storage space. The values ​​of "a" and "b" can vary depending on the size of the accelerated write buffer TWB and the user storage area UST, as well as the scheme used to implement the accelerated write buffer TWB and the user storage area UST (e.g., SLC, multilevel cell (MLC), TLC, and quad-level cell (QLC)).

[0053] For reference Figure 1 As described, storage device 1200 can support normal write functionality and accelerated write functionality. When host 1100 enables accelerated write functionality, storage device 1200 can perform accelerated write operations. When host 1100 disables accelerated write functionality, storage device 1200 can perform normal write operations.

[0054] For example, when the accelerated write function is enabled, storage device 1200 can preferentially write write data received from host 1100 to the accelerated write buffer TWB. In this case, because the write data received from host 1100 is written to the accelerated write buffer TWB (e.g., SLC procedure), a faster operation speed can be guaranteed compared to performing a normal write operation on user storage area UST (e.g., TLC procedure). When the accelerated write function is disabled, storage device 1200 may not first write write data to the accelerated write buffer TWB. Depending on the internal allocation strategy (e.g., normal write strategy), storage device 1200 may directly write write data to user storage area UST or write write data to the accelerated write buffer TWB. Depending on the normal write strategy, how to write write data can be determined based on various factors such as the data share of the accelerated write buffer TWB and the state of physical storage space PS.

[0055] As another example, a normal write strategy may first write the data to the user storage area (UST). For the sake of clarity, in the following detailed description, a normal write strategy is defined as a strategy that prioritizes writing data to the user storage area (UST). However, the inventive concept is not limited thereto.

[0056] In an exemplary embodiment of the inventive concept, data in the write acceleration buffer TWB can be flushed or migrated to the user storage area UST based on an explicit command from the host 1100 or an internally allocated strategy.

[0057] Figure 3A and Figure 3B It is used to describe Figure 2 A diagram illustrating the accelerated write buffer. (Reference) Figure 1 , Figure 2 , Figure 3A and Figure 3BThe storage device 1200 may include a first logical unit LU1, a second logical unit LU2, a third logical unit LU3, and a fourth logical unit LU4. Each of the first logical units LU1 to the fourth logical unit LU4 can be an externally addressable, independent processing entity that processes commands from the host 1100. The host 1100 can manage the storage space of the storage device 1200 through the first logical units LU1 to the fourth logical units LU4. Each of the first logical units LU1 to the fourth logical unit LU4 can be used to store data at the storage device 1200.

[0058] Each of the first logic units LU1 to the fourth logic unit LU4 can be associated with at least one memory block of the non-volatile storage device 1220. A wide variety of logic units can exist for various purposes. However, the first logic units LU1 to the fourth logic unit LU4 can correspond to physical storage space PS and can be used to store data from the host 1100.

[0059] exist Figure 3A and Figure 3B The illustration shows first logic units LU1 to fourth logic units LU4, but the inventive concept is not limited thereto. For example, the storage device 1200 may include other logic units for storing and managing user data in addition to the first logic units LU1 to fourth logic units LU4. Alternatively, the storage device 1200 may include other logic units for supporting various functions in addition to the first logic units LU1 to fourth logic units LU4.

[0060] The accelerated write buffer (TWB) of storage device 1200 can be configured as various types. The accelerated write buffer (TWB) can be configured as either a logical unit (LU) dedicated buffer type or a shared buffer type.

[0061] In the case of a dedicated buffer type for LUs, the accelerated write buffer TWB can be configured independently or separately for each logical unit (LU). For example, as Figure 3A As illustrated, in the LU dedicated buffer type, a first accelerated write buffer TWB1 can be configured for the first logic unit LU1 among the first logic units LU1 to the fourth logic units LU4, and a third accelerated write buffer TWB3 can be configured for the third logic unit LU3 among the first logic units LU1 to the fourth logic units LU4.

[0062] exist Figure 3AIn the LU-dedicated buffer type, when a write command is received for the first logic unit LU1 after accelerated write is enabled, the write data can be preferentially written to the first accelerated write buffer TWB1 corresponding to the first logic unit LU1. When a write command is received for the third logic unit LU3 after accelerated write is enabled, the write data can be preferentially written to the third accelerated write buffer TWB3 corresponding to the third logic unit LU3.

[0063] Upon receiving a write command for the second logical unit LU2 and the fourth logical unit LU4, which are not allocated with an accelerated write buffer TWB, the write data can be written to the user storage area UST corresponding to the second logical unit LU2 and the fourth logical unit LU4. Furthermore, after accelerated write is disabled, upon receiving a write command for the first logical unit LU1 or the third logical unit LU3, according to the normal write strategy, the write data can be written to the user storage area UST of the first logical unit LU1 or the first accelerated write buffer TWB1, or it can be written to the user storage area UST of the third logical unit LU3 or the third accelerated write buffer TWB3.

[0064] In an exemplary embodiment of the inventive concept, the capacities of the first accelerated write buffer TWB1 and the third accelerated write buffer TWB3 can be set independently of each other. However, the inventive concept is not limited thereto. For example, the number of logical units respectively allocated with accelerated write buffers, the capacity of each accelerated write buffer, etc., can be changed or modified differently.

[0065] In an exemplary embodiment of the inventive concept, the size of the accelerated write buffer (TWB) for each logical unit can be set to the accelerated write buffer size field (e.g., "dLUNumTurboWriteBufferAllocUnits") of each unit in the unit descriptor. In an exemplary embodiment of the inventive concept, the accelerated write buffer size field (e.g., "dLUNumTurboWriteBufferAllocUnits") of each unit can be a configurable parameter.

[0066] In the case of a shared buffer type, a fast write buffer can be configured for all logical units. For example, such as Figure 3B As illustrated, in the shared buffer type, a single accelerated write buffer TWB0 can be configured to be shared by all first logic units LU1 to fourth logic units LU4.

[0067] In this scenario, when a write command is received for each of the first to fourth logical units LU4 after accelerated write functionality is enabled, the write data can first be written to the shared accelerated write buffer TWB0. When a write command is received for each of the first to fourth logical units LU4 after accelerated write is disabled, the write data can be written to the user storage area UST corresponding to each of the first to fourth logical units LU1 to LU4, or to the shared accelerated write buffer TWB0, according to the normal write strategy.

[0068] As described above, storage device 1200 may include a write acceleration buffer (TWB) that supports accelerated write functionality. Depending on the buffer type (e.g., LU-dedicated buffer type or shared buffer type), the write acceleration buffer (TWB) can be configured for each of multiple logical units, or a single write acceleration buffer (TWB) can be configured to be shared by all logical units.

[0069] Figure 4A and Figure 4B The diagram is used to describe the configuration. Figure 1 The storage device employs an accelerated write buffer mode. For ease of description, it is assumed that the physical storage space PS of storage device 1200 is 32GB based on TLC. In other words, with each storage cell in storage device 1200 storing 3 bits of data, storage device 1200 can store 32GB of user data.

[0070] However, the inventive concept is not limited thereto. For example, depending on the implementation of the storage device 1200 or the non-volatile storage device 1220, the physical storage space PS of the storage device 1200 can be varied according to the type of storage cell (e.g., SLC, MLC, TLC (or QLC), the number of storage cells, the storage cell structure, the reserved space ratio, etc.).

[0071] refer to Figure 1 , Figure 4A and Figure 4B The storage device 1200 can configure the physical storage space of the accelerated write buffer (TWB) according to various modes. For example, the storage device 1200 can configure the physical storage space of the accelerated write buffer based on either a user capacity reduction mode or a no-user capacity reduction mode.

[0072] User capacity reduction mode is a mode that reduces the user capacity of the user storage area USTa in order to configure faster write buffer TWBa. For example, as Figure 4A As illustrated, the physical storage space PS of storage device 1200 can be 32GB based on TLC.

[0073] Before configuring the accelerated write buffer TWB, a capacity of 32GB (e.g., the entire capacity of the physical storage space PS) can be allocated to or used for the user storage area UST. In this case, the user storage area UST can be identified as 32GB from the perspective of host 1100.

[0074] The accelerated write buffer TWB can be configured according to the user's capacity reduction mode. In this case, the second physical storage space PS2a, which is part of the physical storage space PS, can be allocated to the accelerated write buffer TWBa or can be used for the accelerated write buffer TWBa.

[0075] Additionally, the first physical storage space PS1a, which is part of the physical storage space PS, can be allocated to or used for the user storage area USTA. In this case, compared to the case where the accelerated write buffer TWBa is not configured, the capacity of the user storage area can be reduced from the perspective of the host 1100 (e.g., from 32GB to 26GB).

[0076] In an exemplary embodiment of the inventive concept, a first physical storage space PS1a corresponding to the user storage area USTA can be implemented using TLC, and a second physical storage space PS2a corresponding to the accelerated write buffer TWBa can be implemented using SLC. The capacity ratio of the same storage space used as TLC and SLC can be "3:1".

[0077] In other words, when the size of the accelerated write buffer TWBa increases by up to 1GB, the logical storage space size of the user storage area USTA can be reduced by up to 3GB. As described above, when the accelerated write buffer TWBa is configured in user capacity reduction mode, a portion of the physical storage space PS of the storage device 1200 can be allocated to the accelerated write buffer TWBa, and therefore, the capacity of the user storage area USTA recognized by the host 1100 can be reduced.

[0078] In an exemplary embodiment of the inventive concept, the first physical storage space PS1a corresponding to the user storage area USTA and the second physical storage space PS2a corresponding to the accelerated write buffer TWBa may be physically adjacent to each other or physically spaced apart from each other.

[0079] The no-user-capacity-reduction mode is a mode in which the logical storage capacity of the user storage area USTb identified by the host 1100 is not reduced even if the accelerated write buffer TWBb is configured. For example, as Figure 4BAs illustrated, the user storage area UST can have a capacity of 32GB before configuring the accelerated write buffer TWB. In other words, the physical storage space PS of storage device 1200 can be allocated to the user storage area UST or can be used for the user storage area UST.

[0080] When configuring the accelerated write buffer TWB based on a user-less capacity reduction mode, an accelerated write buffer TWBb with a specific capacity (e.g., 2GB) can be configured. A second physical storage space PS2b, which is part of the physical storage space PS, can be allocated to the accelerated write buffer TWBb or can be used for the accelerated write buffer TWBb.

[0081] Unlike the user capacity reduction mode, the user storage area USTb can maintain a capacity of 32GB in the no user capacity reduction mode. In other words, in the no user capacity reduction mode, even with the accelerated write buffer TWBb configured, the capacity of the user storage area UST recognized from the perspective of the host 1100 can be the same as the capacity before the accelerated write buffer TWBb was configured.

[0082] In an exemplary embodiment of the inventive concept, in a no-user-capacity reduction mode, the size or configuration of the accelerated write buffer TWBb can be changed through internal policies of storage device 1200 or through explicit requests from host 1100. For example, because a second physical storage space PS2b, which is part of physical storage space PS, is used to configure the accelerated write buffer TWBb, the first physical storage space PS1b to be used for user storage area USTb can be smaller than the capacity of user storage area USTb.

[0083] In other words, if the entire first physical storage space PS1b is used to store user data or the available free capacity of the first physical storage space PS1b is equal to or less than the reference value, all or part of the second physical storage space PS2b used to accelerate the write buffer TWBb can be returned to the user storage area USTb.

[0084] In other words, if the accelerated write buffer TWBb cannot be maintained in the physical storage space PS due to a lack of available space for the user storage area USTb, the second physical storage space PS2b allocated for the accelerated write buffer TWBb can be returned to the user storage area USTb. For example, this return operation can be performed through a user data dump operation and an operation to set the size of the accelerated write buffer.

[0085] In an exemplary embodiment of the inventive concept, host 1100 may check the current available size of the accelerated write buffer TWB of storage device 1200. For example, storage device 1200 may set information about the current size of the accelerated write buffer TWB in the Current Accelerated Write Buffer Size field (e.g., “CurrentTurboWriteBufferSize”) of the attributes. Additionally, storage device 1200 may set information about the ratio of the current available capacity of the accelerated write buffer TWB in its Available Accelerated Write Buffer Size field (e.g., “dAvailableTurboWriteBufferSize”).

[0086] Host 1100 can check the current available size of the Accelerated Write Buffer (TWB) by examining the Current Accelerated Write Buffer Size field and the Available Accelerated Write Buffer Size field of the attributes. Based on the checked information, host 1100 can change the strategy for using accelerated writes or return the physical storage space used for the Accelerated Write Buffer (TWB) to the user storage area UST.

[0087] As another example, storage device 1200 can autonomously return the physical storage space used for the accelerated write buffer TWB to the user storage area UST. For example, storage device 1200 can periodically compare the available space of the user storage area UST with a reference value to determine whether the physical storage space used for the accelerated write buffer TWB needs to be returned to the user storage area UST. When storage device 1200 has returned the physical storage space used for the accelerated write buffer TWB to the user storage area UST, storage device 1200 can set a status flag to indicate that the accelerated write buffer TWB is no longer available. The status flag can be stored in a register in storage device 1200. Host 1100 can check the changed status of the accelerated write buffer TWB through the current accelerated write buffer size field. When returning the physical storage space used for the accelerated write buffer TWB to the user storage area UST, storage device 1200 can set the current accelerated write buffer size field to 0.

[0088] In an exemplary embodiment of the inventive concept, storage device 1200 may provide information about the lifetime of the accelerated write buffer TWB based on the number of programming / erasing (P / E) cycles of the physical storage space (or storage block) allocated to or used for the accelerated write buffer TWB. For example, storage device 1200 may set information about the lifetime of the accelerated write buffer TWB at an accelerated write buffer lifetime estimation field (e.g., “dTurboWriteBufferLifeTimeEst”) of the attribute.

[0089] Host 1100 can estimate the lifetime of the Accelerated Write Buffer (TWB) by checking the Accelerated Write Buffer Lifetime Estimation field of the attributes of storage device 1200 via a query request. In an exemplary embodiment of the inventive concept, in a no-user capacity reduction mode, because the user storage area UST and the accelerated write buffer TWB share the physical storage space PS, the lifetime of the accelerated write buffer TWB may be reduced when a write operation is performed on the user storage area UST.

[0090] Figure 5 This is an example Figure 1 A flowchart illustrating the operation of the storage system. (See reference) Figure 5 Describe the initialization operations of storage system 1000. (Reference) Figure 1 , Figure 2 and Figure 5 In operation S11, the host 1100 and the storage device 1200 can perform operations such as power-on reset, hardware reset, or endpoint reset.

[0091] In operation S12, the host 1100 and the storage device 1200 can perform hardware initialization and startup. For example, the hardware layer of each of the host 1100 and the storage device 1200 can be initialized and started.

[0092] In operation S13, host 1100 and storage device 1200 can perform initialization on a specific layer (e.g., UFS Transport Protocol (UTP) layer). For example, host 1100 can send a null output (NOP OUT) UPIU to storage device 1200. Storage device 1200 can send a null input (NOP IN) UPIU to host 1100 in response to the null output UPIU.

[0093] In operation S14, host 1100 may examine the device descriptor from storage device 1200. For example, host 1100 may send a query request to storage device 1200 to read the descriptor. Storage device 1200 may respond to the query request by sending a query response to host 1100 including the device descriptor. The query request may include reading the descriptor. For example, reading the descriptor may indicate to storage device 1200 that an external device requires a device descriptor.

[0094] In an exemplary embodiment of the inventive concept, host 1100 may examine the configuration and functionality of storage device 1200 through a device descriptor. For example, the device descriptor may include an extended UFS feature support field (e.g., “dExtendedUFSFeaturesSupport”) containing information about whether accelerated write functionality is supported. In an exemplary embodiment of the inventive concept, the information about whether accelerated write functionality is supported may be set as a specific bit (e.g., bit [8]) of the extended UFS feature support field.

[0095] The device descriptor may also include a Faster Write Buffer No User Space Reduction Enable field (e.g., "bTurboWriteBufferNoUserSpaceReductionEn") containing information about the Faster Write Buffer mode. When the value of the Faster Write Buffer No User Space Reduction Enable field is "00h", reference can be made to... Figure 4A The user space reduction mode is described to configure the accelerated write buffer TWB. When the accelerated write buffer does not have a user space reduction enable field value of "01h", the reference can be consulted. Figure 4B The described user-free capacity reduction mode is used to configure the accelerated write buffer TWB.

[0096] The device descriptor may also include an acceleration write buffer type field (e.g., "bTurbowriteBufferType") containing information about the acceleration write buffer type. When the acceleration write buffer type field has a value of "00h", it can be referenced... Figure 3A The LU-specific buffer type is described to configure the accelerated write buffer TWB. When the accelerated write buffer type field value is "01h", it can be referred to the reference. Figure 3B The shared buffer type is described, and the configuration accelerates the write buffer TWB.

[0097] The device descriptor may also include a shared accelerated write buffer allocation numeric field (e.g., "dNumSharedTurboWriteBufferAllocUnits") containing information about the size of the accelerated write buffer. If the number of units allocated to the shared accelerated write buffer is set to "0", an accelerated write buffer of the shared buffer type may not be configured.

[0098] The fields described above are merely exemplary, and the inventive concept is not limited thereto. For example, in addition to the fields described above, the device descriptor may include other fields containing information about the configuration, structure, and functions of the storage device 1200. The various fields of the device descriptor may indicate values ​​set before initialization operations. The host 1100 can identify the current state of the storage device 1200 by reading the various fields of the device descriptor.

[0099] In an exemplary embodiment of the inventive concept, fields such as "bTurboWriteBufferNoUserSpaceReductionEn", "bTurboWriteBufferType", and "dNumSharedTurboWriteBufferAllocUnits" of the device descriptor can be changed by writing values ​​to corresponding fields of the configuration descriptor. In other words, host 1100 can change information such as the accelerated write buffer type, accelerated write buffer no-userspace reduction enabled, and the number of units allocated to the accelerated write buffer by writing values ​​to various fields of the configuration descriptor. In an exemplary embodiment of the inventive concept, the geometry descriptor of storage device 1200 may include information such as a maximum accelerated write buffer size field, a maximum number of accelerated write buffers field, an accelerated write buffer capacity adjustment factor field, a supported accelerated write buffer no-userspace reduction type field, and a supported accelerated write buffer type field.

[0100] For example, the maximum size field of the accelerated write buffer (e.g., "dTurboWriteBufferMaxNAllocUnits") may include information about the maximum size of the accelerated write buffer TWB supported by storage device 1200. The maximum number of accelerated write buffers field (e.g., "bDeviceMaxTurboWriteLUs") may include information about the maximum number of accelerated write buffers supported by storage device 1200.

[0101] The accelerated write buffer capacity adjustment factor field (e.g., "bTurboWriteBufferCapAdjFac") can include information about the capacity reduction factor based on the type of accelerated write buffer memory. For example, in the case where the accelerated write buffer TWB is implemented with SLC and the user memory area UST is implemented with TLC, the value of the accelerated write buffer capacity adjustment factor field can be "3". In the case where the accelerated write buffer TWB is implemented with SLC and the user memory area UST is implemented with MLC, the value of the accelerated write buffer capacity adjustment factor field can be "2".

[0102] The supported TurboWriteBufferNoUserSpaceReductionTypes field (e.g., “bSupportedTurboWriteBufferNoUserSpaceReductionTypes”) may include information about whether the storage device 1200 supports any TurboWriteBuffer mode (e.g., user space reduction mode, no user space reduction mode, or both).

[0103] The supported TurboWriteBufferTypes field (e.g., “bSupportedTurboWriteBufferTypes”) may include information about whether the storage device 1200 supports any TurboWriteBufferType (e.g., LU-specific buffer type, shared buffer type, or both).

[0104] The fields described above are merely illustrative, and the inventive concept is not limited thereto.

[0105] In operation S15, host 1100 can download boot code from storage device 1200. For example, host 1100 can send a Test Unit Ready (UPIU) to storage device 1200. Storage device 1200 can send status information in response to the received Test Unit Ready UPIU. Host 1100 can determine whether the boot logic unit (or boot known LU) of storage device 1200 is accessible based on the received status information.

[0106] When the boot logic unit is accessible, host 1100 may transmit a SCSI READ command to storage device 1200. In an exemplary embodiment of the inventive concept, the SCSI READ command may correspond to the boot logic unit. Storage device 1200 may transmit data "DATA" and status information to host 1100 in response to the received command.

[0107] In operation S16, host 1100 can complete the initialization operation by setting the flags of storage device 1200. For example, host 1100 can send a query request to storage device 1200. The query request can be a request to set a device initialization field (e.g., "fDeviceInit") included in the flags of storage device 1200. In response to the query request, the device initialization field included in the flags of storage device 1200 can be set to a specific value (e.g., "01h"). Thereafter, storage device 1200 can send a query response.

[0108] In operation S17, host 1100 may poll the device initialization field (e.g., “fDeviceInit”) of the flag of storage device 1200. For example, host 1100 may send a query request to storage device 1200 to read the device initialization field of the flag, and storage device 1200 may send a query response including the device initialization field to host 1100.

[0109] In an exemplary embodiment of the inventive concept, after operation S16, in order to complete the initialization operation of the storage device 1200, the device initialization field can be reset to a different value (e.g., "00h"). In other words, the host 1100 can repeatedly execute operation S17 to check whether the device initialization field has been reset. If the device initialization field has been reset, the initialization operation of the storage device 1200 can be completed.

[0110] Figure 6 This is an example Figure 1 A flowchart illustrating the operation of the storage system. (Refer to...) Figure 6 Describes the write operations of storage system 1000. (Reference) Figure 1 and Figure 6 In operation S21, the host 1100 can transmit a CMD UPIU, including the write command WRCMD, to the storage device 1200.

[0111] In operation S22, host 1100 and storage device 1200 can perform data transactions. For example, storage device 1200 can send a Ready to Transmit UPIU (RTT UPIU) to host 1100. The RTT UPIU may include information about the range of data that storage device 1200 can receive. In response to the RTT UPIU, host 1100 can send a DATA OUT UPIU, which includes the data to be written, to storage device 1200. As the above operations are repeated, write data can be transferred from host 1100 to storage device 1200.

[0112] After receiving all the write data, in operation S23, the storage device 1200 may send a response UPIU (RESPONSE UPIU) to the host 1100. The RESPONSE UPIU may include information indicating that the operation corresponding to the write command received in operation S21 has been completed.

[0113] In an exemplary embodiment of the inventive concept, storage device 1200 can perform a normal write operation on the write data received in operation S22. For example, in operation S21, storage device 1200 can determine whether an accelerated write function is enabled. More specifically, storage device 1200 can determine whether the accelerated write function is enabled based on the value of a flag's accelerated write enable field (e.g., "fTurboWriteEn").

[0114] When the value of the accelerated write enable field is "0b", the accelerated write function can be disabled. When the value of the accelerated write enable field is "1b", the accelerated write function can be enabled. In an exemplary embodiment of the inventive concept, the value of the accelerated write enable field of the flag can be set by querying the setting flag of the host 1100.

[0115] Host 1100 may not set the value of the accelerated write enable field. In this case, the write data received in operation S22 can be written to the accelerated write buffer TWB or the user storage area UST according to the normal write policy.

[0116] In operation S30, host 1100 may set the value of the accelerated write enable field to a specific value (e.g., "1b"). For example, host 1100 may send a query request to storage device 1200 to set the value of the accelerated write enable field to a specific value (e.g., "1b"). The value of the accelerated write enable field may be set to a specific value (e.g., "1b") in response to the query request from host 1100, and storage device 1200 may send a query response to host 1100.

[0117] After this, host 1100 can perform operations S31 to S33. Except for performing accelerated write based on the accelerated write enable field, operations S31 to S33 are similar to operations S21 to S23 respectively, therefore, additional descriptions will be omitted to avoid redundancy.

[0118] In an exemplary embodiment of the inventive concept, the write data received in operation S32 can be written to the accelerated write buffer TWB. For example, in operation S30, the accelerated write function can be enabled when the value of the accelerated write enable field is set to a specific value (e.g., "1b"). In this case, the write data received from host 1100 can be written to the accelerated write buffer TWB. For example, in operation S31, the data received from host 1100 can be stored in a fixed accelerated write buffer TWB-p or a non-fixed accelerated write buffer TWB-np according to a specific factor value of the command UPIU. (Refer to...) Figure 8A more comprehensive description of how to configure the accelerated write buffer, which is divided into a fixed accelerated write buffer TWB-p and a non-fixed accelerated write buffer TWB-np.

[0119] In an exemplary embodiment of the inventive concept, even if the accelerated write function is enabled, the storage device 1200 can write the received write data into the user storage area UST when the space of the accelerated write buffer TWB is insufficient.

[0120] Figure 7 This is an example Figure 1 A flowchart illustrating the operation of a storage device. (Refer to...) Figure 7 Describes the dump operation of storage device 1200. (Reference) Figure 1 , Figure 2 and Figure 7 In operation S41, storage device 1200 can determine whether its current state is idle, hibernating, or running. When storage device 1200 is in the running state, a separate dump operation may not be performed.

[0121] For example, storage device 1200 can be in a running state when it is processing a command received from host 1100. Storage device 1200 can be in an idle state when no command (e.g., a pending command) is received from host 1100 and is being processed or will be processed. Storage device 1200 can be in a hibernation state when it enters a low-power mode, known as "hibernation," upon startup of storage device 1200 or host 1100.

[0122] When storage device 1200 is idle, in operation S42, it can be determined whether the first dump operation is enabled. Host 1100 can enable or disable the first dump operation at storage device 1200 by setting the value of the accelerated write buffer dump enable field of the flag (e.g., "fTurboWriteBufferFlushEn"). Storage device 1200 can determine whether the first dump operation is enabled by checking the value of the accelerated write buffer dump enable field of the flag.

[0123] In an exemplary embodiment of the inventive concept, the first dump operation can be disabled or deactivated when the value of the accelerated write buffer dump enable field of the flag is "0b". The first dump operation can be enabled when the value of the accelerated write buffer dump enable field of the flag is "1b". If the first dump operation is disabled, the storage device 1200 may not perform a separate dump operation.

[0124] When the first dump operation is enabled, in operation S43, the storage device 1200 can perform the first dump operation during the idle state. The first dump operation can be a dump operation performed by the storage device 1200 in the idle state. The dump operation can be an operation that dumps or migrates user data in the write acceleration buffer TWB to the user storage area UST according to internal policies or explicit commands from the host 1100.

[0125] In an exemplary embodiment of the inventive concept, when user data written to the accelerated write buffer TWB is dumped to the user storage area UST, the logical address of the dumped user data can be maintained, while the physical address can be changed. In this case, the storage device 1200 can update the mapping information between the logical address and the physical address of the dumped user data. For example, the physical address can be changed from the address of the accelerated write buffer TWB to the address of the user storage area UST.

[0126] When the determination result of operation S41 indicates that storage device 1200 is in a hibernation state, in operation S44, storage device 1200 can determine whether a second dump operation is enabled. As described above, for example, host 1100 can enable or disable the second dump operation at storage device 1200 by setting the value of the hibernation-accelerated write buffer dump enable field (e.g., "fTurboWriteBufferFlushDuringHibernate") of the flag.

[0127] Storage device 1200 can determine whether a second dump operation is enabled by checking the value of the flag's hibernation-time accelerated write buffer dump enable field. In an exemplary embodiment of the inventive concept, the second dump operation can be disabled or deactivated when the value of the flag's hibernation-time accelerated write buffer dump enable field is "0b". The second dump operation can be enabled when the value of the flag's hibernation-time accelerated write buffer dump enable field is "1b". If the second dump operation is disabled, storage device 1200 may not perform a separate dump operation.

[0128] When the second dump operation is enabled, in operation S45, the storage device 1200 can perform the second dump operation during the hibernation state. The second dump operation can indicate the dump operation to be performed by the storage device 1200 in the hibernation state.

[0129] Based on the above dump operation, user data in the accelerated write buffer TWB can be dumped or migrated to the user storage area UST. Therefore, the available buffer size of the accelerated write buffer TWB can be guaranteed.

[0130] In an exemplary embodiment of the inventive concept, the above dump operations can be paused under specific conditions. For example, the first dump operation, which is executed in an idle state, can be performed only when the command queue of the storage device 1200 is empty. When performing the first dump operation, if the command is issued from the host 1100, the storage device 1200 can pause the ongoing first dump operation and process the command issued from the host 1100 first. In an exemplary embodiment of the inventive concept, the second dump operation, which is executed in a hibernation state, can be stopped when the hibernation mode terminates.

[0131] As described above, an ongoing dump operation can be paused based on specific conditions. In this case, the storage device 1200 can set pause information (or progress information) or the current status of the dump operation in the accelerated write buffer dump status field of the attribute (e.g., "bTurboWriteBufferFlushStatus").

[0132] In an exemplary embodiment of the inventive concept, storage device 1200 may set information indicating the need for a dump operation for the accelerated write buffer TWB to a specific value (e.g., bit [5]) of an attribute's exception event status (e.g., "dExceptionEventStatus"). Host 1100 may examine the specific value (e.g., bit [5]) of the attribute's exception event status, determine that a dump operation is needed at storage device 1200, and may set specific fields of the storage device 1200's flags (e.g., "fTurboWriteBufferFlushEn" and "fTurboWriteBufferFlushDuringHibernate") according to a strategy.

[0133] refer to Figure 7 The given description states that storage device 1200 performs a dump operation based on the value of the dump enable field (i.e., the value of the accelerated write buffer dump enable field or the value of the hibernation accelerated write buffer dump enable field), but the inventive concept is not limited thereto. In an exemplary embodiment, storage device 1200 performs a dump or migration operation according to an internal policy, regardless of the value of the dump enable field (i.e., the value of the accelerated write buffer dump enable field or the value of the hibernation accelerated write buffer dump enable field). In this case, storage device 1200 can perform a dump or migration operation based on a determination automatically made by storage device 1200 (without external intervention, or based on its own determination).

[0134] Figure 8 This is an example Figure 1 A block diagram of the physical storage space of storage device 1200. (Reference) Figure 1 and Figure 8 The physical storage space PS of storage device 1200 may include an accelerated write buffer TWB and a user storage area UST. The physical storage space PS, accelerated write buffer TWB, and user storage area UST of storage device 1200 have been described above, so additional descriptions can be omitted to avoid redundancy.

[0135] The accelerated write buffer (TWB) can be divided into a fixed accelerated write buffer (TWB-p) and a non-fixed accelerated write buffer (TWB-np). As described above, when the accelerated write function of storage device 1200 is enabled, the write data can be stored in one of the fixed accelerated write buffer (TWB-p) and the non-fixed accelerated write buffer (TWB-np).

[0136] In this embodiment, data stored in the fixed accelerated write buffer TWB-p is not the target for movement (e.g., migration or dumping) to the user storage area UST, while data stored in the non-fixed accelerated write buffer TWB-np may be the target for movement to the user storage area UST. That is, the priority of data stored in the fixed accelerated write buffer TWB-p may be higher than the priority of data stored in the non-fixed accelerated write buffer TWB-np. However, the inventive concept is not limited thereto, as data stored in the fixed accelerated write buffer TWB-p may be the target for movement to the non-fixed accelerated write buffer TWB-np or the user storage area UST, depending on system resources or policies. In an exemplary embodiment, migration or dump operations are performed periodically to move data from the accelerated write buffer TWB to the user storage area UST. In this embodiment, before any data in the fixed accelerated write buffer TWB-p is migrated or dumped to the user storage area UST, all data existing in the non-fixed accelerated write buffer TWB-np is first migrated or dumped to the user storage area UST. In another embodiment, during a given migration period, first data in the non-fixed accelerated write buffer TWB-np is migrated to the user storage area UST during a first migration period, and second data in the fixed accelerated write buffer TWB-p is migrated to the user storage area UST during a second migration period after the first migration period.

[0137] The accelerated write buffer to store write data can be determined from the fixed accelerated write buffer TWB-p and the non-fixed accelerated write buffer TWB-np through various schemes (e.g., internal policies, changes to the internal policy based on host requests, and explicit host requests).

[0138] In an exemplary embodiment of the inventive concept, as described above, the size of the accelerated write buffer TWB can be determined under the control of the host 1100 or according to the internal policy of the storage device 1200. In this case, the ratio of the fixed accelerated write buffer TWB-p to the non-fixed accelerated write buffer TWB-np in the accelerated write buffer TWB can be determined or changed by various schemes (e.g., internal policy, changes to the internal policy based on the host's request, and explicit requests from the host).

[0139] In an exemplary embodiment of the inventive concept, user data can be dumped, migrated, or moved between the fixed accelerated write buffer TWB-p, the non-fixed accelerated write buffer TWB-np, and the user storage area UST. For example, user data can be migrated or moved between the fixed accelerated write buffer TWB-p and the non-fixed accelerated write buffer TWB-np based on an explicit request from host 1100, an internal policy of storage device 1200, or a change to the internal policy based on a request from host 1100.

[0140] Alternatively, user data can be migrated or moved between the non-fixed accelerated write buffer TWB-np and the user storage area UST based on explicit requests from host 1100, internal policies of storage device 1200, or changes to the internal policies requested by host 1100. For example, user data can be dumped from the non-fixed accelerated write buffer TWB-np to the user storage area UST. Alternatively, user data can be migrated or moved between the fixed accelerated write buffer TWB-p and the user storage area UST based on explicit requests from host 1100, internal policies of storage device 1200, or changes to the internal policies requested by host 1100.

[0141] In exemplary embodiments of the inventive concept, as referenced Figure 7 As described, storage device 1200 can perform a dump operation during idle or hibernation states. In this case, storage device 1200 can perform a dump operation on the non-fixed accelerated write buffer TWB-np of the accelerated write buffer TWB. In other words, storage device 1200 can dump user data stored in the non-fixed accelerated write buffer TWB-np of the accelerated write buffer TWB to the user storage area UST.

[0142] In this scenario, user data written to the fixed-speed write buffer TWB-p can be omitted from being dumped to the user storage area UST. In other words, even if the storage device 1200 performs a dump operation, the user data written to the fixed-speed write buffer TWB-p can be preserved.

[0143] As another example, data to be stored in the non-fixed accelerated write buffer TWB-np may be written to the fixed accelerated write buffer TWB-p, depending on the internal policy of storage device 1200. This data can then be dumped from the fixed accelerated write buffer TWB-p to the user storage area UST. In other words, data stored in the fixed accelerated write buffer TWB-p can be selectively dumped to the user storage area UST without an explicit dump request from host 1100, depending on the internal dump policy of storage device 1200.

[0144] In an exemplary embodiment of the present invention, when data is dumped, migrated, or moved between a fixed accelerated write buffer TWB-p, a non-fixed accelerated write buffer TWB-np, and a user storage area UST, the controller 1210 can be configured to update the mapping relationship of the moved data. For example, when data corresponding to a first logical block address is dumped or migrated from the fixed accelerated write buffer TWB-p to the user storage area UST, the controller 1210 can release the mapping relationship between the first logical block address and the physical address of the fixed accelerated write buffer TWB-p, and can update the mapping relationship between the first logical block address and the physical address of the user storage area UST. The release or update of the mapping relationship can be performed in a similar manner to the scheme described above for moving data between other areas; therefore, additional descriptions will be omitted to avoid repetition.

[0145] To illustrate the inventive concept more clearly, the following description will be given under the assumption that the data to be stored in the fixed accelerated write buffer TWB-p needs to be stored in the fixed accelerated write buffer TWB-p. However, the inventive concept is not limited thereto.

[0146] Therefore, when the host 1100 issues a read command for the first user data written to the fixed-speed write buffer TWB-p, the first user data can be read from the fixed-speed write buffer TWB-p. In this case, the first user data can be read at high speed.

[0147] For example, as mentioned above, the fixed-speed write buffer TWB-p can store user data using an SLC scheme, and the user storage area UST can store user data using a TLC scheme. Reading user data stored using the SLC scheme takes less time than reading user data stored using the TLC scheme.

[0148] In other words, because specific user data is kept in a fixed accelerated write buffer TWB-p, the speed of reading specific user data can be improved. This function of storage device 1200 can be called "turboread".

[0149] In an exemplary embodiment of the present invention, the physical storage space PS of storage device 1200 may indicate the storage space of non-volatile storage device 1220. In other words, non-volatile storage device 1220 may include a fixed accelerated write buffer TWB-p, a non-fixed accelerated write buffer TWB-np, or a user storage area UST.

[0150] Figure 9 The illustration shows the reference. Figure 8 The described storage device 1200 has physical storage space PS and logical storage space. For ease of description, a single logical unit will be used as a reference. Figure 9 Examples of implementations. However, the inventive concept can be applied in the same way to two or more logical units corresponding to the accelerated write buffer TWB, or to the same way to the relationship between logical units and shared accelerated write buffers (e.g., TWB0).

[0151] refer to Figure 1 and Figure 9 The logical storage space LS of storage device 1200, which is recognized by host 1100, may include user storage area UST and accelerated write buffer TWB. The accelerated write buffer TWB may include fixed accelerated write buffer TWB-p and non-fixed accelerated write buffer TWB-np.

[0152] The first logical block address range (e.g., LBA0 to LBAa, LBAb+1 to LBAc, and LBAe+1 to LBAn) can correspond to the logical storage space of the user storage area UST. In this case, user data stored in the first logical block address range (e.g., LBA0 to LBAa, LBAb+1 to LBAc, and LBAe+1 to LBAn) can be stored in the physical storage space of the user storage area UST.

[0153] The second logical block address range (e.g., LBAa+1 to LAb and LBAAd+1 to LBAe) can correspond to the logical storage space of the non-fixed accelerated write buffer TWB-np. In this case, user data stored in the second logical block address range (e.g., LBAa+1 to LAb and LBAAd+1 to LBAe) can be stored in the physical storage space of the non-fixed accelerated write buffer TWB-np.

[0154] The third logical block address range (e.g., LBAc+1 to LBAd) can correspond to the logical storage space of the fixed accelerated write buffer TWB-p. In this case, user data stored in the third logical block address range (e.g., LBAc+1 to LBAd) can be stored in the physical storage space of the fixed accelerated write buffer TWB-p.

[0155] As described above, the user storage area UST, the non-fixed accelerated write buffer TWB-np, and the fixed accelerated write buffer TWB-p can be distributed in various forms on the logical storage space LS identified by the host 1100. However, the inventive concept is not limited thereto, and a third logical block address range can correspond to the logical storage space of the non-fixed accelerated write buffer TWB-np, and a second logical block address range can correspond to the logical storage space of the fixed accelerated write buffer TWB-p. In an exemplary embodiment of the inventive concept, user data can be moved / dumped / migrated between the user storage area UST, the non-fixed accelerated write buffer TWB-np, and the fixed accelerated write buffer TWB-p according to an explicit request from the host 1100 or an internal policy of the storage device 1200.

[0156] For example, host 1100 may specify one of a fixed accelerated write buffer TWB-p and a non-fixed accelerated write buffer TWB-np during accelerated writes. As another example, host 1100 may specify one of the fixed accelerated write buffer TWB-p and the non-fixed accelerated write buffer TWB-np as the accelerated write target before accelerating writes. As yet another example, host 1100 may not specify either the fixed accelerated write buffer TWB-p or the non-fixed accelerated write buffer TWB-np during accelerated writes.

[0157] The host 1100 can check the distribution status of data changed by the storage device 1200 by periodically or as needed requesting (e.g., using query UPIU) information from the fixed accelerated write buffer TWB-p and the non-fixed accelerated write buffer TWB-np from the storage device 1200.

[0158] Figure 10A and Figure 10B The illustration shows the reference. Figure 8 The description describes operations within the physical storage space of the storage device. For the sake of brevity and ease of description, it is assumed that the fixed accelerated write buffer TWB-p includes a first storage block BLK1, the non-fixed accelerated write buffer TWB-np includes a second storage block BLK2, and the user storage area UST may include a third storage block BLK3. However, the inventive concept is not limited thereto.

[0159] refer to Figure 1 , Figure 8 and Figure 10AStorage device 1200 can receive first data DT1 corresponding to the first logical block address LBA1 from host 1100. In an exemplary embodiment of the inventive concept, the accelerated write function of storage device 1200 can be enabled. In this case, storage device 1200 can write the received first data DT1 into an accelerated write buffer TWB (e.g., a non-fixed accelerated write buffer TWB-np).

[0160] In other words, storage device 1200 can perform accelerated writes to the first data DT1. In an exemplary embodiment of the inventive concept, when the accelerated write function is enabled, various schemes can be used to determine whether to store the data in either the fixed accelerated write buffer TWB-p or the non-fixed accelerated write buffer TWB-np.

[0161] In exemplary embodiments of the inventive concept, such as Figure 10A As illustrated, the fixed accelerated write buffer TWB-p and the non-fixed accelerated write buffer TWB-np can be filled with user data DTa, DTb, DT0 and DT1. In this case, storage device 1200 can notify host 1100 that a dump operation is required by setting a specific bit (e.g., bit [5]) of the exception event status field of the attribute (e.g., “wExceptionEventStatus”).

[0162] Host 1100 can check the exception event status field of attributes via query requests and can also check if a dump operation is required at storage device 1200. Host 1100 can, like a reference... Figure 7 The storage device 1200 is configured with the accelerated write buffer dump enable field or the hibernation accelerated write buffer dump enable field as described to allow dump operations of the storage device 1200.

[0163] When the dump function is permitted (or enabled) under the control of host 1100, storage device 1200 can perform a dump operation. For example, in an idle or hibernating state, storage device 1200 can dump user data DT0 and DT1 stored in the non-fixed accelerated write buffer TWB-np to the third storage block BLK3 of user storage area UST. In an exemplary embodiment of the inventive concept, even if the dump operation is permitted under the control of host 1100, user data DTa and DTb stored in the fixed accelerated write buffer TWB-p may not be dumped to user storage area UST. In other words, user data DTa and DTb stored in the fixed accelerated write buffer TWB-p are retained, while user data DT0 and DT1 stored in the non-fixed accelerated write buffer TWB-np are dumped.

[0164] Subsequently, storage device 1200 can receive a read command for the first logical block address LBA1 from host 1100. In this case, storage device 1200 can read the first data DT1 stored in the third storage block BLK3 of user storage area UST and output the read first data DT1 to host 1100.

[0165] In an exemplary embodiment of the inventive concept, because the first data DT1 is written (e.g., SLC programmed) into the non-fixed accelerated write buffer TWB-np, but the first data DT1 is dumped to the user memory area UST due to a dump operation, the first data DT1 can be read by a normal read operation (e.g., a TLC read operation). In other words, the first data DT1 can be SLC programmed but read by TLC.

[0166] refer to Figure 1 , Figure 8 and Figure 10B The zeroth data DT0 and the first data DT1 can be stored in the second storage block BLK2 of the non-fixed accelerated write buffer TWB-np, and the a data DTa can be stored in the third storage block BLK3 of the user storage area UST.

[0167] Subsequently, based on an explicit request from host 1100 or an internal policy of storage device 1200, the a-th data DTa of user storage area UST can be moved to the first storage block BLK1 of fixed accelerated write buffer TWB-p. For example, storage device 1200 can read the a-th data DTa from the third storage block BLK3 of user storage area UST and store the read a-th data DTa in the first storage block BLK1 of fixed accelerated write buffer TWB-p. Afterwards, the a-th data DTa stored in the third storage block BLK3 of user storage area UST can be invalidated, deleted, or unmapped. In an exemplary embodiment of the present invention, even if the a-th data DTa is invalidated, deleted, or unmapped, the a-th logical block address LBAa corresponding to the a-th data DTa can maintain its mapping to the first storage block BLK1 of fixed accelerated write buffer TWB-p.

[0168] Subsequently, storage device 1200 can receive a read command from host 1100 for the logical block address LBAa corresponding to the data a-th data DTa. In this case, storage device 1200 can read the data a-th data DTa stored in the first storage block BLK1 of the fixed accelerated write buffer TWB-p and can transmit the read data a-th data DTa to host 1100.

[0169] In an exemplary embodiment of the inventive concept, the operation of reading the a-th data DTa stored in the first storage block BLK1 of the fixed accelerated write buffer TWB-p can be faster than the operation of reading data stored in the third storage block BLK3 of the user storage area UST. In other words, the storage device 1200 according to an exemplary embodiment of the inventive concept can support fast read operations (e.g., accelerated read operations) of specific data by storing and maintaining specific data in the accelerated write buffer TWB (or the fixed accelerated write buffer TWB-p).

[0170] In an exemplary embodiment of the inventive concept, storage device 1200 may notify host 1100 of the remaining (or free) capacity of the accelerated write buffer TWB in response to a request from host 1100. Storage device 1200 may write information about the remaining free capacity of the accelerated write buffer TWB to an attribute's available accelerated write buffer size field (e.g., "dAvailableTurboWriteBufferSize"). Host 1100 can obtain the capacity information of the accelerated write buffer TWB by reading the available accelerated write buffer size field (e.g., by querying UPIU).

[0171] For example, storage device 1200 may separately record the remaining capacity of the fixed accelerated write buffer TWB-p and the remaining capacity of the non-fixed accelerated write buffer TWB-np in the Available Accelerated Write Buffer Size field. As another example, storage device 1200 may record the total remaining capacity of the accelerated write buffers TWB in the Available Accelerated Write Buffer Size field. The storage device 1200 may record the remaining capacity of the accelerated write buffers TWB as a whole or separately via flag settings on host 1100.

[0172] For example, storage device 1200 may record a capacity smaller than the actual free capacity of the Accelerated Write Buffer (TWB) in the Available Accelerated Write Buffer Size field. In non-volatile storage devices such as flash memory 1220, data reliability may be reduced when the time between consecutive erase operations is less than a threshold time.

[0173] Because the capacity of the accelerated write buffer (TWB) is smaller than that of the user storage area (UST), and the TWB is used in an SLC (Simplified Data Interchange) scheme, it can be filled with data much faster than the user storage area (UST). Furthermore, when the host 1100 prefers high-speed accelerated writes, the TWB can be filled with data even faster.

[0174] When data is being intensively written to the accelerated write buffer TWB, the following series of operations are performed during a short time window: a first erase operation is performed on the accelerated write buffer TWB, data is written to the accelerated write buffer TWB, the data in the accelerated write buffer TWB is dumped, a second erase operation is performed on the accelerated write buffer TWB, and data is written to the accelerated write buffer TWB.

[0175] In this scenario, if the time between the first and second erase operations is less than a threshold time, the reliability of data written to the accelerated write buffer TWB after the second erase operation may be reduced. To improve reliability, even if a specific block of the accelerated write buffer TWB does not store valid data and is reusable after an erase operation, the storage device 1200 may record a capacity excluding the capacity of the specific block in the available accelerated write buffer size field if the time elapsed since the last erase operation of the specific block is less than a threshold time.

[0176] Figure 11 This is a diagram illustrating a method of operation of a storage system according to an exemplary embodiment of the inventive concept. (Refer to...) Figure 1 and Figure 11 This describes a read operation of storage system 1000. Storage device 1200 may include a fixed accelerated write buffer (TWB-p) 1222, a non-fixed accelerated write buffer (TWB-np) 1224, and a user storage area (UST) 1226. As discussed above, the fixed accelerated write buffer (TWB-p) 1222 may be a region where data stored therein is prohibited from moving to the user storage area (UST) 1226. The non-fixed accelerated write buffer (TWB-np) 1224 may be a region where data stored therein is allowed to move to the user storage area (UST) 1226.

[0177] In operation S110, host 1100 can transmit a command UPIU including a read command to storage device 1200. Host 1100 provides a read address in the read command, the read address being the address of the data to be read. In this case, the provided read address includes a logical block address (LBA) and a counter (CNT). Here, the logical block address (LBA) may correspond to the starting address of the read data, and the counter (CNT) indicates an address range. For example, host 1100 can provide a logical block address (LBA) of "100" and a counter (CNT) of "1" as the read address.

[0178] Storage device 1200 receives a read command, such as a read request, from host 1100. In response to the read command, storage device 1200 reads data DT "100" stored in logical block address LBA "100". For example, data DT "100" may be data stored in a non-fixed accelerated write buffer (TWB-np) 1224 of the accelerated write buffer TWB. Storage device 1200 reads data DT "100" stored in the non-fixed accelerated write buffer (TWB-np) 1224. According to an exemplary embodiment of the inventive concept, storage device 1200 may read data DT from at least one of a fixed accelerated write buffer (TWB-p) 1222, a non-fixed accelerated write buffer (TWB-np) 1224, and a user storage area (UST) 1226. This will be explained below (e.g., in...). Figures 17 to 21 (In Chinese) different scenarios are discussed in detail.

[0179] In operation S120, storage device 1200 transfers data DT "100" stored in non-fixed accelerated write buffer (TWB-np) 1224 to host 1100. For example, storage device 1200 may send a DATA IN UPIU packet (data transfer packet) to host 1100 that includes the read data DT "100". Multiple DATA IN UPIU packets may be sent to transfer all requested data to host 1100.

[0180] In operation S130, storage device 1200 may transmit a response to host 1100, thereby providing notification that read data DT "100" has been completely transmitted. In the UFS interface, storage device 1200 may transmit a response UPIU to host 1100 in order to transmit the response to host 1100. In particular, according to an exemplary embodiment of the inventive concept, read data information including attributes of read data DT may be included in the response UPIU. The read data information may include information about the location of storage device 1200 where read data DT "100" is stored (location information) and hit / miss information (feedback information). In the illustrated example, the read data information may also include information indicating that read data DT "100" was read from non-fixed accelerated write buffer (TWB-np) 1224. In addition, the read data information may also include information corresponding to a hit indicating that read data DT "100" exists in the accelerated write buffer TWB. In other scenarios, hit / miss information may include the movement information of the read data DT within the storage device 1200 (e.g., reference). Figure 20 and Figure 24 (As described) or indicating partial hit information of the partial hits of the data DT that exists in the accelerated write buffer TWB and user storage area (UST) 1226 (e.g., reference) Figure 21 (Describe it).

[0181] Figure 12 This is a table illustrating the reading of data information according to an exemplary embodiment of the inventive concept. (See reference) Figure 12 Read data information (RDI) can be implemented using the Read Data Information (RDI) field included in the UPIU response.

[0182] When storage device 1200 transmits a response to host 1100 using the UFS interface, the response UPIUs illustrated in the table can be defined. An exemplary embodiment of the inventive concept's response UPIU may include information indicating the completion of a task requested by host 1100 and the status of a task that storage device 1200 intends to provide to host 1100. The response UPIU includes a basic UPIU header and additional information. A 12-byte basic UPIU header is defined in the UFS interface.

[0183] The Read Data Information (RDI) according to an exemplary embodiment of the inventive concept can be assigned to the sixth byte 5 of the basic UPIU header. The Read Data Information (RDI) can have a length of 8 bits. For example, the lower four bits of the Read Data Information (RDI) can indicate the location information of the region from which read data is taken. The higher four bits of the Read Data Information (RDI) can be configured to indicate feedback information, such as hit / miss or movement.

[0184] Assume the 8-bit Read Data Information RDI included in the UPIU response is "0000 0000". The high four bits do not contain information, and the low four bits indicate that the data was read from the User Memory Area (UST). A high four bit of "0000" means no information is included. A low four bit of "0001" means the data was read from the Fixed Accelerated Write Buffer (TWB-p) area. A low four bit of "0010" means the data was read from the Non-Fixed Accelerated Write Buffer (TWB-np) area. Fields with low four bits of "0100" and "1000" in the Read Data Information RDI can be reserved.

[0185] The high four bits of the 8-bit Read Data Information (RDI) included in the UPIU response can be configured to indicate a hit / miss or a move. A fourth or least significant bit of the high four bits of the Read Data Information (RDI) being "1" (e.g., "0001") indicates a partial hit, meaning a portion of the requested data is present in the Accelerated Write Buffer (TWB). A third bit of the high four bits of the Read Data Information (RDI) being "1" (e.g., "0010") indicates that the requested data is moved between regions of the storage device 1200. A second bit of the high four bits of the Read Data Information (RDI) being "1" (e.g., "0100") indicates a miss, meaning the requested data is not present in the Accelerated Write Buffer (TWB). A hit is indicated when the first or most significant bit of the high four bits of the read data information RDI is "1" (e.g., the high four bits are "1000"). A hit means that the requested data exists in the accelerated write buffer TWB.

[0186] Here, the high four bits can be combined and used. For example, a high four bit of "0110" indicates both a "miss" and a "move" state. Alternatively, the low four bits can be the Read Data Information (RDI) provided by default when the storage device 1200 sends a UPIU response after the read data has been transferred. In contrast, the high four bits of the Read Data Information (RDI) can be transmitted solely through a query request from the host 1100. In other words, if the host 1100 intends to monitor data movement or hit / miss events in the storage device 1200, the host 1100 can request feedback information via a query request before sending a read command. (See reference...) Figure 13 Describe this process in detail.

[0187] Figure 13 The illustration depicts a query request process for a host to read the high four bits of data information according to an exemplary embodiment of the inventive concept. (Reference) Figure 13 The host 1100 can configure the storage device 1200 to include hit / miss values ​​indicating read data in the Read Data Information (RDI) by querying the settings attributes.

[0188] In operation S210, host 1100 performs a setting attribute before transmitting a read command, such that hit / miss feedback information indicating read data is included in the read data information RDI. For example, host 1100 can transmit a query request to storage device 1200 to set the attribute. After the setting attribute is set to "1", hit / miss feedback information indicating read data can be included in the response UPIU whenever a read command is transmitted.

[0189] In operation S220, host 1100 can transmit a command UPIU, including a read command, to storage device 1200. Host 1100 can provide logical block address LBA "200" and count CNT "2" as the read address.

[0190] In operation S230, storage device 1200 can read data from the storage area corresponding to the read address, generate a DATA IN UPIU data packet, and transmit the DATA IN UPIU data packet to host 1100.

[0191] In operation S240, storage device 1200 transmits a response UPIU including read data information RDI to host 1100. The read data information RDI includes feedback information indicating whether the read data was hit or not. Storage device 1200 may transmit the read data information RDI, including feedback information, to host 1100 whenever a read command is received, before receiving an additional query request to change configuration attributes.

[0192] Figure 14 A method for transmitting additional information via a response, according to an exemplary embodiment of the inventive concept, is illustrated. (See reference) Figure 14 When the read data corresponds to a partial hit, the storage device 1200 can transmit address information to the host 1100 by using a specific field of the response UPIU.

[0193] If the read data requested by host 1100 corresponds to a partial hit, storage device 1200 can notify host 1100 of the partial hit by using feedback information from the Read Data Information RDI. For example, a logical value of the feedback information (e.g., the high four bits of the Read Data Information RDI) of "0001" indicates that the read data corresponds to a partial hit. Storage device 1200 can additionally write LBA length information about the partial hit into the sense data field in response to the UPIU.

[0194] For example, if the requested data falls within the logical block address range of LBA 100 to LBA 150, data from LBA 100 to LBA 120 may correspond to a hit, while data from LBA 121 to LBA 150 may correspond to a miss. In this case, storage device 1200 can write the LBA length information corresponding to the hit or miss into bytes (k+2) to (k+17) of the sense data field and can send a response UPIU including the LBA length information to host 1100. A description of writing the LBA length information into the sense data field is given here, but the inventive concept is not limited thereto. In the case of a partial hit, it is well understood that the reserved field of the response UPIU can be used to load the LBA length information.

[0195] Figure 15 The illustration shows a method for obtaining detailed information when a partial hit occurs in a storage system, according to an exemplary embodiment of the inventive concept. Reference will be made below. Figure 1 and Figure 15 The read operation of the storage system 1000 according to the inventive concept is described. Here, it is assumed that the configuration attributes (=1) of the storage device 1200 have been completed through a query request.

[0196] In operation S310, host 1100 can transmit a command UPIU including a read command to storage device 1200. Host 1100 includes information about the data to be read (LBA: 200, CNT: 2) in the read command. In response to the read command, storage device 1200 reads data DT "200" and "201" stored at logical block address LBA "200". Storage device 1200 can also read data DT "200" stored in the fixed accelerated write buffer (TWB-p) 1222 of the accelerated write buffer TWB in response to the read command. Storage device 1200 can also read data DT "201" stored in the user storage area (UST) 1226 in response to the read command.

[0197] In operation S320, storage device 1200 transmits read data DT "200" and "201" to host 1100. For example, storage device 1200 may transmit at least one DATA INUPIU data packet including read data DT "200" and "201" to host 1100.

[0198] In operation S330, storage device 1200 can transmit a response to host 1100. Storage device 1200 can transmit a response UPIU including read data information RDI. Depending on the configuration attributes, information about the location of read data DT "200" and "201" stored in storage on storage device 1200, as well as hit / miss information, can be included in the read data information RDI. In the illustrated example, it is assumed that the read data information RDI has the logical value "0001 0001". Figure 12 The definition is that the lower four bits of the read data information RDI, i.e. "0001", indicate the fixed accelerated write buffer (TWB-p) 1222, while the higher four bits of the read data information RDI, i.e. "0001", indicate a partial hit.

[0199] In operation S340, host 1100 can check the partial hit status of read data information RDI and determine whether additional information is needed. If it is determined that additional information is needed (yes), the process proceeds to operation S350. If it is determined that additional information is not needed (no), the process is terminated.

[0200] In operation S350, host 1100 transmits a query request to storage device 1200 for additional information regarding the read data corresponding to the partial hit. For example, host 1100 may transmit a query request for extended read data information RDIe regarding the read data corresponding to the partial hit.

[0201] In operation S360, storage device 1200 can prepare an extended read data information RDIe for a read operation (executed from operation S310 to operation S330) and can return the extended read data information RDIe to host 1100. For example, storage device 1200 can provide a response UPIU including the extended read data information RDIe to host 1100. The extended read data information RDIe may be, for example, read data attribute information, which is about the read data DT "200" and "201" received by host 1100 in response to the query request in operation S320 and is separate from the read data information RDIe.

[0202] Figure 16 References illustrating exemplary embodiments according to the inventive concept. Figure 15 The description extends the reading of data from the table. (See reference) Figure 15 and Figure 16 The host 1100, which checks the partial hit status of read data, can request extended read data information RDIe through a query request. In this case, the storage device 1200 can load the extended read data information RDIe as read data attribute information on the response UPIU and can transmit the response UPIU to the host 1100.

[0203] The extended read data information RDIe can include the address (LBA and count) of the read data, hit rate, etc. For example, the LBA value of the memory used to read the data can be assigned to the four bytes Byte0 to Byte3 of the extended read data information RDIe. The LBA count of the read data can be assigned to one byte (e.g., Byte4). Specifically, the hit rate of the fixed accelerated write buffer (TWB-p) 1222 can be assigned to Byte5, and the hit rate of the non-fixed accelerated write buffer (TWB-np) 1224 can be assigned to Byte6. In other words, Byte5 of the two bytes used for the hit rate can be used to assign the hit rate of the fixed accelerated write buffer (TWB-p) 1222. Byte6 of the two bytes used for the hit rate can be used to assign the hit rate of the non-fixed accelerated write buffer (TWB-np) 1224. The remaining byte Byte7 can be used as a reserved field, and additional read data attribute information can be written to this reserved field if necessary.

[0204] The above describes an example of an extended read data information RDIe regarding read data previously transmitted via a query request from host 1100. It is well understood that the type or size of each piece of information to be included in the extended read data information RDIe can be added or modified differently.

[0205] Figures 17 to 21 This is a diagram illustrating an exemplary embodiment of a method for receiving and reading data information for each scenario, according to the inventive concept. Reference will be made to... Figures 17 to 21 This describes an example where storage device 1200 includes read data information RDI with various attributes in the response UPIU and then transmits the response UPIU. In other words, it will be described under the assumption that host 1100 has already completed the setup of storage device 1200's attributes (=1) via a query request. Figure 17 and Figure 21 .

[0206] Figure 17 and Figure 18 This example illustrates reading data (e.g., data DT) from a non-fixed accelerated write buffer (TWB-np) 1224 or a fixed accelerated write buffer (TWB-p) 1222. The position information in the read data information RDI indicates whether the read data was read from the non-fixed accelerated write buffer (TWB-np) 1224 or the fixed accelerated write buffer (TWB-p) 1222. In other words, the lower four bits of the read data information RDI can be "0010" or "0001". Feedback information indicates a occurrence in the accelerated write buffer TWB. In other words, the higher four bits of the read data information RDI can be "1000".

[0207] In an exemplary embodiment of the inventive concept, read data can be read from both the non-fixed accelerated write buffer (TWB-np) 1224 and the fixed accelerated write buffer (TWB-p) 1222, in which case the lower four bits of the read data information RDI can be "0011".

[0208] Figure 17 An example illustrating the hit status of a requested read data according to an exemplary embodiment of the inventive concept is given. (See also:) Figure 17 Read data information RDI corresponding to the case of reading data requested from the non-fixed accelerated write buffer (TWB-np) 1224 is provided to the host 1100.

[0209] In operation S410, host 1100 can transmit a command UPIU including a read command to storage device 1200. It is assumed that the read address provided with the read command includes logical block address LBA "100" and counter CNT "1". Storage device 1200 can read data stored in non-fixed accelerated write buffer (TWB-np) 1224 in response to the read command.

[0210] In operation S420, storage device 1200 transmits data DT "100" stored in non-fixed accelerated write buffer (TWB-np) 1224 to host 1100. For example, storage device 1200 may transmit a DATA INUPIU packet including the read data DT "100" to host 1100.

[0211] In operation S430, the storage device 1200 may transmit a response to the host 1100. In this case, the storage device 1200 according to an exemplary embodiment of the inventive concept may transmit a response UPIU. In particular, the response UPIU according to an exemplary embodiment of the inventive concept may include read data information RDI (=“1000 0010”). Figure 12 The definition is as follows: because the high four bits of the read data information RDI are "1000", the read data information RDI indicates that a data event occurred in the accelerated write buffer TWB. Because the low four bits are "0010", the read data information RDI indicates that the read data DT "100" was read from the non-fixed accelerated write buffer (TWB-np) 1224.

[0212] The host 1100 can receive and read data information RDI (="1000 0010") and can perform various storage management operations on the accelerated write buffer TWB or the user storage area UST.

[0213] Figure 18An example of the hit status of data requested for reading according to an exemplary embodiment of the inventive concept is illustrated. Figure 18 This example illustrates the scenario of reading data requested from a fixed accelerated write buffer (TWB-p) 1222.

[0214] In operation S510, host 1100 can transmit a command UPIU including a read command to storage device 1200. It is assumed that the read address provided with the read command includes logical block address LBA "200" and counter CNT "1". Storage device 1200 can read data DT "200" stored in fixed accelerated write buffer (TWB-p) 1222 in response to the read command.

[0215] In operation S520, storage device 1200 transmits data DT "200" stored in fixed accelerated write buffer (TWB-p) 1222 to host 1100. For example, storage device 1200 may transmit a DATA INUPIU packet including the read data DT "200" to host 1100.

[0216] During operation S530, the storage device 1200 can transmit a response to the host 1100. In this case, the storage device 1200 of the inventive concept can transmit a response UPIU. Specifically, the response UPIU of the inventive concept may include read data information RDI (=“1000 0001”). According to Figure 12 The definition is as follows: because the high four bits of the read data information RDI are "1000", the read data information RDI indicates that a data event occurred in the accelerated write buffer TWB. Because the low four bits are "0001", the read data information RDI indicates that the read data DT "200" was read from the fixed accelerated write buffer (TWB-p) 1222.

[0217] The host 1100 can receive and read data information RDI (="1000 0001") and can perform various storage management operations on the accelerated write buffer TWB or the user storage area UST.

[0218] Figure 19 An example of a data miss state in an exemplary embodiment of the inventive concept is illustrated. Figure 19 This example illustrates a scenario where data requested for reading is read from the user storage area (UST) 1226 instead of the accelerated write buffer TWB.

[0219] In operation S610, host 1100 can transmit a command UPIU including a read command to storage device 1200. It is assumed that the read address provided with the read command includes logical block address LBA "300" and counter CNT "1". Storage device 1200 can read data DT "300" stored in user storage area (UST) 1226 in response to the read command.

[0220] In operation S620, storage device 1200 transmits data DT "300" read from user storage area (UST) 1226 to host 1100. For example, storage device 1200 may transmit a DATA IN UPIU data packet including the read data DT "300" to host 1100.

[0221] In operation S630, the storage device 1200 can transmit a response to the host 1100. In this case, the storage device 1200 according to an exemplary embodiment of the inventive concept can transmit a response UPIU. In particular, the response UPIU according to an exemplary embodiment of the inventive concept may include read data information RDI (=“0100 0000”). Figure 12 The definition is such that, because the high four bits of the Read Data Information RDI are "0100", the Read Data Information RDI (e.g., its feedback information) indicates a miss occurred in the Accelerated Write Buffer (TWB). Because the low four bits are "0000", the Read Data Information RDI indicates that the read data DT "300" was read from User Memory (UST) 1226. In other words, the location information of the Read Data Information RDI indicates from which the read data DT was read from User Memory (UST) 1226.

[0222] The host 1100 can receive and read data information RDI (=“0100 0000”) and can perform various memory management operations on the accelerated write buffer TWB or the user storage area UST.

[0223] Figure 20 An example illustrating the movement state of data requested for reading according to an exemplary embodiment of the inventive concept is shown. Figure 20 This example illustrates the scenario where the data to be read is moved from the user storage area (UST) 1226 to the accelerated write buffer TWB via a move operation before a read operation.

[0224] In operation S710, host 1100 can transmit a command UPIU including a read command to storage device 1200. It is assumed that the read address provided with the read command includes logical block address LBA "300" and counter CNT "1". The requested data "300" can be moved from user memory (UST) 1226 to fixed accelerated write buffer (TWB-p) 1222 via a move operation. Storage device 1200 can then read the requested data DT "300" stored in the fixed accelerated write buffer (TWB-p) 1222 in response to the read command.

[0225] In operation S720, storage device 1200 transmits data DT "300" read from fixed accelerated write buffer (TWB-p) 1222 to host 1100. For example, storage device 1200 may transmit a DATA INUPIU packet including the read data DT "300" to host 1100.

[0226] In operation S730, the storage device 1200 can transmit a response to the host 1100. In this case, the storage device 1200 according to an exemplary embodiment of the inventive concept can transmit a response UPIU. In particular, the response UPIU according to an exemplary embodiment of the inventive concept may include read data information RDI (=“1010 0001”). Figure 12 The definition is such that, because the high four bits of the read data information RDI are "1010", the read data information RDI (e.g., its feedback information) indicates a hit state (e.g., a hit occurring in the fixed accelerated write buffer (TWB-p) 1222) and a movement state. Because the low four bits are "0001", the read data information RDI (e.g., its position information) indicates that the read data DT "300" was read from the fixed accelerated write buffer (TWB-p) 1222.

[0227] The host 1100 can receive and read data information RDI (=“1010 0001”) and can perform various storage management operations on the accelerated write buffer TWB or the user storage area UST.

[0228] Figure 21 An example of a partial hit state of data requested for reading according to an exemplary embodiment of the inventive concept is illustrated. (See references) Figure 21 Host 1100 can check for partial hits and can request extended read data information RDIe as additional information about the read data.

[0229] In operation S810, host 1100 can transmit a command UPIU including a read command to storage device 1200. The read command includes a read address (LBA: 200, CNT: 2). In response to the read command, storage device 1200 reads data DT "200" and "201" stored at logical block address LBA "200". Storage device 1200 can also read data DT "200" stored in the fixed accelerated write buffer (TWB-p) 1222 of the accelerated write buffer TWB in response to the read command. Storage device 1200 can also read data DT "201" stored in user storage area (UST) 1226 in response to the read command. In other words, the data DT can be distributed between the fixed accelerated write buffer (TWB-p) 1222 and the user storage area (UST) 1226, and the data DT is read from both the fixed accelerated write buffer (TWB-p) 1222 and the user storage area (UST) 1226.

[0230] In operation S820, storage device 1200 transmits read data DT "200" and "201" to host 1100. For example, storage device 1200 may transmit at least one DATA INUPIU data packet including read data DT "200" and "201" to host 1100.

[0231] In operation S830, storage device 1200 can transmit a response to host 1100. Storage device 1200 can transmit a response UPIU including read data information RDI. Depending on the configuration attributes, the read data information RDI can include information about the location where storage device 1200 stores read data DT "200" and "201", as well as hit / miss information. In the illustrated example, it is assumed that the read data information RDI has the logical value "0001 0001". Figure 12 The bit value definition is that the lower four bits of the read data information RDI (e.g., position information), i.e., “0001”, indicate the fixed accelerated write buffer (TWB-p) 1222, while the higher four bits of the read data information RDI (e.g., feedback information), i.e., “0001”, indicate a partial hit.

[0232] In operation S840, host 1100 can check the partial hit status of read data information RDI based on the feedback information of read data information RDI, and can determine whether additional information (e.g., extended read information RDIe) is needed. When it is determined that additional information is needed (yes), the process proceeds to operation S850. When it is determined that no additional information is needed (no), the process is terminated.

[0233] In operation S850, host 1100 transmits a query request to storage device 1200 for additional information regarding the read data corresponding to the partial hit. For example, host 1100 may transmit a query request for extended read data information RDIe regarding the read data corresponding to the partial hit.

[0234] In operation S860, storage device 1200 may return extended read data information RDIe for the read operation (executed from operation S810 to operation S830) to host 1100. For example, storage device 1200 may provide a response UPIU including the extended read data information RDIe to host 1100. The extended read data information RDIe may be, for example, read data attribute information about read data DT "200" and "201" previously received by host 1100.

[0235] According to the illustrated extended read data information RDIe, the logical block address LBA "200" can be recorded in the field corresponding to Bytes 0 to 3 of the extended read data information RDIe. The LBA count "2" can be assigned to the field corresponding to Byte 4 of the extended read data information RDIe. The hit rate (e.g., 50%) of the fixed accelerated write buffer (TWB-p) 1222 can be recorded in the field corresponding to Byte 5. Because data read from the non-fixed accelerated write buffer (TWB-np) 1224 is not available, a hit rate of 0% can be recorded in the field corresponding to Byte 6.

[0236] Figure 22 This illustrates exemplary embodiments based on the inventive concept. Figure 1 A diagram illustrating the hierarchical structure of the storage system. (See reference) Figure 22 The storage system 1000 may include a host 1100 and a storage device 1200. The host 1100 may include an application AP-h, a file system FS-h, a device manager DM-h, a UFS application layer UAP-h, a UFS transport protocol layer UTP-h, and a UFS interconnect layer UIC-h.

[0237] The application AP-h can include various applications, processes, etc., driven at host 1100. The file system FS-h can be configured to organize and manage various data generated by the application AP-h. In an exemplary embodiment of the present invention, the application AP-h or the file system FS-h can be configured to determine a logical block address range to specify a logical block address range for a specific region, as referenced... Figures 15 to 19 As described, information about the determined logical block address range can be provided to lower layers (e.g., Device Manager DM-h or UFS Application Layer UAP-h).

[0238] The UFS application layer UAP-h is configured to support various commands between host 1100 and storage device 1200. For example, UFS application layer UAP-h may include an input / output (I / O) stream manager IOSM-h and a UFS command set UCS-h. The I / O stream manager IOSM-h is configured to manage requests from application AP-h or file system FS-h.

[0239] In an exemplary embodiment of the inventive concept, the I / O stream manager IOSM-h can be configured to identify specific values ​​of input / output from the application AP-h or the file system FS-h. The I / O stream manager IOSM-h can be configured to manage the priority of requests from the application AP-h or the file system FS-h, or to support various functions based on requests from the application AP-h or the file system FS-h. In an exemplary embodiment of the inventive concept, the I / O stream manager IOSM-h can be configured to support accelerated write functionality or accelerated read functionality.

[0240] In an exemplary embodiment of the inventive concept, a specific application or process designated by host 1100 or a user of host 1100 may use accelerated write or accelerated read. The I / O stream manager IOSM-h may determine whether to perform accelerated write or accelerated read in response to a write or read request made by a specific application or process to storage device 1200.

[0241] Additionally, specific data managed by the file system FS-h can use accelerated writes or accelerated reads. The I / O stream manager IOSM-h can determine whether to perform accelerated writes or accelerated reads in response to a write or read request from the storage device 1200 for specific data (e.g., metadata).

[0242] Additionally, the I / O stream manager IOSM-h can guide the movement of data written to storage device 1200. The I / O stream manager IOSM-h can adjust the read speed of data written to storage device 1200 by moving data to a fixed accelerated write buffer TWB-p, a non-fixed accelerated write buffer TWB-np, or the user storage area UST.

[0243] In exemplary embodiments of the present invention, as referenced Figures 11 to 14 As described, the I / O stream manager IOSM-h can determine the region in which specific data will be stored (e.g., fixed accelerated write buffer TWB-p, non-fixed accelerated write buffer TWB-np, or user storage area UST) based on the attributes of specific data, and can provide information about the determination result (e.g., region information ARI) to the UFS command set UCS-h.

[0244] In exemplary embodiments of the present invention, as referenced Figures 11 to 21 As described, the I / O stream manager IOSM-h can determine the logical block address where specific data will be stored based on the attributes of specific data and a predetermined logical block address range, and can provide information about the determined logical block address range to the UFS command set UCS-h.

[0245] The UFS command set UCS-h can support various command sets between the host 1100 and the storage device 1200. In an exemplary embodiment of the inventive concept, the UFS command set UCS-h may include the UFS native command set and the UFS SCSI command set. The UFS command set UCS-h can be configured to transmit commands to the storage device 1200 based on requests from the application AP-h or the file system FS-h.

[0246] In an exemplary embodiment of the present invention, the UFS command set UCS-h can be configured to receive various information (e.g., logical block address, region information, logical block address range, or range region information) from the I / O stream manager IOSM-h, and according to reference Figures 11 to 21 The described method generates various commands.

[0247] The UFS application layer UAP-h may also include a task manager that processes commands for controlling the command queue.

[0248] The Device Manager DM-h can manage device-level operations and device-level configurations. In an exemplary embodiment of the inventive concept, the Device Manager DM-h can manage query requests for setting or checking various information about the storage device 1200.

[0249] The UFS transport protocol layer UTP-h can provide services to the upper layers. The UFS transport protocol layer UTP-h can generate commands or information provided by the UFS application layer UAP-h or query requests provided by the device manager DM-h in the form of UPIU (UFS Protocol Information Unit) packets.

[0250] In an exemplary embodiment of the inventive concept, the UFS transport protocol layer UTP-h and the device manager DM-h can communicate with each other via UDM-SAP (UDM - Service Access Point). The UFS transport protocol layer UTP-h and the UFS application layer UAP-h can communicate with each other via UTP_CMD_SAP or UTP_TM_SAP.

[0251] The UFS interconnect layer UIC-h can manage the connection to the storage device 1200. In an exemplary embodiment of the inventive concept, the UFS interconnect layer UIC-h may include hardware configurations such as MIPI Unipro or MIPI M-PHY physically connected to the UFS interconnect layer UIC-d of the storage device 1200. This allows the host 1100 and the storage device 1200 to establish a communication channel with each other. In an exemplary embodiment of the inventive concept, the UFS interconnect layer UIC-h and the UFS transport protocol layer UTP-h can communicate via UIC-SAP, and the UFS interconnect layer UIC-h and the device manager DM-h can communicate via UIO-SAP.

[0252] Storage device 1200 may include a storage region manager MAM-d, a storage region property manager MAPM-d, a device manager DM-d, a UFS application layer UAP-d, a UFS transport protocol layer UTP-d, and a UFS interconnect layer UIC-d. In an exemplary embodiment of the inventive concept, the configuration of the UFS application layer UAP-d, the UFS transport protocol layer UTP-d, and the UFS interconnect layer UIC-d may be similar to the configuration of the UFS application layer UAP-h, the UFS transport protocol layer UTP-h, and the UFS interconnect layer UIC-h of host 1100, and allow the corresponding layers to logically communicate with each other; therefore, additional descriptions will be omitted to avoid redundancy.

[0253] The storage area property manager MAPM-d of storage device 1200 can specify and manage the area where write data received from host 1100 is stored. For example, as described above, depending on the explicit request or internal policy of host 1100, write data received from host 1100 can be written in at least one of the fixed accelerated write buffer TWB-p, the non-fixed accelerated write buffer TWB-np, and the user storage area UST. The storage area property manager MAPM-d can select the space where write data received from host 1100 is stored based on the various schemes described above, and can store the write data in the selected space.

[0254] As described above, based on explicit requests or internal policies of host 1100, storage area manager MAM-d of storage device 1200 can control data movement / dumping / migration between fixed accelerated write buffer TWB-p, non-fixed accelerated write buffer TWB-np and user storage area UST.

[0255] The above hierarchy and functions of each of the host 1100 and storage device 1200 are merely exemplary, and the inventive concept is not limited thereto.

[0256] Figure 23This is a block diagram illustrating in detail an exemplary embodiment of a storage system 1000 according to the inventive concept. (See reference...) Figure 22 and Figure 23 The storage system 1000 may include a host 1100 and a storage device 1200. The host 1100 and storage device 1200 can be configured as shown in the reference [reference needed]. Figures 1 to 22 Operate as described.

[0257] The host 1100 may include an application processor 1110, random access memory (RAM) 1120, a modem 1130, a device driver 1140, a speaker 1150, a display 1160, a touch panel 1170, a microphone 1180, and an image sensor 1190.

[0258] Application processor 1110 can execute application AP-h and file system FS-h. Application processor 1110 can use RAM 1120 as system memory. Application processor 1110 can communicate with external devices via modem 1130, either wired or wirelessly. For example, modem 1130 may be included in application processor 1110.

[0259] Application processor 1110 can communicate with peripheral devices via device driver 1140. For example, application processor 1110 can communicate with speaker 1150, display 1160, touch panel 1170, microphone 1180, image sensor 1190 and storage device 1200 via device driver 1140.

[0260] Device driver 1140 may include device manager DM-h, UFS application layer UAP-h, UFS transport protocol layer UTP-h, and UFS interconnect layer UIC-h. For example, device driver 1140 may be included in application processor 1110.

[0261] Speaker 1150 and display 1160 can be user output interfaces for transmitting information to a user. Touch panel 1170, microphone 1180 and image sensor 1190 can be user input interfaces for receiving information from a user.

[0262] In an exemplary embodiment of the present invention, storage device 1200 can be used as a high-capacity storage medium for host 1100. Storage device 1200 can be an embedded UFS device or a memory card type UFS device. A memory card type UFS device can be inserted into a UFS slot included in host 1100 or can be removed from the UFS slot.

[0263] Figure 24 A diagram illustrating an exemplary embodiment of the inventive concept applied to a storage system 1000 is provided. (See reference...) Figure 23and Figure 24 The storage system 1000 can provide a settings screen via the display 1160. One of the settings screens can provide the user with information about the acceleration mode.

[0264] The storage system 1000 can display a list of applications APP1 to APPn to which acceleration modes can be applied via a display 1160. Additionally, the storage system 1000 can display a switch on the display 1160 that allows the user to adjust the acceleration mode of applications APP1 to APPn.

[0265] In operation S910, the user can touch the activation position of the acceleration mode for the third application APP3. The storage system 1000 can sense the user's touch; in other words, the third application APP3 is activated via the touch panel 1170. In operation S920, information about the third application APP3 or the process of the third application APP3 can be transmitted to the I / O stream manager IOSM-h.

[0266] When information about a third application APP3 or a process of the third application APP3 is received, in operation S930, the I / O stream manager IOSM-h can preserve the movement operation for subsequent reads of the third application APP3 or the process selected therefrom. For example, the I / O stream manager IOSM-h can set the movement attribute MA for data associated with the third application APP3 by querying the request UPIU, and can include the movement flag as movement information MV in the CMD UPIU when a read operation associated with the third application APP3 is required.

[0267] As another example, when a read operation is required to be associated with a third application APP3, the I / O Stream Manager IOSM-h can include the Motion Flag and Motion Attribute MA as Motion Information MV in the CMD UPIU. For example, the I / O Stream Manager IOSM-h can specify either the Fixed Accelerated Write Buffer TWB-p or the Non-Fixed Accelerated Write Buffer TWB-np as the Destination Information DST for the Motion Attribute MA.

[0268] When data associated with the third application APP3 is moved to either the fixed accelerated write buffer TWB-p or the non-fixed accelerated write buffer TWB-np, the operation of reading data associated with the third application APP3 is accelerated. Therefore, the performance of the third application APP3 can be improved.

[0269] Figure 25 This is a block diagram illustrating a memory card using an exemplary embodiment of a storage system according to the inventive concept. (See reference) Figure 25The memory card 2200, connected to the host 2100, includes a memory controller 2210 and a non-volatile memory 2220. The memory controller 2210 is connected to the non-volatile memory 2220. The memory controller 2210 is configured to access the non-volatile memory 2220. For example, the memory controller 2210 is configured to control read operations, write operations, erase operations, and background operations of the non-volatile memory 2220. Background operations include operations such as wear leveling and garbage collection.

[0270] For example, memory controller 2210 may include SRAM 2212, CPU 2213, host interface 2215, error correction engine (ECC) 2217, and memory interface 2219. (See reference...) Figure 1 and Figure 24 Similar to the memory controller 1210 described, the memory controller 2210 provides the read data information RDI to the host 2100.

[0271] The memory controller 2210 can communicate with an external device (e.g., host 2100) via the host interface 2215. The memory controller 2210 can communicate with the external device (e.g., host 2100) according to a specific communication protocol. For example, the memory controller 2210 can be configured to communicate with the external device according to at least one of a variety of communication protocols such as: Universal Serial Bus (USB), Multimedia Card (MMC), eMMC (embedded MMC), Peripheral Component Interconnect (PCI), PCI-express (PCI-E), Advanced Technology Attachment (ATA), Serial ATA, Parallel ATA, Small Computer Small Interface (SCSI), Enhanced Small Disk Interface (ESDI), Integrated Drive Electronics (IDE), FireWire, Universal Flash Storage (UFS), or High-Speed ​​Non-Volatile Memory (NVMe).

[0272] The non-volatile memory 2220 can be implemented using various non-volatile memory devices such as electrically erasable programmable ROM (EEPROM), NAND flash memory, NOR flash memory, phase change RAM (PRAM), resistive RAM (ReRAM), ferroelectric RAM (FRAM), or spin torque magnetic RAM (STT-MRAM).

[0273] For example, the memory controller 2210 and the non-volatile memory 2220 can be integrated into a single semiconductor device. The memory controller 2210 and the non-volatile memory 2220 can be integrated into a single semiconductor device to form a memory card. For example, the memory controller 2210 and the non-volatile memory 2220 can be integrated into a single semiconductor device to form a memory card such as a PC card (or PCMCIA card), a compact flash memory card (CF), a smart media card (SM, SMC), a memory stick, a multimedia card (MMC, RS-MMC, MMCmicro, or eMMC), an SD card (SD, miniSD, microSD, or SDHC), or universal flash memory (UFS).

[0274] Figure 26 This is a block diagram illustrating a portable terminal including a storage device according to an exemplary embodiment of the inventive concept. (See reference) Figure 26 The portable terminal 3000 according to an exemplary embodiment of the inventive concept includes a lens 3110, an image processing unit 3100, a wireless transceiver unit 3200, an audio processing unit 3300, an image file generation unit 3400, an embedded memory 3500, a user interface 3600, and a controller 3700.

[0275] The image processing unit 3100 may include an image sensor 3120 for sensing light incident through the lens 3110, an image processor 3130, and a display unit 3140. The wireless transceiver unit 3200 includes an antenna 3210, a transceiver 3220, and a modulator / demodulator (modem) 3230. The audio processing unit 3300 includes an audio processor 3310, a microphone 3320, and a speaker 3330. The image file generation unit 3400 may be a component for generating image files within the portable terminal 3000. Here, the embedded memory 3500 may be used as memory for the portable terminal 3000. Additionally, the embedded memory 3500 may include components related to a reference... Figures 1 to 24 The storage device 1200 described has essentially the same functions and configuration.

[0276] As described above, according to an exemplary embodiment of the inventive concept, the host can efficiently manage the storage device by using region information or hit / miss information of data read from the storage device using an accelerated write buffer.

[0277] Although the inventive concept has been described with reference to exemplary embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications in form and detail may be made therein without departing from the spirit and scope of the inventive concept as set forth in the appended claims.

Claims

1. A storage system comprising: a storage device including an accelerated write buffer and a user storage area implemented with a non-volatile memory; and a host configured to transmit, to the storage device, a read request for reading user data stored in the storage device, wherein, in response to the read request, the storage device transmits, to the host, the user data and read data information of the user data, wherein the accelerated write buffer includes a first buffer area in which data stored is prohibited from moving to the user storage area, and a second buffer area in which data stored is allowed to move to the user storage area, wherein the read data information includes location information indicating in which one of the user storage area, the first buffer area, and the second buffer area at least a part of the user data is located.

2. The storage system of claim 1, wherein, the read data information includes hit / miss information indicating whether the user data exists in the accelerated write buffer.

3. The storage system of claim 2, wherein, the hit / miss information includes movement information of the user data in the storage device, or partial hit information indicating a partial hit in which the user data exists in the accelerated write buffer and the user storage area.

4. The storage system of claim 3, wherein, the storage device writes the partial hit information and an address corresponding to the partial hit information in a sense data field of a response packet, and transmits the response packet to the host.

5. The storage system of claim 3, wherein, the storage device transmits, to the host, read data attribute information corresponding to the partial hit separately from the read data information in response to a query request of the host.

6. The storage system of claim 5, wherein, the read data attribute information includes an address or a hit rate corresponding to the partial hit.

7. The storage system of claim 2, wherein, the transmission of the hit / miss information is initiated by a query request of the host for setting attributes.

8. An operation method of a storage system including an accelerated write buffer having a first buffer area and a second buffer area, and a user storage area implemented with a non-volatile memory, the operation method comprising: receiving, from a host, a read request for reading user data stored in the non-volatile memory; reading the user data from the accelerated write buffer or the user storage area in response to the read request; transmitting the user data to the host by using a data transfer packet; and transmitting, to the host, read data information including location information of the user data, the location information indicating in which one of the user storage area, the first buffer area, and the second buffer area at least a part of the user data is located, wherein data is prohibited from moving from the first buffer area to the user storage area, and data is allowed to move from the second buffer area to the user storage area. the read data information includes information on a storage address of the user data.

9. The operating method of claim 8, wherein, the read data information includes information on a storage address of the user data.

10. The operating method of claim 9, wherein, The read data information includes hit / miss information indicating whether the user data exists in the accelerated write buffer.

11. The operating method of claim 10, wherein, The hit / miss information includes movement information of the user data in the storage system or partial hit information indicating a partial hit in which the user data exists in a distributed state in the accelerated write buffer and the user storage area. 12.The operating method of claim 11, further comprising: receiving a query request for setting whether to include the hit / miss information in the read data information. 13.The operating method of claim 11, further comprising: receiving, from the host, a query request for read data attribute information corresponding to the partial hit information; and transmitting, to the host, the read data attribute information in response to the query request. The read data attribute information includes a hit rate of the user data in the accelerated write buffer.

14. The method of operation of claim 13, wherein, 15.A storage device configured to communicate with a host by using a universal flash storage interface, the storage device comprising: a non-volatile memory device including an accelerated write buffer area and a user storage area; and a memory controller configured to read user data from the non-volatile memory device in response to a read request for reading the user data from the host, load read data information about the user data onto a response packet, and transmit the response packet to the host, wherein the read data information includes location information indicating in which one of the user storage area and the accelerated write buffer area at least a portion of the user data is located and hit information indicating whether different portions of the user data are respectively located in the accelerated write buffer area and the user storage area. The read data information includes hit / miss information indicating whether the user data exists in the accelerated write buffer.

16. The storage device of claim 15, wherein, The hit / miss information includes movement information of the user data in the storage device or partial hit information indicating a partial hit in which the user data exists in the accelerated write buffer and the user storage area.

17. The storage device of claim 16, wherein, ​

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