Motor current detection method and device

Abstract

The present disclosure provides a method and apparatus for measuring motor current, wherein the method includes: remodulating a pulse width modulation (PWM) signal generated based on a carrier signal so as to insert a reverse pulse with a minimum measurement time into a target PWM signal in the PWM signal during a period when the PWM signal is in a zero voltage vector, wherein the remodulated PWM signal is used to drive an inverter of a motor; and detecting a bus current in a circuit of the inverter within the minimum measurement time near a peak value of the carrier signal to determine the current of the motor.

Description

Technical Field

[0001] The present invention relates to motor control technology, in particular to motor phase current detection technology used in motor control. Background Art

[0002] Electric motors, such as permanent magnet synchronous and asynchronous motors, are now widely used in industry. To ensure control accuracy, most motor control systems require the acquisition of the currents in each phase of the motor windings to further control the motor's operation. Currently, most widely used motor control systems use at least two current sensors to acquire phase currents. However, high-precision current sensors not only increase the system size but are also expensive. Therefore, the use of a single current sensor to reconstruct three-phase currents has become a hot topic of research.

[0003] Figure 1 The motor drive system is shown as an example. Figure 2 The schematic diagram of pulse width modulation signal generation for motor drive is shown below. Figure 1 、 2 To illustrate a solution to reconstruct the current of each phase of the motor using a single current sensor. Figure 1 As shown, the inverter 200 for driving the motor 100 is composed of a first pair of bridge arms (Q1, Q2), a second pair of bridge arms (Q3, Q4), and a third pair of bridge arms (Q5, Q6), wherein each pair of bridge arms receives a PWM signal (such as a microcontroller unit MCU commonly used in motors, not shown in the figure) generated by a control module (such as a microcontroller unit MCU commonly used in motors, not shown in the figure). Figure 2 S in U 、S V 、S W As shown) and outputs the working voltage of the corresponding winding, for example, the first pair of bridge arms receives the PWM signal S at the gate terminals of the thyristors Q1 and Q2. U The output voltage u U To the u-phase winding of the motor, the second pair of bridge arms receives the PWM signal S at the gate terminals of the thyristors Q3 and Q4. V The output voltage u V To the V-phase winding of the motor, the third pair of bridge arms receives the PWM signal S at the gate terminals of thyristors Q5 and Q6. W The output voltage u W to the w-phase winding of the motor, thereby generating a corresponding current i in each phase winding U 、i V 、i W The current sensor is set in the main circuit of the inverter 200 to detect the bus current i dc .

[0004] like Figure 2 As shown, it shows the use of carrier signal uc Schematic diagram of generating pulse width modulation signals of motor inverter. As an example, the control module MCU of the motor uses the reference voltage u set for each phase winding bridge arm respectively. U,ref 、u W,ref 、u V,ref And the carrier signal u c To generate PWM signals for each bridge arm (S U S V S W ). As shown in the figure, the carrier signal u c In the changing cycle, for example, from time t l to t l+1 During the period of PWM signal S U 、S V 、S W There are four voltage vector modes alternately, in which in the first half cycle, at t l to t V1 During the time, the voltage vector pattern of the PWM signal is (1 1 1), that is, S U ,S V ,S W are all high level, for example, represented by '1'; at t V1 to t W1 During the time, the voltage vector pattern of the PWM signal is (1 01), that is, S U is high level, S V is low level, for example, represented by '0', and S W At t W1 to t U1 During the time period, the voltage vector pattern of the PWM signal is (1 0 0), that is, S U is high level, S V 、S W At t U1 to t U2 During the time, the voltage vector mode of the PWM signal is (0 0 0), that is, S U 、S V 、S W are all low level. c In the subsequent cycle, the previous voltage vector patterns are repeated. For example, at t U2 to t W2 During the time, the voltage vector mode of the PWM signal is (1 00), that is, S U High level, S V is low level, S W At t W2 to t V2During the time, the voltage vector pattern of the PWM signal is (10 1), that is, S U High level, S V is low level, S W is high level. V2 to t L+1 During the time, the voltage vector pattern of the PWM signal is (1 1 1), that is, S U 、S V 、S W Both are high level.

[0005] like Figure 1 As shown, in the (1 1 1) and (0 0 0) modes, the motor phases u, v, and w switch to +V at the same time. dc or -V dc , so the current flowing into the windings u, v, and w is exactly the same in magnitude and direction, so no current will be generated in the bus circuit of the inverter. Therefore, the (1 1 1) and (0 0 0) modes are called zero voltage vector modes here.

[0006] Traditionally, to detect the phase current in the winding, bus current sampling is usually performed between the voltage vector mode (1 0 0) and (1 0 1). Figure 1 As shown, at t V1 to t W1 When the voltage vector mode is (1 0 1) within the time, S U 、S W High level, S V is low, so the U and W phases switch to the positive voltage +V dc , and the V phase switches to the negative voltage -V dc , thus, the currents of phase U and phase W cancel each other out, and the bus current i dc The current in the V-phase winding is equal in magnitude and opposite in direction, i.e. dc =-i V At t W1 to t U1 In the (1 0 0) mode, S U High level, S V 、S W is low, so the U phase switches to the positive voltage +V dc , and the W and V phases switch to negative voltage -V dc , thus, the currents of phase V and phase W cancel each other out, and the bus current i dc The current i flowing through the U phase winding dc =i U Therefore, the current sensor is used to detect t V1 to t W1 Time period and t W1to t U1 Current in time period i dc , we can determine the w-phase current, i.e. -(i U +i V ).

[0007] However, the problem with this solution is that the effective time window (t W1 -t V1 ,t U1 -t W1 ) is too short, exceeding the response time of the current sensor or subsequent processing circuits such as an analog-to-digital converter, so this current sampling method cannot effectively realize motor current detection. Summary of the Invention

[0008] The present invention proposes an improved single-sensor scheme for detecting motor current. By remodulating the PWM signal under the zero voltage vector mode (11 1) and (0 0 0), a measurement pulse with a minimum sampling time that allows effective and sufficient sampling is inserted and current sampling is performed during this period. Since the zero voltage vector mode (1 1 1) and (0 0 0) occur near the peak value of the carrier signal, it is not only convenient to trigger the current detection timing, but also ensures a sufficient current detection time window.

[0009] According to one aspect of the present invention, a method for measuring motor current is provided, comprising: remodulating a pulse width modulation (PWM) signal generated based on a carrier signal so as to insert a reverse pulse with a minimum measurement time into a target PWM signal in the PWM signal during a period when the PWM signal is in a zero voltage vector, wherein the remodulated PWM signal is used to drive an inverter of the motor; and detecting a bus current in a circuit of the inverter within the minimum measurement time near a peak value of the carrier signal to determine the current of the motor.

[0010] According to one aspect of the present invention, a device for detecting motor current is provided, comprising: a control module for remodulating a pulse width modulation (PWM) signal generated based on a carrier signal so as to insert a reverse pulse with a minimum measurement time into a target PWM signal in the PWM signal during a period when the PWM signal is in a zero voltage vector, wherein the remodulated PWM signal is used to drive an inverter of the motor; and a current detector for detecting a bus current in a circuit of the inverter within a minimum measurement time near a peak value of the carrier signal to determine the current of the motor.

[0011] In a preferred embodiment, the zero voltage vector mode includes a first zero voltage vector mode and a second zero voltage vector mode, wherein the first zero voltage vector mode corresponds to the first, second, and third PWM signals simultaneously having a first level, and the second zero voltage vector mode corresponds to the first, second, and third PWM signals simultaneously having a second level, wherein the first level is different from the second level. In the first zero voltage vector mode, remodulating the PWM signal includes remodulating the first PWM signal as a target PWM signal, including: inserting a first reverse pulse having a second level into the first PWM signal with a high peak occurrence time point of the carrier signal as the center, and extending the pulse edge of the first PWM signal to the left and right by half a minimum measurement time. In the second zero voltage vector mode, remodulating the PWM signal includes remodulating the third PWM signal as the target PWM signal, including: inserting a second reverse pulse having a first level into the third PWM signal with a low peak occurrence time point of the carrier signal as the center, and extending the pulse edge of the third PWM signal to the left and right by half a minimum measurement time. The current of each phase motor winding is determined based on the bus current detected in the first and second zero voltage vector modes.

[0012] In one embodiment, when the first level is a low level, in the first zero voltage vector mode, the current determination unit determines the bus current i detected by the current detection unit. dc Determined as the current i in the first phase motor winding U In the second zero voltage vector mode, the current determination unit detects the bus current i dc The inverse value of the current i in the third phase motor winding is determined as V wherein the current determination unit determines the current i in the second phase motor winding W For:i W =-i U -i V .

[0013] In another embodiment, when the first level is a high level, in the first zero voltage vector mode, the current determination unit determines the bus current i detected by the current detection unit within the minimum measurement time centered at the high peak time point. dc The inverse value of the current i in the first phase motor winding is determined as U In the second zero voltage vector mode, the current determination unit will be the bus current i detected by the current detection unit within the minimum measurement time centered on the low peak time point dc Determined as the current i in the third phase motor windingV wherein the current determination unit determines the current i in the second phase motor winding W For:i W =-i U -i V .

[0014] In addition, by utilizing the solution of the present invention, the duty cycle of the original PWM signal is not changed during remodulation, thus not causing the generation of additional harmonics, thereby avoiding adverse effects on the operational stability of the motor. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 The schematic diagram of the motor drive system in the prior art is shown as an example;

[0016] Figure 2 A schematic diagram showing a pulse width modulation signal of a motor drive system in the prior art is shown;

[0017] Figure 3 A schematic diagram of a remodulated pulse width modulation signal according to an embodiment of the present invention is shown;

[0018] Figure 4 A schematic diagram showing a current detection device according to an embodiment of the present invention;

[0019] Figure 5 A flow chart of a current detection method according to an embodiment of the present invention is shown;

[0020] Figure 6-7 FIG. 4 is a schematic diagram showing remodulating a pulse width modulation signal according to an embodiment of the present invention. DETAILED DESCRIPTION

[0021] Figure 3 A schematic diagram of PWM signal remodulation for realizing current detection of the present invention is shown. Figure 2 As shown, the control module of the motor, such as MCU, uses the reference voltage u set for each phase winding bridge arm. U,ref 、u W,ref 、u V,ref And the carrier signal u c , generates basic PWM signal S for each bridge arm U 、S V 、S W According to the present invention, in order to provide sufficient sampling measurement time and facilitate current detection, the MCU performs the basic PWM signal S U ,S V ,S WRemodulation is performed so that during the period when the PWM signal is in the zero voltage vector, one of the target PWM signals is modulated by inserting an inverse pulse IIP with a minimum sampling measurement time. Figure 3 As shown, in the time period t U1 -t U2 In the (0 0 0) mode, the target PWM signal S U Remodulate the carrier signal u c The time point of the highest peak is the center, U Insert a negative pulse IIP with a minimum sampling time Tmin U , and in time period t V0 -t V1 In the (1 1 1) mode, the carrier signal u c The time point of the lowest peak is the center, and the S V Remodulation is performed, in which a negative pulse IIP with a minimum sampling time Tmin is inserted V The minimum sampling time Tmin can be specifically selected during implementation, as long as the bus current can be fully read. For example, it can be selected based on factors such as the inherent sampling delay time in the motor drive control circuit and the sampling circuit (including ADC (analog-to-digital conversion) processing in subsequent processing), and is, for example, greater than 3 microseconds, preferably greater than 6 microseconds.

[0022] According to a preferred embodiment of the present invention, in order not to change the remodulated S U and S V The duty ratio of the signal is U and S V The rising and falling edges of the pulse (i.e., the switching time points) are shifted to the sides by half of the sampling time Tmin. For example, for the (00 0) mode, in the case of t U1 -t U2 Defined negative pulse S U Insert positive pulse IIP U Afterwards, the original position at time t U1 The falling edge of the shifts to the left by half of Tmin, if at the same time, it will be at the time point t U2 The rising edge of is shifted to the right by half of Tmin, as shown by the dotted line in the figure. Similarly, for the (1 1 1) mode, at t V0 -t V1 Defined positive pulse S V Insert negative pulse IIP V After that, the rising edge at time point tV0 is moved to the left by half of Tmin, and at the same time, the falling edge at time point tV1 is moved to the right by half of Tmin, as shown by the dotted line in the figure. Uand S V The duty cycle of the signal remains unchanged. Therefore, the remodulated PWM signal S U ,S V ,S W The inverter 200 for driving the motor can conveniently sample the bus current during the Tmin time when the carrier signal is near the high and low peak values, and then determine the three-phase current i of the motor. U 、i V 、i W .

[0023] Figure 4 FIG. 3 is a schematic diagram of a current detection device according to an embodiment of the present invention. The detection device 300 includes a control module 400 and a current detector 500. The control module 400 may be a microcontroller unit MCU of the motor 100, which is used to detect the current based on the carrier signal u c Generates a basic PWM signal S for the inverter 200 of the motor U 、S V 、S W In addition, the control module 400 further modulates the basic pulse width modulation (PWM) signal S U 、S V 、S W Remodulation is performed so that a reverse measurement pulse with a minimum measurement time Tmin is inserted into one of the target PWM signals during the period when the PWM signal is in the zero voltage vector mode ((0 0 0) and (1,1,1)). Figure 3 As shown, the control module 400 modulates the original zero voltage vector mode (1 1 1) to a (1 0 1) mode centered on the low peak value of the carrier signal and lasting for Tmin time; at the same time, the control module 400 modulates the original zero voltage vector mode (0 00) to a (1 0 0) mode centered on the high peak value of the carrier signal and lasting for Tmin time. Subsequently, the control module 400 modulates the remodulated PWM signal S U 、S V 、S W For driving the inverter 200. In the above embodiment, in order to facilitate the description of the concept and solution of the present invention, the expression of inserting the (1 0 0) mode into the original zero voltage vector mode (0 0 0) is adopted. However, it is not difficult to understand that the present invention is essentially based on the duration t U1 -t U2 The original zero voltage vector mode (0 00) is re-modulated into three voltage vector modes, i.e., the duration is (t U1 -t U2 ) half of the zero voltage vector mode (0 0 0), the voltage vector mode (1 0 0) with a duration of Tmin, and the voltage vector mode (tU1 -t U2 ) half of the zero voltage vector mode (0 0 0), and the bus current sampling is performed in the voltage vector mode (1 0 0) with a duration of Tmin.

[0024] like Figure 4 As shown, the current detector 500 can be used within the minimum measurement time (such as 0 0 0) and (1, 1, 1)) around the low and high peak values of the carrier signal corresponding to the original zero voltage vector mode. Figure 3 The sampling point indicated by the dotted arrow in the middle) samples the bus current i in the loop of the inverter 200. dc According to one embodiment, the current detector 500 includes a current sensor 502 and a current determination unit 504, wherein the current sensor 502, such as Figure 1 As shown, it can be set in the circuit of the inverter 200 to detect the bus current i dc As mentioned above, the voltage vector with a duration of Tmin near the low peak of the carrier signal is actually remodulated to (1 0 1), so the bus current i actually sampled by the current sensor 502 is dc =-i v The voltage vector with a duration of Tmin near the peak value of the carrier signal is actually remodulated to (10 0), so the bus current i actually sampled by the current sensor 502 is dc =i u The current determination unit 504 may be based on the bus current i dc Determine the current i of each phase in the motor 100 during one cycle u 、i v 、i w ,Right now

[0025] i u =i dc (Measured value in (1 0 0) mode)

[0026] i v =-i dc (Measured value in (1 0 1) mode)

[0027] i w =-(i u +i v )

[0028] The current detector 300 can determine the current i of each phase u 、i v 、i w Feedback is given to the user so that the user can adjust the motor control parameters according to these phase currents, such as adjusting the PWM signal S U 、SV 、S W The duty cycle can be adjusted by adjusting the frequency of the carrier signal uc and the reference voltage of each phase used to generate the PWM signal. By adjusting the duty cycle, the operating voltage of each phase winding of the motor can be adjusted, thereby adjusting the motor operating current to the desired level.

[0029] In the above embodiment, the control module 400 always outputs the remodulated PWM signal to the inverter 200. In another embodiment of the present invention, the control module 400 may start remodulating the original PWM signal only when it receives an external command to detect the motor current. In normal operation, the control module 400 keeps outputting the PWM signal according to the carrier signal u. c With reference voltage u U,ref 、u W,ref 、u V,ref The generated PWM signal can reduce the number of switching operations of each bridge arm of the inverter.

[0030] Figure 5 The motor current detection flow chart according to an embodiment of the present invention is shown. As shown in the figure, in step 502, the control module 400 is based on the carrier signal u c Generate basic PWM signal S for each phase winding bridge arm respectively U 、S V 、S W For example, Figure 3 As shown, the carrier signal u c It can be a triangular carrier signal and is based on the reference voltage u set for each bridge arm U,ref 、u W,ref 、u V,ref Generate the basic PWM signal as shown in the figure, where u U,ref >u W,ref >u V,ref Here, the carrier signal is not limited to a triangular carrier signal, but can be any other function, such as a sinusoidal function carrier signal.

[0031] In step 504, the control module 400 generates a signal corresponding to the carrier signal u c The peak value of the zero voltage vector (1 1 1) and (00 0) is during t V0 -t V1 and t U1 -t U2 During this period, the target PWM signal S is measured with the highest and lowest peak times as the center. U 、S V Remodulation is performed by inserting an inverse pulse IIP of duration Tmin U and IIP V, and the target PWM signal S U 、S V The left and right pulse conversion time points of are extended to both sides by half of the minimum measurement time Tmin. Figure 3 As shown, for S V signal, then the time point t V0 Move half of Tmin to the left, as shown by the dotted line in the figure, to turn on the bridge arm (Q3, Q4) in advance, and at the same time change the time point t V1 Move half of Tmin to the right, as shown by the dotted line in the figure, to delay the disconnection of the bridge arm (Q3, Q4). Similarly, for S U signal, then the time point t U1 Move half of Tmin to the left, as shown by the dotted line in the figure, to disconnect the bridge arm (Q1, Q2) in advance, and at the same time change the time point t U2 Shift half of Tmin to the right, as shown by the dotted line in the figure, to delay turning on the bridge arm (Q1, Q2). Figure 6 shows the target PWM signal S U The re-modulation process, Figure 7 shows the target PWM signal S V The process of re-modulation.

[0032] like Figure 3 As shown, in (t U1 -t W1 ) time, due to the carrier signal u c Less than the reference voltage u U,ref , so S U is high level 1; and (t U1 -t U2 ) time, due to the carrier signal u c Greater than the reference voltage u U,ref , so S U It becomes low level 0 and lasts for a period of T0=t U1 -t U2 , the period T0 actually corresponds to the zero voltage vector (0 0 0) period of the original PWM signal. Figure 6 In step 601, when the carrier signal rises and begins to cross the time point t W1 and is therefore greater than the reference voltage signal u W,ref When the control module 400 advances the predetermined time offset T off1 The PWM signal S U It jumps from high level to low level and forms a low level pulse signal with a duration of half T0. For the convenience of description, it is called the original PWM signal S U The first part, where the predetermined time offset T off1 The carrier signal is derived from the reference voltage uW,ref Change to reference voltage u U,ref The difference between the time and half of the minimum measurement time Tmin.

[0033] In step 603, when forming the PWM signal S U After the first negative pulse of the first part, the control module 400 inserts a reverse pulse, which is a positive pulse IIP in this example. U , that is, after the first negative pulse of half the duration of T0, the control module 400 turns S U The minimum measurement time Tmin is when the negative pulse changes to the positive pulse and the reverse pulse continues to be output.

[0034] In step 605, at the positive pulse IIP U Afterwards, the control module 400 outputs a low level S again. U , to generate a negative pulse with a duration of half T0, which is equivalent to generating the original PWM signal S U During the rest of the cycle, the control module 400 outputs a normal basic PWM signal S according to the carrier signal and the reference voltage. U This completes the PWM signal S U The remodulation of the PWM signal S U Inverted pulse IIP U The PWM signal S is maintained by dividing it into two parts and extending the switching time point of the original PWM signal to both sides along the time axis by half of the minimum measurement time Tmin. U The duty cycle of the inserted pulse IIP remains unchanged, and the inserted pulse IIP is located exactly at the center of the highest peak.

[0035] Figure 7 shows the PWM signal S V Remodulation processing. Figure 3 As shown, in (t W0 -t V0 ) time, due to the carrier signal u c Greater than the reference voltage u V,ref , so S V is low level. V0 -t V1 ) time, due to the carrier signal u c Less than the reference voltage u V,ref , so S V It is high level and the duration is T1=t V1 -t V0 , the period T1 actually corresponds to the zero voltage vector period (1 1 1) of the original basic PWM signal. Figure 7 In step 701, when the carrier signal u cDecline and begin to cross time point t W0 and is therefore smaller than the reference voltage signal u W,ref When the control module 400 advances the predetermined time offset T off2 The PWM signal S V Jump from low level to high level (instead of the original basic PWM signal S V Until time t V0 The PWM signal S is formed with a duration of half T1. V The first part, where the predetermined time offset T off2 is the carrier signal u c From the reference voltage u W,ref Change to reference voltage u V,ref The difference between the time and half of the minimum measurement time Tmin, that is, T off2 =T1-Tmin / 2.

[0036] In step 603, when forming the PWM signal S V After the first positive pulse of the first part, the control module 400 inserts a reverse negative pulse, that is, after the first positive pulse of the first part with a duration of half T1, the control module 400 inserts a reverse negative pulse. V Becomes a negative pulse IIP V , and continues for the minimum measurement time Tmin.

[0037] In step 605, at the negative pulse IIP V Afterwards, the control module 400 sets S V It turns into a positive pulse again and its duration is half of T1, thus generating a PWM signal S V During the rest of the period T, the control module 400 controls the carrier signal and the reference voltage u V,ref Output normal basic PWM signal S V This completes the PWM signal S V The remodulation of the PWM signal S V Inverted negative pulse IIP V Split into two parts, by the original PWM signal S V The switching time point of the PWM signal S is extended to both sides along the time axis by half of the minimum measurement time Tmin. V The duty cycle of the inserted pulse IIP remains unchanged. V It is located exactly in the center of the lowest peak.

[0038] Thus, according to the above method, as the carrier signal u c As time changes, the control module 400 continuously adjusts the S U 、S VThe signal is remodulated, for example, in the next cycle, at time t V2 At this time, the control module 400 continues to set the switching time point t V2 Shift half of Tmin to the left to insert IIP V In this way, the control module 400 finally outputs Figure 3 As shown in S U 、S V 、S W The control module 400 converts the remodulated PWM signal S U 、S V 、S W Provided to each bridge arm of the inverter 200, thereby controlling the inverter 200 to output corresponding voltages to each phase winding of the motor 100 and generate corresponding currents i in the windings U 、i V 、i W .

[0039] Back to Figure 5 After the remodulation of the PWM signal is completed in step 504, in step 506, the current detector 500 is used to generate a voltage corresponding to the zero voltage vector, that is, the carrier signal u c The bus current i in the circuit of the inverter 200 is detected within the minimum measurement time Tmin near the highest and lowest peak values. dc As an example, a current detector 502 (eg, Figure 1 The current sensor shown in the figure), when the carrier signal u c When the voltage is close to the minimum value, the current sensor 502 is triggered to detect the current i in the bus. dc .like Figure 3 As shown, when the carrier signal u c When the voltage is close to the minimum value, the remodulated voltage vector pattern becomes (1 0 1), where SV is converted to a low level within the time Tmin, centered at the time point when the minimum peak occurs. Therefore, the U phase and the W phase switch to the positive voltage +V dc , and the V phase switches to the negative voltage -V dc , thus, the currents of phase U and phase W cancel each other out, so the bus current detected within this Tmin corresponds to the current i in the phase V winding V , but with opposite polarity, i.e. dc1 =-i V After completing the bus current detection within Tmin, the current sensor 502 pauses.

[0040] As time goes on, when the carrier signal u cWhen the voltage reaches the highest peak, the current sensor 502 is triggered again to detect the current in the bus. Figure 3 As shown, when the carrier signal u c When the voltage is close to the maximum value, the remodulated voltage vector pattern becomes (1 0 0), where the time point of the maximum voltage peak is the center, and within the time Tmin, S U is converted to a high level. Therefore, the V phase and W phase switch to a positive voltage -V dc , and the U phase switches to the positive voltage V dc , therefore, the bus current i dc2 That is the current i in the U phase winding U , i.e. i dc2 =i U .

[0041] In step 508, after completing the secondary sampling of the bus current in the two time periods described above within one cycle of the carrier signal, the current detector 300 may determine the current of each phase winding based on the detected bus current, as described above, wherein:

[0042] U-phase current: i U =i dc2 ,

[0043] v-phase current i V =-i dc1 ,

[0044] w-phase current i W =-(i U +i V ).

[0045] This allows the measurement of the motor phase current within a variation cycle. According to the solution of the present invention, since the bus current is sampled at the maximum and minimum peak values of the carrier signal and sufficient sampling time Tmin is guaranteed, the solution of the present invention can accurately set the sampling timing and sample the bus current corresponding to each phase winding. In addition, it can be seen that although the solution of the present invention changes the original initial PWM drive signal, the reverse pulse inserted here is symmetrical about the highest voltage peak and the lowest voltage peak, and does not change the duty cycle of the original PWM signal. Therefore, no additional harmonics are caused in the remodulated PWM signal, ensuring the stability and robustness of the motor operation.

Claims

1. A method for measuring motor current, comprising: A pulse width modulation (PWM) signal generated based on a carrier signal is remodulated so as to insert a reverse pulse having a minimum measurement time into a target PWM signal in the PWM signal during a period in which the PWM signal is in a zero voltage vector (1 1 1) and / or (0 0 0), comprising: inserting the reverse pulse into the target PWM signal with the peak occurring at a time point as the center during a zero voltage vector corresponding to a peak value of the carrier signal, and simultaneously extending the left and right pulse edges of the target PWM signal to both sides by half of the minimum measurement time; wherein the remodulated PWM signal is used to drive an inverter of a motor; The bus current in the loop of the inverter is detected within a minimum measurement time near the peak value of the carrier signal to determine the current of the motor.

2. The method of claim 1, wherein a duty cycle of the target PWM signal is not changed when the reverse pulse is inserted.

3. The method according to any one of claims 1-2, wherein the PWM signal comprises first, second, and third PWM signals for first, second, and third-phase motor windings of the motor, and the zero voltage vector mode comprises a first zero voltage vector mode and a second zero voltage vector mode, wherein: The first zero voltage vector mode corresponds to the first, second and third PWM signals having a first level at the same time, and the second zero voltage vector mode corresponds to the first, second and third PWM signals having a second level at the same time, wherein the first level is different from the second level; In the first zero voltage vector mode, remodulating the PWM signal includes remodulating the first PWM signal as a target PWM signal, including: inserting a first reverse pulse having a second level into the first PWM signal with a peak value of the carrier signal as the center, and extending the pulse edge of the first PWM signal to the left and right by half of a minimum measurement time respectively; In the second zero voltage vector mode, remodulating the PWM signal includes remodulating the third PWM signal as the target PWM signal, including: inserting a second reverse pulse having a first level into the third PWM signal with a low peak occurrence time point of the carrier signal as the center, and extending the pulse edge of the third PWM signal to the left and right by half of the minimum measurement time respectively; The current of each phase motor winding is determined based on the bus current detected in the first and second zero voltage vector modes.

4. The method of claim 3, wherein the PWM signal comprises first, second, and third PWM signals corresponding to the motor windings generated based on the carrier signal and first, second, and third reference voltages, wherein the second reference voltage is greater than the third reference voltage but less than the first reference voltage, and wherein In the first zero voltage vector mode, the carrier signal is greater than the first reference voltage, and in the second zero voltage vector mode, the carrier signal is less than the third reference voltage. Wherein remodulating the first PWM signal comprises: When the carrier signal rises and is greater than a second reference voltage signal, transitioning the first PWM signal from the second level to the first level in advance by a first predetermined time offset to form a first portion of the first PWM signal having a duration equal to half a period of the first zero voltage vector mode, wherein the first predetermined time offset is a difference between a time for the carrier signal to change from the second reference voltage to the first reference voltage and half of the minimum measurement time; generating the first reverse pulse having a second level and lasting for the minimum measurement time after the first portion of the first PWM signal; After the first reverse pulse, a second portion of the first PWM signal having a first level and a duration equal to half a period of the first zero voltage vector mode is generated: Wherein remodulating the third PWM signal comprises: When the carrier signal decreases and is lower than the second reference voltage signal, transitioning the third PWM signal from the first level to the second level in advance by a second predetermined time offset to form a first portion of the third PWM signal having a duration equal to half of a period of the second zero voltage vector mode, wherein the second predetermined time offset is a difference between a time when the carrier signal changes from the second reference voltage to the third reference voltage and half of the minimum measurement time; generating, after the first portion of the third PWM signal, the second reverse pulse having a first level and lasting for the minimum measurement time; After the second reverse pulse, a second portion of the third PWM signal is generated having a second level and a duration equal to half a period of the second zero voltage vector mode.

5. The method of claim 3, further comprising: Remodulating the PWM signal is performed in response to an external command to achieve measurement of the motor current.

6. A motor current detection device, comprising: A control module, configured to remodulate a pulse width modulation (PWM) signal generated based on a carrier signal so as to insert a reverse pulse having a minimum measurement time into a target PWM signal in the PWM signal during a period when the PWM signal is in a zero voltage vector (1 1 1) and / or (0 0 0), comprising: inserting the reverse pulse into the target PWM signal with the peak occurring at a time point as the center during a zero voltage vector corresponding to a peak value of the carrier signal, and simultaneously extending the left and right pulse edges of the target PWM signal to both sides by half of the minimum measurement time; wherein the remodulated PWM signal is used to drive an inverter of the motor; The current detector detects the bus current in the loop of the inverter within a minimum measurement time near the peak value of the carrier signal to determine the current of the motor.

7. The apparatus of claim 6 , wherein the current detector comprises: A current sensor provided in the loop of the inverter, for detecting the bus current; A current determination unit is used to determine the current of each phase in the motor based on the bus current.

8. The apparatus of claim 7, wherein the control module does not change a duty cycle of the target PWM signal when inserting the reverse pulse.

9. The apparatus according to any one of claims 6 to 8, wherein the PWM signals include first, second, and third PWM signals for first, second, and third-phase motor windings of the motor, and the zero voltage vector mode includes a first zero voltage vector mode and a second zero voltage vector mode, wherein: The first zero voltage vector mode corresponds to the first, second and third PWM signals having a first level at the same time, and the second zero voltage vector mode corresponds to the first, second and third PWM signals having a second level at the same time, wherein the first level is different from the second level; In the first zero voltage vector mode, the control module remodulates the PWM signal, including remodulating the first PWM signal as a target PWM signal, including: inserting a first reverse pulse having a second level into the first PWM signal with a peak value of the carrier signal as the center, and extending the pulse edge of the first PWM signal to the left and right by half of a minimum measurement time respectively; In the second zero voltage vector mode, the control module remodulates the PWM signal, including remodulating the third PWM signal as the target PWM signal, including: inserting a second reverse pulse having a first level into the third PWM signal with the low peak occurrence time point of the carrier signal as the center, and extending the pulse edge of the third PWM signal to the left and right by half of the minimum measurement time respectively; The current detector determines the current of each phase motor winding based on the bus current detected in the first and second zero voltage vector modes.

10. The apparatus of claim 9, wherein the control module generates the first, second, and third PWM signals corresponding to the motor windings based on the carrier signal and first, second, and third reference voltages, wherein the second reference voltage is greater than the third reference voltage but less than the first reference voltage, and wherein In the first zero voltage vector mode, the carrier signal is greater than the first reference voltage, and in the second zero voltage vector mode, the carrier signal is less than the third reference voltage. Wherein remodulating the first PWM signal comprises: When the carrier signal rises and is greater than a second reference voltage signal, transitioning the first PWM signal from the second level to the first level in advance by a first predetermined time offset to form a first portion of the first PWM signal having a duration equal to half a period of the first zero voltage vector mode, wherein the first predetermined time offset is a difference between a time for the carrier signal to change from the second reference voltage to the first reference voltage and half of the minimum measurement time; generating the first reverse pulse having a second level and lasting for the minimum measurement time after the first portion of the first PWM signal; After the first reverse pulse, a second portion of the first PWM signal having a first level and a duration equal to half a period of the first zero voltage vector mode is generated: Wherein remodulating the third PWM signal comprises: When the carrier signal decreases and is lower than the second reference voltage signal, transitioning the third PWM signal from the first level to the second level in advance by a second predetermined time offset to form a first portion of the third PWM signal having a duration equal to half of a period of the second zero voltage vector mode, wherein the second predetermined time offset is a difference between a time when the carrier signal changes from the second reference voltage to the third reference voltage and half of the minimum measurement time; generating, after the first portion of the third PWM signal, the second reverse pulse having a first level and lasting for the minimum measurement time; After the second reverse pulse, a second portion of the third PWM signal is generated having a second level and a duration equal to half a period of the second zero voltage vector mode.

11. The apparatus of claim 9, wherein The control module performs remodulation of the PWM signal in response to an external command to achieve measurement of the motor current.

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