Semiconductor device

Abstract

A semiconductor device which can realize low power consumption and mimic a human brain to store data is provided. The semiconductor device includes a control portion, a storage portion, and a sensor portion. The storage portion includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer including an oxide semiconductor in a channel formation region and a back gate electrode. The control portion has a function of switching a signal supplied to the back gate electrode in accordance with a signal obtained in the sensor portion.

Description

Technical Field

[0001] One aspect of the present invention relates to a semiconductor device. In particular, one aspect of the present invention relates to a semiconductor device capable of mimicking information memory in the human brain.

[0002] Note that in this specification, etc., a semiconductor device refers to any device capable of operating by utilizing the characteristics of semiconductors. Background Technology

[0003] Neumann computers, used for the development of artificial intelligence (AI), surpass human computing speed.

[0004] In contrast, the human brain can make correct judgments by comparing and supplementing fragmented input information with memory. Alternatively, it has the ability to solve problems that computers struggle with by associating with memories across a wide range of domains or by exercising creativity or foresight.

[0005] In recent years, with the improvement of computer performance, large-scale computations such as learning and inference can be performed using neural networks. Furthermore, in the field of machine learning, there have been reports of significant improvements in computer recognition accuracy achieved through the use of deep learning methods (see, for example, Patent Document 1). Even in fields requiring creativity or foresight, such as chess and Go, problems that were difficult for computers to solve are being addressed.

[0006] [Preliminary Technology Documents]

[0007] [Patent Literature]

[0008] [Patent Document 1] U.S. Patent Application Publication No. 2016 / 0110642 Summary of the Invention

[0009] The technical problem that the invention aims to solve

[0010] Existing artificial intelligence devices are far less energy efficient than the human brain. Hardware such as CPUs or GPUs uses storage elements like SRAM or DRAM, composed of Si transistors, to store data and perform computations. However, the increasing sophistication of Si transistor storage elements leads to increased leakage current, and the increasing circuit size due to the higher performance of computers results in even greater power consumption.

[0011] Furthermore, the storage elements in existing artificial intelligence devices have a single function: storing information. For example, most of them are SRAM, DRAM, or other storage elements that write / read information such as 0s or 1s. In contrast, the human brain's information memory is diverse, including methods of information storage such as long-term or short-term memory, and the movement of information storage locations such as memories in the neocortex or hippocampus.

[0012] One objective of this invention is to provide a semiconductor device with a novel structure. Another objective is to provide a semiconductor device capable of operating with low power consumption. Furthermore, one objective is to provide a semiconductor device capable of mimicking information memory in the human brain.

[0013] Note that the description of these objectives does not preclude the existence of other objectives. Furthermore, one embodiment of the invention does not necessarily require achieving all of the aforementioned objectives. Moreover, objectives other than those described above are naturally apparent from the description, drawings, claims, etc., and can be derived from these descriptions.

[0014] means of solving technical problems

[0015] One aspect of the present invention is a semiconductor device including a control unit, a storage unit, and a sensor unit. The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer containing an oxide semiconductor in a channel forming region. The control unit has the function of switching the signal supplied to the first transistor and the second transistor according to the signal obtained from the sensor unit.

[0016] One aspect of the present invention is a semiconductor device including a control unit, a storage unit, and a sensor unit. The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in a channel forming region and a back gate electrode. The control unit has the function of switching the signal supplied to the back gate electrode according to the signal obtained from the sensor unit.

[0017] One aspect of the present invention is a semiconductor device including a control unit, a storage unit, and a sensor unit. The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. One of the source and drain of the first transistor is electrically connected to one electrode of the capacitor. The switching circuit includes a second transistor and a third transistor. One of the source and drain of the second transistor is electrically connected to the gate of the third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in a channel forming region and a back gate electrode. The control unit has the function of switching the signal supplied to the back gate electrode according to the signal obtained from the sensor unit.

[0018] One aspect of the present invention is a semiconductor device including a control unit, a storage unit, and a sensor unit. The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in a channel forming region and a gate electrode. The control unit has the function of switching the signal supplied to the gate electrode according to a signal received from the sensor unit.

[0019] One aspect of the present invention is a semiconductor device including a control unit, a storage unit, and a sensor unit. The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. One of the source and drain of the first transistor is electrically connected to one electrode of the capacitor. The switching circuit includes a second transistor and a third transistor. One of the source and drain of the second transistor is electrically connected to the gate of the third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in a channel forming region and a gate electrode. The control unit has the function of switching the signal supplied to the gate electrode according to a signal received from the sensor unit.

[0020] In one embodiment of the invention, a preferred embodiment is a semiconductor device whose storage circuit includes a fourth transistor, wherein one of the source and drain of the second transistor is electrically connected to the gate of the fourth transistor.

[0021] Invention Effects

[0022] One aspect of the present invention can provide a semiconductor device with a novel structure. Another aspect of the present invention can provide a semiconductor device capable of operating with low power consumption. Furthermore, one object of the present invention is to provide a semiconductor device capable of mimicking information memory in the human brain.

[0023] Note that the description of these effects does not preclude the existence of other effects. Furthermore, one embodiment of the invention does not necessarily require all of the aforementioned effects. Moreover, effects other than those described above are clearly present in the specification, drawings, and claims, and these effects can be obtained from the description in the specification, drawings, and claims. Attached Figure Description

[0024] [ Figure 1 [Illustration 1] is a block diagram illustrating an example of the structure of a semiconductor device.

[0025] [ Figure 2 [Illustration] is a schematic diagram used to illustrate a semiconductor device.

[0026] [Figure 3] (A) to (C) are circuit diagrams, graphs and flowcharts showing examples of the structure of a semiconductor device.

[0027] [Figure 4] (A) to (C) are circuit diagrams, graphs and flowcharts showing examples of the structure of a semiconductor device.

[0028] [Figure 5] (A) to (C) are circuit diagrams, graphs and flowcharts showing examples of the structure of a semiconductor device.

[0029] [Figure 6] (A) to (D) are schematic diagrams showing examples of the structure of a semiconductor device.

[0030] [Figure 7] (A) and (B) are block diagrams showing examples of the structure of a semiconductor device.

[0031] [ Figure 8 [Illustration 1] is a block diagram illustrating an example of the structure of a semiconductor device.

[0032] [Figure 9] (A) to (D) are circuit diagrams, waveform diagrams, graphs and flowcharts showing examples of the structure of a semiconductor device.

[0033] [Figure 10] (A) to (D) are circuit diagrams, waveform diagrams, graphs and flowcharts showing examples of the structure of a semiconductor device.

[0034] [Figure 11] (A) to (C) are circuit diagrams, waveform diagrams and flowcharts showing examples of the structure of a semiconductor device.

[0035] [ Figure 12 [ ] is a waveform diagram showing an example of the structure of a semiconductor device.

[0036] [Figure 13] (A) to (D) are schematic diagrams showing examples of the structure of a semiconductor device.

[0037] [Figure 14] (A) and (B) are block diagrams showing examples of the structure of a semiconductor device.

[0038] [Figure 15] (A) to (D) are figures illustrating application examples of semiconductor devices.

[0039] [ Figure 16 [ ] is a cross-sectional view showing an example of the structure of a semiconductor device.

[0040] [ Figure 17 [ ] is a cross-sectional view showing an example of the structure of a semiconductor device.

[0041] [Figure 18] (A) to (C) are cross-sectional views showing examples of transistor structures. Detailed Implementation

[0042] The embodiments will now be described with reference to the accompanying drawings. It should be noted that the embodiments can be implemented in many different modes, and those skilled in the art will readily understand that the manner and details can be varied in many ways without departing from the spirit and scope of the invention. Therefore, the invention should not be construed as being limited to the contents described in the embodiments shown below.

[0043] Furthermore, in the accompanying drawings, sizes, layer thicknesses, or areas are sometimes exaggerated for clarity. Therefore, the invention is not limited to the dimensions shown in the drawings. Note that the drawings illustrate idealized examples schematically and are not limited to the shapes or values ​​shown.

[0044] Furthermore, the following embodiments in this specification can be appropriately combined. Additionally, when multiple structural examples are shown in one embodiment, the structural examples can be appropriately combined.

[0045] The following describes a semiconductor device according to one aspect of the present invention. In this embodiment, a semiconductor device capable of achieving storage capacity close to that of the human brain will be described in particular.

[0046] <Structure Example 1 in Semiconductor Manufacturing>

[0047] Figure 1 This is an example of a block diagram used to illustrate the structure of a semiconductor device. Figure 1 The semiconductor device shown includes a sensor unit 60, a control unit 50, and a storage unit 10. As an example, the storage unit 10 includes a storage circuit 20A, a storage circuit 20B, a switching circuit 30, and an input / output circuit 40.

[0048] Note that, although in Figure 1 The diagram shows one sensor unit 60, one control unit 50, and one storage unit 10, but multiple units of each are also possible. Furthermore, the storage circuit 20A, storage circuit 20B, switching circuit 30, and input / output circuit 40 are not limited to a single unit. Figure 1As shown, there can be multiple of each.

[0049] Storage circuit 20A includes multiple storage circuits ( Figure 1 Storage circuits 21A to 21D are shown. Each of storage circuits 21A to 21D includes multiple storage elements. Although not shown, storage circuits 21A to 21D include drive circuits for driving the multiple storage elements. The drive circuits have the function of switching the back gate voltage applied to the back gate electrode of the transistor according to the control of the control unit 50. Storage circuits 21A to 21D have the function of changing the information storage capacity according to the signal Se obtained from the sensor unit 60. Note that information is sometimes referred to as data. In addition, information is stored in the storage circuit as a voltage value or charge quantity corresponding to the data.

[0050] For example, storage circuits 21A to 21D include storage elements that can change their information storage capacity according to the back gate voltage applied to the transistor. For example, the control unit 50 can control storage circuits 21A and 21B to make them storage elements capable of long-term and short-term information storage, respectively.

[0051] Storage circuit 20B is the same as storage circuit 20A, and includes multiple storage circuits. Figure 1 Storage circuits 22A to 22D are shown. Storage circuits 22A to 22D each include multiple storage elements. Although not shown, storage circuits 22A to 22D include drive circuits for driving the multiple storage elements. The drive circuits have the function of switching the back gate voltage applied to the back gate electrode of the transistor according to the control of the control unit 50. Storage circuits 22A to 22D have the function of changing the information storage capacity according to the signal Se obtained from the sensor unit 60.

[0052] For example, storage circuits 21A to 21D include storage elements that can change their information storage capacity according to the back gate voltage applied to the transistor. For example, the control unit 50 can control storage circuits 21A and 21B to make them storage elements capable of long-term and short-term information storage, respectively.

[0053] As storage circuits suitable for storage circuits 20A and 20B, DOSRAM or NOSRAM is preferred. DOSRAM (registered trademark) is short for "Dynamic Oxide Semiconductor Random Access Memory (RAM)," referring to RAM comprising 1T (transistor) and 1C (capacitor) type memory cells. Furthermore, NOSRAM (registered trademark) is short for "Nonvolatile Oxide Semiconductor RAM," referring to RAM comprising gain cell type (2T type, 3T type) memory cells. DOSRAM and NOSRAM are memories that utilize the low off-state current characteristic of OS transistors (transistors containing oxide semiconductors in the channel formation region).

[0054] DOSRAM is a type of DRAM formed using OS transistors, and it is a memory that temporarily stores information transmitted from the outside. DOSRAM includes memory cells with OS transistors and readout circuitry with Si transistors (transistors containing silicon in the channel formation region). Because the memory cells and readout circuitry can be disposed on different stacked layers, the overall circuit area of ​​the DOSRAM can be reduced. Furthermore, DOSRAM can be subdivided into memory cell arrays and configured efficiently.

[0055] NOSRAM is a non-volatile memory that uses OS transistors. Compared to other non-volatile memories such as flash memory, ReRAM (Resistive Random Access Memory), and MRAM (Magnetoresistive Random Access Memory), NOSRAM consumes less power when writing data. Furthermore, unlike flash memory or ReRAM, NOSRAM does not experience component degradation during data writing and has no limit on the number of data writes. In addition, NOSRAM can store not only 1-bit binary data but also multi-valued data of two or more bits. By storing multi-valued data, NOSRAM can reduce the area of ​​each bit of storage cell.

[0056] In addition to storing digital data, NOSRAM can also store analog data. Therefore, storage circuits 20A and 20B can also be used as analog memories. Since NOSRAM can store analog data, no D / A or A / D conversion circuit is needed. Therefore, the area of ​​the peripheral circuitry of NOSRAM can be reduced.

[0057] Note that in one embodiment of the present invention, the structure of applying NOSRAM or DOSRAM to the circuits included in memory circuit 20A and memory circuit 20B is described, but the present invention is not limited thereto. For example, with future technological advancements, where power consumption is significantly reduced when using non-volatile memories such as ReRAM and MRAM, they may also be applied to the circuits included in memory circuit 20A and memory circuit 20B, depending on the circumstances.

[0058] The switching circuit 30 has the function of controlling the electrical connection between storage circuit 20A and storage circuit 20B according to the control of the control unit 50. For example, it has the function of controlling the amount of current flowing through storage circuit 21A to storage circuit 21D and storage circuit 22A to storage circuit 22D. That is, it has the function of switching information transmission between multiple storage circuits. The switching circuit 30 has the function of changing the amount of current flowing through storage circuit 21A to storage circuit 21D and storage circuit 22A to storage circuit 22D according to the signal Se obtained from the sensor unit 60 and the back gate voltage applied to the transistor. Sometimes the switching circuit 30 is referred to as a reconfigurable circuit.

[0059] The switching circuit 30 includes a storage element that controls the amount of current flowing through the storage circuit and a semiconductor element that controls the current flow based on information stored in the storage element. In the switching circuit 30, the control unit 50 has the function of changing the information stored in the storage element by controlling the back gate voltage applied to the transistor. Note that in Figure 1 Although the arrows between storage circuits 20A and 20B are shown pointing in one direction, they can also be represented by bidirectional arrows according to the flow of information.

[0060] The switching circuit 30 is a programmable device whose storage element includes an OS transistor. Note that in this specification and accompanying drawings, the programmable device containing an OS transistor is referred to as an OS-FPGA. Furthermore, the information stored in the storage element of the OS-FPGA is referred to as configuration data.

[0061] The memory area of ​​an OS-FPGA can be smaller than that of an FPGA whose storage elements are composed of SRAM. Therefore, even with the addition of context switching functionality, the increase in area is minimal. Furthermore, OS-FPGAs can transfer data and parameters at high speeds through boosting.

[0062] As an example, sensor unit 60 includes various sensors such as brainwave sensors, pulse sensors, blood pressure sensors, and temperature sensors used to acquire biological information such as brainwaves, pulse, blood pressure, and body temperature. Figure 1Although the diagram shows the output signal Se from a single sensor, signals from multiple sensors can also be input to the control unit 50.

[0063] The control unit 50 includes arithmetic circuits such as a CPU (Central Processing Unit) and a GPU (Graphics Processing Unit), and storage circuits such as SRAM (Static Random Access Memory). The control unit 50 has the function of outputting voltages VBG_A to VBG_C based on the signal Se output from the sensor unit 60. For example, the control unit 50 can perform outputs corresponding to the inputs using computational processing based on an artificial neural network.

[0064] Voltages VBG_A to VBG_C are signals that can switch the voltage applied to the back gate electrode of the transistors included in the storage circuit 20A, storage circuit 20B and switching circuit 30, or the voltage applied to the back gate. Figure 1 This shows how the voltage VBG_A is output to the storage circuit 20A. Figure 1 In this circuit, the voltage VBG_A is not limited to a single value; the storage circuits 21A to 21D included in the storage circuit 20A can be controlled to apply voltages to different back gate electrodes. Similarly, the storage circuit 20B and the switching circuit 30 can be controlled to apply different voltages to different back gate electrodes in different storage circuits.

[0065] Note that the control unit 50 can switch the control of voltages VBG_A to VBG_C based on the signal Se output from the sensor unit 60. For example, the control of voltages VBG_A to VBG_C can be switched based on whether the same signal Se is repeatedly input or a signal Se with high or low intensity is input.

[0066] The input / output circuit 40 is used to control the input and output of information to the storage circuit 20A, storage circuit 20B, and switching circuit 30. Alternatively, the input / output circuit 40 can be located outside the storage unit 10.

[0067] Figure 2 It is a schematic diagram illustrating the use of storage circuits and switching circuits, including OS transistors, to mimic the function of the human brain.

[0068] like Figure 2As shown, in one aspect of the present invention, in order to mimic the function of the human brain, a technology comprising an oxide semiconductor transistor (also known as an OS transistor) is used (OSFET technology). Examples of OS transistor technology include transistors (also known as FETs) and capacitors (also known as condensers, Cs) electrically connected to the transistors. Furthermore, by using one or more memories composed of the aforementioned FETs and Cs, arithmetic devices, registers, or peripheral circuits can be formed, thereby enabling its use as a processor.

[0069] Furthermore, in this specification and other materials, the above-described processor may be used as a brain-morphic processor (also known as a brain-morphic processor, BM processor, or brain processor). Note that regarding... Figure 2 The DOSRAM, NOSRAM, and OS-FPGA shown will be explained later. Note that the OS memory (also known as OSMem.) in the OS-FPGA is a memory that includes OS transistors and stores the OS-FPGA's configuration data.

[0070] Note that in Figure 2 In the NOSRAM shown, the capacitor is indicated by a dashed line. As such, a parasitic capacitance that may form between a wiring and a wiring formed on a different layer can be used. Here, since... Figure 2 The capacitors in the NOSRAM shown are not intended to be formed as capacitors, so they are shown as dashed lines.

[0071] In one embodiment of the present invention, by employing a structure including an OS transistor and a switching circuit, information (data) can be stored by utilizing the extremely low leakage current (hereinafter, off-state current) flowing between the source and drain when the circuit is off. Information storage can be achieved by maintaining a charge corresponding to the data in nodes including storage capacitors and parasitic capacitances.

[0072] In storage circuits using OS transistors, information can be rewritten by charging or discharging charges, thus enabling virtually unlimited data writes and reads. Unlike magnetic or resistive random access memories, OS transistor-based storage circuits do not exhibit atomic-level structural changes, resulting in excellent write tolerance. Furthermore, unlike flash memory, even during repeated rewriting operations, no instability caused by the increase in electron trapping centers is observed in OS transistor-based storage circuits.

[0073] In addition, a memory circuit using an OS transistor can be freely arranged on a circuit using an Si transistor or the like, so that integration is easy. In addition, an OS transistor can be manufactured using the same manufacturing equipment as that for an Si transistor, so that it can be manufactured at low cost.

[0074] In addition, when a back gate electrode is added to an OS transistor in addition to a gate electrode, a source electrode, and a drain electrode, it can be a four-terminal semiconductor element. According to the voltage supplied to the gate electrode or the back gate electrode, it can be constituted by a circuit network that independently controls the input and output of signals between the source and the drain. Therefore, circuit design can be performed in the same manner as for an LSI. Furthermore, an OS transistor has electrical characteristics superior to those of an Si transistor in a high-temperature environment. Specifically, even at a high temperature of 125 °C or more and 150 °C or less, the ratio of the on-state current to the off-state current is large, so that good switching operation can be performed.

[0075] By adopting the semiconductor device structure disclosed in the present embodiment, a semiconductor device including an OS transistor can be used to realize the formation and process of long-term memory and the formation and process of short-term memory in the human brain. Therefore, compared with the prior art, data can be stored with a function closer to that of the human brain. In addition, data retention can be achieved with extremely low power. That is to say, like the human brain, a brain-type processor can be driven with extremely low power consumption.

[0076] <Example 1 of the structures of NOSRAM and DOSRAM>

[0077] The memory circuits 21A to 21D or the memory circuits 22A to 22D are circuit structures including an OS transistor. Refer to Figures 3A to 3C and Figures 4A to 4C An example of the circuit structure and operation will be described.

[0078] Figure 3A A circuit diagram of a memory element showing a circuit structure including a DOSRAM is shown. Figure 3A The transistor MT1, the capacitor C1, the word line WL, the bit line BL, and the back gate stage potential line BGL are shown.

[0079] The transistor MT1 is an OS transistor and is also a four-terminal element including a back gate electrode. The back gate electrode is supplied with a potential VBG by being connected to the back gate stage electrode line BGL. The off-state current diagram of the transistor MT1 is shown as Ioff. In Figure 3A the node holding the charge is shown as the node FN, and this node is also the node of the wiring connected to the transistor MT1 and the capacitor C1.

[0080] The bit line BL has the function of transmitting write information (data, data potential) to the storage element. In addition, the word line WL has the function of transmitting a signal for controlling the switch of the control transistor MT1. The back gate level potential line BGL has the function of transmitting the potential VBG to the back gate electrode of the transistor MT1. Sometimes, the bit line BL, the word line WL, and the back gate level potential line BGL are all simply referred to as wirings.

[0081] For example, the potential VBG is controlled by the control unit 50 to be different from the potential of each storage element included in the storage circuits 21A to 21D. For example, if the back gate level potential when storing information in the storage circuit 21A is set to V1, the back gate level potential when storing information in the storage circuit 21B is set to V0 (<V1), and the back gate level potential when storing information in the storage circuit 21C is set to V2 (>V1), the off-state current Ioff of the transistor MT1 is as Figure 3B shown. That is, corresponding to the magnitude relationship of the back gate level potential, the off-state current is also such that Ioff_2 is the largest, followed by Ioff_1 and Ioff_0. The larger the off-state current, the easier it is for the charge held by the node FN to change, and the smaller the off-state current, the more difficult it is for the charge held by the node FN to change. As a result, a difference can be generated in the retention period of the information of each storage circuit.

[0082] By adopting this structure, the storage circuits 21A to 21D or the storage circuits 22A to 22D can achieve the function of storing information with different storage capabilities according to the signal Se obtained from the sensor unit 60.

[0083] Figure 3C A flowchart for explaining the operation of the above DOSRAM is shown.

[0084] In step S01, the potential VBG supplied as the back gate level potential is set to V1, and information is stored in the storage circuit.

[0085] In step S02, it is judged whether the signal Se output from the sensor unit 60 changes. It is preferable to set multiple thresholds and control the potential VBG supplied as the back gate level potential according to the magnitude relationship between the threshold and the sensor output in order to judge whether there is a sensor signal.

[0086] If a change occurs in step S02, then step S03 is entered, the potential VBG supplied as the back gate level potential is set to V0 less than V1, and information is stored in the storage circuit. That is, the potential VBG is switched so that the retention time of the information in the storage circuit becomes longer.

[0087] If there is no change or a small change in step S03, the process proceeds to step S04, where the potential VBG supplied as the back-gate potential is set to V2, which is greater than V1, and information is stored in the storage circuit. That is, the potential VBG is switched so that the retention time of the information in the storage circuit becomes shorter.

[0088] By adopting this structure, a function of storing information with different storage capabilities according to the output of the sensor unit can be achieved. For example, if the sensor unit is a temperature sensor, a function of storing information for a long time at high or low temperatures and forgetting the information after a certain period at room temperature can be realized.

[0089] Figure 4A A circuit diagram of a storage element showing a circuit structure including NOSRAM. Figure 4A The transistor MT2, the transistor MT3, the word line WL, the bit line BL, and the back-gate potential line BGL are shown.

[0090] The transistor MT2 is an OS transistor and a four-terminal element including a back-gate electrode. The back-gate electrode is supplied with the potential VBG by being connected to the back-gate electrode line BGL. The off-state current diagram of the transistor MT2 is shown as Ioff. In Figure 4A the node holding the charge is shown as the node FN, which is also the node of the wiring connected to the gates of the transistor MT2 and the transistor MT3.

[0091] Note that although the transistor MT3 is shown as a p-channel transistor in Figure 4A it can also be an n-channel transistor. Additionally, although a 2T type including two transistors is shown in Figure 4A a 2T1C type with a capacitor added or a 3T type combined with other transistors can also be adopted. Note that by increasing the parasitic capacitance such as the gate capacitance of the transistor MT3, the capacitor connected to the node FN can be omitted. Furthermore, as shown in Figure 2 the above-mentioned parasitic capacitance can also be actively used as a capacitor.

[0092] For example, the potential VBG is controlled by the control unit 50 to be different from the potential of each storage element included in the storage circuits 21A to 21D. For example, if the potential VBG supplied as the back-gate potential when storing information in the storage circuit 21A is set to V1, the potential VBG supplied as the back-gate potential when storing information in the storage circuit 21B is set to V0 (<V1), and the potential VBG supplied as the back-gate potential when storing information in the storage circuit 21C is set to V2 (>V1), the off-state current Ioff of the transistor MT2 is as shown in Figure 4BAs shown in the graph, corresponding to the magnitude of the potential VBG, the off-state current is also largest at Ioff_2, followed by Ioff_1 and Ioff_0. The larger the off-state current, the easier it is for the charge held by node FN to change; the smaller the off-state current, the less likely it is for the charge held by node FN to change. As a result, the retention period of information in each storage circuit can vary.

[0093] By adopting this structure, storage circuits 21A to 21D or storage circuits 22A to 22D can realize the function of storing information with different storage capacities according to the signal Se obtained from the sensor unit 60.

[0094] Figure 4C A flowchart illustrating the operation of the NOSRAM described above is shown.

[0095] In step S11, the potential VBG, which is supplied as the back gate potential, is set to V1, and the information is stored in the storage circuit.

[0096] In step S12, it is determined whether the signal Se output from the sensor unit 60 has changed. Preferably, multiple thresholds are set and the potential VBG, which is used as the back gate potential supply, is controlled according to the relationship between the threshold and the sensor output, so as to determine whether a sensor signal exists.

[0097] If a change occurs in step S12, the process proceeds to step S13, where the potential VBG supplied as the back gate potential is set to V0, which is less than V1, and the information is stored in the storage circuit. In other words, switching the potential VBG increases the retention time of the information in the storage circuit.

[0098] If there is no change or a small change in step S13, proceed to step S14, where the potential VBG supplied as the back gate potential is set to V2, which is greater than V1, and the information is stored in the storage circuit. In other words, switching the potential VBG shortens the information retention time in the storage circuit.

[0099] By employing this structure, it is possible to store information with varying storage capacities based on the output of the sensor unit. For example, if the sensor unit is a temperature sensor, it is possible to store information for extended periods at high or low temperatures, and then forget the information after a period of time at room temperature.

[0100] <Example 1 of a switching circuit structure>

[0101] Switching circuit 30 is a circuit structure that includes an OS transistor. (Refer to...) Figures 5A to 5C and Figures 6A to 6D An example illustrating the circuit structure and its operation is provided.

[0102] Figure 5A A circuit diagram of a memory element showing a circuit configuration including a switching circuit 30 provided between a pair of memory circuits. Figure 5A The transistors MT4, MT5, word line WL, bit line BL, back gate level potential line BGL, input terminal IN, and output terminal OUT are shown.

[0103] The transistor MT4 is an OS transistor and is also a four-terminal element including a back gate electrode. The back gate electrode is supplied with the potential VBG by being connected to the back gate level electrode line BGL. The off-state current diagram of the transistor MT4 is shown as Ioff. In Figure 5A the node holding the charge is shown as the node FN, which is also the node of the wiring connected to the transistors MT4 and MT5.

[0104] The transistor MT5 is a Si transistor or an OS transistor. The current diagram flowing through the transistor MT5 according to the potential of the node FN is shown as Idata, and this current flows between the input terminal IN and the output terminal OUT.

[0105] Note that although the transistor MT5 is shown as a p-channel transistor in Figure 5A it can also be an n-channel transistor. Also, although a 2T type including two transistors is shown in Figure 5A a 2T1C type with a capacitor added or a 3T type combined with other transistors can also be adopted. Note that by increasing the parasitic capacitance such as the gate capacitance of the transistor MT5, the capacitor connected to the node FN can be omitted.

[0106] For example, the potential VBG is controlled by the control unit 50 to be different from the potential of each switching circuit between the wirings between one of the memory circuits 21A to 21D and one of the memory circuits 22A to 22D. For example, if the back gate level potential of the transistor MT4 included in the switching circuit provided between the memory circuit 21A and the memory circuit 22A is set as V1, the back gate level potential of the transistor M4 included in the switching circuit provided between the memory circuit 21B and the memory circuit 22B is set as V0 (<V1), and the back gate level potential of the transistor M4 included in the switching circuit provided between the memory circuit 21C and the memory circuit 22C is set as V2 (>V1), a difference in the magnitude of the off-state current Ioff of the transistor MT4 occurs. At this time, if the potential of the node FN holds the H level, the potential (V FN ) of the node FN varies according to the magnitude of the off-state current. Therefore, a difference occurs in the current Idata flowing according to the potential of the node FN. That is, as Figure 5BAs shown, the current Idata, which varies with time (t), varies according to the magnitude of the back gate potential. As a result, the amount of current flowing through each memory circuit can vary.

[0107] By adopting this structure, the switching circuit between the wiring provided between one of the storage circuits 21A to 21D and one of the storage circuits 22A to 22D can realize the function of generating a difference in the amount of current flowing through each storage circuit according to the signal Se obtained from the sensor unit 60.

[0108] Figure 5C A flowchart illustrating the operation of the switching circuit described above is shown.

[0109] In step S21, the potential VBG supplied as node FN is set to H level, that is, no current Idata flows through the data.

[0110] In step S22, the potential VBG, which is supplied as the back gate potential, is set to V0, and the off-state current Ioff of transistor MT4 is set to an extremely low state.

[0111] In step S23, it is determined whether the signal Se output from the sensor unit 60 has changed. Preferably, multiple thresholds are set and the potential VBG is controlled according to the relationship between the thresholds and the sensor output to determine whether a sensor signal exists.

[0112] If a change occurs in step S23, proceed to step S24, where the potential VBG supplied as the back gate potential is set to V1, which is greater than V0. That is, the off-state current Ioff of the control transistor MT4 is increased, and the potential VBG is switched, causing the current Idata flowing through the storage circuit to increase. If there is no change or a small change in step S23, continue to step S22.

[0113] In step S25, it is determined whether the signal Se output from the sensor unit 60 has changed. Preferably, multiple thresholds are set and the potential VBG, which is used as the back gate potential supply, is controlled according to the relationship between the threshold and the sensor output, so as to determine whether a sensor signal exists.

[0114] If a change occurs in step S25, proceed to step S26, where the potential VBG supplied as the back gate potential is set to V2, which is greater than V1. That is, the off-state current Ioff of the control transistor MT4 is increased, and the potential VBG is switched, causing the current Idata flowing through the storage circuit to increase. If there is no change or a small change in step S25, proceed to step S24.

[0115] By employing this structure, it is possible to achieve a function where the amount of current flowing through the storage circuit varies depending on the output of the sensor unit. For example, if the sensor unit is a temperature sensor, it is possible to achieve a function where information transmission becomes more active at high or low temperatures and less active at room temperature.

[0116] in addition, Figures 6A to 6D This is a diagram illustrating information storage in a semiconductor device that mimics the human brain and is used to explain one aspect of the present invention.

[0117] Figure 6A The following states are shown: as the initial state, information is held in storage circuit 21A (indicated by solid lines), information transmission in switching circuit 30 is inactive (a state with low current flowing between storage circuits; indicated by dashed arrows), and no information is held in storage circuits 22A to 22C (indicated by dashed lines).

[0118] In one aspect of the semiconductor device of the present invention, the information transmission of the switching circuit 30 can be switched to an active state (a state with a large current flowing through the storage circuit; indicated by a solid arrow) based on the signal Se from the sensor section. Therefore, as... Figure 6B As shown, the information stored in storage circuit 21A can be stored in storage circuits 22A to 22C (represented by solid lines).

[0119] Furthermore, in one embodiment of the semiconductor device of the present invention, the information in storage circuits 22A to 22C can be deleted (the retention period is shortened) based on the signal Se from the sensor section. Therefore, as Figure 6C As shown, the information transmission from the switching circuit 31 to the storage circuits 28B and 28C can be switched to an inactive state, and the information held in the storage circuits 28B and 28C can be switched to short-term storage (indicated by thin dashed lines).

[0120] Furthermore, in one aspect of the semiconductor device of the present invention, in addition to causing the information in storage circuits 22A to 22C to disappear (shortening the retention period) based on the signal Se from the sensor section, it is also possible to strengthen it (lengthen the retention period). Therefore, as Figure 6D As shown, the information transmission from the switching circuit 30 to the storage circuits 22B and 22C can be switched to a more active state (a state with a larger current flowing through the storage circuits; indicated by thick arrows), the information transmission to the storage circuits 22B and 22C can be switched to an inactive state, the information held in the storage circuit 22A can be switched to long-term storage (indicated by thick solid lines), or the information held in the storage circuits 22B and 22C can be switched to short-term storage.

[0121] <Combination of Sensor Unit and Peripheral Circuits 1>

[0122] like Figure 7A As shown, the structure described above can be used to send and receive information with the peripheral circuit 70. Additionally, as... Figure 7A As shown, the structure described above can be used for inputting information from the sensor unit 60. The peripheral circuit 70 can also be used to output information to a display device or actuator, etc.

[0123] By adopting Figure 7A The structure allows for the processing of signals (information) obtained from external sensors. For example, various sensors such as brainwave sensors, pulse sensors, blood pressure sensors, and temperature sensors can be used to acquire and store biological information such as brainwaves, pulse, blood pressure, and body temperature. It is expected that the obtained information can be used to instantaneously and uniformly grasp changes in irregular biological information.

[0124] Figure 7B It is used to Figure 7A This diagram illustrates a comparison between the functions achievable by the semiconductor device and those of the human brain.

[0125] In the sensor section 60, the sensor element (e.g., a photoelectric conversion element) is equivalent to the human eye. Information output from the photoelectric conversion element is input to a storage section including an OS transistor. The storage section includes a storage circuit formed by the OS transistor and a switching circuit formed by the OS transistor.

[0126] The storage unit 10 is a storage element, equivalent to the part of the brain such as the neocortex or hippocampus that controls memory. The switching circuit is equivalent to the part of the brain such as the optic nerve or axon that transmits information. The input / output circuit 40 can be used to input and output information with peripheral circuits based on the information stored in the storage unit 10.

[0127] <Structure Example of a Semiconductor Device 2>

[0128] Figure 8 This is an example of a block diagram used to illustrate the structure of a semiconductor device. Figure 8 The semiconductor device shown includes a sensor unit 60, a control unit 50A, and a storage unit 10A. As an example, the storage unit 10A includes a storage circuit 26A, a storage circuit 26B, a switching circuit 31, and an input / output circuit 40.

[0129] Note that, although in Figure 8 The diagram shows one sensor unit 60, one control unit 50A, and one storage unit 10A, but multiple units of each are also possible. Furthermore, the storage circuit 26A, storage circuit 26B, switching circuit 31, and input / output circuit 40 are not limited to one type. Figure 8 As shown, there can be multiple of each.

[0130] Storage circuit 26A includes multiple storage circuits ( Figure 8 Storage circuits 27A to 27D are shown. Each of storage circuits 27A to 27D includes multiple storage elements. Although not shown, storage circuits 27A to 27D include drive circuits for driving the multiple storage elements. The drive circuits have the function of switching the signal waveform of the word signal according to the control of the control unit 50A. Storage circuits 27A to 27D have the function of changing the information storage capacity according to the signal Se obtained from the sensor unit 60. Note that information is sometimes referred to as data. In addition, information is stored in the storage circuit as a voltage value or charge quantity corresponding to the data.

[0131] For example, storage circuits 27A to 27D include storage elements that can change their information storage capacity according to the signal waveform of the word signal. For example, storage circuits 27A and 27B can be controlled by control unit 50A to make them storage elements capable of long-term and short-term information storage, respectively.

[0132] Storage circuit 26B is the same as storage circuit 26A, including multiple storage circuits. Figure 8 Storage circuits 28A to 28D are shown. Each of storage circuits 28A to 28D includes multiple storage elements. Although not shown, storage circuits 28A to 28D include drive circuits for driving the multiple storage elements. The drive circuits have the function of switching the signal waveform of the word signal according to the control of the control unit 50A. Storage circuits 28A to 28D have the function of changing the information storage capacity according to the signal Se obtained from the sensor unit 60.

[0133] For example, storage circuits 28A to 28D include storage elements that have the function of changing their information storage capacity according to the signal waveform of the word signal. For example, storage circuits 28A and 28B can be controlled by control unit 50A to make them storage elements capable of long-term and short-term information storage, respectively.

[0134] DOSRAM or NOSRAM is preferred as the storage circuit suitable for storage circuits 26A and 26B.

[0135] Note that in one embodiment of the present invention, the structure of applying NOSRAM or DOSRAM to the circuits included in memory circuit 26A and memory circuit 26B is described, but the present invention is not limited thereto. For example, with future technological advancements, where power consumption is significantly reduced when using non-volatile memories such as ReRAM and MRAM, they may also be applied to the circuits included in memory circuit 26A and memory circuit 26B, depending on the circumstances.

[0136] The switching circuit 31 has the function of controlling the electrical connection between storage circuits 26A and 26B according to the control of the control unit 50A. For example, it has the function of controlling the amount of current flowing through storage circuits 27A to 27D and storage circuits 28A to 28D. In other words, it has the function of switching information transmission between multiple storage circuits. The switching circuit 31 has the function of changing the amount of current flowing through storage circuits 27A to 27D and storage circuits 28A to 28D according to the signal Se and the signal waveform of the word signal obtained from the sensor unit 60. Sometimes the switching circuit 31 is referred to as a reconfigurable circuit (reconfiguration circuit).

[0137] The switching circuit 31 includes a storage element that controls the amount of current flowing through the storage circuit and a semiconductor element that controls the current flow based on the information stored in the storage element. In the switching circuit 31, the control unit 50A has the function of changing the information stored in the storage element through the signal waveform of a control word signal. Note that in Figure 8 Although the arrow between storage circuit 26A and storage circuit 26B is shown pointing in one direction, it can also be represented as a bidirectional arrow based on the flow of information.

[0138] The switching circuit 31 is a programmable device including an OS transistor. Note that in this specification and accompanying drawings, the programmable device including the OS transistor is referred to as an OS-FPGA. Furthermore, the information stored in the storage elements of the OS-FPGA is referred to as configuration data.

[0139] The memory area of ​​an OS-FPGA can be smaller than that of an FPGA whose storage elements are composed of SRAM. Therefore, even with the addition of context switching functionality, the increase in area is minimal. Furthermore, OS-FPGAs can transfer data and parameters at high speeds via boost converters.

[0140] As an example, sensor unit 60 includes various sensors such as brainwave sensors, pulse sensors, blood pressure sensors, and temperature sensors used to acquire biological information such as brainwaves, pulse, blood pressure, and body temperature. Figure 8 Although the state of the output signal Se from one sensor is shown, signals from multiple sensors can also be input to the control unit 50A.

[0141] The control unit 50A includes arithmetic circuits such as a CPU (Central Processing Unit) and a GPU (Graphics Processing Unit), and storage circuits such as an SRAM (Static Random Access Memory). The control unit 50A has a function of outputting signals WL_A to WL_C according to the signal Se output from the sensor unit 60. For example, the control unit 50A can perform an output corresponding to an input by using arithmetic processing based on an artificial neural network or the like.

[0142] Signals WL_A to WL_C are signals (word signals) supplied to the gate electrodes of the transistors included in the storage circuit 26A, the storage circuit 26B, and the switching circuit 31, or signals capable of switching the word signals. Note that, although Figure 8 it shows the state where the signal WL_A is output to the storage circuit 26A, the signal WL_A controls the storage circuits 27A to 27D or the storage elements included in the storage circuit 26A by using different word signals. Similarly, the storage circuit 26B and the switching circuit 31 can also control different storage circuits by using different word signals.

[0143] Note that the control unit 50A can switch the control of signals WL_A to WL_C according to the signal Se output from the sensor unit 60. For example, the control of signals WL_A to WL_C can be switched according to whether the same signal Se is repeatedly input or a signal Se with high or low intensity is input.

[0144] The input / output circuit 40 is a circuit for controlling the input or output of information to the storage circuit 26A, the storage circuit 26B, and the switching circuit 31. The input / output circuit 40 can also be provided outside the storage unit 10A.

[0145] By adopting the semiconductor device structure disclosed in the present embodiment, it is possible to use a semiconductor device including OS transistors to realize the formation and process of long-term memory and the formation and process of short-term memory in the human brain. Therefore, compared with the prior art, data can be stored with a function closer to that of the human brain. In addition, data retention can be achieved with extremely low power. That is to say, like the human brain, a brain-type processor can be driven with extremely low power consumption.

[0146] <Structural Examples 2 of NOSRAM and DOSRAM>

[0147] The storage circuits 27A to 27D or the storage circuits 28A to 28D are circuit structures including OS transistors. Refer to Figures 9A to 9D and Figure 10Aand Figure 10D An example illustrating the circuit structure and its operation is provided.

[0148] Figure 9A A circuit diagram showing a memory element including a DOSRAM circuit structure is provided. Figure 9A The transistor MT6, capacitor C1, word line WL, and bit line BL are shown.

[0149] Transistor MT6 is an OS transistor, a 3-terminal device including a back gate electrode. Transistor MT6 can also be a 4-terminal device including a back gate electrode. The off-state current of transistor MT6 is represented by Ioff. Figure 9A In the diagram, the node that holds the charge is shown as node FN, which is also the node of the wiring connected to transistor MT6 and capacitor C1.

[0150] Bit line BL transmits write information (data, data potential) to the memory element. Word line WL, under the control of control unit 50A, transmits a signal (word signal) to control the on / off ratio (equivalent to the length of the on-time) of transistor MT6. Sometimes, both bit line BL and word line WL are simply referred to as wiring.

[0151] For example, the word signal supplied to the word line WL is controlled by the control unit 50A to be a different potential from that of each storage element included in the storage circuits 27A to 27D. For example, the word signal when storing information in storage circuit 27A can be set to WL_0, the word signal when storing information in storage circuit 26B can be set to WL_1, and the word signal when storing information in storage circuit 27C can be set to WL_2. Figure 9B As shown, signals WL_0 to WL_2 can be represented as signals with different on-times T0 to T2.

[0152] according to Figure 9B As shown, from the start time T0 to the start time T2, the potential held by node FN changes. For example, if the potential of node FN at start time T0 is set to potential VFN_0, the potential of node FN at start time T1 is set to potential VFN_1, and the potential of node FN at start time T2 is set to potential VFN_2, then the following will be observed: Figure 9C The diagram shows the size relationship. The potential of node FN changes over time, with a time difference before reaching any potential (V0) (refer to...). Figure 9C (Time interval t0 to time interval t2). In other words, the shorter the on-time, the easier it is for the potential held at node FN to change in a short period of time; the longer the on-time, the more difficult it is for the potential held at node FN to change. As a result, the retention period of information in each memory circuit can vary.

[0153] By adopting this structure, storage circuits 27A to 27D or storage circuits 28A to 28D can realize the function of storing information with different storage capacities according to the signal Se obtained from the sensor unit 60.

[0154] Figure 9D A flowchart illustrating the operation of the DOSRAM described above is shown.

[0155] In step S31, the word signal supplied to the word line WL is set to WL_1, and the information is stored in the storage circuit.

[0156] In step S32, the word signal supplied to the word line WL is set to WL_1, and the information is refreshed periodically. Note that when the off-state current is sufficiently low, the refresh information can be omitted.

[0157] In step S33, it is determined whether the signal Se output from the sensor unit 60 has changed. Preferably, multiple thresholds are set and the activation time of the word signal is controlled according to the relationship between the threshold and the sensor output, so as to determine whether a sensor signal exists.

[0158] If a change occurs in step S33, proceed to step S34, where the signal with a longer on-time is set to WL_2, and the information is stored in the storage circuit. In other words, the switching word signal increases the retention time of the information in the storage circuit.

[0159] If there is no change or a small change in step S33, proceed to step S35, where the word signal supplied to the word line WL is set to WL_0 with a short on-time, and the information is stored in the storage circuit. In other words, the word signal is switched so that the information retention time in the storage circuit is shortened.

[0160] By employing this structure, it is possible to store information with varying storage capacities based on the output of the sensor unit. For example, if the sensor unit is a temperature sensor, it is possible to store information for extended periods at high or low temperatures, and then forget the information after a period at room temperature.

[0161] Figure 10A A circuit diagram showing a memory element with a circuit structure including NOSRAM is provided. Figure 10A Transistor MT7, transistor MT8, word line WL, and bit line BL are shown.

[0162] The MT7 transistor is an OS transistor, a 3-terminal device including a back gate electrode. The MT7 transistor can also be a 4-terminal device including a back gate electrode. The off-state current of the MT7 transistor is represented by Ioff. Figure 10AIn the diagram, the node that holds the charge is shown as node FN, which is also the node of the wiring connected to the gates of transistors MT7 and MT8.

[0163] Note that, although in Figure 10A The MT8 transistor is shown as a p-channel transistor, but it can also be an n-channel transistor. Furthermore, although... Figure 10A The diagram shows a 2T type with two transistors, but a 2T1C type with added capacitors or a 3T type combined with other transistors can also be used. Note that by increasing the parasitic capacitance, such as the gate capacitance of transistor MT3, the capacitor connected to node FN can be omitted.

[0164] For example, the word signal supplied to the word line WL is controlled by the control unit 50A to be different from the potential of each storage element included in the storage circuits 27A to 27D. For example, the word signal when storing information in storage circuit 27A can be set to WL_0, the word signal when storing information in storage circuit 27B can be set to WL_1, and the word signal when storing information in storage circuit 27C can be set to WL_2. Figure 10B As shown, signals WL_0 to WL_2 can be represented as signals with different on-times T0 to T2.

[0165] according to Figure 10B As shown, from the start time T0 to the start time T2, the potential held by node FN changes. For example, if the potential of node FN at start time T0 is set to potential VFN_0, the potential of node FN at start time T1 is set to potential VFN_1, and the potential of node FN at start time T2 is set to potential VFN_2, then the following will be observed: Figure 10C The diagram shows the size relationship. The potential of node FN changes over time, with a time difference before reaching any potential (V0) (refer to...). Figure 10C (Time interval t0 to time interval t2). In other words, the shorter the on-time, the easier it is for the potential held at node FN to change in a short period of time; the longer the on-time, the more difficult it is for the potential held at node FN to change. As a result, the retention period of information in each memory circuit can vary.

[0166] By adopting this structure, storage circuits 27A to 27D or storage circuits 28A to 28D can realize the function of storing information with different storage capacities according to the signal Se obtained from the sensor unit 60.

[0167] Figure 10D A flowchart illustrating the operation of the NOSRAM described above is shown.

[0168] In step S41, the word signal supplied to the word line WL is set to WL_1, and the information is stored in the storage circuit.

[0169] In step S42, the word signal supplied to the word line WL is set to WL_1, and the information is refreshed periodically. Note that when the off-state current is sufficiently low, the refresh information can be omitted.

[0170] In step S43, it is determined whether the signal Se output from the sensor unit 60 has changed. Preferably, multiple thresholds are set and the activation time of the word signal is controlled according to the relationship between the threshold and the sensor output, so as to determine whether a sensor signal exists.

[0171] If a change occurs in step S43, proceed to step S44, where the signal supplied to the word line WL is set to WL_2 with a longer on-time, and the information is stored in the storage circuit. In other words, the word signal is switched, making the information in the storage circuit last longer.

[0172] If there is no change or a small change in step S43, proceed to step S45, set the word signal supplied to word line WL to WL_0 with a short on-time, and store the information in the storage circuit. That is, switch the word signal to shorten the information retention time in the storage circuit.

[0173] By employing this structure, it is possible to store information with varying storage capacities based on the output of the sensor unit. For example, if the sensor unit is a temperature sensor, it is possible to store information for extended periods at high or low temperatures, and then forget the information after a period at room temperature.

[0174] <Example 2 of a switching circuit structure>

[0175] Switching circuit 31 is a circuit structure that includes the OS transistor. (Refer to...) Figures 11A to 11C , Figure 12 and Figures 13A to 13D An example illustrating the circuit structure and its operation is provided.

[0176] Figure 11A A circuit diagram of a storage element is shown, including a switching circuit 31 disposed between a pair of storage circuits. Figure 11A The diagram shows transistor MT9, transistor MT10, word line WL, bit line BL, input terminal IN, and output terminal OUT.

[0177] The MT9 transistor is an OS transistor, a 3-terminal device including a back gate electrode. The MT9 transistor can also be a 4-terminal device including a back gate electrode. The off-state current of the MT9 transistor is represented by Ioff. Figure 11AIn the diagram, the node that holds the charge is shown as node FN, which is also the node of the wiring connected to the gates of transistors MT9 and MT10.

[0178] Transistor MT10 is either a Si transistor or an OS transistor. The current flowing through transistor MT10, based on the potential of node FN, is represented as Idata. This current flows between the input terminal IN and the output terminal OUT.

[0179] Note that in Figure 11A In this context, transistor MT10 can be either a p-channel transistor or an n-channel transistor. Additionally, although... Figure 11A The diagram shows a 2T type with two transistors, but a 2T1C type with added capacitors or a 3T type combined with other transistors can also be used. Note that by increasing the parasitic capacitance, such as the gate capacitance of transistor MT10, the capacitor connected to node FN can be omitted.

[0180] For example, the word signal supplied to word line WL is controlled by control unit 50A to be different from the potential of each switching circuit in the wiring between one of the storage circuits 27A to 27D and one of the storage circuits 28A to 28D. For example, if the word signal of transistor MT9 included in the switching circuit between storage circuits 27A and 28A is set to WL_0, the word signal of transistor MT9 included in the switching circuit between storage circuits 27B and 28B is set to WL_1, and the word signal of transistor MT9 included in the switching circuit between storage circuits 27C and 28C is set to WL_2. Figure 11B As shown, signals WL_0 to WL_2 can be represented as signals with different on-times T0 to T2.

[0181] according to Figure 11B The diagram shows the change in potential maintained by node FN from turn-on time T0 to turn-on time T2. The longer the turn-on time, the easier it is for the potential maintained by node FN to change in a short period; conversely, the shorter the turn-on time, the less likely the potential maintained by node FN will change. At this time, if node FN maintains a potential of level L, the potential of node FN (V...) FN The difference is generated based on the duration of the on-time. Therefore, the difference is generated based on the current Idata flowing through the potential of node FN. As a result, the amount of current flowing through each memory circuit can be differentiated.

[0182] By adopting this structure, the switching circuit between the wirings provided between one of the storage circuits 27A to 27D and one of the storage circuits 28A to 28D can realize the function of generating a difference in the amount of current flowing through each storage circuit according to the signal Se obtained from the sensor unit 60.

[0183] Figure 11C A flowchart illustrating the operation of the switching circuit described above is shown.

[0184] In step S51, node FN is set to L level, meaning that current Idata does not flow through this data. Note that bit line BL is set to H level.

[0185] In step 52, the word signal supplied to word line WL is set to WL_0, and the potential fluctuation of node FN is reduced.

[0186] In step S53, it is determined whether the signal Se output from the sensor unit 60 has changed. Preferably, multiple thresholds are set and the activation time of the word signal is controlled according to the relationship between the threshold and the sensor output, so as to determine whether a sensor signal exists.

[0187] If a change occurs in step S53, proceed to step S54, where the word signal supplied to word line WL is set to WL_1. That is, the potential variation held at node FN is increased, and the on-time is controlled, causing the current Idata flowing through the storage circuitry to increase. If there is no change or a small change in step S53, proceed to step S52.

[0188] In step S55, it is determined whether the signal Se output from the sensor unit 60 has changed. Preferably, multiple thresholds are set and the on-time of the word signal is controlled according to the relationship between the threshold and the sensor output in order to determine whether a sensor signal exists.

[0189] If a change occurs in step S55, proceed to step S56 and set the word signal to WL_2. That is, continue increasing the change in the potential held at node FN and control the turn-on time, causing the current Idata flowing through the storage circuit to continue increasing. If there is no change or a small change in step S55, proceed to step S54.

[0190] Note that in Figures 11A to 11C The image shows an example of the on-time of the control word signal, but other structures can also be used. For example, as shown below... Figure 12 As shown, the refresh rate of the word signal can also be changed. Figure 12 The example shown illustrates that when the current Idata is reduced, the frequency of the signal supplied as the word signal is also reduced. That is, as... Figure 12 As shown, signal WL_0 is at level H during each period T11. Furthermore, when the current Idata is increased, the frequency of the signal supplied as the word signal is increased. That is, as... Figure 12 As shown, signal WL_1 is at level H during each period T12. Furthermore, as the current Idata increases further, the frequency of the signal supplied as the word signal is further increased. That is, as... Figure 12 As shown, signal WL_2 is at level H during each period T13.

[0191] By employing this structure, it is possible to achieve a function where the amount of current flowing through the storage circuit varies depending on the output of the sensor unit. For example, if the sensor unit is a temperature sensor, it is possible to achieve a function where information transmission becomes more active at high or low temperatures and less active at room temperature.

[0192] in addition, Figures 13A to 13D This is a diagram illustrating information storage in a semiconductor device that mimics the human brain and is used to explain one aspect of the present invention.

[0193] Figure 13A The following states are shown: as the initial state, information is held in storage circuit 27A (indicated by solid lines), information transmission in switching circuit 31 is inactive (a state with low current flowing between storage circuits; indicated by dashed arrows), and there is no information held in storage circuits 28A to 28C (indicated by dashed lines).

[0194] In one embodiment of the semiconductor device of the present invention, the information transmission of the switching circuit 31 can be switched to an active state (a state with a large current flowing through the storage circuit; indicated by a solid arrow) based on the signal Se from the sensor section. Therefore, as... Figure 13B As shown, the information stored in storage circuit 27A can be stored in storage circuits 28A to 28C (represented by solid lines).

[0195] Furthermore, in one embodiment of the semiconductor device of the present invention, the information in storage circuits 28A to 28C can be deleted (the retention period is shortened) based on the signal Se from the sensor section. Therefore, as Figure 13C As shown, the information transmission from the switching circuit 31 to the storage circuits 28B and 28C can be switched to an inactive state, and the information held in the storage circuits 28B and 28C can be switched to short-term storage (indicated by thin dashed lines).

[0196] Furthermore, in one aspect of the semiconductor device of the present invention, in addition to causing the information in storage circuits 28A to 28C to disappear (shortening the retention period) based on the signal Se from the sensor section, it is also possible to strengthen it (lengthen the retention period). Therefore, as Figure 13D As shown, the information transmission from switching circuit 31 to storage circuits 28B and 28C can be switched to a more active state (a state with a larger current flowing through the storage circuits; indicated by thick arrows), the information transmission to storage circuits 28B and 28C can be switched to an inactive state, the information held in storage circuit 28A can be switched to long-term storage (indicated by thick solid lines), or the information held in storage circuits 28B and 28C can be switched to short-term storage.

[0197] <Combination of Sensor Unit and Peripheral Circuits 2>

[0198] like Figure 14A As shown, the structure described above can be used to send and receive information with the peripheral circuit 70. Additionally, as... Figure 14A As shown, the structure described above can be used for inputting information from the sensor unit 60. The peripheral circuit 70 can be used to output information to a display device or actuator, etc.

[0199] By adopting Figure 14A The structure allows for the processing of signals (information) obtained from external sensors. For example, various sensors such as brainwave sensors, pulse sensors, blood pressure sensors, and temperature sensors can be used to acquire and store biological information such as brainwaves, pulse, blood pressure, and body temperature. It is expected that the obtained information can be used to instantaneously and uniformly grasp changes in irregular biological information.

[0200] Figure 14B It is used to Figure 14A This diagram illustrates a comparison between the functions achievable by the semiconductor device and those of the human brain.

[0201] In the sensor section 60, the sensor element (e.g., a photoelectric conversion element) is equivalent to the human eye. Information output from the photoelectric conversion element is input to a storage section including an OS transistor. The storage section includes a storage circuit formed by the OS transistor and a switching circuit formed by the OS transistor.

[0202] The storage unit 10 is a storage element, equivalent to the control and storage area such as the neocortex or hippocampus of the brain. The switching circuit is equivalent to the information transmission area such as the optic nerve or axon. The input / output circuit 40 can be used to input and output information with peripheral circuits based on the information stored in the storage unit 10.

[0203] <Application Examples of Semiconductor Devices>

[0204] Reference Figures 15A to 15DApplication examples of the electronic devices using the semiconductor devices described in the above embodiments will be described. One embodiment of the present invention can be applied to portable electronic devices, such as information terminals like smartphones or notebook personal computers.

[0205] Figure 15A The portable information terminal 2910 shown includes a housing 2911, a display unit 2912, a microphone 2917, a speaker unit 2914, a camera 2913, an external connection unit 2916, and an operation switch 2915. The display unit 2912 includes a display panel using a flexible substrate and a touch screen. Additionally, the information terminal 2910 has an antenna, battery, etc., inside the housing 2911. The information terminal 2910 can be used, for example, as a smartphone, mobile phone, tablet information terminal, tablet computer, or e-book reader terminal.

[0206] Note that one aspect of the present invention can be applied to portable information terminals, as well as to autonomous mobile bodies such as automobiles or robots.

[0207] Figure 15B The illustrated robotic vacuum cleaner 2920 includes a housing 2921, a display unit 2922, operation buttons 2923, multiple cameras 2924 mounted on the side, and brushes 2925. Although not shown, the bottom of the robotic vacuum cleaner 2920 has tires and a suction inlet. Furthermore, the robotic vacuum cleaner 2920 includes various sensors such as infrared sensors, ultrasonic sensors, accelerometers, piezoelectric sensors, light sensors, and gyroscopes. In addition, the robotic vacuum cleaner 2920 includes a wireless communication unit.

[0208] In addition, the robot vacuum cleaner 2920 analyzes the images captured by the camera 2924 to determine the presence or absence of obstacles such as walls, furniture, or steps. Furthermore, if it detects objects such as wiring that may get tangled in the brush 2925 through image analysis, it can stop the rotation of the brush 5103.

[0209] The remaining battery power and the amount of debris collected can be displayed on the display 5101. The route taken by the robot vacuum cleaner 2920 can also be displayed on the display unit 2922.

[0210] Figure 15C The robot 2100 shown includes a computing device 2110, an illuminance sensor 2101, a microphone 2102, an upper camera 2103, a speaker 2104, a display 2105, a lower camera 2106, an obstacle sensor 2107, and a movement mechanism 2108.

[0211] The semiconductor device described above can be used in an arithmetic unit 2110, an illuminance sensor 2101, an upper camera 2103, a display 2105, a lower camera 2106, an obstacle sensor 2107, etc. in the robot 2100.

[0212] The microphone 2102 has functions such as detecting the voice of the user and surrounding sounds. In addition, the speaker 2104 has a function of emitting sounds. The robot 2100 can communicate with the user using the microphone 2102 and the speaker 2104.

[0213] The display 2105 has a function of displaying various information. The robot 2100 can display the information desired by the user on the display 2105. The display 2105 may be equipped with a touch panel.

[0214] The upper camera 2103 and the lower camera 2106 have functions of photographing the surrounding environment of the robot 2100. In addition, the obstacle sensor 2107 can detect the presence or absence of obstacles in front when the robot 2100 moves using the moving mechanism 2108. The robot 2100 can use the upper camera 2103, the lower camera 2106, and the obstacle sensor 2107 to recognize the surrounding environment and move safely.

[0215] Figure 15D The shown flying object 2120 includes an arithmetic unit 2121, propellers 2123, and a camera 2122, and has an autonomous flight function.

[0216] In the flying object 2120, the above semiconductor device can be used in the arithmetic unit 2121 and the camera 2122.

[0217] Figure 15D It is an external view showing an example of a car. The car 2980 includes a camera 2981, etc. In addition, the car 2980 includes various sensors such as an infrared radar, a millimeter-wave radar, and a lidar. The car 2980 analyzes the image captured by the camera 2981, determines the surrounding traffic conditions such as the presence or absence of a guardrail 1201 or pedestrians, and can thereby perform autonomous driving.

[0218] <Structural example of an OS transistor>

[0219] Figure 16 The shown semiconductor device includes a transistor 300, a transistor 500, and a capacitor 600. Figure 18A It is a cross-sectional view in the channel length direction of the transistor 500, Figure 18B It is a cross-sectional view in the channel width direction of the transistor 500, Figure 18C It is a cross-sectional view in the channel width direction of the transistor 300.

[0220] Transistor 500 is a metal-oxide-semiconductor (OS transistor) containing a metal-oxide-semiconductor in the channel formation region. Because transistor 500 has a low off-state current, by incorporating it into the OS transistors of a semiconductor device, written data can be retained for extended periods. In other words, the refresh frequency is low or unnecessary, thus reducing the power consumption of the semiconductor device.

[0221] The semiconductor device described in this embodiment includes Figure 16 Transistor 300, transistor 500, and capacitor 600 are shown. Transistor 500 is positioned above transistor 300, and capacitor 600 is positioned above transistors 300 and 500.

[0222] The transistor 300 is disposed on the substrate 311 and includes: a conductor 316, an insulator 315, a semiconductor region 313 formed by a portion of the substrate 311; and low-resistance regions 314a and 314b used as source and drain regions, respectively. Furthermore, the transistor 300 can be applied, for example, to the transistor described in the above embodiment.

[0223] like Figure 18C As shown, in transistor 300, conductor 316 covers the top surface of semiconductor region 313 and the side surface in the channel width direction via insulator 315. Thus, by giving transistor 300 a Fin-type structure, the effective channel width is increased, thereby improving the on-state characteristics of transistor 300. Furthermore, since the influence of the electric field at the gate electrode can be increased, the off-state characteristics of transistor 300 can be improved.

[0224] In addition, transistor 300 can be a p-channel transistor or an n-channel transistor.

[0225] The channel formation region of semiconductor region 313, the region theren, the low-resistance region 314a and low-resistance region 314b used as source or drain regions, preferably contain semiconductors such as silicon-based semiconductors, and more preferably contain single-crystal silicon. Alternatively, materials containing Ge (germanium), SiGe (silicon-germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), etc., can also be used. Silicon, by applying stress to the crystal lattice and changing the interplanar spacing to control the effective quality, can be used. Furthermore, transistor 300 can also be a HEMT (High Electron Mobility Transistor) using GaAs and GaAlAs, etc.

[0226] In the low resistance regions 314a and 314b, in addition to the semiconductor material applied to the semiconductor region 313, elements such as arsenic and phosphorus that impart n-type conductivity or elements such as boron that impart p-type conductivity are also included.

[0227] The conductor 316 used as the gate electrode can be a conductive material such as silicon, a semiconductor material, a metal material, an alloy material, or a metal oxide material, which contains elements that impart n-type conductivity, such as arsenic or phosphorus, or elements that impart p-type conductivity, such as boron.

[0228] Furthermore, since the work function is determined by the material of the conductor, the threshold voltage of the transistor can be adjusted by selecting the material of the conductor. Specifically, materials such as titanium nitride or tantalum nitride are preferably used as conductors. In order to combine conductivity and embeddability, a stack of metal materials such as tungsten or aluminum is preferably used as the conductor, especially tungsten in terms of heat resistance.

[0229] Notice, Figure 16 The structure of transistor 300 shown is merely an example and is not limited to the structure described above. Appropriate transistors can be used depending on the circuit structure or driving method. For example, when using a unipolar circuit with only OS transistors in a semiconductor device, such as... Figure 17 As shown, the structure of transistor 300 can be the same as that of transistor 500 using oxide semiconductor. Note that the structure of transistor 500 will be described later.

[0230] Insulators 320, 322, 324 and 326 are stacked sequentially in a manner that covers transistor 300.

[0231] Insulators 320, 322, 324 and 326 may be made of materials such as silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum oxynitride and aluminum nitride.

[0232] Note that in this specification, "silicon oxynitride" refers to a material in which the oxygen content is greater than the nitrogen content, while "silicon oxynitride" refers to a material in which the nitrogen content is greater than the oxygen content. Also note that in this specification, "aluminum oxynitride" refers to a material in which the oxygen content is greater than the nitrogen content, while "aluminum oxynitride" refers to a material in which the nitrogen content is greater than the oxygen content.

[0233] The insulator 322 can also be used as a planarization film to planarize steps caused by transistors 300 and the like disposed below it. For example, in order to improve the flatness of the top surface of the insulator 322, its top surface can also be planarized by a planarization process such as chemical mechanical polishing (CMP).

[0234] As the insulator 324, it is preferable to use a barrier film that can prevent hydrogen or impurities from diffusing from the substrate 311 or transistor 300 into the area where transistor 500 is disposed.

[0235] As an example of a hydrogen-blocking film, silicon nitride formed by CVD can be used. Here, hydrogen sometimes diffuses into semiconductor devices with oxide semiconductors, such as transistor 500, causing a deterioration in the characteristics of the semiconductor device. Therefore, it is preferable to provide a film that suppresses hydrogen diffusion between transistor 500 and transistor 300. Specifically, a film that suppresses hydrogen diffusion refers to a film with a low amount of hydrogen detachment.

[0236] The amount of hydrogen removed can be measured, for example, using thermal desorption spectroscopy (TDS). For instance, in TDS analysis within a membrane surface temperature range of 50°C to 500°C, when the amount of hydrogen removed (converted to hydrogen atoms) is expressed per unit area of ​​insulator 324, the amount of hydrogen removed from insulator 324 is 10 × 10⁻⁶. 15 atoms / cm 2 The following is preferred: 5×10 15 atoms / cm 2 That's all.

[0237] Note that the dielectric constant of insulator 326 is preferably lower than that of insulator 324. For example, the relative dielectric constant of insulator 326 is preferably less than 4, more preferably less than 3. For example, the relative dielectric constant of insulator 326 is preferably less than 0.7 times that of insulator 324, more preferably less than 0.6 times. By using a material with a low dielectric constant for the interlayer film, parasitic capacitance generated between wirings can be reduced.

[0238] Furthermore, conductors 328 and 330, which are connected to capacitor 600 or transistor 500, are embedded in insulators 320, 322, 324, and 326. In addition, conductors 328 and 330 function as plugs or wiring. Note that sometimes the same reference numeral is used to indicate multiple conductors that function as plugs or wiring. Furthermore, in this specification, wiring and plugs connected to wiring can also be a component. That is, a portion of a conductor is sometimes used as wiring, and a portion of a conductor is sometimes used as a plug.

[0239] For the materials used in the plugs and wiring (conductors 328 and 330, etc.), single layers or stacks of conductive materials such as metals, alloys, metal nitrides, or metal oxides can be used. High-melting-point materials such as tungsten or molybdenum, which combine heat resistance and conductivity, are preferred; tungsten is particularly favored. Alternatively, low-resistance conductive materials such as aluminum or copper are preferred. Using low-resistance conductive materials reduces wiring resistance.

[0240] A wiring layer can also be formed on the insulator 326 and the conductor 330. For example, in Figure 16In the transistor 300, insulators 350, 352, and 354 are stacked sequentially. Furthermore, a conductor 356 is formed within insulators 350, 352, and 354. The conductor 356 functions as a connector or wiring for connection to the transistor 300. Moreover, the conductor 356 can be formed using the same material as conductors 328 and 330.

[0241] Furthermore, similar to insulator 324, insulator 350 preferably uses an insulator that is hydrogen-barrier. Additionally, conductor 356 preferably includes a hydrogen-barrier conductor. In particular, the hydrogen-barrier conductor is formed within the openings included in the hydrogen-barrier insulator 350. By employing this structure, the barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0242] Note that tantalum nitride, for example, is preferably used as a conductor that blocks hydrogen. Furthermore, by layering tantalum nitride and highly conductive tungsten, not only can the conductivity of the wiring be maintained, but hydrogen diffusion from the transistor 300 can also be suppressed. In this case, the tantalum nitride layer that blocks hydrogen is preferably in contact with the hydrogen-blocking insulator 350.

[0243] Furthermore, a wiring layer can also be formed on the insulator 354 and the conductor 356. For example, in Figure 16 In the structure, insulators 360, 362, and 364 are stacked sequentially. Furthermore, a conductor 366 is formed within insulators 360, 362, and 364. The conductor 366 functions as a plug or wiring. Moreover, the conductor 366 can be formed using the same material as conductors 328 and 330.

[0244] Furthermore, similar to insulator 324, insulator 360 preferably uses an insulator that is hydrogen-barrier. Additionally, conductor 366 preferably includes a hydrogen-barrier conductor. Specifically, the hydrogen-barrier conductor is formed within the openings included in the hydrogen-barrier insulator 360. By employing this structure, a barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0245] Furthermore, a wiring layer can also be formed on the insulator 364 and the conductor 366. For example, in Figure 16 In the structure, insulators 370, 372, and 374 are stacked sequentially. Furthermore, a conductor 376 is formed within insulators 370, 372, and 374. The conductor 376 functions as a plug or wiring. Moreover, the conductor 376 can be formed using the same material as conductors 328 and 330.

[0246] Furthermore, similar to insulator 324, insulator 370 preferably uses an insulator that is hydrogen-barrier. Additionally, conductor 376 preferably includes a hydrogen-barrier conductor. Specifically, the hydrogen-barrier conductor is formed within the openings included in the hydrogen-barrier insulator 370. By employing this structure, a barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0247] Furthermore, a wiring layer can also be formed on the insulator 374 and the conductor 376. For example, in Figure 16 In the structure, insulators 380, 382, ​​and 384 are stacked sequentially. Furthermore, a conductor 386 is formed within insulators 380, 382, ​​and 384. The conductor 386 functions as a plug or wiring. Moreover, the conductor 386 can be formed using the same material as conductors 328 and 330.

[0248] Furthermore, similar to insulator 324, insulator 380 preferably uses an insulator that is hydrogen-barrier. Additionally, conductor 386 preferably includes a hydrogen-barrier conductor. Specifically, the hydrogen-barrier conductor is formed within the openings included in the hydrogen-barrier insulator 380. By employing this structure, a barrier layer can be used to separate transistor 300 from transistor 500, thereby suppressing hydrogen diffusion from transistor 300 into transistor 500.

[0249] The wiring layers including conductor 356, conductor 366, conductor 376, and conductor 386 have been described above, but the semiconductor device of this embodiment is not limited thereto. The wiring layers similar to the wiring layer including conductor 356 may be three or fewer, or five or more.

[0250] Insulators 510, 512, 514 and 516 are sequentially stacked on insulator 384. Preferably, one of insulators 510, 512, 514 and 516 is a material that is resistant to oxygen or hydrogen.

[0251] For example, as insulators 510 and 514, it is preferable to use barrier films that can prevent hydrogen or impurities from diffusing from the substrate 311 or the region where the transistor 300 is disposed into the region where the transistor 500 is disposed. Therefore, insulators 510 and 514 can be made of the same material as insulator 324.

[0252] As an example of a hydrogen-blocking film, silicon nitride formed by CVD can be used. Here, hydrogen sometimes diffuses into semiconductor devices with oxide semiconductors, such as transistor 500, causing a deterioration in the characteristics of the semiconductor device. Therefore, it is preferable to provide a film that suppresses hydrogen diffusion between transistor 300 and transistor 500. Specifically, a film that suppresses hydrogen diffusion refers to a film with a low amount of hydrogen detachment.

[0253] For example, as a membrane that blocks hydrogen, insulators 510 and 514 are preferably made of metal oxides such as aluminum oxide, hafnium oxide, and tantalum oxide.

[0254] In particular, aluminum oxide has a high barrier effect against the permeation of oxygen and impurities such as hydrogen and moisture that cause changes in the electrical characteristics of transistors. Therefore, during and after the transistor manufacturing process, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500. Furthermore, aluminum oxide can suppress the release of oxygen from the oxides constituting the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0255] For example, the same materials as insulator 320 can be used as insulators 512 and 516. Furthermore, by using materials with lower dielectric constants as the aforementioned insulators, parasitic capacitances generated between wirings can be reduced. For example, silicon oxide films and silicon oxynitride films can be used as insulators 512 and 516.

[0256] Furthermore, conductors such as conductor 518 and conductors constituting transistor 500 (e.g., conductor 503) are embedded in insulators 510, 512, 514, and 516. The conductor 518 is used as a plug or wiring for connection to capacitor 600 or transistor 300. The conductor 518 can be formed using the same material as conductors 328 and 330.

[0257] In particular, the conductor 518 in the region in contact with insulators 510 and 514 is preferably a conductor that is resistant to oxygen, hydrogen, and water. By employing this structure, transistor 300 and transistor 500 can be separated by a layer that is resistant to oxygen, hydrogen, and water, thereby suppressing the diffusion of hydrogen from transistor 300 into transistor 500.

[0258] A transistor 500 is disposed above the insulator 516.

[0259] like Figure 18A and Figure 18BAs shown, transistor 500 includes: a conductor 503 embedded in insulator 514 and insulator 516; an insulator 520 disposed on insulator 516 and conductor 503; an insulator 522 disposed on insulator 520; an insulator 524 disposed on insulator 522; an oxide 530a disposed on insulator 524; an oxide 530b disposed on oxide 530a; conductors 542a and 542b disposed on oxide 530b and spaced apart from each other; an insulator 580 disposed on conductors 542a and 542b and having an opening overlapping between conductors 542a and 542b; an oxide 530c disposed on the bottom and side surfaces of the opening; an insulator 550 disposed on the forming surface of oxide 530c; and a conductor 560 disposed on the forming surface of insulator 550.

[0260] In addition, such as Figure 18A and Figure 18B As shown, preferably, an insulator 544 is disposed between oxide 530a, oxide 530b, conductor 542a and conductor 542b and insulator 580. Furthermore, as... Figure 18A and Figure 18B As shown, the conductor 560 preferably includes a conductor 560a disposed inside the insulator 550 and a conductor 560b embedded inside the conductor 560a. Furthermore, as... Figure 18A and Figure 18B As shown, an insulator 574 is preferably disposed on the insulator 580, the conductor 560 and the insulator 550.

[0261] Note that oxides 530a, 530b, and 530c are sometimes collectively referred to as oxide 530.

[0262] In transistor 500, three layers of oxide 530a, oxide 530b, and oxide 530c are stacked in and around the region forming the channel; however, the present invention is not limited to this. For example, a single layer of oxide 530b, a two-layer structure of oxide 530b and oxide 530a, a two-layer structure of oxide 530b and oxide 530c, or a stacked structure of four or more layers can be provided. Furthermore, in transistor 500, conductor 560 has a two-layer structure; however, the present invention is not limited to this. For example, conductor 560 can also have a single-layer structure or a stacked structure of three or more layers. Note that... Figure 16 , Figure 18A The structure of transistor 500 shown is only an example and is not limited to the structure described above. Appropriate transistors can be used depending on the circuit structure or driving method.

[0263] Here, conductor 560 is used as the gate electrode of the transistor, and conductors 542a and 542b are used as source or drain electrodes. As described above, conductor 560 is embedded in the opening of insulator 580 and in the region between conductors 542a and 542b. The arrangement of conductors 560, 542a, and 542b relative to the opening of insulator 580 is self-aligned. In other words, in transistor 500, the gate electrode can be self-aligned between the source and drain electrodes. Therefore, conductor 560 can be formed without providing space for alignment, thus reducing the occupied area of ​​transistor 500. This enables miniaturization and high integration of semiconductor devices.

[0264] Furthermore, conductor 560 is self-aligned and formed in the region between conductors 542a and 542b, so conductor 560 does not include the region overlapping with conductors 542a and 542b. This reduces the parasitic capacitance formed between conductor 560 and conductors 542a and 542b. Therefore, the switching speed of transistor 500 can be increased, allowing transistor 500 to have high-frequency characteristics.

[0265] Conductor 560 is sometimes used as the first gate (also called the top gate) electrode. Conductor 503 is sometimes used as the second gate (also called the bottom gate) electrode. In this case, the threshold voltage of transistor 500 can be controlled by independently changing the potential supplied to conductor 503 without linking it to the potential supplied to conductor 560. In particular, by supplying a negative potential to conductor 503, the threshold voltage of transistor 500 can be made greater than 0V and the off-state current can be reduced. Therefore, compared with not applying a negative potential to conductor 503, applying a negative potential to conductor 503 can reduce the drain current when the potential supplied to conductor 560 is 0V. Conductor 503 is arranged to overlap with oxide 530 and conductor 560. Thus, when potentials are supplied to conductor 560 and conductor 503, the electric field generated from conductor 560 and the electric field generated from conductor 503 are connected and can cover the channel formation region formed in oxide 530. In this specification, the structure of a transistor in which the electric field of the first gate electrode and the electric field of the second gate electrode surround the channel to form a region is referred to as a surround channel (S-channel) structure.

[0266] Furthermore, conductor 503 has the same structure as conductor 518, with conductor 503a formed in contact with the inner walls of the openings of insulators 514 and 516, and conductor 503b formed on its inner side. Here, in transistor 500, conductors 503a and conductor 503b are stacked, but the present invention is not limited thereto. For example, conductor 503 may have a single-layer structure or a stacked structure of three or more layers.

[0267] Here, the conductive material 503a is preferably a conductive material that has the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (making it difficult for such impurities to permeate). Additionally, it is preferable to use a conductive material that has the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms and oxygen molecules) (making it difficult for such oxygen to permeate). In this specification, "the function of suppressing the diffusion of impurities or oxygen" refers to the function of suppressing the diffusion of any one or all of the aforementioned impurities and oxygen.

[0268] For example, by giving conductor 503a the function of inhibiting oxygen diffusion, the decrease in conductivity caused by the oxidation of conductor 503b can be suppressed.

[0269] Furthermore, when conductor 503 also functions as a wiring element, it is preferable to use a highly conductive material with tungsten, copper, or aluminum as the main components of conductor 503b. In this case, conductor 505 is not necessarily required. In the accompanying drawings, conductor 503b has a single-layer structure, but it can also have a multilayer structure, for example, a multilayer structure of titanium, titanium nitride, and the aforementioned conductive materials can be used.

[0270] Insulators 520, 522, 524 and 550 are used as a second gate insulating film.

[0271] Here, the insulator 524 in contact with the oxide 530 is preferably an insulator containing oxygen in excess of its stoichiometric composition. In other words, it is preferable to form an excess oxygen region in the insulator 524. By providing the aforementioned insulator containing excess oxygen in such a way that it is in contact with the oxide 530, oxygen defects in the oxide 530 can be reduced, thereby improving the reliability of the transistor 500.

[0272] Specifically, as an insulator with an excess oxygen region, an oxide material in which a portion of the oxygen is removed by heating is preferred. An oxide in which oxygen is removed by heating is defined as one in which the amount of oxygen removed, converted to oxygen atoms, in TDS (Thermal Desorption Spectroscopy) analysis is 1.0 × 10⁻⁶. 18 atoms / cm 3 The preferred value is 1.0 × 10⁴. 19atoms / cm 3 The above is further preferred to be 2.0×10 19 atoms / cm 3 Above, or 3.0 × 10 20 atoms / cm 3 The above-mentioned oxide film. Furthermore, the surface temperature of the film during the above TDS analysis is preferably in the range of 100°C or higher and 700°C or lower, or 100°C or higher and 400°C or lower.

[0273] When the insulator 524 has an excess oxygen region, the insulator 522 preferably has the function of inhibiting the diffusion of oxygen (e.g., oxygen atoms, oxygen molecules, etc.) (making it difficult for the aforementioned oxygen to pass through).

[0274] When the insulator 522 has the function of suppressing the diffusion of oxygen or impurities, the oxygen contained in the oxide 530 does not diffuse to the side of the insulator 520, which is preferred. In addition, the reaction between the conductor 503 and the oxygen contained in the insulator 524 or the oxide 530 can be suppressed.

[0275] As the insulator 522, a single layer or stack of insulators comprising so-called high-k materials such as aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO3), or (Ba,Sr)TiO3 (BST) is preferably used. When miniaturizing and highly integrating transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulating film. By using a high-k material as the insulator used as the gate insulating film, the gate potential during transistor operation can be reduced while maintaining the physical thickness.

[0276] In particular, it is preferable to use an insulator containing an oxide of one or both of aluminum and hafnium, which serves as an insulating material that inhibits the diffusion of impurities and oxygen (making it difficult for the aforementioned oxygen to permeate). As an insulator containing an oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate) are preferred. When this material is used to form the insulator 522, the insulator 522 serves as a layer that inhibits the release of oxygen from the oxide 530 or the entry of impurities such as hydrogen from the periphery of the transistor 500 into the oxide 530.

[0277] Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide can be added to the insulator. Furthermore, the insulator can be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride can also be laminated onto the insulator.

[0278] The insulator 520 preferably has thermal stability. For example, silicon oxide and silicon oxynitride are preferred because they have thermal stability. In addition, by combining a high-k material insulator with silicon oxide or silicon oxynitride, an insulator 520 with a multilayer structure that has thermal stability and a high relative permittivity can be formed.

[0279] In addition, Figure 18A and Figure 18B In the transistor 500, the second gate insulating film, which is a three-layer stacked structure, uses insulators 520, 522, and 524. However, the second gate insulating film can also be a single-layer, two-layer, or four-layer stacked structure. In this case, it is not limited to a stacked structure made of the same material, but can also be a stacked structure made of different materials.

[0280] In transistor 500, a metal oxide, preferably used as an oxide semiconductor, is used in oxide 530, which includes the channel formation region. For example, In-M-Zn oxide (where element M is selected from one or more of aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, and magnesium) is preferably used as oxide 530. In particular, CAAC-OS or CAC-OS is preferred as the In-M-Zn oxide that can be used in oxide 530. Furthermore, In-Ga oxide and In-Zn oxide can also be used as oxide 530.

[0281] As the metal oxide used in the oxide 530 for the channel formation region, it is preferable to use a metal oxide with a band gap of 2 eV or more, and more preferably 2.5 eV or more. In this way, by using a metal oxide with a wider band gap, the off-state current of the transistor can be reduced.

[0282] In oxide 530, when oxide 530a is disposed below oxide 530b, impurities can be prevented from diffusing from the structure formed below oxide 530a to oxide 530b. When oxide 530c is disposed above oxide 530b, impurities can be prevented from diffusing from the structure formed above oxide 530c to oxide 530b.

[0283] Furthermore, oxide 530 preferably has a stacked structure of oxides having different atomic ratios of each metal atom. Specifically, the atomic ratio of element M in the constituent elements of the metal oxide used for oxide 530a is preferably greater than that in the metal oxide used for oxide 530b. Additionally, the atomic ratio of element M relative to In in the metal oxide used for oxide 530a is preferably greater than that in the metal oxide used for oxide 530b. Furthermore, the atomic ratio of In relative to element M in the metal oxide used for oxide 530b is preferably greater than that in the metal oxide used for oxide 530a. Additionally, oxide 530c can use a metal oxide that can be used for oxide 530a or oxide 530b.

[0284] Preferably, the conduction band bottom energies of oxides 530a and 530c are higher than those of oxide 530b. In other words, the electron affinity of oxides 530a and 530c is preferably less than that of oxide 530b.

[0285] Here, at the junction of oxides 530a, 530b, and 530c, the energy level at the conduction band bottom changes gradually. In other words, the above situation can also be expressed as the energy level at the conduction band bottom of the junction of oxides 530a, 530b, and 530c changing continuously or continuously joining. For this purpose, it is preferable to reduce the defect state density of the mixed layer formed at the interface between oxides 530a and 530b, and at the interface between oxides 530b and 530c.

[0286] Specifically, by including oxides 530a and 530b, and oxides 530b and 530c, in addition to oxygen, a mixed layer with low defect state density can be formed. For example, when oxide 530b is an In-Ga-Zn oxide, In-Ga-Zn oxide, Ga-Zn oxide, and gallium oxide are preferably used as oxides 530a and 530c.

[0287] At this point, the primary pathway for charge carriers is oxide 530b. By equipping oxides 530a and 530c with the aforementioned structure, the defect state density at the interfaces between oxides 530a and 530b, and between oxides 530b and 530c, can be reduced. Therefore, the influence of interface scattering on charge carrier conduction is reduced, thereby increasing the on-state current of transistor 500.

[0288] Conductors 542a and 542b, serving as source and drain electrodes, are disposed on oxide 530b. Preferably, conductors 542a and 542b are selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, and lanthanum, alloys containing the aforementioned metals, or alloys combining the aforementioned metals. For example, tantalum nitride, titanium nitride, tungsten, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred. Furthermore, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are preferred materials as they are conductive materials that are not easily oxidized or maintain conductivity even when absorbing oxygen. Moreover, metal nitride films such as tantalum nitride have barrier properties against hydrogen or oxygen, making them preferred as well.

[0289] In addition, although Figure 18A and Figure 18B Conductors 542a and 542b are shown as single-layer structures, but multi-layer structures with two or more layers can also be used. For example, a tantalum nitride film and a tungsten film are preferably stacked. Alternatively, a titanium film and an aluminum film can also be stacked. Furthermore, two-layer structures with an aluminum film stacked on a tungsten film, two-layer structures with a copper film stacked on a copper-magnesium-aluminum alloy film, two-layer structures with a copper film stacked on a titanium film, and two-layer structures with a copper film stacked on a tungsten film can also be used.

[0290] Alternatively, a three-layer structure can be used, in which an aluminum or copper film is laminated on a titanium or titanium nitride film and a titanium or titanium nitride film is formed thereon; or a three-layer structure can be used, in which an aluminum or copper film is laminated on a molybdenum or molybdenum nitride film and a molybdenum or molybdenum nitride film is formed thereon. Additionally, transparent conductive materials containing indium oxide, tin oxide, or zinc oxide can also be used.

[0291] In addition, such as Figure 18A As shown, regions 543a and 543b are sometimes formed as low-resistance regions at and near the interface between oxide 530 and conductor 542a (conductor 542b). In this case, region 543a is used as one of the source and drain regions, and region 543b is used as the other of the source and drain regions. Furthermore, a channel forming region is formed in the region sandwiched between region 543a and region 543b.

[0292] By forming the aforementioned conductor 542a (conductor 542b) in contact with oxide 530, the oxygen concentration in region 543a (region 543b) sometimes decreases. Furthermore, a metal compound layer comprising the metal contained in conductor 542a (conductor 542b) and the oxide 530 is sometimes formed in region 543a (region 543b). In this case, the carrier density in region 543a (region 543b) increases, and region 543a (region 543b) becomes a low-resistance region.

[0293] The insulator 544 is provided to cover the conductors 542a and 542b to suppress the oxidation of the conductors 542a and 542b. Alternatively, the insulator 544 can be provided to cover the side surface of the oxide 530 and be in contact with the insulator 524.

[0294] As the insulator 544, one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, neodymium, lanthanum, and magnesium can be used. Alternatively, silicon oxynitride or silicon nitride can also be used as the insulator 544.

[0295] In particular, as the insulator 544, it is preferable to use alumina, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate), which are oxides containing one or both of aluminum and hafnium. Hafnium aluminate, in particular, has higher heat resistance than hafnium oxide film. Therefore, it is less prone to crystallization during subsequent heat treatment processes, making it preferred. Furthermore, if the conductors 542a and 542b are oxidation-resistant materials or if their conductivity does not significantly decrease even after oxygen absorption, it is not necessary to provide the insulator 544. It can be appropriately designed according to the desired transistor characteristics.

[0296] By including insulator 544, impurities such as water and hydrogen contained in insulator 580 can be suppressed from diffusing through oxide 530c and insulator 550 to oxide 530b. Furthermore, excess oxygen contained in insulator 580 can be suppressed from oxidizing conductor 560.

[0297] Additionally, insulator 550 is used as the first gate insulating film. Insulator 550 is preferably configured to contact the inner side (top and side) of oxide 530c. Similar to insulator 524 described above, insulator 550 is preferably formed using an insulator containing excess oxygen and releasing oxygen upon heating.

[0298] Specifically, silicon oxide containing excess oxygen, silicon oxynitride, silicon oxynitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, silicon oxide with added carbon and nitrogen, and porous silicon oxide can be used. In particular, silicon oxide and silicon oxynitride are preferred because they have thermal stability.

[0299] By providing an insulator 550 that releases oxygen upon heating in contact with the top surface of oxide 530c, oxygen can be effectively supplied from the insulator 550 to the channel formation region of oxide 530b through oxide 530c. Furthermore, similar to insulator 524, it is preferable to reduce the concentration of impurities such as water or hydrogen in insulator 550. The thickness of insulator 550 is preferably 1 nm or more and 20 nm or less.

[0300] Furthermore, in order to efficiently supply the excess oxygen contained in the insulator 550 to the oxide 530, a metal oxide may be disposed between the insulator 550 and the conductor 560. This metal oxide preferably suppresses oxygen diffusion from the insulator 550 to the conductor 560. By disposing of a metal oxide that suppresses oxygen diffusion, the diffusion of excess oxygen from the insulator 550 to the conductor 560 is suppressed. In other words, the reduction of excess oxygen supplied to the oxide 530 can be suppressed. Additionally, oxidation of the conductor 560 due to excess oxygen can be suppressed. As this metal oxide, a material suitable for the insulator 544 can be used.

[0301] Alternatively, the insulator 550 can also have the same stacked structure as the second gate insulating film. With the miniaturization and high integration of transistors, problems such as leakage current sometimes occur due to the thinning of the gate insulating film. Therefore, by using a stacked structure of a high-k material and a thermally stable material in the insulator used as the gate insulating film, the gate potential during transistor operation can be reduced while maintaining the physical thickness. Furthermore, a stacked structure with thermal stability and a high relative permittivity can be achieved.

[0302] exist Figure 18A and Figure 18B In this process, the conductor 560 used as the first gate electrode has a two-layer structure, but it can also have a single-layer structure or a stacked structure of three or more layers.

[0303] As the conductor 560a, a conductive material with the function of suppressing the diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (N2O, NO, NO2, etc.), and copper atoms is preferably used. Furthermore, a conductive material with the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) is preferably used. By giving the conductor 560a the function of suppressing oxygen diffusion, the decrease in conductivity caused by the oxidation of the conductor 560b due to oxygen contained in the insulator 550 can be suppressed. For example, tantalum, tantalum nitride, ruthenium, or ruthenium oxide are preferably used as the conductive material with the function of suppressing oxygen diffusion. In addition, an oxide semiconductor suitable for oxide 530 can be used as the conductor 560a. In this case, by forming the conductor 560b by sputtering, the resistance value of the conductor 560a can be reduced, making it a conductor. This can be referred to as an OC (Oxide Conductor) electrode.

[0304] As the conductor 560b, a conductive material with tungsten, copper, or aluminum as its main components is preferably used. Since the conductor 560b is also used for wiring, a conductor with high conductivity is preferred. For example, a conductive material with tungsten, copper, or aluminum as its main components can be used. The conductor 560b may also have a multilayer structure, for example, a multilayer structure of titanium, titanium nitride, and the aforementioned conductive materials can be used.

[0305] Insulator 580 is preferably disposed on conductors 542a and 542b, separated by insulator 544. Insulator 580 preferably has excess oxygen regions. For example, insulator 580 preferably comprises silicon oxide, silicon oxynitride, silicon oxynitride, silicon nitride, fluorine-added silicon oxide, carbon-added silicon oxide, carbon and nitrogen-added silicon oxide, porous silicon oxide, or resin, etc. In particular, silicon oxide and silicon oxynitride are preferred due to their thermal stability. In particular, silicon oxide and porous silicon oxide are preferred because they readily form excess oxygen regions in subsequent processes.

[0306] The insulator 580 preferably has an excess oxygen region. By providing the insulator 580, which releases oxygen upon heating, in contact with the oxide 530c, the oxygen in the insulator 580 can be efficiently supplied to the oxide 530c. Furthermore, it is preferable to reduce the concentration of impurities such as water or hydrogen in the insulator 580.

[0307] The opening of the insulator 580 is formed in such a way that it overlaps with the area between the conductors 542a and 542b. Thus, the conductor 560 is embedded in the opening of the insulator 580 and in the area sandwiched between the conductors 542a and 542b.

[0308] When miniaturizing semiconductor devices, it is necessary to shorten the gate length, but it is also necessary to prevent a decrease in the conductivity of the conductor 560. Therefore, by increasing the thickness of the conductor 560, it is possible for the conductor 560 to have a high aspect ratio. In this embodiment, since the conductor 560 is embedded in the opening of the insulator 580, even if the conductor 560 has a high aspect ratio, it will not collapse during the process.

[0309] The insulator 574 is preferably disposed in contact with the top surface of the insulator 580, the top surface of the conductor 560, and the top surface of the insulator 550. By forming the insulator 574 using a sputtering method, excess oxygen regions can be formed in the insulator 550 and the insulator 580. Oxygen can then be supplied from these excess oxygen regions to the oxide 530.

[0310] For example, as insulator 574, one or more metal oxides selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium and magnesium may be used.

[0311] In particular, alumina has high barrier properties, and even thin films with a diameter of 0.5 nm to 3.0 nm can suppress the diffusion of hydrogen and nitrogen. Therefore, alumina formed by sputtering can function as both an oxygen supply source and a barrier film against impurities such as hydrogen.

[0312] Furthermore, it is preferable to provide an insulator 581, which serves as an interlayer film, on the insulator 574. Similar to the insulator 524, it is preferable to reduce the concentration of impurities such as water or hydrogen in the insulator 581.

[0313] Furthermore, conductors 540a and 540b are disposed in openings formed in insulators 581, 574, 580, and 544. Conductors 540a and 540b are disposed opposite to each other with a gap between them and conductor 560. Conductors 540a and 540b have the same structure as conductors 546 and 548, which will be described later.

[0314] An insulator 582 is provided on insulator 581. Insulator 582 is preferably made of a material that blocks oxygen or hydrogen. Therefore, the same material as insulator 514 can be used as insulator 582. For example, metal oxides such as alumina, hafnium oxide, and tantalum oxide are preferably used as insulator 582.

[0315] In particular, aluminum oxide has a high barrier effect against the permeation of oxygen and impurities such as hydrogen and moisture that cause changes in the electrical characteristics of transistors. Therefore, during and after the transistor manufacturing process, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500. Furthermore, aluminum oxide can suppress the release of oxygen from the oxides constituting the transistor 500. Therefore, aluminum oxide is suitable for use as a protective film for the transistor 500.

[0316] Furthermore, an insulator 586 is provided on insulator 582. The same material as insulator 320 can be used as insulator 586. Moreover, by using a material with a low dielectric constant for the aforementioned insulator, parasitic capacitance generated between the wirings can be reduced. For example, silicon oxide film and silicon oxynitride film can be used as insulator 586.

[0317] In addition, conductors 546 and 548 are embedded in insulators 520, 522, 524, 544, 580, 574, 581, 582 and 586.

[0318] Conductors 546 and 548 are used as plugs or wiring for connection to capacitor 600, transistor 500, or transistor 300. Conductors 546 and 548 can be formed from the same material as conductors 328 and 330.

[0319] Next, a capacitor 600 is disposed above the transistor 500. The capacitor 600 includes a conductor 610, a conductor 620, and an insulator 630.

[0320] Alternatively, conductor 612 may be provided on conductors 546 and 548. Conductor 612 is used as a plug or wiring for connection to transistor 500. Conductor 610 is used as an electrode of capacitor 600. Furthermore, conductors 612 and 610 may be formed simultaneously.

[0321] Conductors 612 and 610 can be metal films containing elements selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or metal nitride films (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) containing the aforementioned elements. Alternatively, conductive materials such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and indium tin oxide with added silicon oxide can also be used.

[0322] exist Figure 16In this embodiment, conductors 612 and 610 have a single-layer structure, but are not limited to this; they may also have a stacked structure of two or more layers. For example, a conductor with high density to both the barrier conductor and the highly conductive conductor may be formed between the barrier conductor and the highly conductive conductor.

[0323] The conductor 620 is disposed such that it overlaps the conductor 610 with an insulator 630 in between. Conductive materials such as metals, alloys, and metal oxides can be used as the conductor 620. High-melting-point materials such as tungsten or molybdenum, which combine heat resistance and conductivity, are preferred, with tungsten being particularly preferred. When the conductor 620 is formed simultaneously with other components such as conductors, low-resistance metal materials such as Cu (copper) or Al (aluminum) can be used.

[0324] An insulator 650 is provided on the conductor 620 and the insulator 630. The insulator 650 can be formed using the same material as the insulator 320. Furthermore, the insulator 650 can be used as a planarization film covering the uneven shape underneath.

[0325] By adopting this structure, reliability can be improved while suppressing electrical characteristic variations in semiconductor devices using transistors containing oxide semiconductors. Furthermore, miniaturization or high integration of semiconductor devices using transistors containing oxide semiconductors can be achieved.

[0326] <Additional notes regarding the contents of this instruction manual, etc.>

[0327] Below, additional notes are added to the descriptions of the above embodiments and the structures in those embodiments.

[0328] The structures shown in each embodiment can be appropriately combined with the structures shown in other embodiments to constitute one aspect of the present invention. Furthermore, when multiple structural instances are shown in one embodiment, these structural instances can be appropriately combined.

[0329] In addition, the content (or a portion thereof) described in one embodiment may be applied / combined / replaced with other content (or a portion thereof) described in that embodiment and / or content (or a portion thereof) described in one or more other embodiments.

[0330] Note that the content described in the embodiments refers to the content illustrated using various accompanying drawings or the content described using the text in the specification.

[0331] Furthermore, more figures can be formed by combining the figures (or portions thereof) shown in one embodiment with other portions of the figures, other figures (or portions thereof) shown in that embodiment, and / or figures (or portions thereof) shown in one or more other embodiments.

[0332] In this specification, components are categorized according to function and represented by independent boxes in block diagrams. However, in actual circuits, it is difficult to categorize components according to function; sometimes a circuit involves multiple functions or multiple circuits involve a single function. Therefore, the division of boxes in block diagrams is not limited to the components described in the specification and may vary appropriately depending on the circumstances.

[0333] For ease of explanation, dimensions, layer thicknesses, or regions are arbitrarily shown in the accompanying drawings. Therefore, the invention is not limited to the dimensions shown in the drawings. The drawings are schematic for clarity and are not limited to the shapes or values ​​shown in the drawings. For example, they may include non-uniformity of signals, voltages, or currents caused by noise or timing deviations.

[0334] In this specification and other materials, when describing the connection relationships of transistors, one of the source and drain is referred to as "one of the source and drain" (first electrode or first terminal), and the other of the source and drain is referred to as "the other of the source and drain" (second electrode or second terminal). This is because the source and drain of a transistor vary depending on the transistor's structure or operating conditions. Note that, depending on the circumstances, the source and drain of a transistor may be appropriately referred to as source (drain) terminals or source (drain) electrodes, etc.

[0335] Furthermore, in this specification and the like, "electrode" or "wiring" does not functionally limit its constituent elements. For example, sometimes an "electrode" is used as part of a "wiring," and vice versa. Moreover, "electrode" or "wiring" also includes cases where multiple "electrodes" or "wiring" are formed as a single unit.

[0336] Additionally, voltage and potential can be interchanged appropriately in this instruction manual and other documents. Voltage refers to the potential difference between the voltage and a reference potential. For example, when the reference potential is ground voltage (grounding voltage), voltage can be replaced with potential. Grounding potential does not necessarily mean 0V. Note that potential is relative, and the potential supplied for wiring, etc., sometimes varies according to the reference potential.

[0337] In this specification and other materials, the terms "film" and "layer" may be interchanged depending on the situation or condition. For example, "conductive layer" may sometimes be replaced with "conductive film." Furthermore, "insulating film" may sometimes be replaced with "insulating layer."

[0338] In this specification, a switch refers to a component that controls whether current flows by changing to a conducting state (on state) or a non-conducting state (off state). Additionally, a switch refers to a component that selects and switches current paths.

[0339] In this specification, for example, channel length refers to the distance between the source and drain in the region where the semiconductor (or the portion of the semiconductor through which current flows when the transistor is turned on) and the gate overlap or in the region forming the channel, in a top view of the transistor.

[0340] In this specification, for example, the channel width refers to the length of the region where the semiconductor (or the portion of the semiconductor through which current flows when the transistor is in the on state) and the gate electrode overlap, or the length of the portion of the region in which the source and drain electrodes of the channel are opposite each other.

[0341] In this specification, "connecting A and B" includes not only the case where A and B are directly connected, but also the case where A and B are electrically connected. Here, the description of "electrically connecting A and B" refers to the situation where electrical signals between A and B can be transmitted and received when there are objects with some electrical interaction between A and B.

[0342] [Symbol Explanation]

[0343] 10: Storage unit, 10A: Storage unit, 20A: Storage circuit, 20B: Storage circuit, 21A: Storage circuit, 21B: Storage circuit, 21C: Storage circuit, 21D: Storage circuit, 22A: Storage circuit, 22B: Storage circuit, 22C: Storage circuit, 22D: Storage circuit, 26A: Storage circuit, 26B: Storage circuit, 27A: Storage circuit, 27B: Storage circuit, 27C: Storage circuit, 27D: Storage circuit, 28A: Storage circuit, 28B: Storage circuit, 28C: Storage circuit, 28D: Storage circuit, 30: Circuit, 31: Circuit, 40: Input / output circuit, 50: Control unit, 50A: Control unit, 60: Sensor unit, 70: Peripheral circuit, 3 00: Transistor, 311: Substrate, 313: Semiconductor region, 314a: Low resistance region, 314b: Low resistance region, 315: Insulator, 316: Conductor, 320: Insulator, 322: Insulator, 324: Insulator, 326: Insulator, 328: Conductor, 330: Conductor, 350: Insulator, 352: Insulator, 354: Insulator, 356: Conductor, 360: Insulator, 362: Insulator, 364: Insulator, 366: Conductor, 370: Insulator, 372: Insulator, 374: Insulator, 376: Conductor, 380: Insulator, 382: Insulator, 384: Insulator, 386: Conductor, 500: Transistor, 503: Conductor, 503a: Conductor, 503b: Conductor, 505: Conductor, 510: Insulator, 512: Insulator, 514: Insulator, 516: Insulator, 518: Conductor, 520: Insulator, 522: Insulator, 524: Insulator, 530: Oxide, 530a: Oxide, 530b: Oxide, 530c: Oxide, 540a: Conductor, 540b: Conductor, 542a: Conductor, 542b: Conductor, 543a: Region, 543b: Region, 544: Insulator, 546: Conductor, 548: Conductor, 550: Insulator, 560: Conductor, 560a: Conductor, 560b: Conductor, 574: Insulator, 580 581: Insulator; 582: Insulator; 586: Insulator; 600: Capacitor; 610: Conductor; 612: Conductor; 620: Conductor; 630: Insulator; 650: Insulator; 1201: Guardrail; 2100: Robot; 2101: Illumination sensor; 2102: Microphone; 2103: Upper camera; 2104: Speaker; 2105: Display; 2106: Lower camera; 2107: Obstacle sensor; 2108: Motion mechanism; 2110: Computing device; 2120: Flying object; 2121: Computing device; 2122: Camera; 2123: Propeller; 2910: Information terminal; 2911: Housing; 2912: Display unit.2913: Camera; 2914: Speaker; 2915: Operation switch; 2916: External connection part; 2917: Microphone; 2920: Robotic vacuum cleaner; 2921: Housing; 2922: Display; 2923: Operation button; 2924: Camera; 2925: Brush; 2980: Car; 2981: Camera; 5101: Monitor; 5103: Brush.

Claims

1. A semiconductor device, comprising: Control Department; Storage Department; as well as Sensor section The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in the channel formation region. The sensor unit includes a temperature sensor. Furthermore, the control unit has the function of switching the signals supplied to the first transistor and the second transistor, so that information stored at room temperature disappears after a certain period, while information stored at temperatures higher or lower than the room temperature is stored for a longer period than the certain period.

2. A semiconductor device, comprising: Control Department; Storage Department; as well as Sensors section The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in the channel formation region and a back gate electrode. The sensor unit includes a temperature sensor. Furthermore, the control unit has the function of switching the signal supplied to the back gate electrode so that information stored at room temperature disappears after a certain period, while information stored at temperatures higher or lower than the room temperature is stored for a longer period than the certain period.

3. A semiconductor device, comprising: Control Department; Storage Department; as well as Sensors section The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. One of the source and drain terminals of the first transistor is electrically connected to one electrode of the capacitor. The switching circuit includes a second transistor and a third transistor. One of the source and drain terminals of the second transistor is electrically connected to the gate of the third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in the channel formation region and a back gate electrode. The sensor unit includes a temperature sensor. Furthermore, the control unit has the function of switching the signal supplied to the back gate electrode so that information stored at room temperature disappears after a certain period, while information stored at temperatures higher or lower than the room temperature is stored for a longer period than the certain period.

4. A semiconductor device, comprising: Control Department; Storage Department; as well as Sensors section The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. The switching circuit includes a second transistor and a third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in the channel formation region and a gate electrode. The sensor unit includes a temperature sensor. Furthermore, the control unit has the function of switching the signal supplied to the gate electrode so that information stored at room temperature disappears after a certain period, while information stored at temperatures higher or lower than the room temperature is stored for a longer period than the certain period.

5. A semiconductor device, comprising: Control Department; Storage Department; as well as Sensors section The storage unit includes a storage circuit and a switching circuit. The storage circuit includes a first transistor and a capacitor. One of the source and drain terminals of the first transistor is electrically connected to one electrode of the capacitor. The switching circuit includes a second transistor and a third transistor. One of the source and drain terminals of the second transistor is electrically connected to the gate of the third transistor. The first transistor and the second transistor include a semiconductor layer comprising an oxide semiconductor in the channel formation region and a gate electrode. The sensor unit includes a temperature sensor. Furthermore, the control unit has the function of switching the signal supplied to the gate electrode so that information stored at room temperature disappears after a certain period, while information stored at temperatures higher or lower than the room temperature is stored for a longer period than the certain period.

6. The semiconductor device according to any one of claims 1 to 5, The storage circuit described therein has the function of changing the information storage period according to the signal obtained from the sensor unit.

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