Temporary backside assist embedding of semiconductor dies

Abstract

A method comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being positioned inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material, the embedding material covering the edge and the peripheral portion of the first major surface of the semiconductor die, and contacting sidewalls of the temporary spacer; and after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die. A semiconductor device produced by the method is also provided.

Description

TECHNICAL FIELD

[0001] The present disclosure relates generally to semiconductor technology. More particularly, the present disclosure relates to embedding methods for semiconductor devices and semiconductor devices. BACKGROUND

[0002] Molding is the standard encapsulation method for semiconductor dies. In many cases, it is preferable to exclude certain areas of the device from the mold application. Typically, this is accomplished by Film Assisted Molding (FAM). Film Assisted Molding is a molding process that utilizes a film that seals the encapsulated areas of the device from the unwanted mold. The film must accommodate the height and dimensional tolerances of the encapsulated device and must also be pressed against the device with great force to avoid mold flash. These competing requirements form an expensive tradeoff and result in improper edges at the topographical features of the encapsulated device. In other cases, it can be necessary to protect features from the high local pressure of the film and / or topologies that are too small to be formed by a mold stamp covered with a thick film.

[0003] Bottom fill compounds can be applied and / or the size of filler particles contained in the molding compound can be reduced. However, in both cases, the mechanical stability is reduced and / or the isolation problems result in a reduction in long term stability. Bottom fill and smaller filler particles also increase the material cost up to 100 times. Furthermore, these methods include exposed imide / Cu plated boundary areas that can cause long term stability problems due to interface uncertainty. These methods do not use film assisted molding, so many products are not possible. In many cases, the features are opened after molding, which is labor intensive and can damage the underlying structure.

[0004] Accordingly, there is a need for improved embedding processes for semiconductor devices. SUMMARY

[0005] According to one embodiment of a method, the method comprises: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being positioned inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material, the embedding material covering the edge and the peripheral portion of the first major surface of the semiconductor die and contacting sidewalls of the temporary spacer; and after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die.

[0006] According to one embodiment of a method, the method comprises: providing a semiconductor wafer having a plurality of semiconductor dies, each of the plurality of semiconductor dies having a first major surface, a second major surface opposite the first major surface; applying a temporary spacer to a first portion of the first major surface of each of the semiconductor dies, the first portion being positioned inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, singulating the plurality of semiconductor dies so as to form an edge between the first major surface and the second major surface of each die; after the singulating, at least partially embedding each of the singulated semiconductor dies in an embedding material, the embedding material covering the edge and a peripheral portion of the first major surface of each of the singulated semiconductor dies and contacting sidewalls of the respective temporary spacer; and after the embedding, removing the temporary spacer from the first major surface of the singulated semiconductor dies to expose the first portion of the first major surface of the singulated semiconductor dies.

[0007] According to one embodiment of a semiconductor device, the semiconductor device comprises: a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; a molded compound covering the edge and a peripheral portion of the first major surface of the semiconductor die, the molded compound comprising a resin and filler particles embedded within the resin; and an opening in the molded compound exposing a first portion of the first major surface of the semiconductor die from the molded compound, the first portion being positioned inward relative to the peripheral portion, wherein the opening in the molded compound has sidewalls, wherein substantially all of the filler particles disposed along the sidewalls of the opening are fully embedded within the resin without being exposed at all along the sidewalls.

[0008] Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings. BRIEF DESCRIPTION OF DRAWINGS

[0009] Elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. Features of the various illustrated embodiments can be combined, unless they are mutually exclusive. Embodiments are depicted in the drawings and described in detail in the following description.

[0010] Figures 1A-1D Various cross-sectional views of one embodiment of an embedding method are shown during different stages of the method.

[0011] Figure 2A And 2BAnother embodiment of an embedding method is shown in various cross-sectional views during different stages of the method.

[0012] Figure 3A And 3B Another embodiment of an embedding method is shown in various cross-sectional views during different stages of the method.

[0013] Figures 4A-4D Another embodiment of an embedding method is shown in various cross-sectional views during different stages of the method.

[0014] Figures 5A-5D Another embodiment of an embedding method is shown in various cross-sectional views during different stages of the method.

[0015] Figures 6A-6D Another embodiment of an embedding method is shown in various cross-sectional views during different stages of the method.

[0016] Figure 7A And 7B Various partial cross-sectional views of one embodiment of forming a temporary spacer fur of a molding material during an embedding process during different stages of the method are shown.

[0017] Figures 8A-8C Another embodiment of an embedding method is shown in various cross-sectional views during different stages of the method.

[0018] Figures 9A-9C Various partial cross-sectional views of one embodiment of forming a photoresist-based temporary spacer on a semiconductor die during different stages of the method are shown.

[0019] Figures 10A-10C Another embodiment of an embedding method is shown in various cross-sectional views during different stages of the method. DETAILED DESCRIPTION

[0020] Embodiments described herein introduce a temporary spacer as part of a die encapsulation process. The temporary spacer provides sufficient void to dispose an embedding material, such as a molding material, over the edges of the die to protect the die passivation that can be damaged, for example, during dicing. After embedding, the temporary spacer is removed to expose portions of the semiconductor die that were previously covered by the temporary spacer. In some cases, the portions of the semiconductor die that are exposed by removing the temporary spacer can include metal pads that can then be subjected to metallization.

[0021] The use of the temporary spacer increases the overall thickness without increasing the lateral dimensions of the package. Thus, a well-defined area can be excluded from the embedding process, which is then used for contacting the die. The temporary spacer can be applied in a parallel process at wafer level or panel level, as the embedding after removal of the temporary spacer can be done with wet and / or dry chemical processes.

[0022] Various embodiments of an embedding method and a semiconductor device produced by the embedding method are described next.

[0023] Figures 1A-1D An embodiment of an embedding method is shown in various cross-sectional views during different stages of the method. According to Figures 1A-1D The embedding method shown, a closed mold cavity is used as part of a thin film assisted molding process to implement the embedding method.

[0024] Figure 1A A semiconductor die 100 is shown located within a closed mold cavity prior to embedding. The semiconductor die 100 has a first major surface 102, a second major surface 104 opposite the first major surface 102, and an edge 106 between the first major surface 102 and the second major surface 104. A temporary spacer 108 is applied to a first portion 110 of the first major surface 102 of the semiconductor die 100, the first portion 110 being located inwardly relative to an outer peripheral portion 112 of the first major surface 102. The first portion 110 of the first major surface 102 of the semiconductor die 100 can include metal pads 114, e.g., contact pads. The spacer 108 is temporary in that the spacer 108 is sacrificial and not in the final product. In one embodiment, the first portion 110 of the first major surface 102 of the semiconductor die 100 to which the temporary spacer 108 is applied is laterally surrounded by the outer peripheral portion 112 of the first major surface 102.

[0025] Figure 1B A mold 116 with a membrane 118 is shown pressed against the temporary spacer 108 within the closed mold cavity, as indicated by the downwardly directed arrow. Due to the downward pressing of the mold 116, the membrane 118 contacts a side 120 of the temporary spacer 108 facing away from the semiconductor die 100, and the membrane 118 deforms to the contour shape of the temporary spacer 108, while leaving a gap “G” between the membrane 118 and the outer peripheral portion 112 of the first major surface 102 of the semiconductor die 100. In case of a molding compound as embedding material, the molding compound cannot reliably fill the gap if the gap is too small, e.g., less than 70 pm (micrometers). Thus, the gap should be larger than this minimum permissible value to reliably fill the gap with the molding compound.

[0026] The temporal spacer 108 defines the gap, so no special molding compound is needed to ensure that the gap is reliably filled. Rather, a less expensive molding compound can be used. The temporal spacer 108 also allows the use of a thin film 118 of typical thickness. That is, an overly thick film is not needed. The use of the temporal spacer 108 well controls the height of the gap between the membrane 118 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100. Further, high deviations in the height of the stack (die plus metal pads) can be absorbed with the membrane thickness without compromising the normal functioning of the device. Further, not every pad has to be formed individually in a mold tool, thereby reducing the cost of the tooling and the requirements on the membrane 118. Further, smaller features can be realized, as such features do not have to be formed in the mold tool.

[0027] Figure 1C The semiconductor die 100 is shown at least partially embedded in an embedding material 124, which in this case is a molding compound. Common molding compounds and resins include, but are not limited to, thermosetting resins, gel elastomers, encapsulants, potting compounds, composites, optical grade materials, fillers such as Si02, AI2O3, MgO, etc. The embedding material 124 covers the edge 106 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 and contacts the sidewall 122 of the temporal spacer 108. As part of the embedding process, a liquefied molding material is forced into an enclosed mold cavity. The liquefied molding material fills the gap "G" between the membrane 118 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 and solidifies to form the molding compound.

[0028] Figure 1D The embedding is shown after it has taken place. The mold 116 with the membrane 118 is retracted from the molding device, as indicated by the upward arrow. The temporal spacer 108 is removed from the first major surface 102 of the semiconductor die 100 to expose the first portion 110 of the first major surface 102. In one embodiment, the temporal spacer 108 at least partially covers the metal pads 114 during the embedding process, and the metal pads 114 are exposed after the embedding process by removing the temporal spacer 108. A metallization structure (not shown), e.g., a Cu metallization structure, can be applied to the exposed metal pads 114, e.g., to provide electrical connections to the metal pads 114 at the first major surface 102 of the embedded semiconductor die 100.

[0029] Figure 2A and 2B Another embodiment of an embedding method is shown in various partial cross-sectional views during different stages of the method. Similar to the embodiment described above, a semiconductor die 100 is provided with a first portion 110 of a first major surface 102 and a peripheral portion 112 of the first major surface 102. A membrane 118 is provided on the peripheral portion 112 of the first major surface 102 of the semiconductor die 100. A temporal spacer 108 is provided on the membrane 118 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100. The temporal spacer 108 is shown in a first position in which the temporal spacer 108 is spaced apart from the semiconductor die 100. Figures 1A-1DThe embedding method shown, the closed mold cavity is used as part of a film assisted molding process to enable the embedding method, wherein Figure 2A corresponding to Figure 1A and Figure 2B corresponding to Figure 1C However, different is that the temporal spacer 108 has an undercut structure 200 forming a part of the sidewall 122 of the temporal spacer 108. According to the present embodiment, the liquefied molding material fills the gap between the membrane 118 and the peripheral portion 112 of the first main surface 102 of the semiconductor die 100 comprising the undercut structure 200.

[0030] Figure 3A and 3B shows various partial sectional views of another embodiment of the embedding method during different stages of the method. Similar to Figures 1A-1D The embedding method shown, the closed mold cavity is used as part of a film assisted molding process to enable the embedding method, wherein Figure 3A corresponding to Figure 1A and Figure 3B corresponding to Figure 1C However, different is that the sidewall 122 of the temporal spacer 108 is inclined to form an angle a greater than 90° with respect to the first main surface 102 of the semiconductor die 100.

[0031] Figures 4A-4D shows various sectional views of another embodiment of the embedding method during different stages of the method. According to Figures 4A-4D The embedding method shown, the closed mold cavity is used as part of a film assisted molding process to enable the embedding method.

[0032] Figure 4A shows the semiconductor die 100 located within the closed mold cavity prior to the embedding process. The semiconductor die 100 has a first main surface 102, a second main surface 104 opposite the first main surface 102, and an edge 106 between the first main surface 102 and the second main surface 104. A temporal spacer 108 is applied to a first portion 110 of the first main surface 102 of the semiconductor die 100, the first portion 110 being oriented inward from a peripheral portion 112 of the first main surface 102. According to the present embodiment, the first portion 110 of the first main surface 102 of the semiconductor die 100 comprises a sensor structure 400, e.g. a MEMS (Micro-Electro-Mechanical System) structure. The temporal spacer 108 at least partially covers a first (top) side of the sensor structure 400 to protect the sensor structure 400 during the later embedding process.

[0033] An additional temporary spacer 402 can be applied to the second (bottom) side of the sensor structure 400 opposite the first side. The additional temporary spacer 402 at least partially covers the second side of the sensor structure 400 in a later embedding process. It is not necessary to protect both sides of the sensor structure 400 in all cases. Protection of only one side of the sensor structure 400 can be sufficient.

[0034] Figure 4B A mold 116 with a membrane 118 is shown, which is pressed against the upper temporary spacer 108 within the closed mold cavity, as indicated by the downward arrow. Due to the downward pressing of the mold 116, the membrane 118 contacts a side 120 of the upper temporary spacer 108 facing away from the semiconductor die 100, and the membrane 118 deforms to the contour shape of the upper temporary spacer 108, while leaving a gap "G" between the membrane 118 and the peripheral portion 112 of the first main surface 102 of the semiconductor die 100. As explained above in connection with Figure 1B The upper temporary spacer 108 defines a gap, thereby providing a sufficiently large gap between the membrane 118 and the peripheral portion 112 of the first main surface 102 of the semiconductor die 100 to allow for sufficient molding in the gap.

[0035] Figure 4C A semiconductor die 100 is shown, which is at least partially embedded in an embedding material 124, which is in this case a molding compound. The molding compound 124 covers the edge 106 and the peripheral portion 112 of the first main surface 102 of the semiconductor die 100 and contacts the sidewall 122 of the upper temporary spacer 108. The upper temporary spacer 108 at least partially covers the top side of the sensor structure 400 during the molding process, and the lower temporary spacer 402 at least partially covers the bottom side of the sensor structure 400 during the molding process. As mentioned above, protection of only one side of the sensor structure 400 can be sufficient, so one of the temporary spacers 108, 402 can be omitted.

[0036] Figure 4D An embedding after is shown. The mold 116 with the membrane 118 is retracted from the molding device, as indicated by the upward arrow, and each temporary spacer 108, 402 is removed. The top side of the sensor structure 400 is exposed by removing the upper temporary spacer 108, and the bottom side of the sensor structure 400 is exposed by removing the lower temporary spacer 402.

[0037] Figures 5A-5D Another embodiment of an embedding method is shown in various sectional views during different phases of the method. According to the Figures 5A-5D The closed mold cavity is used as part of a film-assisted molding process to implement the embedding method, according to the embedding method shown.

[0038] Figure 5A A semiconductor die 100 is shown prior to the embedding process, located within a closed mold cavity. The semiconductor die 100 has a first major surface 102, a second major surface 104 opposite the first major surface 102, and an edge 106 between the first major surface 102 and the second major surface 104. According to the present embodiment, a first portion 110 of the first major surface 102 of the semiconductor die 100 includes at least first and second metal pads 500, 502, such as contact pads. At the first major surface 102 of the semiconductor die 100, a separate temporary spacer 108, 108' is applied to at least a portion of each metal pad 500, 502. Thus, each metal pad 500, 502 at the first major surface 102 of the semiconductor die 100 is at least partially covered by a temporary spacer 108, 108' during the embedding process.

[0039] Figure 5B A mold 116 with a membrane 118 pressed against the temporary spacers 108, 108' within the closed mold cavity and the semiconductor die 100 at least partially embedded in a first molding compound 504 are shown as part of the first embedding process. The first molding compound 504 covers the edge 106 and the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 and contacts the sidewalls 122, 122' of each temporary spacer 108, 108'.

[0040] Figure 5C A semiconductor die 100 is shown prior to the embedding process, located within a closed mold cavity. The semiconductor die 100 has a first major surface 102, a second major surface 104 opposite the first major surface 102, and an edge 106 between the first major surface 102 and the second major surface 104. According to the present embodiment, a first portion 110 of the first major surface 102 of the semiconductor die 100 includes at least first and second metal pads 500, 502, such as contact pads. At the first major surface 102 of the semiconductor die 100, a separate temporary spacer 108, 108' is applied to at least a portion of each metal pad 500, 502. Thus, each metal pad 500, 502 at the first major surface 102 of the semiconductor die 100 is at least partially covered by a temporary spacer 108, 108' during the embedding process. Figure 5C

[0041] ​A new temporary spacer 512 is applied to the first metallization structure 506, for example, to a portion of the first metallization structure 506 that can extend onto the side 510 of the first molding compound 504 facing away from the semiconductor die 100. Another new temporary spacer 514 is applied to the second metallization structure 508, for example, to a portion of the second metallization structure 508 that can extend onto the side 510 of the first molding compound 504 facing away from the semiconductor die 100. The mold 116 with the membrane 118 is pressed against the new temporary spacers 512, 514 in the enclosed mold cavity as part of a second embedding process, as indicated by the downward pointing arrow in Figure 5C

[0042] Figure 5D A second molding compound 516 is shown applied to the side 510 of the first molding compound 504 facing away from the semiconductor die 100. As part of the second embedding process, liquefied molding compound is forced into the enclosed mold cavity and fills the gap "G2" between the membrane 118 and the side 510 of the first molding compound 504 facing away from the semiconductor die 100. The liquefied molding compound solidifies, forming the second molding compound 516. The first and second molding compounds 504, 516 can be of the same or different types of molding compounds.

[0043] After the second molding compound 516 is applied, the mold 116 with the membrane 118 is retracted from the molding apparatus, and the temporary spacers 512, 514 used as part of the second embedding process are removed to expose portions of the first and second metallization structures 506, 508 previously covered by the temporary spacers 512, 514. A third metallization structure 518 is formed on the exposed portion of the first metallization structure 506, and a fourth metallization structure 520 is formed on the exposed portion of the second metallization structure 508. In one embodiment, the third and fourth metallization structures 518, 520 fill respective holes formed in the second molding compound 516 as a result of the removal of the temporary spacers 512, 514 after the second embedding process.

[0044] Figure 5C and 5D ​The metallization structures 506, 508, 518, 520 shown can be formed, for example, outside of the enclosed mold cavity, for example, in one or more deposition tools, such as electrochemical deposition (ECD) copper plating tools and / or physical vapor deposition (PVD) tools. One or more of the metallization structures 506, 508, 518, 520 can form part of a redistribution layer (RDL). For example, one or more of the metallization structures 506, 508, 518, 520 can be used to implement fan-out of a wafer level package. By using the temporary spacers 108, 108' on top of the metal pads 500, 502, the molding compound 504 can cover the entire die surface 102 except for the metal pads 500, 502. With the tilted spacer design, for example, as shown in FIG. 5, the contact 506, 508, 518, 520 to the metal pad 500, 502 can be formed directly in the resulting opening formed in the molding compound 504, 516 by removing the temporary spacers 108, 108', 512, 514. Thus, a separate opening process, for example, laser drilling, is not needed to form the opening in the molding compound 504, 516. Optionally, a planarization process, for example, CMP (chemical-mechanical polishing), can be used to planarize the top surface 522 of the second molding compound 516 afterwards. Figures 3A-3B As shown, by removing the temporary spacers 108, 108', 512, 514, the contact 506, 508, 518, 520 to the metal pad 500, 502 can be formed directly in the resulting opening formed in the molding compound 504, 516. Thus, a separate opening process, for example, laser drilling, is not needed to form the opening in the molding compound 504, 516. Optionally, a planarization process, for example, CMP (chemical-mechanical polishing), can be used to planarize the top surface 522 of the second molding compound 516 afterwards.

[0045] Figures 6A-6D Another embodiment of the embedding method is shown in various cross-sectional views during different stages of the method. According to Figures 6A-6D As shown, the enclosed mold cavity is used as part of a thin film assisted molding process to implement the embedding method.

[0046] Figure 6AAt least two semiconductor dies 100, 100' are shown prior to embedding, located within a closed mold cavity. The semiconductor dies 100, 100' each have a first (top) major surface, a second (bottom) major surface opposite the first major surface, and an edge between the first and second major surfaces. A first portion of the first major surface of each semiconductor die 100, 100' includes metal pads 600, 602, such as contact pads. At the first major surface of each semiconductor die 100, 100', a separate temporary spacer 108, 108' is applied to the metal pads 600, 602. Thus, during the embedding process, the metal pads 600, 602 at the first major surface of each semiconductor die 100, 100' are at least partially covered by the temporary spacer 108, 108'. The first semiconductor die 100 has a first thickness (Td1), and the second semiconductor die 100' has a second thickness (Td2), where Td1 > Td2. The temporary spacers 108, 108' accommodate the height difference (Td1 - Td2) between the semiconductor dies 100, 100' such that the combined thickness of the first semiconductor die 100 and the first temporary spacer 108 (Td1 + Ts1) is approximately equal to the combined thickness of the second semiconductor die 100' and the second temporary spacer 108' (Td2 + Ts2). Without the temporary spacers 108, 108', it would be difficult to accommodate the height difference between the semiconductor dies 100, 100' using FAM.

[0047] Figure 6B A mold 116 with a membrane 118 pressed against the temporary spacers 108, 108' within the closed mold cavity and the respective semiconductor dies 100, 100' at least partially embedded in a molding compound 604 are shown as part of the embedding process. The membrane 118 contacts a side 120, 120' of each temporary spacer 108, 108' facing away from the semiconductor dies 100, 100', and the membrane 118 deforms to the contour shape of the temporary spacers 108, 108' while leaving a gap between the membrane 118 and a peripheral portion of the first major surface of each semiconductor die 100, 100'. The molding compound 604 covers the edge and the peripheral portion of the first major surface of each semiconductor die 108, 108' and contacts a sidewall 122, 122' of each temporary spacer 108, 108', thereby filling the respective gap. As explained previously herein, the molding compound 604 can be formed by forcing liquefied molding material into the closed mold cavity such that the liquefied molding material fills the gap between the membrane 118 and the peripheral portion of the first major surface of each semiconductor die 100, 100'.

[0048] Figure 6CThe first embedding process is shown. The mold 116 with the membrane 118 is retracted from the molding apparatus, as shown by the upwardly directed arrow, and each temporary spacer 108, 108' is removed. The temporary spacers 108, 108' are removed after the embedding process, exposing the previously covered metal pads 600, 602 at the first major surface of each semiconductor die 100, 100'.

[0049] Figure 6D The metallization structure 606 formed after the removal of the temporary spacers 108, 108' is shown, and the metallization structure 606 can extend onto a side 608 of the molding compound 604 facing away from the two semiconductor dies 100, 100'. In the case of a Cu metallization structure, the metallization structure 606 can be formed, for example, by electroless plating. The metallization structure 606 is connected to the metal pads 600 at the first major surface of the first semiconductor die 100 and to the metal pads 602 at the first major surface of the second semiconductor die 100'. The metallization structure 606 can electrically connect the metal pads 600, 602 of the different semiconductor dies 100, 100', depending on how the metallization structure 606 is constructed. The electrical connection of the dies 100, 100' via the metallization structure 606 instead of by using wirebonds increases the heat distribution, reduces the resistivity and improves the reliability. In addition or separately, the metallization structure 606 can form part of a redistribution layer.

[0050] Figure 7A and 7B Various partial cross-sectional views of one embodiment of forming the temporary spacers described herein are shown during different stages of the process. According to Figure 7A and 7B The method shown, the temporary spacers are formed as part of the semiconductor wafer processing.

[0051] Figure 7A A semiconductor wafer or board 700 with a plurality of semiconductor dies 100 is shown. In the case of a wafer, the semiconductor dies 100 have not yet been singulated. In the case of a board, the semiconductor dies 100 have already been singulated. In either case, each semiconductor die 100 has a first major surface 102 and a second major surface 104 opposite the first major surface 102. A temporary spacer 108 is formed on a first portion 110 of the first major surface 102 of each semiconductor die 100, for example, using a photoresist 702. The first portion 110 is positioned inwardly relative to a peripheral portion 112 of the first major surface 102. The first portion 110 of the first major surface 102 of each semiconductor die 100 can include metal pads 114, for example, contact pads.

[0052] Figure 7BThe diagram illustrates the separation of semiconductor dies from each other after the application of temporary spacers 108. In the case of plate 700, a thin film, such as glue or adhesive, can be removed from the carrier to separate the dies 100, or the plate 700 can be cut or diced to separate the semiconductor dies 100 from each other. In the case of semiconductor wafer 700, the dies 100 can be individualized, for example by sawing, laser cutting, electrical discharge machining (EDM), etc., to separate the semiconductor dies 108 and form an edge 106 between the first and second main surfaces 102, 104 of each die 100.

[0053] Each individual semiconductor die 100 can then be at least partially embedded in an embedding material, such as a molding compound, covering the edge 106 and the outer peripheral portion 112 of the first primary surface 102 of each of the semiconductor dies 100, and contacting the sidewall 122 of the corresponding temporary spacer 108. Embedding can be performed according to any of the relevant embodiments described herein. After embedding, as previously described herein, the temporary spacer 108 is removed to expose a first portion 110 of the first primary surface 102 of each semiconductor die 100.

[0054] Figures 8A-8C Cross-sectional views of another embodiment of the embedding method are shown during different stages of the method. According to Figures 8A-8C The embedding method shown does not use a closed mold cavity to achieve the embedding method.

[0055] Figure 8A The diagram shows that, prior to embedding, the side of the temporary spacer 108 facing away from the semiconductor die 100 is fixed to the surface 801 of a carrier 800 (e.g., a glass carrier, semiconductor wafer, tape, etc.). For example, the semiconductor die 100 can be mounted to the carrier 800 in a flip-chip configuration with the front side of the semiconductor die 100 facing the carrier 800. A frame 802 is fixed to the surface 801 of the carrier 800 such that a lateral gap “G_lat” exists between the frame 802 and the edge 106 of the semiconductor die 100. The frame 802 may include an insulating material 804 with conductive vias 806. For example, the frame 802 may be a printed circuit board (PCB). However, other types of frames, such as laminates, ceramics, redistribution layers, etc., may also be used. Figure 8A The diagram shows the use of the same carrier 800 to process more than one semiconductor die 100. This may include having more than one semiconductor die 100 laterally surrounded by a frame 802 and / or mounting multiple semiconductor dies 100 and multiple frames 802 onto the same carrier 800.

[0056] Figure 8BA dispensing tool 808 is shown for applying an embedding material 810 into the lateral gap between the frame 802 and the edge 106 of the semiconductor die 100. According to the present embodiment, the embedding material 810 can or can not be a molding compound. For example, instead of a molding compound, the embedding material 810 can be a resin, a polymer, a potting compound, a glue, etc. In another embodiment, the dispensing tool 808 can apply the embedding material 810 by printing, jetting, or lamination.

[0057] Figure 8C The carrier 800 is shown removed from the temporary spacer 108 and the frame 802 after the embedding material 810 has been applied. In the case of a tape carrier, the structure comprising the embedded die 100 and the frame 802 can be lifted or peeled off from the carrier 800. One or more metal pads 114 can be provided on the portion 110 of the first surface 102 of the semiconductor die 100 that was previously covered by the temporary spacer 108, and electrical contacts (not shown) can be made to such metal pads 114 in the space 812 that was created by removing the temporary spacer 108. After the carrier 800 is removed, a redistribution layer (not shown) can be applied directly onto the exposed metal pads 114 of the semiconductor die 100 without the need for additional dielectric layers to produce a chip-embedded package. In one embodiment, the height (H_f) of the frame 802 is greater than the combined height of the semiconductor die 100 and the temporary spacer 108, and wherein the embedding material 810 covers the second major surface 104 of the semiconductor die 100 and a side 814 of the frame 802 that faces in the same direction as the second major surface 104 of the semiconductor die 100.

[0058] In each of the embedding embodiments described herein, the temporary spacer is removed after the respective die is at least partially embedded in the embedding material. That is, the spacer is temporary in that the spacer is sacrificial and is not in the final product. Any material that is compatible with semiconductor wafer or die processing and can withstand the parameters (e.g., temperature, pressure, etc.) of the embedding process can be used to form the temporary spacer. For example, the temporary spacer can be made of photoresist. Photoresist is compatible with semiconductor wafer processing. Another material that can be used for the temporary spacer is magnesium oxide or other oxides that are dissolvable after the embedding process. Typical polymers can be used as the temporary spacer and can be formed by inkjet printing. For example, ultraviolet (UV) curable ink or hot melt glue can be inkjet printed onto a semiconductor die or wafer to form the temporary spacer. Other material examples for the temporary spacer are high temperature polymers, composite thermoset plastics such as duroplast, and elastomers.

[0059] Figures 9A-9CVarious partial cross-sectional views of one embodiment of forming a photoresist-based temporary spacer on a semiconductor die are shown during different stages of the process. While a single semiconductor die is shown for ease of illustration, multiple semiconductor dies can be processed in parallel, e.g., as part of a semiconductor wafer before or after singulation, or as part of a board of singulated dies.

[0060] Figure 9A A photoresist 900 is shown being applied to the first major surface 102 of the semiconductor die 100, e.g., by spin coating, spray coating, dip coating, lamination, etc. The photoresist 900 is a photosensitive polymer. The lateral precision of the process for forming the temporary spacer is defined by the resist process, which is very high. Thus, the openings formed in the embedded material by removing the photoresist-based temporary spacer can be precisely located over the die pads 114, and less safety (tolerance) distance is needed to compensate for process variations.

[0061] Any photoresist commonly used in semiconductor wafer or die processing can be used. In one embodiment, the photoresist SU-8 is used. SU-8 can withstand temperatures up to 300 to 400 degrees, which is suitable for typical molding processes. Different photoresists can be selected to meet other requirements.

[0062] Figure 9B The photoresist 900 after exposure is shown, such that a first region 902 of the photoresist 900 covering the first portion 110 of the first major surface 102 of the semiconductor die 100 becomes insoluble, while a second region 904 of the photoresist 900 covering the peripheral portion 112 of the first major surface 102 of the semiconductor die 100 remains soluble. A patterned mask 906 can be used to block light, such that only the unmasked region 904 of the photoresist 900 is exposed to light.

[0063] In the case of a positive photoresist, the photosensitive material of the photoresist 900 is photodegraded, and the developer dissolves the regions exposed to light, leaving the coating in the regions where the mask 906 was placed. In the case of a negative photoresist, the photosensitive material of the photoresist 900 is enhanced (polymerized or cross-linked) by light, and the developer dissolves only the regions not exposed to light, leaving the coating in the regions where the mask 906 was not placed.

[0064] Different spacer geometries can be achieved based on the way the photoresist 900 is processed. For example, the photoresist 900 can be exposed such that the insoluble regions 902 of the photoresist 900 have sloped sidewalls forming sidewalls of the temporary spacer, e.g., as shown in Figure 3A and 3BThe sloped resist sidewalls can create an undercut structure in the embedded material. The photoresist 900 can instead include a first photoresist layer formed on the first major surface 102 of the semiconductor die 100 and a second photoresist layer formed on the first photoresist layer. The first and second photoresist layers can be exposed differently such that the insoluble regions 902 of the photoresist 900 have an undercut structure that forms a portion of the sidewalls of the temporary spacer, e.g., as shown in Figure 2A and 2B Instead, as shown in Figure 9B the sidewalls of the temporary spacer can be perpendicular or nearly perpendicular with respect to the first major surface 102 of the semiconductor die 100.

[0065] In the case of processing an entire semiconductor wafer, the photoresist 900 is applied to the first major surface 102 of each die 100 prior to singulation of the wafer. As described above, the photoresist 900 is exposed such that the first regions 902 of the photoresist 900 covering the first portion 110 of the first major surface 102 of each semiconductor die 100 on the wafer are insoluble, while the second regions 904 of the photoresist 900 covering the outer peripheral portion 112 of the first major surface 102 of each semiconductor die 100 are soluble in a respective solvent that is not typically water.

[0066] Figure 9C The semiconductor die 100 is shown after the soluble regions 904 of the photoresist 900 are removed from the outer peripheral portion 112 of the first major surface 102 of the semiconductor die 100 by a suitable developer. The remaining insoluble regions 902 of the photoresist 900 form the temporary spacer. The temporary spacer formed by the insoluble regions 902 of the photoresist 900 can be removed by a suitable stripper after the embedding process is complete.

[0067] The resulting semiconductor device produced according to the methods described herein includes an embedding material, such as a mold compound or other type of embedding material, that covers the edges of the semiconductor die and a peripheral portion of the first major surface. In the particular case where a mold compound is the embedding material, the mold compound can include a resin and filler particles embedded within the resin. The mold compound has an opening formed by removing the temporary spacer, which exposes a first portion of the first major surface of the semiconductor die from the mold compound. This opening in the mold compound has a sidewall. Again, in the case where a mold compound is the embedding material and includes filler particles embedded within the resin, predomantly all of the filler particles disposed along the sidewall of the opening are completely embedded within the resin and are not exposed at all along the sidewall. That is, the majority of the filler particles along the sidewall of the opening are almost completely covered, like a spherical contact wall. Moreover, there are different interaction layers on the surface that are different from the interaction with the resist at the side and the membrane on top.

[0068] Figures 10A-10C Another embodiment of the embedding method is shown in various cross-sectional views during different stages of the method. According to this embodiment, the embedding method is implemented using a mold tool that includes a mold 116 and a membrane 118. The mold 116 is configured to receive the semiconductor die 100 and the temporary spacer 108. The membrane 118 is configured to cover the top of the mold 116 and the top of the semiconductor die 100. The membrane 118 is configured to be removed after the embedding material 124 is applied to the mold 116. Figures 10A-10C The embedding method shown, the mold tool will implement the embedding method, but without the membrane 118. Thus, this embodiment does not use a FAM.

[0069] Figure 10A It is shown that prior to embedding, the side of the temporary spacer 108 facing away from the semiconductor die 100 is secured to a surface 1001 of a temporary carrier 1000 (e.g., a glass carrier, a semiconductor wafer, a tape, a membrane, etc.). For example, the semiconductor die 100 can be mounted to the temporary carrier 1000 in a flip-chip configuration with the front side of the semiconductor die 100 facing the temporary carrier 1000. The same temporary carrier 1000 can be used to secure more than one semiconductor die 100 as shown. Figure 10A More than one semiconductor die 100 can be processed as shown. This can include more than one semiconductor die 100 secured to the same temporary carrier 1000.

[0070] Figure 10B It is shown that the semiconductor die 100 is embedded in an embedding material 124 using the mold 116 but without the membrane 118. According to this embodiment, the embedding material 124 is a mold compound.

[0071] Figure 10CA molded package is shown after removal of the temporary carrier 1000 and the temporary spacer 108. The temporary carrier 1000 is removed to allow removal of the temporary spacer. In the case of a tape carrier, the structure including the embedded die 100 can be lifted or peeled off from the temporary carrier 1000. By removing the temporary spacer 108, one or more metal pads 114 can be exposed at the portion 110 of the first surface 102 of the semiconductor die 100, and electrical contact (not shown) to such metal pads 114 can be made in the space 1002 created by removal of the temporary spacer 108. For example, a redistribution layer (not shown) can be applied directly onto the exposed metal pads 114 of the semiconductor die 100 without the need for additional dielectric layers to create a die-in-package.

[0072] While the disclosure is not limited in this regard, the following numbered examples illustrate one or more aspects of the disclosure.

[0073] Example 1. A method comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being positioned inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material, the embedding material covering the edge and the peripheral portion of the first major surface of the semiconductor die and contacting sidewalls of the temporary spacer; and after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die.

[0074] Example 2. The method of example 1, wherein the method further comprises: prior to the embedding, securing a side of the temporary spacer facing away from the semiconductor die to a surface of a carrier; and securing a frame to the surface of the carrier such that a gap exists between the frame and the edge of the semiconductor die.

[0075] Example 3. The method of example 2, wherein the embedding comprises: applying the embedding material into the gap between the frame and the edge of the semiconductor die; and after the applying, removing the carrier from the temporary spacer and the frame.

[0076] Example 4. The method of example 3, wherein a height of the frame is greater than a combined height of the semiconductor die and the temporary spacer, and wherein the embedding material covers the second major surface of the semiconductor die and a side of the frame facing in a same direction as the second major surface of the semiconductor die.

[0077] Example 5. The method of any one of examples 1 to 4, wherein the first major surface of the semiconductor die includes a metal pad, wherein the temporary spacer at least partially covers the metal pad during the embedding, and wherein the metal pad is exposed after the embedding by removing the temporary spacer.

[0078] Example 6. The method of example 5, wherein the method further comprises: applying an additional first temporary spacer to an additional metal pad located at the first major surface of the semiconductor die, the additional first temporary spacer at least partially covering the additional metal pad during the embedding; after the embedding, removing the additional first temporary spacer from the additional metal pad of the semiconductor die to expose the additional metal pad; and forming a first metallization structure on the exposed metal pad and a second metallization structure on the exposed additional metal pad.

[0079] Example 7. The method of example 6, further comprising: applying an additional second temporary spacer to the first metallization structure and an additional third temporary spacer to the second metallization structure; after applying the second and third temporary spacers, applying an additional embedding material to a side of the embedding material facing away from the semiconductor die; after applying the additional embedding material, removing the second and third temporary spacers to expose a portion of the first metallization structure previously covered by the second temporary spacer and to expose a portion of the second metallization structure previously covered by the third temporary spacer; and forming a third metallization structure on the exposed portion of the first metallization structure and a fourth metallization structure on the exposed portion of the second metallization structure.

[0080] Example 8. The method of any one of examples 1 to 7, wherein applying the temporary spacer comprises: applying a photoresist to the first major surface of the semiconductor die; exposing the photoresist such that a first region of the photoresist covering a first portion of the first major surface of the semiconductor die is insoluble, while a second region of the photoresist covering a peripheral portion of the first major surface of the semiconductor die is soluble; and removing the soluble portion of the photoresist from the peripheral portion of the first major surface of the semiconductor die.

[0081] Example 9. The method of example 8, wherein the photoresist is exposed such that the insoluble portions of the photoresist have sloped sidewalls that form sidewalls of the temporary spacer; or wherein the photoresist includes a first photoresist layer on a first major surface of the semiconductor die and a second photoresist layer on the first photoresist layer, and wherein the first and second photoresist layers are exposed differently such that the insoluble portions of the photoresist have undercut structures that form a portion of the sidewalls of the temporary spacer.

[0082] Example 10. The method of any of examples 1 and 5-9, wherein the method further comprises, prior to the embedding, securing a side of the temporary spacer facing away from the semiconductor die onto a surface of a temporary carrier; and after the embedding, removing the temporary carrier to expose the temporary spacer for removal, wherein the embedding material is a molding compound and the embedding is done using a mold without a membrane.

[0083] Example 11. The method of any of examples 1 to 10, wherein the embedding comprises: in a closed mold cavity, pressing a mold with a membrane against the temporary spacer such that the membrane contacts a side of the temporary spacer facing away from the semiconductor die and the membrane deforms to a contour shape of the temporary spacer while leaving a gap between the membrane and a peripheral portion of the first major surface of the semiconductor die; and thereafter causing a liquefied molding material to be forced into the closed mold cavity, the liquefied molding material filling the gap between the membrane and the peripheral portion of the first major surface of the semiconductor die.

[0084] Example 12. The method of any of examples 1 to 11, wherein the first portion of the first major surface of the semiconductor die includes a sensor structure, wherein the temporary spacer at least partially covers a first side of the sensor structure during the embedding, and wherein the first side of the sensor structure is exposed after the embedding by removing the temporary spacer.

[0085] Example 13. The method of example 12, wherein the method further comprises: applying an additional temporary spacer on a second side of the sensor structure opposite the first side, the additional temporary spacer at least partially covering the second side of the sensor structure during the embedding; and after the embedding, removing the additional temporary spacer from the second side of the sensor structure to expose the second side of the sensor structure.

[0086] Example 14. The method of any one of examples 1-13, wherein the method further comprises: providing an additional semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying an additional temporary spacer to a first portion of the first major surface of the additional semiconductor die, the first portion being positioned inward relative to a peripheral portion of the first major surface, wherein the additional semiconductor die has a different thickness than the semiconductor die, wherein the temporary spacer and the additional temporary spacer accommodate a height difference between the additional semiconductor die and the semiconductor die such that a combined thickness of the semiconductor die and the temporary spacer is approximately equal to a combined thickness of the additional semiconductor die and the additional temporary spacer.

[0087] Example 15. The method of example 14, wherein the embedding comprises: pressing a mold with a membrane against the two temporary spacers in a closed mold cavity such that the membrane contacts a side of the two temporary spacers facing away from the two semiconductor dies and such that the membrane deforms to a contour shape of the two temporary spacers while leaving a gap between the membrane and a peripheral portion of the first major surfaces of the two semiconductor dies; and thereafter causing liquefied molding material to be forced into the closed mold cavity, the liquefied molding material filling the gap between the membrane and the peripheral portion of the first major surfaces of the two semiconductor dies.

[0088] Example 16. The method of example 15, further comprising: after the embedding, removing the additional temporary spacer from the first major surface of the additional semiconductor die to expose the first portion of the first major surface of the additional semiconductor die; after removing the two temporary spacers, forming a metallization structure extending to a side of the embedded material facing away from the two semiconductor dies and connected to the first portion of the first major surface of the semiconductor die and the first portion of the first major surface of the additional semiconductor die.

[0089] Example 17. A method comprising: providing a semiconductor wafer having a plurality of semiconductor dies, each of the plurality of semiconductor dies having a first major surface, a second major surface opposite the first major surface; and applying a temporary spacer to a first portion of the first major surface of each of the semiconductor dies, the first portion being positioned inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, singulating the plurality of semiconductor dies so as to separate the semiconductor dies and form an edge between the first and second major surfaces of each singulated die; after the singulating, at least partially embedding each of the singulated semiconductor dies in an embedding material, the embedding material covering the edge and a peripheral portion of the first major surface of each of the singulated semiconductor dies and contacting sidewalls of the respective temporary spacer; after the embedding, removing the temporary spacer from the first major surface of the singulated semiconductor dies to expose the first portion of the first major surface of the singulated semiconductor dies.

[0090] Example 18. The method of example 17, wherein applying the temporary spacer comprises: prior to the singulating, applying a photoresist to the first major surfaces of the plurality of semiconductor dies; exposing the photoresist so that a first region of the photoresist covering the first portion of the first major surface of each of the semiconductor dies is insoluble and a second region of the photoresist covering a peripheral portion of the first major surface of each of the semiconductor dies is soluble; and removing the soluble portion of the photoresist from the peripheral portion of the first major surface of each of the semiconductor dies.

[0091] Example 19. A semiconductor device comprising: a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces; a molded compound covering the edge and a peripheral portion of the first major surface of the semiconductor die, the molded compound comprising a resin and filler particles embedded within the resin; and an opening in the molded compound exposing a first portion of the first major surface of the semiconductor die from the molded compound, the first portion being positioned inward relative to the peripheral portion, wherein the opening in the molded compound has sidewalls, wherein all of the filler particles disposed along the sidewalls of the opening are fully embedded within the resin without being exposed at all along the sidewalls.

[0092] Example 20. The semiconductor device of example 19, wherein a metal pad of the semiconductor die is exposed from the molded compound through the opening, and wherein a metallization structure is formed on the exposed portion of the metal pad.

[0093] Terms, such as “first,” “second,” and the like, are used to describe various elements, regions, parts, and the like and are not intended to be limiting. Like terms refer to like elements throughout the description.

[0094] As used in this document, the terms “have,” “comprise,” “include,” “contain,” and / or “encompass” mean that something is present within there are not excluded the presence of additional elements or features. The articles “a” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.

[0095] It is to be understood that the features of the various embodiments described herein can be combined with each other, unless specifically noted otherwise.

[0096] While particular embodiments have been shown and described, it will be obvious to those skilled in the art that changes and modifications of the present application can be made without departing from the scope of the application. It is the intent, therefore, to be limited only as is shown in the claims.

Claims

1. A method comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being positioned inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material that covers the edge and a peripheral portion of the first major surface of the semiconductor die and contacts sidewalls of the temporary spacer; prior to the embedding, securing a side of the temporary spacer facing away from the semiconductor die to a surface of a carrier, securing a frame to a surface of the carrier such that a gap exists between the frame and the edge of the semiconductor die; and after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die. The method further comprises:

2. The method of claim 1, wherein, applying the embedding material into the gap between the frame and the edge of the semiconductor die; and after the applying, removing the carrier from the temporary spacer and the frame. The frame has a height that is greater than a combined height of the semiconductor die and the temporary spacer, wherein the embedding material covers a second major surface of the semiconductor die and a side of the frame that faces in a same direction as the second major surface of the semiconductor die.

3. The method of claim 2, wherein, The first major surface of the semiconductor die includes a metal pad, wherein the temporary spacer at least partially covers the metal pad during the embedding, wherein the metal pad is exposed after the embedding by removing the temporary spacer.

4. The method of claim 1, wherein, The method further comprises:

5. The method of claim 4, wherein, applying an additional first temporary spacer to an additional metal pad at the first major surface of the semiconductor die, the additional first temporary spacer at least partially covering the additional metal pad during the embedding; after the embedding, removing the additional first temporary spacer from the additional metal pad of the semiconductor die to expose the additional metal pad; and forming a first metallization structure on the exposed metal pad and a second metallization structure on the exposed additional metal pad. The method further comprises:

6. The method of claim 5, wherein, applying an additional second temporary spacer to the first metallization structure and an additional third temporary spacer to the second metallization structure; after applying the second and third temporary spacers, applying an additional embedding material to a side of the embedding material facing away from the semiconductor die; after applying the additional embedding material, removing the second and third temporary spacers to expose a portion of the first metallization structure previously covered by the second temporary spacer and to expose a portion of the second metallization structure previously covered by the third temporary spacer; and ​ forming a third metallization structure on the exposed portion of the first metallization structure and forming a fourth metallization structure on the exposed portion of the second metallization structure.

7. The method of claim 1, wherein, Applying the temporary spacer includes: applying a photoresist to a first major surface of a semiconductor die; exposing the photoresist such that a first region of the photoresist covering a first portion of the first major surface of the semiconductor die is insoluble, while a second region of the photoresist covering a peripheral portion of the first major surface of the semiconductor die is soluble; and removing the soluble portion of the photoresist from the peripheral portion of the first major surface of the semiconductor die.

8. The method of claim 7, wherein, The photoresist is exposed such that the insoluble portion of the photoresist has a sloped sidewall forming a sidewall of the temporary spacer; or wherein the photoresist includes a first photoresist layer on the first major surface of the semiconductor die and a second photoresist layer on the first photoresist layer, wherein the first photoresist layer and the second photoresist layer are exposed differently such that the insoluble portion of the photoresist has an undercut structure forming a portion of a sidewall of the temporary spacer.

9. The method of claim 1, wherein, The embedding includes: in a closed mold cavity, pressing a mold with a membrane against the temporary spacer such that the membrane contacts a side of the temporary spacer facing away from the semiconductor die and the membrane deforms to a contour shape of the temporary spacer while leaving a gap between the membrane and the peripheral portion of the first major surface of the semiconductor die; and subsequently forcing liquefied molding material into the closed mold cavity, the liquefied molding material filling the gap between the membrane and the peripheral portion of the first major surface of the semiconductor die.

10. The method of claim 1, wherein, The first portion of the first major surface of the semiconductor die includes a sensor structure, wherein the temporary spacer at least partially covers a first side of the sensor structure during the embedding, wherein the first side of the sensor structure is exposed after the embedding by removing the temporary spacer.

11. The method of claim 10, wherein, The method further includes: applying an additional temporary spacer to a second side of the sensor structure opposite the first side, the additional temporary spacer at least partially covering the second side of the sensor structure during the embedding; and after the embedding, removing the additional temporary spacer from the second side of the sensor structure to expose the second side of the sensor structure.

12. The method of claim 1, wherein, The method further includes: providing an additional semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying an additional temporary spacer to a first portion of the first major surface of the additional semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface, wherein the additional semiconductor die has a different thickness than the semiconductor die, wherein the temporary spacer and the additional temporary spacer accommodate a height difference between the additional semiconductor die and the semiconductor die such that a combined thickness of the semiconductor die and the temporary spacer is approximately equal to a combined thickness of the additional semiconductor die and the additional temporary spacer.

13. The method of claim 12, wherein, the embedding comprises: in a closed mold cavity, pressing a mold with a membrane against the two temporary spacers such that the membrane contacts sides of the two temporary spacers facing away from the two semiconductor dies and such that the membrane deforms to a contour shape of the two temporary spacers while leaving a gap between the membrane and a peripheral portion of the first main surfaces of the two semiconductor dies; and afterwards, forcing a liquefied molding material into the closed mold cavity, the liquefied molding material filling the gap between the membrane and the peripheral portion of the first main surfaces of the two semiconductor dies.

14. The method of claim 13, wherein, the method further comprises: after the embedding, removing the additional temporary spacer from the first main surface of the additional semiconductor die to expose a first portion of the first main surface of the additional semiconductor die; and after removing the two temporary spacers, forming a metallization structure extending to a side of the embedded material facing away from the two semiconductor dies and connecting to the first portion of the first main surface of the semiconductor die and the first portion of the first main surface of the additional semiconductor die.

15. A method comprising: providing a semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface; applying a temporary spacer to a first portion of the first main surface of the semiconductor die, the first portion being positioned inward relative to a peripheral portion of the first main surface; after applying the temporary spacer, embedding the semiconductor die at least partially in an embedding material, the embedding material covering the edge and the peripheral portion of the first main surface of the semiconductor die and contacting a sidewall of the temporary spacer; and after the embedding, removing the temporary spacer from the first main surface of the semiconductor die to expose the first portion of the first main surface of the semiconductor die; wherein the first main surface of the semiconductor die comprises a metal pad, wherein the temporary spacer at least partially covers the metal pad during the embedding, wherein the metal pad is exposed after the embedding by removing the temporary spacer.

16. The method of claim 15, wherein, the method further comprises: applying an additional first temporary spacer to an additional metal pad at the first main surface of the semiconductor die, the additional first temporary spacer at least partially covering the additional metal pad during the embedding; after the embedding, removing the additional first temporary spacer from the additional metal pad of the semiconductor die to expose the additional metal pad; and forming a first metallization structure on the exposed metal pad and a second metallization structure on the exposed additional metal pad.

17. The method of claim 16, wherein, the method further comprises: applying an additional second temporary spacer onto the first metallization structure and applying an additional third temporary spacer onto the second metallization structure; after applying the second and third temporary spacers, applying an additional embedding material to a side of the embedding material facing away from the semiconductor die; after applying the additional embedding material, removing the second and third temporary spacers to expose portions of the first metallization structure previously covered by the second temporary spacer and to expose portions of the second metallization structure previously covered by the third temporary spacer; and forming a third metallization structure on the exposed portions of the first metallization structure and forming a fourth metallization structure on the exposed portions of the second metallization structure.

18. A method comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material that covers the edge and the peripheral portion of the first major surface of the semiconductor die and that contacts sidewalls of the temporary spacer; after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die; before the embedding, securing a side of the temporary spacer facing away from the semiconductor die to a surface of a temporary carrier; and after the embedding, removing the temporary carrier to expose the temporary spacer for removal, wherein the embedding material is a molding compound and the embedding is done using a mold without a membrane.

19. A method comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first and second major surfaces; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material that covers the edge and the peripheral portion of the first major surface of the semiconductor die and that contacts sidewalls of the temporary spacer; and after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die; wherein the embedding comprises: in a closed mold cavity, pressing a mold with a membrane against the temporary spacer such that the membrane contacts a side of the temporary spacer facing away from the semiconductor die and the membrane deforms to a contour shape of the temporary spacer while leaving a gap between the membrane and the peripheral portion of the first major surface of the semiconductor die; and after the embedding, removing the temporary carrier to expose the temporary spacer for removal, wherein the membrane is a flexible membrane and the gap is less than 0.1 mm. The liquefied molding material is then forced into the enclosed mold cavity, the liquefied molding material filling a gap between the membrane and a peripheral portion of the first major surface of the semiconductor die.

20. A method comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material, the embedding material covering the edge and the peripheral portion of the first major surface of the semiconductor die and contacting sidewalls of the temporary spacer; after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die, wherein the first portion of the first major surface of the semiconductor die includes a sensor structure, wherein the temporary spacer at least partially covers a first side of the sensor structure during the embedding, wherein the first side of the sensor structure is exposed after the embedding by removing the temporary spacer; applying an additional temporary spacer to a second side of the sensor structure opposite the first side, the additional temporary spacer at least partially covering the second side of the sensor structure during the embedding; and after the embedding, removing the additional temporary spacer from the second side of the sensor structure to expose the second side of the sensor structure.

21. A method comprising: providing a semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; applying a temporary spacer to a first portion of the first major surface of the semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface; after applying the temporary spacer, at least partially embedding the semiconductor die in an embedding material, the embedding material covering the edge and the peripheral portion of the first major surface of the semiconductor die and contacting sidewalls of the temporary spacer; after the embedding, removing the temporary spacer from the first major surface of the semiconductor die to expose the first portion of the first major surface of the semiconductor die; providing an additional semiconductor die having a first major surface, a second major surface opposite the first major surface, and an edge between the first major surface and the second major surface; and applying an additional temporary spacer to a first portion of the first major surface of the additional semiconductor die, the first portion being located inward relative to a peripheral portion of the first major surface, wherein the additional semiconductor die has a different thickness than the semiconductor die, wherein the temporary spacer and the additional temporary spacer accommodate a height difference between the additional semiconductor die and the semiconductor die such that a combined thickness of the semiconductor die and the temporary spacer is approximately equal to a combined thickness of the additional semiconductor die and the additional temporary spacer.

22. The method of claim 21, wherein, the embedding comprises: in a closed mold cavity, pressing a mold with a membrane against the two temporary spacers such that the membrane contacts sides of the two temporary spacers facing away from the two semiconductor dies and such that the membrane is deformed into a contour shape of the two temporary spacers while leaving a gap between the membrane and a peripheral portion of the first main surfaces of the two semiconductor dies; and afterwards causing a liquefied molding material to be forced into the closed mold cavity, the liquefied molding material filling the gap between the membrane and the peripheral portion of the first main surfaces of the two semiconductor dies.

23. The method of claim 22, wherein, the method further comprises: after the embedding, removing the additional temporary spacer from the first main surface of the additional semiconductor die to expose a first portion of the first main surface of the additional semiconductor die; and after removing the two temporary spacers, forming a metallization structure extending to a side of the embedded material facing away from the two semiconductor dies and connected to the first portion of the first main surface of the semiconductor die and the first portion of the first main surface of the additional semiconductor die.

24. A semiconductor device, comprising: a semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface; a molding compound covering the edge of the semiconductor die and a peripheral portion of the first main surface, the molding compound comprising a resin and filler particles embedded within the resin; and an opening in the molding compound exposing a first portion of the first main surface of the semiconductor die, the first portion being located inwardly with respect to the peripheral portion, wherein the opening in the molding compound has a sidewall, wherein all filler particles located predominantly along the sidewall of the opening are completely embedded within the resin without being exposed at all along the sidewall.

25. The semiconductor device according to claim 24, wherein a metal pad of the semiconductor die is exposed from the molding compound through the opening, wherein a metallization structure is formed on the exposed portion of the metal pad. the method further comprises: after the embedding, removing the additional temporary spacer from the first main surface of the additional semiconductor die to expose a first portion of the first main surface of the additional semiconductor die; and after removing the two temporary spacers, forming a metallization structure extending to a side of the embedded material facing away from the two semiconductor dies and connected to the first portion of the first main surface of the semiconductor die and the first portion of the first main surface of the additional semiconductor die.

24. A semiconductor device, comprising: a semiconductor die having a first main surface, a second main surface opposite the first main surface, and an edge between the first main surface and the second main surface; a molding compound covering the edge of the semiconductor die and a peripheral portion of the first main surface, the molding compound comprising a resin and filler particles embedded within the resin; and an opening in the molding compound exposing a first portion of the first main surface of the semiconductor die, the first portion being located inwardly with respect to the peripheral portion, wherein the opening in the molding compound has a sidewall, wherein all filler particles located predominantly along the sidewall of the opening are completely embedded within the resin without being exposed at all along the sidewall. a metal pad of the semiconductor die is exposed from the molding compound through the opening, wherein a metallization structure is formed on the exposed portion of the metal pad.

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