Solid-state imaging device

Abstract

A solid-state imaging device includes a plurality of imaging element blocks (10) each consisting of a plurality of imaging elements (11). Each imaging element (11) includes a first electrode (21); a charge accumulation electrode (24) arranged to be spaced apart from the first electrode (21); a photoelectric conversion unit (23) formed above the charge accumulation electrode (24) to contact the first electrode (21) with an insulating layer interposed therebetween; and a second electrode (22) formed on the photoelectric conversion unit (23). The first electrode (21) and the charge accumulation electrode (24) are disposed on an interlayer insulating layer (81), and the first electrode (21) is connected to a connection unit (63; 64, 65) disposed on the interlayer insulating layer (81).

Description

Technical Field

[0001] The present disclosure relates to a solid-state imaging device. Background Art

[0002] An imaging element using an organic semiconductor material for a photoelectric conversion layer can perform photoelectric conversion of a specific color (wavelength band). In addition, since the imaging element has the above-mentioned characteristics, when it is used as an imaging element in a solid-state imaging device, the following structure (stacked imaging element) can be obtained: sub-pixels are composed of a combination of an on-chip color filter (OCCF) and an imaging element and are arranged two-dimensionally, and stacking of sub-pixels that cannot be achieved by a conventional solid-state imaging device is achieved using this structure (for example, see Patent Document 1). In addition, the imaging element has the advantage that no false color will appear because de-mosaicing is not required. Note that in the following description, for the sake of convenience, an imaging element including a photoelectric conversion unit disposed on or above a semiconductor substrate is sometimes referred to as a "first type of imaging element", for the sake of convenience, a photoelectric conversion unit constituting the first type of imaging element is sometimes referred to as a "first type of photoelectric conversion unit", for the sake of convenience, an imaging element disposed in a semiconductor substrate is sometimes referred to as a "second type of imaging element", and for the sake of convenience, a photoelectric conversion unit constituting the second type of imaging element is sometimes referred to as a "second type of photoelectric conversion unit".

[0003] Fig. 9 An example of the structure of a stacked imaging element (stacked solid-state imaging device) disclosed in Patent Document 1 is shown. Fig. 9 In the example shown, in the semiconductor substrate 70, the imaging element is formed by stacking the third photoelectric conversion section 43 and the second photoelectric conversion section 41 of the second type of photoelectric conversion section of the third imaging element 15 and the second imaging element 13 constituting the second type of imaging element. In addition, the first type of photoelectric conversion section (referred to as "first photoelectric conversion section" for convenience of explanation) constituting the first imaging element is arranged above the semiconductor substrate 70 (specifically, above the second imaging element 13). Here, the first photoelectric conversion section includes the first electrode 21, the photoelectric conversion section 23 formed of an organic material, and the second electrode 22, and constitutes the first imaging element 11 of the first type of imaging element. In addition, the charge accumulation electrode 24 is provided spaced apart from the first electrode 21, and the photoelectric conversion section 23 is located above the charge accumulation electrode 24 with the insulating layer 82 interposed therebetween. In the second photoelectric conversion section 41 and the third photoelectric conversion section 43, for example, blue light and red light are photoelectrically converted according to the difference in absorption coefficient. In addition, in the first photoelectric conversion section, for example, green light is photoelectrically converted.

[0004] The charges generated by photoelectric conversion in the second photoelectric conversion section 41 and the third photoelectric conversion section 43 are accumulated once in the second photoelectric conversion section 41 and the third photoelectric conversion section 43, and then transferred to the second floating diffusion layer (Floating Diffusion) FD2 and the third floating diffusion layer FD3 through the vertical transistor (the gate portion 45 thereof is shown) and the transfer transistor (the gate portion 46 thereof is shown). In addition, the generated charges are output to an external readout circuit (not shown). The transistor and the floating diffusion layers FD2 and FD3 are also formed on the semiconductor substrate 70.

[0005] The charge generated by photoelectric conversion in the first photoelectric conversion unit is attracted to the charge accumulation electrode 24 at the time of charge accumulation, and is accumulated in the photoelectric conversion unit 23. At the time of charge transfer, the charge accumulated in the photoelectric conversion unit 23 is accumulated in the first floating diffusion layer FD1 formed on the semiconductor substrate 70 through the first electrode 21, the contact hole portion 61 and the wiring layer 62. In addition, the first photoelectric conversion unit is also connected to the gate portion 52 of the amplifier transistor through the contact hole portion 61 and the wiring layer 62 for converting the charge amount into a voltage. In addition, the first floating diffusion layer FD1 constitutes a part of the reset transistor (the gate portion 51 thereof is shown). Note that other components are described in conjunction with Embodiment 1.

[0006] [Citation List]

[0007] [Patent Document]

[0008] [Patent Document 1] Japanese Patent Laid-Open No. 2017-157816 Summary of the invention

[0009] [Technical issues]

[0010] Although described in detail below, the following first problem occurs, that is, depending on the angle of light incident on the first imaging element 11, there is a difference in the movement state of the charge generated in the photoelectric conversion section 23 of each first imaging element 11 to the first electrode 21 between the first imaging elements 11 adjacent to each other, and thus, there is a possibility that the image quality is degraded in the obtained image. In addition, the following second problem occurs, that is, it is not considered that there is no possibility that the charge accumulated in the photoelectric conversion section 23 may move to the adjacent first imaging element 11 during the operation of the first imaging element 11, and it is not considered that there is no possibility that the charge accumulated in the photoelectric conversion section 23 may not be smoothly transferred to the first electrode 21. This causes deterioration in the characteristics of the solid-state imaging device.

[0011] Therefore, a first object of the present disclosure is to provide a solid-state imaging device in which the movement state of the charge generated in the imaging element to the first electrode does not differ depending on the angle of light incident on the imaging element. In addition, a second object of the present disclosure is to provide a solid-state imaging device including an imaging element having the following configuration and structure, by which the movement of the charge between the imaging elements adjacent to each other during the operation of the imaging element can be reliably suppressed, and the charge accumulated in the photoelectric conversion unit is smoothly transferred to the first electrode.

[0012] [Solution to the problem]

[0013] In order to achieve the above-mentioned first purpose, the solid-state imaging device of the present disclosure includes a plurality of imaging element blocks each consisting of a plurality of imaging elements. Each imaging element includes a first electrode, a charge accumulation electrode spaced apart from the first electrode, a photoelectric conversion unit in contact with the first electrode and formed above the charge accumulation electrode (an insulating layer is inserted between the photoelectric conversion unit and the charge accumulation electrode), and a second electrode formed on the photoelectric conversion unit. The first electrode and the charge accumulation electrode are arranged on an interlayer insulating layer. The first electrode is connected to a connection portion arranged in the interlayer insulating layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1A and Figure 1B 1 and 2 are diagrams schematically showing the arrangement states of the charge storage electrode, the first electrode, and the like in the solid-state imaging device of Example 1 and the solid-state imaging device of Example 2, respectively.

[0015] Figure 2A and Figure 2B This is a diagram schematically showing the arrangement of the charge storage electrode, the first electrode, the isolation electrode, and the like in a modified example of the solid-state imaging device of the second embodiment.

[0016] Figure 3A and Figure 3B The figures schematically show the arrangement states of the charge storage electrode, the first electrode, etc. in the solid-state imaging device of the third embodiment and the modification of the third embodiment.

[0017] Figure 4A and Figure 4B This is a diagram schematically showing the arrangement of the charge storage electrode, the first electrode, the isolation electrode, and the like in a modified example of the solid-state imaging device of the third embodiment.

[0018] Figure 5A and Figure 5B The figures schematically show the configuration states of the charge storage electrode, the first electrode, etc. of the solid-state imaging device in the fourth embodiment and the modification of the fourth embodiment.

[0019] Fig. 6A and Figure 6B This is a diagram schematically showing the arrangement of the charge storage electrode, the first electrode, the isolation electrode, and the like in a modified example of the solid-state imaging device of the fourth embodiment.

[0020] Fig. 7A and Figure 7B This is a diagram schematically showing the arrangement of the charge storage electrode, the first electrode, etc. in a modified example of the solid-state imaging device of Example 4.

[0021] Fig. 8A and 8B Shown separately Fig. 6A A schematic perspective view of a modified example of the solid-state imaging device of Embodiment 4 and a schematic perspective view of a modified example of the conventional solid-state imaging device are shown.

[0022] Fig. 9 is a schematic partial cross-sectional view of the solid-state imaging device of Example 1.

[0023] Fig. 10A and 10B This is a schematic cross-sectional view of a part of the imaging elements (two imaging elements arranged side by side) constituting the solid-state imaging device of Example 1 and the modification of Example 1.

[0024] Fig.11 It is an equivalent circuit diagram of the imaging element of Example 1 and the stacked imaging element.

[0025] Fig.12 It is an equivalent circuit diagram of the imaging element of Example 1 and the stacked imaging element.

[0026] Fig.13 1 is a schematic configuration diagram of a first electrode, a charge storage electrode, and a transistor constituting a control section constituting the image pickup element of Example 1.

[0027] Fig.14 This is a diagram schematically showing the states of potentials of various parts of the imaging element of Example 1 when it is operating.

[0028] Fig.15A and 15B It is used to illustrate Fig.14 (Example 1) and Fig.32 and Fig.33 (Embodiment 8) Equivalent circuit diagram of the imaging element and stacked imaging element of Embodiment 1 and Embodiment 8 of each part.

[0029] Fig.16 This is a conceptual diagram of the solid-state imaging device of Example 1.

[0030] Fig.17 It is an equivalent circuit diagram of the imaging element of Example 1 and a modified example of the stacked imaging element.

[0031] Fig.18 It is composed Fig.17 FIG. 1 is a schematic configuration diagram of a first electrode and a charge storage electrode and a transistor constituting a control unit of another modified example of the image pickup element of Example 1 shown in FIG.

[0032] Fig.19A and 19B It is a schematic cross-sectional view of a part of the imaging elements (two imaging elements arranged side by side) constituting the solid-state imaging device of Example 2 and the modification of Example 2.

[0033] Fig. 20 This is a schematic cross-sectional view of a portion of the imaging element of Example 5 (two imaging elements arranged side by side).

[0034] Fig.21A and Fig.21B This is a schematic cross-sectional view of a part of a modified example of the imaging element of Example 5 (two imaging elements arranged side by side).

[0035] Fig.22A and Fig. 22B This is a schematic cross-sectional view of a part of a modified example of the imaging element of Example 5 (two imaging elements arranged side by side).

[0036] Fig.23 This is a schematic partial cross-sectional view of a solid-state imaging device according to Embodiment 6.

[0037] Fig.24 This is a schematic partial cross-sectional view of a solid-state imaging device according to Embodiment 7.

[0038] Fig.25 It is a schematic partial cross-sectional view of a modified example of the solid-state imaging device of Example 7.

[0039] Fig.26 This is a schematic partial cross-sectional view of another modified example of the imaging element of Example 7.

[0040] Fig. 27 This is a schematic partial cross-sectional view of still another modified example of the imaging element of Example 7.

[0041] Fig.28 This is a schematic partial cross-sectional view of a part of the solid-state imaging device of Example 8.

[0042] Fig.29 This is an equivalent circuit diagram of the solid-state imaging device of Example 8.

[0043] Fig.30 This is an equivalent circuit diagram of the solid-state imaging device of Example 8.

[0044] Fig.31It is a schematic configuration diagram of a first electrode, a transfer control electrode, and a charge accumulation electrode constituting the image pickup element of Example 8, and a transistor constituting a control section.

[0045] Fig.32 This is a diagram schematically showing the states of potentials of various parts of the imaging element of Example 8 when it is operating.

[0046] Fig.33 It is a diagram schematically showing the states of potentials of various parts of the imaging element of Example 8 during different operations.

[0047] Fig.34 This is a schematic configuration diagram of a first electrode, a transfer control electrode, and a charge storage electrode constituting a modification of the imaging element of Example 8, and a transistor constituting a control unit.

[0048] Fig.35 This is a schematic partial cross-sectional view of a solid-state imaging device according to Embodiment 9.

[0049] Fig.36 This is a schematic partial cross-sectional view of still another modified example of the solid-state imaging device of Example 1.

[0050] Fig.37 This is a schematic partial cross-sectional view of still another modified example of the solid-state imaging device of Example 1.

[0051] Fig.38 This is a schematic partial cross-sectional view of another modified example of the solid-state imaging device of Example 1.

[0052] Fig.39 This is a schematic partial cross-sectional view of still another modified example of the solid-state imaging device of Example 1.

[0053] Fig.40 This is a schematic partial cross-sectional view of still another modified example of the solid-state imaging device of Example 1.

[0054] Fig.41 : is a conceptual diagram of an example in which a solid-state imaging device constituted by the solid-state imaging device of the present disclosure is used in an electronic device (camera).

[0055] Fig.42 1 is a conceptual diagram of a part of a solid-state imaging device for illustrating a driving method of an example of the solid-state imaging device of the present disclosure.

[0056] Fig.43 : is a diagram schematically showing a configuration state of a first electrode and the like of a conventional solid-state imaging device for illustrating the first problem.

[0057] Fig.44 is a block diagram showing an example of a schematic configuration of a vehicle control system.

[0058] Fig.45 It is a diagram for assisting in explaining an example of the installation positions of the vehicle exterior information detection unit and the imaging unit.

[0059] Fig.46 is a diagram showing an example of a schematic configuration of an endoscopic surgery system.

[0060] Fig.47 This is a block diagram showing an example of the functional configuration of a camera head and a camera control unit (CCU: camera control unit). DETAILED DESCRIPTION

[0061] Hereinafter, the present disclosure will be described based on embodiments and with reference to the accompanying drawings. However, the present disclosure is not limited to the embodiments, and various numerical values ​​and materials in the embodiments are exemplary. Note that the description is given in the following order.

[0062] 1. General Description of the Solid-State Imaging Device of the Present Disclosure

[0063] 2. Embodiment 1 (Solid-state imaging device of the present disclosure and solid-state imaging device of the first configuration)

[0064] 3. Example 2 (Variation of Example 1)

[0065] 4. Embodiment 3 (Variations of Embodiments 1 and 2 and Solid-State Imaging Device with Second Configuration)

[0066] 5. Example 4 (Another variation of Example 1 and Example 2 and a solid-state imaging device having a third configuration)

[0067] 6. Example 5 (Variation of Example 1 to Example 4 and Upper Isolation Electrode)

[0068] 7. Example 6 (Variations of Examples 1 to 5 and Front-Illuminated Solid-State Imaging Element)

[0069] 8. Example 7 (Variation of Example 1 to Example 6)

[0070] 9. Example 8 (Examples 1 to 7 and transmission control electrode)

[0071] 10. Example 9 (Examples 1 to 8 and charge discharge electrode)

[0072] 11. Others

[0073] <Overall Description of the Solid-State Imaging Device of the Present Disclosure>

[0074] The solid-state imaging device of the present disclosure may be formed such that the imaging element block is composed of P×Q (where P≥2 and Q≥1) imaging elements including P imaging elements along a first direction and Q imaging elements along a second direction different from the first direction.

[0075] The above-mentioned preferred form of the solid-state imaging device disclosed in the present invention can be configured so that in order to achieve the above-mentioned second purpose, P=2 and Q=1 are satisfied, and the first electrodes of the two imaging elements respectively configured along the first direction are connected to the connection portion provided in the interlayer insulating layer. Here, for the convenience of explanation, the solid-state imaging device having the above-mentioned configuration is referred to as a "solid-state imaging device of the first configuration". In the two imaging elements, the first electrodes are connected to each other through the connection portion. In addition, the solid-state imaging device of the first configuration can be configured so that the imaging element block is surrounded by a continuous isolation electrode (sometimes referred to as a "first isolation electrode" for the convenience of explanation), and can be further configured so that a continuous second isolation electrode extending from the isolation electrode (first isolation electrode) along the second direction is provided between the two imaging elements along the first direction. The first isolation electrode and the second isolation electrode are connected to each other. Alternatively, the solid-state imaging device of the first configuration can be configured so that the second isolation electrode extending along the second direction is provided between the two imaging elements along the first direction.

[0076] Alternatively, in order to achieve the above-mentioned second purpose, the above-mentioned preferred form of the solid-state imaging device disclosed in the present invention can be configured to satisfy P=2 and Q is a natural number equal to or greater than 2, and the first electrodes of the two imaging elements respectively configured along the first direction are connected to the connection portion arranged in the interlayer insulating layer. Here, for the sake of convenience of explanation, the solid-state imaging device having the above-mentioned structure is referred to as a "solid-state imaging device of the second structure". In P×Q imaging elements, the first electrodes are connected to each other through the connection portion. In addition, the solid-state imaging device of the second structure can be configured so that the imaging element block is surrounded by a continuous isolation electrode (first isolation electrode), and can be further configured so that a continuous second isolation electrode extending from the isolation electrode (first isolation electrode) along the second direction is arranged between the two imaging elements along the first direction. The first isolation electrode and the second isolation electrode are connected to each other. Alternatively, the solid-state imaging device of the second structure can be configured so that the second isolation electrode extending along the second direction is arranged between the two imaging elements along the first direction.

[0077] Alternatively, in order to achieve the above-mentioned second purpose, the above-mentioned preferred mode of the solid-state imaging device of the present disclosure may be configured to satisfy P=2 and Q=2, the first electrodes of the two imaging elements along the second direction are shared, and the shared first electrode is connected to the connection portion provided in the interlayer insulating layer. Here, for the convenience of explanation, the solid-state imaging device having the above-mentioned configuration is referred to as "the solid-state imaging device of the 3A configuration". Alternatively, in order to achieve the above-mentioned second purpose, the above-mentioned preferred mode of the solid-state imaging device of the present disclosure may be configured to satisfy P=2 and Q=2, the first electrodes of the two imaging elements along the first direction are shared, and the shared first electrode is connected to the connection portion provided in the interlayer insulating layer. Here, for the convenience of explanation, the solid-state imaging device having the above-mentioned configuration is referred to as "the solid-state imaging device of the 3B configuration". In the 2×2 imaging elements, the first electrodes are connected to each other through the connection portion. Then, the solid-state imaging device of the 3A configuration or the solid-state imaging device of the 3B configuration may be configured such that the imaging element block is surrounded by a continuous isolation electrode (first isolation electrode). In addition, the solid-state imaging device of the 3A configuration or the solid-state imaging device of the 3B configuration may be configured such that a continuous second isolation electrode extending from the isolation electrode (first isolation electrode) along the second direction is provided between two imaging elements along the first direction. The first isolation electrode and the second isolation electrode are connected to each other. Alternatively, the solid-state imaging device of the 3A configuration or the solid-state imaging device of the 3B configuration may be configured such that a second isolation electrode extending along the second direction is provided between two imaging elements along the first direction.

[0078] Furthermore, the solid-state imaging device of the present disclosure including the above-described preferred forms and configurations may be formed such that the imaging elements are arranged line-symmetrically with respect to a boundary line extending along the second direction between the imaging elements constituting the imaging element block.

[0079] Furthermore, the solid-state imaging device of the present disclosure including the above-described preferred forms and configurations may be formed so that the potential of the isolation electrode (first isolation electrode) (and also the potential of the second isolation electrode when the second isolation electrode is provided) has a fixed value VES.

[0080] If the first electrode is shared among P×Q imaging elements constituting one imaging element block in this way, the composition and structure in the pixel area in which multiple imaging elements are arranged can be simplified and refined. In addition, the solid-state imaging device can be formed so that the multiple (particularly P×Q) imaging elements constituting the imaging element block include a shared floating diffusion layer. In other words, a floating diffusion layer is provided for one imaging element block consisting of P×Q imaging elements. In addition, the solid-state imaging device can be formed so that each imaging element block includes a control unit, which is composed of at least a floating diffusion layer and an amplifying transistor, and the shared first electrode is connected to the control unit through a connecting unit. The P×Q imaging elements can be composed of a plurality of first-type imaging elements described below, or can be composed of at least one first-type imaging element described below and one, two or more second-type imaging elements.

[0081] In the case where an imaging element block is composed of four imaging elements and the first electrodes of the four imaging elements are shared, the solid-state imaging device according to the present disclosure can adopt a reading method by which the charges accumulated in the four imaging elements are read out separately a total of four times, or another reading method can be adopted by which the charges accumulated in the four imaging elements can be read out simultaneously a total of once. For the sake of convenience, the former method is sometimes referred to as the "first mode reading method", and for the sake of convenience, the latter method is sometimes referred to as the "second mode reading method". Through the first mode reading method, it is possible to improve the image obtained by the solid-state imaging device. Through the second mode reading method, the signals obtained by the four imaging elements are increased to achieve an increase in sensitivity. Switching between the first mode reading method and the second mode reading method can be achieved by setting a suitable switching device in the solid-state imaging device. In the first mode readout method, by appropriately controlling the timing during charge transfer, P×Q (e.g., 2×2) image pickup elements can share one floating diffusion layer, and P×Q (e.g., 2×2) image pickup elements constituting the image pickup element block are connected to one drive circuit. However, control of the charge accumulation electrode is performed for each image pickup element.

[0082] The solid-state imaging device disclosed in the present invention can be formed so that the first isolation electrode and the second isolation electrode are arranged in a region opposite to the region of the photoelectric conversion unit across the insulating layer. Note that for the sake of convenience, these isolation electrodes are sometimes referred to as the "lower first isolation electrode" and the "lower second isolation electrode", respectively, and they are sometimes collectively referred to as the "lower isolation electrode". Alternatively, the solid-state imaging device can be formed so that the first isolation electrode and the second isolation electrode are arranged on the photoelectric conversion unit separated from the second electrode. Note that for the sake of convenience, these isolation electrodes are sometimes referred to as the "upper first isolation electrode" and the "upper second isolation electrode", respectively, and they are sometimes collectively referred to as the "upper isolation electrode". In the case where the solid-state image sensor of configuration 3B is configured to be provided with a second isolation electrode, the first isolation electrode and the upper second isolation electrode need to be composed of the upper first isolation electrode and the upper second isolation electrode.

[0083] In the solid-state imaging device of the present disclosure, the lower first isolation electrode is configured to be spaced apart from the first electrode and the charge accumulation electrode and surrounds the charge accumulation electrode. At the same time, the positive projection image of the upper first isolation electrode is positioned to be spaced apart from the first electrode and the positive projection image of the charge accumulation electrode, and the positive projection image of the upper first isolation electrode surrounds the positive projection image of the charge accumulation electrode. In some cases, a portion of the positive projection image of the upper second isolation electrode and a portion of the positive projection image of the charge accumulation electrode may overlap each other.

[0084] Reference symbols indicating potentials applied to various electrodes in the following description are shown in Table 1 below.

[0085] [Table 1]

[0086] Charge accumulation period During charge transfer First electrode <![CDATA[V 11 ]]> <![CDATA[V 12 ]]> Second electrode <![CDATA[V 21 ]]> <![CDATA[V 22 ]]> Charge accumulation electrode <![CDATA[V 31 ]]> <![CDATA[V 32 ]]> The first isolation electrode <![CDATA[V ES ]]> <![CDATA[V ES ]]> Second isolation electrode <![CDATA[V ES ]]> <![CDATA[V ES ]]> Transport control electrode <![CDATA[V 41 ]]> <![CDATA[V 42 ]]> Charge discharge electrode <![CDATA[V 51 ]]> <![CDATA[V 52 ]]>

[0087] The solid-state imaging device of the present disclosure including the above-mentioned preferred form and configuration can be formed so that it also includes a semiconductor substrate, and the photoelectric conversion unit is arranged above the semiconductor substrate. Note that the first electrode, the charge accumulation electrode, the second electrode, various isolation electrodes, and various electrodes are connected to the drive circuit described below.

[0088] In addition, the solid-state imaging device of the present disclosure including the above-mentioned preferred form and configuration can be formed so that the size of the charge accumulation electrode is larger than the size of the first electrode. When the area of ​​the charge accumulation electrode is S1' and the area of ​​the first electrode is S1, although there is no limitation, it is preferred to satisfy 4≤S1' / S1.

[0089] In addition to the case where the upper isolation electrode is formed, the second electrode located on the light incident side can be made common to multiple imaging elements. In other words, the second electrode can be formed as what is generally called a solid electrode. The photoelectric conversion layer constituting the photoelectric conversion unit can be made common to multiple imaging elements. In other words, the solid-state imaging device of the present disclosure can be formed so that one photoelectric conversion layer is formed in multiple imaging elements.

[0090] In addition, the solid-state imaging device of the present disclosure including the above-mentioned various preferred forms and structures can be formed so that the first electrode extends in an opening provided in the insulating layer and is connected to the photoelectric conversion unit. Alternatively, the solid-state imaging device of the present disclosure can be formed so that the photoelectric conversion unit extends in an opening provided in the insulating layer and is connected to the first electrode, and in this case, the solid-state imaging device of the present disclosure can be formed so that the edge portion of the top surface of the first electrode is covered by the insulating layer, the first electrode is exposed from the bottom surface of the opening, and the surface of the insulating layer in contact with the top surface of the first electrode is the first surface, and the other surface of the insulating layer in contact with the portion of the photoelectric conversion unit opposite to the charge accumulation electrode is the second surface, and the side surface of the opening has an inclination extending from the first surface to the second surface. In addition, the solid-state imaging device of the present disclosure can be formed so that the side surface of the opening having an inclination extending from the first surface to the second surface is located on the charge accumulation electrode side. Note that this form includes a form in which another layer is formed between the photoelectric conversion unit and the first electrode (for example, a form in which a material layer suitable for charge accumulation is formed between the photoelectric conversion unit and the first electrode).

[0091] In addition, the solid-state imaging device of the present disclosure including the above-mentioned preferred forms and configurations may be configured such that it further includes a control unit provided on the semiconductor substrate and including a drive circuit, and the first electrode and the charge accumulation electrode are connected to the drive circuit, and during the charge accumulation period, the potential V 11 Applied to the first electrode, a potential V 31 applied to the charge accumulation electrode, and the charge is accumulated in the photoelectric conversion unit. During the charge transfer period, from the drive circuit, the potential V 12 Applied to the first electrode, a potential V 32 is applied to the charge accumulation electrode, and the charge accumulated in the photoelectric conversion unit is read out to the control unit via the first electrode. However, in the case where the potential of the first electrode is higher than the potential of the second electrode, V 31 ≥V 11 And V 32 <V 12 , but when the potential of the first electrode is lower than the potential of the second electrode, V 31 ≤V 11 And V 32 >V 12 .

[0092] In addition, the solid-state imaging device of the present disclosure including the above-mentioned preferred form and configuration can be formed so as to further include a transfer control electrode (charge transfer electrode) arranged between the first electrode and the charge accumulation electrode, spaced apart from the first electrode and the charge accumulation electrode, and arranged opposite to the photoelectric conversion unit via an insulating layer. Note that for the sake of convenience of explanation, such a solid-state imaging device of the present disclosure in the above-mentioned form is sometimes referred to as "the solid-state imaging device of the present disclosure including the transfer control electrode". In addition, in the solid-state imaging device of the present disclosure including the transfer control electrode, when the potential applied to the transfer control electrode during the charge accumulation period is V 41 When the potential of the first electrode is higher than the potential of the second electrode, it is preferred to satisfy V 41 ≤V 11 And V 31 <V 41 In addition, when the potential applied to the transfer control electrode during charge transfer is V 42 When the potential of the first electrode is higher than the potential of the second electrode, it is preferred to satisfy V 32 ≤V 42 ≤V 12 .

[0093] In addition, the solid-state imaging device of the present disclosure including the above-mentioned preferred form and structure can be formed so that it also includes a charge discharge electrode connected to the photoelectric conversion part and configured to be separated from the first electrode and the charge accumulation electrode. Note that for the sake of convenience of explanation, the solid-state imaging device of the present disclosure in this form described above is referred to as "the solid-state imaging device of the present disclosure including the charge discharge electrode". In addition, the solid-state imaging device of the present disclosure including the charge discharge electrode can be formed so that the charge discharge electrode is configured to surround the first electrode and the charge accumulation electrode (that is, in the form of a frame). The charge discharge electrode can be shared (commonly used) by multiple imaging elements. In the case where a charge discharge electrode is provided, it is preferred that various isolation electrodes are constituted by an upper isolation electrode. Then, in this case, the solid-state imaging device can be formed so that the photoelectric conversion unit extends in a second opening provided in the insulating layer and is connected to the charge discharge electrode, the edge portion of the top surface of the charge discharge electrode is covered by the insulating layer, the charge discharge electrode is exposed from the bottom surface of the second opening, and when the surface of the insulating layer in contact with the top surface of the charge discharge electrode is the third surface and the other surface of the insulating layer in contact with the portion of the photoelectric conversion unit opposite to the charge accumulation electrode is the second surface, the side surface of the second opening has an inclination extending from the third surface to the second surface.

[0094] In addition, the solid-state imaging device of the present disclosure including the charge discharge electrode may be configured such that it further includes a control unit provided on the semiconductor substrate and having a drive circuit, the first electrode, the charge accumulation electrode, and the charge discharge electrode are connected to the drive circuit, and during the charge accumulation period, the potential V 11Applied to the first electrode, a potential V 31 applied to the charge accumulation electrode, and the potential V 51 is applied to the charge discharge electrode, and the charge is accumulated in the photoelectric conversion unit, and during the charge transfer, from the drive circuit, the potential V 12 Applied to the first electrode, a potential V 32 applied to the charge accumulation electrode, and the potential V 52 is applied to the charge discharge electrode, and the charge accumulated in the photoelectric conversion unit is read out to the control unit through the first electrode. However, in the case where the potential of the first electrode is higher than the potential of the second electrode, V 51 >V 11 And V 52 <V 12 , but when the potential of the first electrode is lower than the potential of the second electrode, V 51 <V 11 And V 52 >V 12 .

[0095] In addition, the solid-state imaging device of the present disclosure including the above-mentioned preferred forms and structures can be configured so that the charge accumulation electrode is composed of a plurality of charge accumulation electrode segments. Note that for ease of explanation, the solid-state imaging device of the present disclosure in this form is sometimes referred to as "the solid-state imaging device of the present disclosure including a plurality of charge accumulation electrode segments". The number of charge accumulation electrode segments may be two or more. In addition, the solid-state imaging device of the present disclosure including a plurality of charge accumulation electrode segments can be formed so that, when different potentials are applied to N charge accumulation electrode segments, when the potential of the first electrode is higher than the potential of the second electrode, during charge transfer, the potential applied to the charge accumulation electrode segment (first photoelectric conversion segment) located closest to the first electrode is higher than the potential applied to the charge accumulation electrode segment (Nth photoelectric conversion segment) farthest from the first electrode, and when the potential of the first electrode is lower than the potential of the second electrode, during charge transfer, the potential applied to the charge accumulation electrode segment (first photoelectric conversion segment) located closest to the first electrode is lower than the potential of the second electrode. The potential applied to the charge accumulation electrode segment (first photoelectric conversion segment) located closest to the first electrode is lower than the potential applied to the charge accumulation electrode segment (Nth photoelectric conversion segment) farthest from the first electrode.

[0096] In addition, the solid-state imaging device of the present disclosure including the above-mentioned preferred form and configuration can be formed so that at least the floating diffusion layer and the amplifier transistor constituting the control section are arranged on the semiconductor substrate, and the first electrode is connected to the floating diffusion layer and the gate portion of the amplifier transistor. In addition, in this case, the solid-state imaging device of the present disclosure including the above-mentioned preferred form and configuration is formed so that the reset transistor and the selection transistor constituting the control section are further arranged on the semiconductor substrate, the floating diffusion layer is connected to one of the source / drain regions of the reset transistor, one of the source / drain regions of the amplifier transistor is connected to one of the source / drain regions of the selection transistor, and the other of the source / drain regions of the selection transistor is connected to the signal line.

[0097] Alternatively, as a modified example of the solid-state imaging device of the present disclosure including the above-mentioned preferred form and structure, the imaging elements of the first to sixth structures described below can be listed. In other words, in the imaging elements of the first to sixth structures in the solid-state imaging device of the present disclosure including the above-mentioned preferred form and structure, the photoelectric conversion unit is composed of N (where N ≥ 2) photoelectric conversion unit segments, the photoelectric conversion layer constituting the photoelectric conversion unit is composed of N photoelectric conversion layer segments, and the insulating layer is composed of N insulating layer segments. In the imaging elements of the first to third structures, the charge accumulation electrode is composed of N charge accumulation electrode segments. In the imaging elements of the fourth and fifth structures, the charge accumulation electrode is composed of N charge accumulation electrode segments configured to be spaced apart from each other, the nth (where n = 1, 2, 3 ..., N) photoelectric conversion layer segment is composed of the nth charge accumulation electrode segment, the nth insulating layer segment and the nth photoelectric conversion layer segment, and the photoelectric conversion segment with a higher n value is arranged away from the first electrode.

[0098] Then, in the imaging element of the first configuration, the thickness of the insulating layer segment gradually changes in the range from the first photoelectric conversion segment to the Nth photoelectric conversion segment. At the same time, in the imaging element of the second configuration, the thickness of the photoelectric conversion layer segment gradually changes in the range from the first photoelectric conversion segment to the Nth photoelectric conversion segment. In addition, in the imaging element of the third configuration, the material constituting the insulating layer segment is different between the photoelectric conversion segments adjacent to each other. In addition, in the imaging element of the fourth configuration, the material constituting the charge accumulation electrode segment is different between the photoelectric conversion segments adjacent to each other. In addition, in the imaging element of the fifth configuration, the area of ​​the charge accumulation electrode segment gradually decreases in the range from the first photoelectric conversion segment to the Nth photoelectric conversion segment. Note that the area may decrease continuously or may decrease in a step-like manner.

[0099] Alternatively, in the solid-state imaging device of the present disclosure including the above-mentioned preferred forms and configurations, in the imaging element of the sixth configuration, when the stacking direction of the charge accumulation electrode, the insulating layer, and the photoelectric conversion portion is the Z direction and the direction away from the first electrode is the X direction, when the stacked portion where the charge accumulation electrode, the insulating layer, and the photoelectric conversion portion are stacked is cut on the YZ virtual plane, the cross-sectional area of ​​the stacked portion changes depending on the distance from the first electrode. Note that the change in the cross-sectional area may be a continuous change or may be a step-like change.

[0100] In the imaging elements of the first and second configurations, N photoelectric conversion layer segments are continuously arranged, N insulating layer segments are also continuously arranged, and N charge accumulation electrode segments are also continuously arranged. In the imaging elements of the third to fifth configurations, N photoelectric conversion layer segments are continuously arranged. In addition, in the imaging elements of the fourth and fifth configurations, N insulating layer segments are continuously arranged, and in the imaging element of the third configuration, N insulating layer segments corresponding to the photoelectric conversion segments are arranged respectively. In addition, in the imaging elements of the fourth and fifth configurations, and in some cases, in the imaging element of the third configuration, N charge accumulation electrode segments are arranged to correspond to the photoelectric conversion segments respectively. In the imaging elements of the first to sixth configurations, the same potential is applied to all the charge accumulation electrode segments. Alternatively, in the imaging elements of the fourth and fifth configurations, and in some cases, in the imaging element of the third configuration, different potentials from each other may be applied to the N charge accumulation electrode segments.

[0101] In the imaging elements of the first to sixth configurations and the solid-state imaging device of the present disclosure using such imaging elements, the thickness of the insulating layer segment is limited, the thickness of the photoelectric conversion layer segment is limited, the materials constituting the insulating layer segment are different, the materials constituting the charge accumulation electrode segment are different, the area of ​​the charge accumulation electrode segment is limited, or the cross-sectional area of ​​the stacked portion is limited. Therefore, a charge transfer gradient is formed so that the charge generated by the photoelectric conversion can be more easily and surely transferred to the first electrode. Then, thereby, the occurrence of afterimages and the occurrence of residual charge transfer can be prevented.

[0102] As a modification example of the solid-state imaging device of the present disclosure, the solid-state imaging device may include a plurality of imaging elements of the first to sixth configurations described above.

[0103] Although in the imaging elements of the first to fifth configurations, the photoelectric conversion segment with a higher n value is located away from the first electrode, whether the photoelectric conversion segment is located away from the first electrode is determined with reference to the X direction. In addition, although in the imaging element of the sixth configuration, the direction away from the first electrode is determined as the X direction, the "X direction" is defined in the following manner. In other words, a pixel area in which a plurality of imaging elements or a stacked imaging element are arranged is composed of a plurality of pixels arranged in a two-dimensional array (i.e., regularly arranged in the X direction and the Y direction). In the case where the planar shape of the pixel is a rectangle, the direction in which the side of the rectangle closest to the first electrode extends is defined as the Y direction, and the direction orthogonal to the Y direction is defined as the X direction. Alternatively, in the case where the planar shape of the pixel is a given shape, the general direction including the line segment or curve closest to the first electrode is defined as the Y direction, and the direction orthogonal to the Y direction is defined as the X direction.

[0104] Hereinafter, the imaging elements of the first to sixth configurations are described with respect to the case where the potential of the first electrode is higher than the potential of the second electrode. However, when the potential of the first electrode is lower than the potential of the second electrode, the potential may be reversed between high level and low level.

[0105] In the imaging element of the first configuration, the thickness of the insulating layer section gradually changes from the first photoelectric conversion section to the Nth photoelectric conversion section. However, the thickness of the insulating layer section may gradually increase or decrease, thereby forming a charge transfer gradient.

[0106] In the case where the charges to be accumulated are electrons, it is sufficient to adopt a configuration in which the thickness of the insulating layer segments gradually increases, but in the case where the charges to be accumulated are holes, it is sufficient to adopt a configuration in which the thickness of the insulating layer segments gradually decreases. In this case, if |V 31 |≥|V 11 |Such a state, the Nth photoelectric conversion section can accumulate a larger amount of charge than the (n+1)th photoelectric conversion section, and a stronger electric field is applied in the Nth photoelectric conversion section than in the (n+1)th photoelectric conversion section. Therefore, the flow of charge from the first photoelectric conversion section to the first electrode can be reliably prevented. Then, if |V 32 |<|V 12 |Such a state can reliably ensure the flow of charge from the first photoelectric conversion section to the first electrode and the flow of charge from the (n+1)th photoelectric conversion section to the Nth photoelectric conversion section.

[0107] In the imaging element of the second configuration, the thickness of the photoelectric conversion layer section gradually changes from the first photoelectric conversion section to the Nth photoelectric conversion section. However, the thickness of the photoelectric conversion layer section may gradually increase or decrease. Thus, a charge transfer gradient is formed.

[0108] In the case where the charges to be accumulated are electrons, it is sufficient to adopt a configuration in which the thickness of the photoelectric conversion layer section gradually increases, and in the case where the charges to be accumulated are holes, it is sufficient to adopt a configuration in which the thickness of the photoelectric conversion layer section gradually decreases. In addition, in the case where the thickness of the photoelectric conversion layer section gradually increases, if V 31 ≥V 11 Such a state, but in the case where the thickness of the photoelectric conversion layer segment is gradually reduced, if V 31 ≤V 11 In this state, a stronger electric field is applied to the Nth photoelectric conversion section than to the (n+1)th photoelectric conversion section, and the flow of charge from the first photoelectric conversion section to the first electrode can be reliably prevented. Then, during the charge transfer, when the thickness of the photoelectric conversion layer section gradually increases, if the V 32 <V 12 This state, but in the case where the thickness of the photoelectric conversion layer segment gradually decreases, if it enters V 32 >V 12 In this state, the charge flow from the first photoelectric conversion section to the first electrode and the charge flow from the (n+1)th photoelectric conversion section to the Nth photoelectric conversion section can be reliably ensured.

[0109] In the imaging element of the third configuration, the material constituting the insulating layer segment is different between adjacent photoelectric conversion sections, and thereby, a charge transfer gradient is formed. However, preferably, the value of the relative dielectric constant of the material constituting the insulating layer segment gradually decreases from the first photoelectric conversion section to the Nth photoelectric conversion section. In addition, if by adopting the above configuration, the charge accumulation period is entered into V 31 ≥V 11 In this state, the Nth photoelectric conversion section can accumulate a larger amount of charge than the (n+1)th photoelectric conversion section. Then, if V 32 <V 12 In this state, the charge flow from the first photoelectric conversion section to the first electrode and the charge flow from the (n+1)th photoelectric conversion section to the Nth photoelectric conversion section can be reliably ensured.

[0110] In the imaging element of the fourth configuration, the material constituting the charge accumulation electrode segment is different between adjacent photoelectric conversion segments, and thereby, a charge transfer gradient is formed. However, preferably, the value of the work function of the material constituting the insulating layer segment gradually increases in the range from the first photoelectric conversion segment to the Nth photoelectric conversion segment. In addition, by adopting the above-mentioned configuration, a potential gradient that is conducive to signal charge transfer can be formed without depending on the positive / negative voltage (potential).

[0111] In the imaging element of the fifth configuration, the area of ​​the charge accumulation electrode segment gradually decreases from the first photoelectric conversion section to the Nth photoelectric conversion section. Since a charge transfer gradient is thus formed, if V 31 ≥V 11 In this state, the Nth photoelectric conversion section can accumulate more charge than the (n+1)th photoelectric conversion section. Then, if V 32 <V 12 In this state, the charge flow from the first photoelectric conversion section to the first electrode and the charge flow from the (n+1)th photoelectric conversion section to the Nth photoelectric conversion section can be reliably ensured.

[0112] In the imaging element of the sixth configuration, the cross-sectional area of ​​the stacked portion changes according to the distance from the first electrode, and thereby a charge transfer gradient is formed. In particular, if a configuration is adopted in which the thickness of the cross section of the stacked portion is fixed and the width of the cross section of the stacked portion decreases as the distance from the first electrode is increased, similar to the description of the imaging element of the fifth configuration, if V is entered during charge accumulation, 31 ≥V 11 In this state, the area close to the first electrode can accumulate more charge than the area far from the first electrode. Therefore, if V 32 <V 12 In this state, the charge flow from the area closer to the first electrode to the first electrode and the charge flow from the farther area to the closer area can be reliably ensured. On the other hand, if a configuration is adopted in which the width of the cross section of the stacked portion is fixed and the thickness of the cross section of the stacked portion, more particularly, the thickness of the insulating layer segment is gradually increased, similar to the description of the imaging element of the first configuration, if V is entered during charge accumulation 31 ≥V 11 In this state, the region closer to the first electrode can accumulate a larger amount of charge than the region farther from the first electrode, and a stronger electric field is applied to the closer region than to the farther region, thereby reliably preventing the flow of charge from the region closer to the first electrode to the first electrode. Then, if V is entered during charge transfer 32 <V 12 In this state, the charge flow from the area closer to the first electrode to the first electrode and the charge flow from the farther area to the closer area can be reliably ensured. In addition, if a configuration is adopted in which the thickness of the photoelectric conversion layer segment gradually increases, similar to the description of the imaging element of the second configuration, if V is entered during charge accumulation 31 ≥V 11In this state, a stronger electric field is applied to the region closer to the first electrode than to the region farther away from the first electrode, and the flow of charge from the region closer to the first electrode to the first electrode can be reliably prevented. Then, if V 32 <V 12 In such a state, the flow of charge from the region closer to the first electrode to the first electrode and the flow of charge from the farther region to the closer region can be reliably ensured.

[0113] In addition, the solid-state imaging device of the present disclosure including the above-mentioned preferred form and structure can be formed so that light is incident from the second electrode side, and the shading layer is formed on the light incident side rather than near the second electrode. Alternatively, the solid-state imaging device of the present disclosure can be formed so that light is incident from the second electrode side, and the light is not incident on the first electrode (in some cases, incident on the first electrode and the transmission control electrode). In addition, in this case, the solid-state imaging device of the present disclosure can be formed so that the shading layer is formed above the first electrode on the light incident side (in some cases, above the first electrode and the transmission control electrode) rather than near the second electrode, or can be formed so that the on-chip microlens is arranged above the charge accumulation electrode and the second electrode, so that the light incident on the on-chip microlens is focused on the charge accumulation electrode. Here, the shading layer can be configured above the light incident side of the second electrode or on the light incident side of the second electrode. In some cases, the shading layer can be formed on the second electrode. As materials constituting the shading layer, chromium (Cr), copper (Cu), aluminum (Al), tungsten (W) and opaque resins (e.g., polyimide resins) can be exemplified.

[0114] As the solid-state imaging device disclosed in the present invention, in particular, an imaging element including a photoelectric conversion unit that absorbs blue light (light of 425 to 495 nm) and is sensitive to blue light (for the sake of convenience, referred to as a “first type of blue light photoelectric conversion unit”) (for the sake of convenience, referred to as a “first type of blue light imaging element”), an imaging element including a photoelectric conversion unit that absorbs green light (light of 495 to 570 nm) and is sensitive to green light (for the sake of convenience, referred to as a “first type of green light photoelectric conversion unit”) (for the sake of convenience, referred to as a “first type of green light imaging element”), and an imaging element including a photoelectric conversion unit that absorbs red light (light of 620 to 750 nm) and is sensitive to red light (for the sake of convenience, referred to as a “first type of red light photoelectric conversion unit”) can be listed. In addition, for the sake of convenience, a conventional imaging element that does not include a charge accumulation electrode and is sensitive to blue light is referred to as a "second type of blue light imaging element", for the sake of convenience, such a conventional imaging element that is sensitive to green light is referred to as a "second type of green light imaging element", and for the sake of convenience, such a conventional imaging element that is sensitive to red light is referred to as a "second type of red light imaging element". In addition, for the sake of convenience, a photoelectric conversion unit constituting a second type of blue light imaging element is referred to as a "second type of blue light photoelectric conversion unit", for the sake of convenience, a photoelectric conversion unit constituting a second type of green light imaging element is referred to as a "second type of green light photoelectric conversion unit", and for the sake of convenience, a photoelectric conversion unit constituting a second type of red light imaging element is referred to as a "second type of red light photoelectric conversion unit".

[0115] Although the stacked imaging element in the present disclosure includes at least one solid-state imaging device (photoelectric conversion device) of the present disclosure, in particular, for example,

[0116] [A] A stacked image pickup element constructed and arranged such that a first type of blue photoelectric conversion unit, a first type of green photoelectric conversion unit, and a first type of red photoelectric conversion unit are stacked in a vertical direction, and

[0117] The control unit of the first type blue light imaging element, the first type green light imaging element, and the first type red light imaging element is disposed on the semiconductor substrate.

[0118] [B] A stacked image pickup element constructed and arranged such that a first type of blue light photoelectric conversion portion and a first type of green light photoelectric conversion portion are stacked in a vertical direction, and

[0119] The second type of red light photoelectric conversion unit is arranged below the two layers of the first type of photoelectric conversion unit, and

[0120] The control unit of the first type of blue light imaging element, the first type of green light imaging element and the second type of red light imaging element is disposed on the semiconductor substrate.

[0121] [C] A stacked image pickup element constructed and arranged such that a second type of blue photoelectric conversion unit and a second type of red photoelectric conversion unit are arranged below a first type of green photoelectric conversion unit, and

[0122] The control section of the first type green light imaging element, the second type blue light imaging element, and the second type red light imaging element is provided on the semiconductor substrate, and

[0123] [D] A stacked imaging element configured and composed such that a second type of green photoelectric conversion unit and a second type of red photoelectric conversion unit are arranged below a first type of blue photoelectric conversion unit, and

[0124] The control unit for the first type blue light imaging element, the second type green light imaging element, and the second type red light imaging element is provided on the semiconductor substrate.

[0125] Note that preferably, the photoelectric conversion unit of the imaging element is arranged in the vertical direction in the order of blue light photoelectric conversion unit, green light photoelectric conversion unit and red light photoelectric conversion unit, or in the order of green light photoelectric conversion unit, blue light photoelectric conversion unit and red light photoelectric conversion unit, from the light incident direction. This is because light of shorter wavelengths is absorbed with higher efficiency on the incident surface side. Since red light has the longest wavelength among the three colors, the red light photoelectric conversion unit is preferably located at the bottom layer when observed from the light incident surface. A pixel is constituted by an imaging element of a stacked structure. Here, preferably, for example, a first type of red light photoelectric conversion unit is composed of an organic material and is arranged in the bottom layer of the imaging element of the first type of stacked structure, but higher than the second type of imaging element. Alternatively, a second type of infrared light photoelectric conversion unit may be provided below the first type of photoelectric conversion unit.

[0126] In the first type of imaging element, for example, the first electrode is formed on an interlayer insulating layer provided on a semiconductor substrate. The imaging element formed on the semiconductor substrate can be formed as a back-illuminated type or a front-illuminated type.

[0127] In the case where the photoelectric conversion unit is composed of a photoelectric conversion layer formed of an organic material, the photoelectric conversion layer may be formed in any one of the following four forms:

[0128] (1) The photoelectric conversion layer is composed of a p-type organic semiconductor,

[0129] (2) The photoelectric conversion layer is composed of an n-type organic semiconductor,

[0130] (3) A form in which the photoelectric conversion layer is composed of a stacked structure of a p-type organic semiconductor layer / an-type organic semiconductor layer, a stacked structure of a p-type organic semiconductor layer / a mixed layer of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure) / an-type organic semiconductor layer, a stacked structure of a p-type organic semiconductor layer / a mixed layer of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure), or a stacked structure of an n-type organic semiconductor layer / a mixed layer of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure), and

[0131] (4) A form in which the photoelectric conversion layer is composed of a mixture of a p-type organic semiconductor and an n-type organic semiconductor (bulk heterostructure).

[0132] Note that a configuration in which the order of layering is changed as necessary may be adopted.

[0133] As p-type organic semiconductors, naphthalene derivatives, anthracene derivatives, phenanthrene derivatives, pyrene derivatives, perylene derivatives, tetracene derivatives, pentacene derivatives, quinacridone derivatives, thiophene derivatives, thienothiophene derivatives, benzothiophene derivatives, benzothiophene pyridine benzothiophenederivatives, triallylamine derivatives, carbazole derivatives, chrysene derivatives, Derivatives, fluoranthene derivatives, phthalocyanine derivatives, subphthalocyanine derivatives, porphyrazine derivatives, metal complexes having heterocyclic compounds as ligands, polythiophene derivatives, polybenzothiadiazole derivatives, polyfluorene derivatives, etc. As n-type organic semiconductors, fullerenes and fullerene derivatives <for example, fullerenes such as C60, C70 and C74 (higher fullerenes), endohedral fullerenes, etc.) or fullerene derivatives (for example, fullerene fluorides, PCBM fullerene compounds, fullerene polymers, etc.)>, organic semiconductors having larger (deeper) HOMO and LUMO than p-type organic semiconductors, and transparent inorganic metal oxides can be applied. As an n-type organic semiconductor, in particular, a heterocyclic compound containing a nitrogen atom, an oxygen atom or a sulfur atom can be applied, for example, an organic molecule having a pyridine derivative, a pyrazine derivative, a pyrimidine derivative, a triazine derivative, a quinoline derivative, a quinoxaline derivative, an isoquinoline derivative, an acridine derivative, a phenazine derivative, a phenanthroline derivative, a tetrazole derivative, a pyrazole derivative, an imidazole derivative, a thiazole derivative, an oxazole derivative, a benzimidazole derivative, a benzotriazole derivative, a benzoxazole derivative, a carbazole derivative, a benzofuran derivative, a dibenzofuran derivative, a porphyrazine derivative, a polyphenylene vinylene derivative, a polybenzothiadiazole derivative, a polyfluorene derivative, or the like in its molecular skeleton, an organic metal complex, and a phthalocyanine derivative. As the group included in the fullerene derivative, a halogen atom; a linear, branched or cyclic alkyl or phenyl group; a group having a linear or condensed aromatic compound; a group having a halide; a partial fluoroalkyl group; a perfluoroalkyl group; a silylalkyl group; a silylalkoxy group; an arylsilyl group; an arylsulfanyl group; an alkylsulfanyl group; an arylsulfonyl group; an alkylsulfonyl group; an arylthio group; an alkylthio group; an amino group; an alkylamino group; an arylamino group; a hydroxyl group; an alkoxy group; an acylamino group; an acyloxy group; a carbonyl group; a carboxyl group; a carboxylamide group; a carboalkoxy group; an acyl group; a sulfonyl group; a cyano group; a nitro group; a group having a chalcogenide; a phosphine group; a phosphonic acid group; and derivatives thereof can be applied. Although not particularly limited, for example, the thickness of the photoelectric conversion layer composed of an organic material (sometimes referred to as an "organic photoelectric conversion layer") can be exemplified as 1×10 -8 m to 5×10 -7 m, preferably 2.5×10 -8 m to 3×10 -7 m, more preferably 2.5×10 -8 m to 2×10 -7 m, most preferably 1×10 -7 to 1.8×10 -7Note that although organic semiconductors are often classified into p-type and n-type, p-type means that holes are easily transported and n-type means that electrons are easily transported, this interpretation is not limited to organic semiconductors having holes or electrons as thermally excited majority carriers, like inorganic semiconductors.

[0134] Meanwhile, as a material for constituting an organic photoelectric conversion layer for photoelectrically converting green light, for example, rhodamine pigments, merocyanine pigments, quinacridone derivatives, subphthalocyanine pigments (subphthalocyanine derivatives), etc. can be applied. As a material for constituting an organic photoelectric conversion layer for photoelectrically converting blue light, for example, coumarin acid pigments, tris-8-hydroxyquinoline aluminum (Alq3), merocyanine pigments, etc. can be applied. In addition, as a material for constituting an organic photoelectric conversion layer for photoelectrically converting red light, for example, phthalocyanine pigments and subphthalocyanine pigments (subphthalocyanine derivatives) can be applied.

[0135] Alternatively, as inorganic materials for constituting the photoelectric conversion layer, crystalline silicon, amorphous silicon, microcrystalline silicon, crystalline selenium, amorphous selenium and CIGS (CuInGaSe), CIS (CuInSe2), CuInS2, CuAlS2, CuAlSe2, CuGaS2, CuGaSe2, AgAlS2, AgAlSe2, AgInS2 and AgInSe2 as chalcopyrite compounds, GaAs, InP, AlGaAs, InGaP, AlGaInP and InGaAsP as III-V compounds or compound semiconductors such as CdSe, CdS, In2Se3, In2S3, Bi2Se3, Bi2S3, ZnSe, ZnS, PbSe and PbS can be applied. In addition, quantum dots formed from these materials can also be used for the photoelectric conversion layer.

[0136] Alternatively, the photoelectric conversion unit can be formed with a stacked structure of a lower semiconductor layer and an upper photoelectric conversion layer. By arranging the lower semiconductor layer in this way, for example, recombination during charge accumulation can be prevented. In addition, the charge transfer efficiency of the accumulated charges in the photoelectric conversion unit to the first electrode can be improved. In addition, the charges generated in the photoelectric conversion unit can be temporarily maintained and the transfer timing can be controlled. In addition, the generation of dark current can be suppressed. It is sufficient to appropriately select the material for constituting the upper photoelectric conversion layer from the various materials constituting the above-mentioned photoelectric conversion layer. On the other hand, as the material constituting the lower semiconductor layer, it is preferred to use a material having a high band gap energy value (for example, a material having a band gap energy value of 3.0 eV or more) and having a higher mobility than the mobility of the material constituting the photoelectric conversion layer. In particular, oxide semiconductor materials; transition metal disulfides; silicon carbide; diamond; graphene; carbon nanotubes, and organic semiconductor materials such as condensed polycyclic hydrocarbon compounds and condensed heterocyclic compounds can be applied, more particularly, indium oxide, gallium oxide, zinc oxide, tin oxide, materials containing at least one of these oxides, materials in which a dopant is added to these materials, more specifically, for example, IGZO, ITZO, IWZO, IWO, ZTO, ITO-SiO X Materials, GZO, IGO, ZnSnO3, AlZnO, GaZnO and InZnO. In addition, materials including CuI, InSbO4, ZnMgO, CuInO2, MgIn2O4, CdO, etc. can be applied. However, these materials are not restrictive. Alternatively, as a material for constituting the lower semiconductor layer, in the case where the charges to be accumulated are electrons, a material having an ionization potential higher than that of the material constituting the upper photoelectric conversion layer can be applied, and in the case where the charges to be accumulated are holes, a material having an electron affinity lower than that of the material constituting the upper photoelectric conversion layer can be applied. Alternatively, the impurity concentration of the material constituting the lower semiconductor layer is preferably 1×10 18 cm -3 The lower semiconductor layer may have a single-layer structure or may have a multi-layer structure. In addition, the material constituting the lower semiconductor layer located above the charge accumulation electrode and the material constituting the lower semiconductor layer located above the first electrode may be different from each other.

[0137] A single-plate color solid-state imaging device may be constituted by the solid-state imaging device of the present disclosure.

[0138] In the solid-state imaging device of the present disclosure including a stacked imaging element, unlike the solid-state imaging device including an imaging element of a Bayer array (i.e., using a color filter to perform blue, green and red color separation), in the incident direction of light in the same pixel, a pixel is formed by stacking imaging elements that are sensitive to multiple different wavelengths of light, and therefore, an increase in sensitivity and an increase in pixel density per unit volume can be achieved. In addition, since the organic material has a high absorption coefficient, the film thickness of the organic photoelectric conversion layer can be reduced compared to the conventional Si-type photoelectric conversion layer, and the light leakage from adjacent pixels or the restriction on the light incident angle can be reduced. In addition, although the conventional Si-type imaging element generates false colors because it generates color signals by performing interpolation processing between pixels of three colors, in the solid-state imaging device of the present disclosure including a stacked imaging element, the occurrence of false colors can be suppressed. In addition, since the organic photoelectric conversion layer itself is also used as a color filter, color separation can be performed even if a color filter is not configured.

[0139] On the other hand, in the solid-state imaging device of the present invention that does not include a stacked imaging element but includes an imaging element, by using a color filter, the requirements for the spectral characteristics of blue, green and red can be reduced, and high mass production can be achieved. As an array of imaging elements in the solid-state imaging device of the present invention, in addition to the Bayer array, an inter-row array, a G stripe RB square array, a G stripe RB complete square array, a square complementary color array, a stripe array, a diagonal stripe array, a primary color difference array, a field color difference sequential array, a frame color difference sequential array, a MOS array, an improved MOS array, a frame interlaced array and a field interlaced array can also be applied. Here, a pixel (or sub-pixel) can be composed of a single imaging element.

[0140] The solid-state imaging device disclosed in the present invention is composed of a plurality of pixels arranged in a two-dimensional array. The pixel area is usually composed of an effective pixel area that actually receives light and amplifies the signal charge generated by photoelectric conversion and reads it out to a drive circuit, and a black reference pixel area for outputting optical black that becomes a reference for a black level. The black reference pixel area is usually arranged on the periphery of the effective pixel area.

[0141] In the solid-state imaging device of the present disclosure including the above-mentioned preferred form and structure, light is irradiated and photoelectric conversion occurs in the photoelectric conversion unit, and then the carriers are divided into positive holes (holes) and electrons. Then, the electrode from which the holes are extracted is determined as the anode, and the electrode from which the electrons are extracted is determined as the cathode. Not only can the first electrode constitute the anode and the second electrode constitute the cathode, but conversely, the first electrode can constitute the cathode and the second electrode can constitute the anode.

[0142] In the case of configuring a stacked imaging element, it can be configured so that the first electrode, the charge accumulation electrode, various isolation electrodes, the transfer control electrode, the charge discharge electrode, and the second electrode are formed of a transparent conductive material. Note that the first electrode, the charge accumulation electrode, various isolation electrodes, the transfer control electrode, and the charge discharge electrode are sometimes collectively referred to as "first electrode, etc.". Alternatively, for example, in the case where the solid-state imaging device of the present invention is configured on a plane like a Bayer array, the stacked imaging element can be configured so that the second electrode is formed of a transparent conductive material, and the first electrode, the charge accumulation electrode, etc. are formed of a metal material. In this case, the stacked imaging element can be particularly configured so that the second electrode located on the light incident side is formed of a transparent conductive material, and, for example, the first electrode, etc. are formed of Al-Nd (aluminum and neodymium alloy) or ASC (aluminum, samarium and copper alloy). Note that an electrode made of a transparent conductive material is sometimes referred to as a "transparent electrode." Here, the band gap energy of the transparent conductive material is 2.5 eV or more, preferably 3.1 eV or more. As a transparent conductive material constituting the transparent electrode, a metal oxide having conductivity can be used. Specifically, indium oxide, indium tin oxide (ITO: Indium Tin Oxide, including In2O3 doped with Sn, crystalline ITO and amorphous ITO), indium zinc oxide (IZO: Indium Zinc Oxide) in which indium is added as a dopant to zinc oxide, and the like can be used. Oxide), indium gallium oxide (IGO) in which indium is added as a dopant to gallium oxide, indium gallium zinc oxide (IGZO, In-GaZnO4) in which indium and gallium are added as dopants to zinc oxide, indium tin zinc oxide (ITZO) in which indium and tin are added as dopants to zinc oxide, IFO (In2O3 doped with F), tin oxide (SnO2), ATO (Sb-doped SnO2), FTO (SnO2 doped with F), zinc oxide (including ZnO doped with different elements), aluminum zinc oxide (AZO) in which aluminum is added as a dopant to zinc oxide, gallium zinc oxide (GZO) in which gallium is added as a dopant to zinc oxide, titanium dioxide (TiO2), niobium titanium oxide (TNO) in which niobium is added as a dopant to titanium oxide, antimony oxide, spinel-type oxide, and oxide having a YbFe2O4 structure. Alternatively, a transparent electrode including gallium oxide, titanium oxide, niobium oxide, nickel oxide, etc. as a base layer may be used. As the thickness of the transparent electrode, 2×10 -8 Up to 2×10 -7 m, preferably 3×10 -8 Up to 1×10 -7 When the first electrode needs to be transparent, the other electrodes are also preferably made of a transparent conductive material from the viewpoint of simplifying the manufacturing process.

[0143] Alternatively, when transparency is not required, the conductive material for constituting the anode having the function of an electrode for extracting positive holes is preferably composed of a conductive material having a high work function (e.g., ) conductive material. Specifically, gold (Au), silver (Ag), chromium (Cr), nickel (Ni), palladium (Pd), platinum (Pt), iron (Fe), iridium (Ir), germanium (Ge), osmium (OS), rhenium (Re), and tellurium (Te) can be exemplified. On the other hand, the conductive material for the cathode that has the function of extracting electrons is preferably composed of a conductive material having a low work function (e.g., ) is composed of a conductive material. Specifically, alkali metals (e.g., Li, Na, K, etc.) and their fluorides or oxides, alkaline earth metals (e.g., Mg, Ca, etc.) and their fluorides or oxides, aluminum (Al), zinc (Zn), tin (Sn), thallium (Tl), sodium-potassium alloys, aluminum-lithium alloys, magnesium-silver alloys, rare earth metals such as indium and ytterbium, or their alloys can be exemplified. Alternatively, as a material for constituting the anode or cathode, for example, metals such as platinum (Pt), gold (Au), palladium (Pd), chromium (Cr), nickel (Ni), aluminum (Al), silver (Ag), tantalum (Ta), tungsten (W), copper (Cu), titanium (T), indium (In), tin (Sn), iron (Fe), cobalt (Co), and molybdenum (Mo), alloys containing these metal elements, conductive particles composed of these metals, conductive particles containing alloys of these metals, polycrystalline silicon containing impurities, carbon-based materials, oxide semiconductors, carbon nanotubes, graphene, etc. can be used. In addition, as a material for constituting the anode or cathode, an organic material (conductive polymer) such as poly(3,4-ethylenedioxythiophene) / polystyrene sulfonate [PEDOT / PSS] can be used. In addition, these conductive materials can be used as electrodes by mixing them into a binder (polymer) to form a paste or ink and hardening the paste or ink.

[0144] As the film forming method of the first electrode, etc. and the second electrode (anode and cathode), a dry method or a wet method can be used. As a dry method, physical vapor deposition (PVD) and chemical vapor deposition (CVD) can be applied. As a film forming method using the PVD method, the following can be applied: vapor deposition by resistance heating or high frequency heating, electron beam (EB: electron beam) deposition, various sputtering methods (magnetron sputtering, RF-DC combined bias sputtering, ECR sputtering, target sputtering and high frequency sputtering), ion plating, laser ablation, molecular beam epitaxy and laser transfer. At the same time, as a CVD method, plasma CVD, thermal CVD, metal organic (MO: metal organic) CVD and optical CVD can be applied. On the other hand, as a wet method, methods such as electroplating or chemical plating, spin coating, inkjet, spray coating, die casting, microcontact printing, flexographic printing, offset printing, gravure printing and dipping can be applied. As patterning methods, chemical etching such as shadow mask, laser transfer or photolithography, physical etching by ultraviolet light or laser, etc. can be applied. As planarization techniques for the first electrode or the second electrode, laser planarization, reflow, chemical mechanical polishing (CMP) and the like can be applied.

[0145] As materials for forming the insulating layer, the interlayer insulating layer, the insulating film, and the interlayer insulating film, not only silicon oxide materials but also silicon nitride (SiN Y ); inorganic insulating materials such as metal oxide high dielectric insulating materials such as alumina (Al2O3), polymethyl methacrylate (PMMA); polyvinylphenol (PVP); polyvinyl alcohol (PVA); polyimide; polycarbonate (PC); polyethylene terephthalate (PET); polystyrene; silanol derivatives (silane coupling agents) such as N-2 (aminoethyl) 3-aminopropyltrimethoxysilane (AEAPTMS), 3-mercaptopropyltrimethoxysilane (MPTMS) or octadecyltrichlorosilane (OTS); novolac type phenolic resin; fluororesin; and organic insulating materials (organic polymers) such as linear hydrocarbons having a functional group that can be attached to a control electrode at one end such as octadecyl mercaptan or dodecyl isocyanate, and combinations thereof may also be used. Note that as the silicon oxide material, silicon oxide (SiO X ), BPSG, PSG, BSG, AsSG, PbSG, silicon oxynitride (SiON), SOG (spin-on glass), and low dielectric materials (e.g., polyallyl ether, cycloperfluorocarbon polymer, benzocyclobutene, cyclic fluororesin, polytetrafluoroethylene, aryl ether fluoride, polyimide fluoride, amorphous carbon, and organic SOG).

[0146] The configuration and structure of the floating diffusion layer, the amplifying transistor, the reset transistor and the selecting transistor constituting the control section are similar to those of a conventional floating diffusion layer, the amplifying transistor, the reset transistor and the selecting transistor. The driving circuit may also have a known configuration and structure.

[0147] Although the first electrode is connected to the floating diffusion layer and the gate portion of the amplifying transistor, it is sufficient to form a contact hole portion for connecting the first electrode and the floating diffusion layer with the gate portion of the amplifying transistor. As materials constituting the contact hole portion, there can be exemplified: polycrystalline silicon doped with impurities, high melting point metals such as tungsten, Ti, Pt, Pd, Cu, TiW, TiN, TiNW, WSi2, or MoSi2, and metal silicides, and stacked structures of layers made of these materials (for example, Ti / TiN / W).

[0148] The first carrier blocking layer may be disposed between the organic photoelectric conversion layer and the first electrode, and the second carrier blocking layer may be disposed between the organic photoelectric conversion layer and the second electrode. In addition, the first charge injection layer may be disposed between the first carrier blocking layer and the first electrode, and the second charge injection layer may be disposed between the second carrier blocking layer and the second electrode. For example, as materials constituting the charge injection layer, alkali metals such as lithium (Li), sodium (Na) or potassium (K) and their fluorides and oxides, and alkaline earth metals such as magnesium (Mg) and calcium (Ca) and their fluorides and oxides may be applied.

[0149] As the film forming methods of various organic layers, dry film forming methods and wet film forming methods can be applied. As the dry film forming method, vacuum deposition methods using resistance heating, high frequency heating or electron beam heating, flash deposition methods, plasma deposition methods, EB deposition methods, various sputtering methods (bipolar sputtering methods, direct current (DC) sputtering methods, DC magnetron sputtering methods, high frequency sputtering methods, magnetron sputtering methods, RF-DC combined bias sputtering methods, ECR sputtering methods, target sputtering methods, high frequency sputtering methods, ion beam sputtering methods), DC methods, RF methods, multi-cathode methods, activation reaction methods, electric field deposition methods, various ion plating methods such as high frequency ion plating methods and reactive ion plating methods, laser ablation methods, molecular beam epitaxy methods, laser transfer methods, and molecular beam epitaxy methods (MBE methods) can be applied. At the same time, as CVD methods, plasma CVD methods, thermal CVD methods, MOCVD methods, and optical CVD methods can be applied. On the other hand, as a wet method, specifically, spin coating, dipping, casting, microcontact printing, drop casting, various printing methods such as screen printing, inkjet printing, offset printing, gravure printing, or flexographic printing, stamping, spray coating, and various coating methods such as air knife coating, knife coating, rod coating, knife coating, extrusion coating, reverse roll coating, transfer roll coating, gravure coating, kiss coating, casting, spraying, slit orifice coating, and calendar coating can be exemplified. Note that in the coating method, as a solvent, non-polar or low-polar organic solvents such as toluene, chloroform, hexane, and ethanol can be exemplified. As a patterning method, chemical etching such as shadow mask, laser transfer, or photolithography, physical etching by ultraviolet rays, laser, etc., can be applied. As a planarization method for various organic layers, a laser planarization method, a reflow method, or the like can be used.

[0150] Two or more imaging elements in the first to sixth configurations including the above-described preferred forms and configurations may be appropriately combined as needed.

[0151] In the solid-state imaging device, as described above, an on-chip microlens or a light shielding layer can be provided as needed, and a driving circuit and wiring for driving the imaging element can be provided. A shutter for controlling the incidence of light to the imaging element can be provided as needed, or an optical cutoff filter can be provided according to the purpose of the solid-state imaging device.

[0152] For example, in the case of stacking a solid-state imaging device with a read-out integrated circuit (ROIC), a driving substrate having a read-out integrated circuit and a connection area made of copper (Cu) formed thereon and an imaging element having a connection area formed thereon can be stacked by placing them one on top of the other so that the connection areas are in contact with each other and then the connection areas are bonded to each other, and the connection areas can also be bonded to each other using solder bumps or the like.

[0153] In addition, the driving method for driving the solid-state imaging device disclosed herein can be a driving method for a solid-state imaging device, which repeats the following steps: while charges are accumulated in the photoelectric conversion unit, the charges in the first electrode are discharged to the outside of the system in all imaging elements at the same time, and then the charges accumulated in the photoelectric conversion unit are transferred to the first electrode in all imaging elements at the same time, and after the transfer is completed, the charges transferred to the first electrode in the imaging elements are read out in sequence.

[0154] In this driving method for a solid-state imaging device described above, since each imaging element is configured so that light incident from the second electrode side does not enter the first electrode, and in all imaging elements, when charges are accumulated in the photoelectric conversion unit at the same time, the charges in the first electrode are discharged to the outside of the system, the resetting of the first electrode can be reliably performed simultaneously in all imaging elements. Thereafter, in all imaging elements, the charges accumulated in the photoelectric conversion unit are transferred to the first electrode at the same time, and after the transfer is completed, the charges transferred to the first electrode in each imaging element are read out in sequence. Therefore, a so-called global shutter function can be easily realized.

[0155] Example 1

[0156] Embodiment 1 relates to a solid-state imaging device of the present disclosure, and more specifically, to a solid-state imaging device of a first configuration. Figure 1A The configuration state of the charge accumulation electrode and the first electrode in the solid-state imaging device of Embodiment 1 is schematically shown. Fig. 9 and Fig. 10A A schematic partial cross-sectional view of the solid-state imaging device of Embodiment 1 is shown. Fig.11 and Fig.12 The equivalent circuit diagrams of the imaging element and the stacked imaging element of Example 1 are shown respectively. Fig.13 A schematic configuration diagram of a first electrode and a charge accumulation electrode constituting the image pickup element of Example 1 and a transistor constituting a control unit is shown. Fig.14 The potential states at the respective parts at the time of operation of the image pickup element according to Embodiment 1 are shown. Fig.15A Show Fig.14Equivalent circuit diagram of the imaging element of Example 1 and the stacked imaging element of the illustrated part. Fig.16 A conceptual diagram showing a solid-state imaging device according to the first embodiment.

[0157] here, Fig. 9 It is along Figure 1A A schematic partial cross-sectional view taken along the dashed line ABC in FIG. Fig. 10A It is along Figure 1A Schematic partial cross-sectional view taken along the dotted line ABDE in FIG. In addition, in order to simplify the drawings, various imaging element components located below the interlayer insulating layer described below are sometimes collectively indicated by reference numeral 91 for ease of illustration.

[0158] The solid-state imaging device of Embodiment 1 includes a plurality of imaging element blocks 10 each composed of a plurality of imaging elements 11. Each imaging element 11 includes a first electrode 21, a charge accumulation electrode 24 arranged to be spaced apart from the first electrode 21, a photoelectric conversion unit 23 (with an insulating layer 82 interposed between the charge accumulation electrode and the photoelectric conversion unit) in contact with the first electrode 21 and formed above the charge accumulation electrode 24, and a second electrode 22 formed on the photoelectric conversion unit 23. The first electrode 21 and the charge accumulation electrode 24 are provided on the interlayer insulating layer 81. The first electrode 21 of the imaging element 11 is connected to a connection unit 63 provided in the interlayer insulating layer 81.

[0159] In the solid-state imaging device of Embodiment 1, the imaging element block 10 is composed of P×Q (where P≥2, Q≥1) imaging elements including P imaging elements 11 along a first direction and Q imaging elements 11 along a second direction different from the first direction. Specifically, in the solid-state imaging device of Embodiment 1, P=2 and Q=1. In other words, the imaging element block 10 is composed of two first imaging elements 11 arranged side by side along the first direction. The first electrode 21 constituting each of the two imaging elements 11 along the first direction is connected to the connection portion 63 provided in the interlayer insulating layer 81. For example, a plurality of imaging element blocks 10 are arranged in a two-dimensional matrix in the first direction and the second direction.

[0160] The image pickup elements 11 are arranged line-symmetrically with respect to a boundary line BL extending between the image pickup element 11 constituting the image pickup element block 10 and another image pickup element 11 in the second direction. Figure 1A , one imaging element block 10 is shown. The connection portion 63 is composed of a connection hole 65 provided in the interlayer insulating layer 81 and connected to the first electrode 21, and a wiring portion 64 provided in the interlayer insulating layer 81 and extending from the connection hole 65 on the insulating film 75. The connection portion 63 is connected to the contact hole portion 61.

[0161] Furthermore, the solid-state imaging device of Embodiment 1 includes a stacked imaging element including at least one imaging element 11 of Embodiment 1. Specifically, at least one lower imaging element 13 or 15 is disposed below the imaging element 11 of Embodiment 1, and the wavelength of light received by the imaging element 11 is different from the wavelength of light received by the lower imaging element 13 or 15. In this case, two lower imaging elements 13 and 15 are stacked.

[0162] Except for the imaging element of Example 5 described below, the second electrode 22 located on the light incident side is shared for a plurality of imaging elements 11. In other words, the second electrode 22 is generally referred to as a solid electrode. The photoelectric conversion unit 23 is shared for a plurality of imaging elements 11. In other words, a single-layer photoelectric conversion unit 23 is formed for a plurality of imaging elements 11.

[0163] The stacked image pickup element of Embodiment 1 includes at least one image pickup element 11 of Embodiment 1 (specifically, in Embodiment 1, one image pickup element 11 of Embodiment 1).

[0164] The stacked imaging element of Embodiment 1 further includes a control section provided on the semiconductor substrate and including a drive circuit, and the first electrodes 21 of the two imaging elements 11 constituting the imaging element block 10 are connected to the drive circuit via the connection section 63 (specifically, the connection hole 65 and the wiring section 64) and the contact hole section 61. The second electrode 22 and the charge accumulation electrode 24 are also connected to the drive circuit.

[0165] For example, the first electrode 21 is at a positive potential, and the second electrode 22 is at a negative potential, so that the electrons generated by photoelectric conversion in the photoelectric conversion unit 23 are read out to the first floating diffusion layer FD1. The same applies to other embodiments. In the form where the first electrode 21 is at a positive potential and the second electrode 22 is at a positive potential so that the positive holes generated based on photoelectric conversion in the photoelectric conversion unit 23 are read out to the first floating diffusion layer FD1, it is sufficient to reverse the high potential and the low potential described below.

[0166] In addition, the image pickup element 11 of Embodiment 1 further includes a control unit provided on the semiconductor substrate 70 and including a drive circuit. The first electrode 21 and the charge accumulation electrode 24 are connected to the drive circuit. During charge accumulation, the potential V 11 Applied to the first electrode 21, the potential V 31 is applied to the charge accumulation electrode 24, and the charge is accumulated in the photoelectric conversion section 23. During the charge transfer, from the drive circuit, the potential V 12 Applied to the first electrode 21, the potential V 32is applied to the charge accumulation electrode 24, and the charge accumulated in the photoelectric conversion section 23 is read out to the control section via the first electrode 21. However, since the potential of the first electrode 21 is set higher than the potential of the second electrode 22, V 31 ≥V 11 And V 32 <V 12 .

[0167] In the following, reference is made to Fig.14 and Fig.15A The operation of the stacked imaging element (first imaging element) including the charge accumulation electrode of Example 1 is described. Here, the potential of the first electrode 21 is set to be higher than the potential of the second electrode 22. In other words, the first electrode 21 is at a positive potential, and the second electrode 22 is at a negative potential. The electrons generated by photoelectric conversion in the photoelectric conversion unit 23 are read out into the floating diffusion layer. The same applies to other embodiments. Note that in a form in which the first electrode 21 is at a negative potential and the second electrode 22 is at a positive potential so that the positive holes generated based on photoelectric conversion in the photoelectric conversion unit 23 are read out into the floating diffusion layer, it is sufficient to reverse the high potential and the low potential described below.

[0168] Fig.14 And the following embodiment 8 Fig.32 and Fig.33 The reference symbols used in are as follows.

[0169] P A A point P in a region of the photoelectric conversion portion 23 that is opposite to a region centrally located between the charge accumulation electrode 24 or the transfer control electrode (charge transfer electrode) 25 and the first electrode 21 is A The potential at

[0170] P B Point P in the region of the photoelectric conversion unit 23 facing the charge storage electrode 24 B The potential at

[0171] P C A point P in a region of the photoelectric conversion unit 23 that faces the transfer control electrode (charge transfer electrode) 25 C The potential at

[0172] FD Potential at the first floating diffusion layer FD1

[0173] V 0A The potential at the charge accumulation electrode 24

[0174] V OT The potential at the transfer control electrode (charge transfer electrode) 25

[0175] RST Reset transistor TR1rst The potential at the gate portion 51

[0176] V DD Power supply potential

[0177] VSL1 signal line (data output line) VSL1

[0178] TR1 rst Reset transistor TR1 rst

[0179] TR1 amp Amplifier transistor TR1 amp

[0180] TR1 sel Select transistor TR1 sel

[0181] <Charge accumulation period>

[0182] During the charge accumulation period, from the drive circuit, the potential V 11 is applied to the first electrode 21, and the potential V 31 is applied to the charge accumulation electrode 24. In addition, the potential V 21 The positive holes generated by the photoelectric conversion are transferred from the second electrode 22 through the wiring V OU On the other hand, since the potential of the first electrode 21 is set higher than the potential of the second electrode 22, that is, for example, a positive potential is applied to the first electrode 21 and a negative potential is applied to the second electrode 22, V 31 ≥V 11 , preferably V 31 >V 11 Thus, the electrons generated by the photoelectric conversion are attracted to the charge accumulation electrode 24 and stay in the region of the photoelectric conversion unit 23 that is opposite to the charge accumulation electrode 24. In other words, the charges are accumulated in the photoelectric conversion unit 23. Since V 31 >V 11 , therefore, the electrons generated inside the photoelectric conversion portion 23 do not move toward the first electrode 21. As the photoelectric conversion time elapses, the potential in the region of the photoelectric conversion portion 23 opposing the charge accumulation electrode 24 has an increasing negative side value.

[0183] At the end of the charge accumulation period, a reset operation is performed. Therefore, the potential of the first floating diffusion layer FD1 is reset, and the potential (V FD ) is equal to the power supply potential V DD .

[0184] <Charge Transfer Period>

[0185] After the reset operation is completed, the charge is read out. In other words, the charge transfer period begins. During the charge transfer period, the potential V 12 is applied to the first electrode 21, and the potential V 32 is applied to the charge accumulation electrode 24. In addition, the potential V 22 is applied to the second electrode 22. Here, it is assumed that V 32 <V 12 Thus, the charge accumulated in the photoelectric conversion section 23 of the image pickup element 11 is read out. In other words, the electrons staying in the region of the photoelectric conversion section 23 opposed to the charge accumulation electrode 24 are read out to the first electrode 21, and further to the first floating diffusion layer FD1. In other words, the charge accumulated in the photoelectric conversion section 23 is read out to the control section.

[0186] Through the above steps, a series of operations of charge accumulation, reset operation and charge transfer are completed.

[0187] After the electrons are read out into the first floating diffusion layer FD1, the amplifying transistor TR1 amp and select transistor TR1 sel The operation of the first floating diffusion layer FD1 is the same as that of the conventional amplifying transistor and the selecting transistor. A series of operations such as charge accumulation, reset operation, and charge transfer of the second imaging element 13 and the third imaging element 15 are similar to a series of conventional operations such as charge accumulation, reset operation, and charge transfer. Similar to conventional techniques, the reset noise of the first floating diffusion layer FD1 can be removed by a Correlated Double Sampling (CDS) process.

[0188] The solid-state imaging device of Embodiment 1 further includes a semiconductor substrate (more specifically, a silicon semiconductor layer) 70, and the photoelectric conversion unit is arranged above the semiconductor substrate 70. The solid-state imaging device of Embodiment 1 further includes a control unit provided on the semiconductor substrate 70 and including a drive circuit to which the first electrode 21, the second electrode 22, and the charge accumulation electrode 24 are connected. Here, the light incident surface of the semiconductor substrate 70 is the upper side, and the opposite side of the semiconductor substrate 70 is the lower side. Below the semiconductor substrate 70, a wiring layer 62 including a plurality of wirings is provided.

[0189] On the semiconductor substrate 70, at least a floating diffusion layer FD1 and an amplifier transistor TR1 constituting a control unit are provided. amp , and the first electrode 21 is connected to the floating diffusion layer FD1 and the amplification transistor TR1 amp The semiconductor substrate 70 is also provided with a reset transistor TR1 constituting a control unit. rstand select transistor TR1 sel The floating diffusion layer FD1 is connected to the reset transistor TR1 rst One of the source / drain regions of the amplifying transistor TR1 amp The other of the source / drain regions is connected to the select transistor TR1 sel and selects transistor TR1. sel The other of the source / drain regions of the amplifier transistor TR1 is connected to the signal line VSL1. amp , reset transistor TR1 rst and select transistor TR1 sel Constitute a driving circuit.

[0190] Although in the illustrated example, a state in which one floating diffusion layer FD1 and the like are provided for two imaging elements 11 is shown, in an embodiment described below, the floating diffusion layer FD1 and the like are shared by four imaging elements 11 .

[0191] Specifically, the imaging element and stacked imaging element of Embodiment 1 are back-illuminated imaging elements and stacked imaging elements, and are composed so that three imaging elements 11, 13, and 15 are stacked, including: the first type of green imaging element of Embodiment 1 including a first type of green light photoelectric conversion unit that absorbs green light and is sensitive to green light (hereinafter, referred to as the "first imaging element"), a conventional second type of blue light imaging element including a second type of blue light photoelectric conversion unit that absorbs blue light and is sensitive to blue light (hereinafter, referred to as the "second imaging element"), and a conventional second type of red light imaging element including a second type of red light photoelectric conversion unit that absorbs red light and is sensitive to red light (hereinafter, referred to as the "third imaging element"). Here, the red light imaging element (third imaging element) 15 and the blue light imaging element (second imaging element) 13 are arranged in the semiconductor substrate 70 so that the second imaging element 13 is located on the light incident side relative to the third imaging element 15. Furthermore, a green imaging element (first imaging element) 11 is provided above a blue imaging element (second imaging element) 13. One pixel is constituted by a stacked structure of the first imaging element 11, the second imaging element 13, and the third imaging element 15. No color filter is provided.

[0192] In the first imaging element 11, the connection portion 63 (specifically, the connection hole 65 and the wiring portion 64) is formed in the interlayer insulating layer 81, and the first electrode 21 and the charge accumulation electrode 24 are formed on the interlayer insulating layer 81 with a distance from each other. The interlayer insulating layer 81 and the charge accumulation electrode 24 are covered by the insulating layer 82. The photoelectric conversion portion 23 is formed on the insulating layer 82, and the second electrode 22 is formed on the photoelectric conversion portion 23. The protective layer 83 is formed over the entire region including the second electrode 22, and the on-chip microlens 90 is provided on the protective layer 83. For example, the first electrode 21, the charge accumulation electrode 24, and the second electrode 22 are respectively composed of transparent electrodes made of ITO (work function: about 4.4 eV). The photoelectric conversion portion 23 is composed of a photoelectric conversion layer, and is composed of a layer containing a known organic photoelectric conversion material (for example, a rhodamine pigment, a merocyanine pigment, or an organic material such as quinacridone) that is sensitive to at least green light. In addition, the photoelectric conversion unit 23 can be configured to further include a material layer suitable for charge accumulation. In other words, a material layer suitable for charge accumulation can be further formed between the photoelectric conversion unit 23 and the first electrode 21 (for example, in the connecting portion 68). The interlayer insulating layer 81, the insulating layer 82, and the protective layer 83 are composed of known insulating materials (for example, SiO2 or SiN). The photoelectric conversion unit 23 and the first electrode 21 are connected to each other through the connecting portion 68 provided on the insulating layer 82. In the connecting portion 68, the photoelectric conversion unit 23 extends. In other words, the photoelectric conversion unit 23 extends in the opening portion 84 provided in the insulating layer 82 and is connected to the first electrode 21.

[0193] The charge accumulation electrode 24 is connected to the drive circuit. Specifically, the charge accumulation electrode 24 is connected to the drive circuit through the connection portion 67 provided in the interlayer insulating layer 81, the pad portion 66, and the wiring V OA It is connected to the vertical driving circuit 112 constituting the driving circuit.

[0194] The size of the charge accumulation electrode 24 is larger than that of the first electrode 21. The area of ​​the charge accumulation electrode 24 is represented by s1', and the area of ​​the first electrode 21 is represented by s1, and although not restrictive, it is preferred that 4≤s1' / s1 is satisfied, and in the imaging element of Embodiment 1 or any embodiment described below, for example, although not restrictive, s1' / s1=8 is satisfied.

[0195] The element isolation region 71 is formed on the first surface (front surface) 70A side of the semiconductor substrate 70, and the oxide film 72 is formed on the first surface 70A of the semiconductor substrate 70. In addition, the reset transistor TR1 constituting the control section of the first imaging element 11 rst , Amplifier transistor TR1 amp and select transistor TR1 selIt is provided on the first surface side of the semiconductor substrate 70 , and also includes a first floating diffusion layer FD1 .

[0196] Reset transistor TR1 rst It is composed of a gate portion 51, a channel formation region 51A, and source / drain regions 51B and 51C. Reset transistor TR1 rst The gate portion 51 is connected to the reset line RST1 and serves as the reset transistor TR1 rst The source / drain region 51C of one of the source / drain regions also serves as the first floating diffusion layer FD1, and the source / drain region 51B of the other of the source / drain regions is connected to the power supply V DD .

[0197] The first electrode 21 is connected to the reset transistor TR1 through the connection portion 63 (connection hole 65 and wiring portion 64) provided in the interlayer insulating layer 81, the contact hole portion 61 formed in the semiconductor substrate 70 and the interlayer insulating film 76, and the wiring layer 62 formed on the interlayer insulating film 76. rst A source / drain region 51C (first floating diffusion layer FD1 ) is formed.

[0198] Amplifier transistor TR1 amp The transistor is composed of a gate portion 52, a channel formation region 52A, and source / drain regions 52B and 52C. The gate portion 52 is connected to the first electrode 21 and the source / drain region 51C (first floating diffusion layer FD1) as one of the source / drain regions of the reset transistor TR1rst through a wiring layer 62. At the same time, the source / drain region 52B as one of the source / drain regions is connected to the power supply V DD .

[0199] Select transistor TR1 sel The transistor TR1 is composed of a gate portion 53, a channel forming region 53A, and source / drain regions 53B and 53C. The gate portion 53 is connected to the selection line SEL1. In addition, one source / drain region 53B is connected to the amplifier transistor TR1. amp The other source / drain region 52C shares a region, and the other source / drain region 53C is connected to the signal line (data output line) VSL1 (117).

[0200] The second imaging element 13 includes an n-type semiconductor region (second photoelectric conversion unit) 41 provided on a semiconductor substrate 70 as a photoelectric conversion layer. The transfer transistor TR2 is composed of a vertical transistor. trs The gate portion 45 of the transistor FD2 extends to the n-type semiconductor region 41 and is connected to the transfer gate line TG2. trsThe gate portion 45 of FIG. 4 is provided in the region 45C of the semiconductor substrate 70 . The charges accumulated in the n-type semiconductor region 41 are read out to the second floating diffusion layer FD2 through a transfer channel formed along the gate portion 45 .

[0201] In the second imaging element 13, the reset transistor TR2 constituting the control unit of the second imaging element 13 is rst , Amplifier transistor TR2 amp and select transistor TR2 sel It is also disposed on the first surface of the semiconductor substrate 70 .

[0202] Reset transistor TR2 rst It is composed of a gate portion, a channel formation region, and a source / drain region. Reset transistor TR2 rst The gate portion is connected to the reset line RST2, and the reset transistor TR2 rst One of the source / drain regions is connected to the power supply V DD , and the other one of the source / drain regions also serves as the second floating diffusion layer FD2.

[0203] Amplifier transistor TR2 amp It is composed of a gate portion, a channel formation region, and a source / drain region. The gate portion is connected to the reset transistor TR2 rst The other of the source / drain regions (the second floating diffusion layer FD2) is connected to the power supply V DD .

[0204] Select transistor TR2 sel The transistor is composed of a gate portion, a channel forming region, and a source / drain region. The gate portion is connected to a selection line SEL2. At the same time, one of the source / drain regions is connected to the amplifier transistor TR2. amp The other of the source / drain regions shares one region, and the other of the source / drain regions is connected to the signal line (data output line) VSL2.

[0205] The third imaging element 15 includes an n-type semiconductor region (third photoelectric conversion unit) 43 provided on a semiconductor substrate 70 as a photoelectric conversion layer. trs The gate portion 46 of the transmission transistor TR3 is connected to the transmission gate line TG3. trs The gate portion 46 of the semiconductor substrate 70 is provided in the region 46C of the semiconductor substrate 70. The charges accumulated in the n-type semiconductor region 43 are read out to the third floating diffusion layer FD3 through a transfer channel 46A formed along the gate portion 46.

[0206] In the third imaging element 15, the reset transistor TR3 constituting the control unit of the third imaging element 15 isrst , Amplifier transistor TR3 amp and select transistor TR3 sel It is also provided on the first surface side of the semiconductor substrate 70 .

[0207] Reset transistor TR3 rst It is composed of a gate portion, a channel formation region, and a source / drain region. Reset transistor TR3 rst The gate portion is connected to the reset line RST3, and the reset transistor TR3 rst One of the source / drain regions is connected to the power supply V DD , and the other of the source / drain regions also serves as a third floating diffusion layer FD3.

[0208] Amplifier transistor TR3 amp It is composed of a gate portion, a channel formation region, and a source / drain region. The gate portion is connected to the reset transistor TR3 rst The other of the source / drain regions (third floating diffusion layer FD3) is connected to the power supply V DD .

[0209] Select transistor TR3 sel The transistor is composed of a gate portion, a channel forming region, and a source / drain region. The gate portion is connected to a selection line SEL3. At the same time, one of the source / drain regions is connected to the amplifier transistor TR3. amp The other of the source / drain regions shares one region, and the other of the source / drain regions is connected to a signal line (data output line) VSL3.

[0210] Reset lines RST1, RST2 and RST3, selection lines SEL1, SEL2 and SEL3 and transfer gate lines TG2 and TG3 are connected to the vertical drive circuit 112 constituting the drive circuit, and signal lines (data output lines) VSL1, VSL2 and VSL3 are connected to the column signal processing circuit 113 constituting the drive circuit.

[0211] p + The layer 44 is provided between the n-type semiconductor region 43 and the front surface 70A of the semiconductor substrate 70, and suppresses the generation of dark current. + The layer 42 is formed between the n-type semiconductor region 41 and the n-type semiconductor region 43, and a part of the side surface of the n-type semiconductor region 43 is formed by the p + Layer 42 surrounds. + A layer 73 is formed on the side of the back surface 70B of the semiconductor substrate 70, and a HfO2 film 74 and an insulating film 75 are formed on the side to be removed from the p +The layer 73 is at a portion where the contact hole portion 61 is formed inside the semiconductor substrate 70. Although wiring is formed in the interlayer insulating film 76 in a multi-layer form, illustration thereof is omitted.

[0212] The HfO2 film 74 is a film having a negative fixed charge, and the generation of dark current can be suppressed by providing such a film as described above. Note that instead of the HfO2 film, an aluminum oxide (Al2O3) film, a zirconium oxide (ZrO2) film, a tantalum oxide (Ta2O5) film, a titanium oxide (TiO2) film, a lanthanum oxide (LA2O3) film, a praseodymium oxide (Pr2O3) film, a cerium oxide (CeO2) film, a neodymium oxide (Nd2O3) film, a promethium oxide (Pm2O3) film, a samarium oxide (Sm2O3) film, or a quartz oxide (CeO2) film may be used. ) film, europium oxide (Eu2O3) film, gadolinium oxide (Gd2O3) film, terbium oxide (Tb2O3) film, dysprosium oxide (Dy2O3) film, holmium oxide (Ho2O3) film, thulium oxide (Tm2O3), ytterbium oxide (Yb2O3) film, lutetium oxide (Lu2O3) film, yttrium oxide (Y2O3) film, hafnium nitride film, aluminum nitride film, hafnium oxynitride film and aluminum oxynitride film. As the film forming method of the above-mentioned films, for example, a CVD method, a PVD method and an ALD method can be listed.

[0213] Fig.16 A conceptual diagram of a solid-state imaging device of Embodiment 1 is shown. The amplifying transistor 100 of Embodiment 1 is composed of an imaging region 111 in which stacked imaging elements 101 are arranged in a two-dimensional array, a vertical driving circuit 112 as a driving circuit (peripheral circuit), a column driving processing circuit 113, a horizontal driving circuit 114, an output circuit 115, a driving control circuit 116, and the like. Note that the circuit can of course be constituted by a known circuit, and the circuit can be constituted using other circuit structures (for example, various circuits used in a conventional CCD type solid-state imaging device or a conventional CMOS type solid-state imaging device). Note that the reference numeral "101" is applied only to Fig.16 A row of the stacked imaging element 101.

[0214] The drive control circuit 116 generates a clock signal used as a reference for the operation of the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114 and a control signal to control them based on the vertical synchronization signal, the horizontal drive signal, and the main clock. Then, the generated clock signal and control signal are input to the vertical drive circuit 112, the column signal processing circuit 113, and the horizontal drive circuit 114.

[0215] For example, the vertical drive circuit 112 is composed of a shift register, and sequentially performs selection scanning of the stacked imaging element 101 of the imaging area 111 in the vertical direction in units of rows. Then, a pixel signal (image signal) based on a current (signal) generated according to the amount of light received by each stacked imaging element 101 is sent to the column signal processing circuit 113 through a signal line (data output line) 117 and VSL.

[0216] For example, the column signal processing circuit 113 is configured for each column of the stacked image pickup element 101, and uses a signal from a black reference pixel (although not shown, formed around the effective pixel area) for each image pickup element to perform signal processing such as noise removal or signal amplification on an image signal for one row output from the stacked image pickup element 101. At the output stage of the column signal processing circuit 113, a horizontal selection switch (not shown) is provided to be connected to the horizontal signal line 118.

[0217] The horizontal driving circuit 114 is constituted by a shift register, for example, and sequentially outputs horizontal scanning pulses to sequentially select the column signal processing circuits 113 so that a signal is output from each column signal processing circuit 113 to the horizontal signal line 118 .

[0218] The output circuit 115 performs signal processing on the signals sequentially supplied from the column signal processing circuit 113 through the horizontal signal line 118 , and outputs the resultant signals.

[0219] As shown in the figure, Fig.17 An equivalent circuit diagram showing the imaging element of Example 1 and a modified example of a stacked imaging element (modification 1 of Example 1) is shown. Fig.18 A schematic configuration diagram showing a first electrode and a charge accumulation electrode and transistors constituting a control section, a reset transistor TR1 rst The other source / drain region can be connected to ground instead of V DD .

[0220] For example, the image pickup element and stacked image pickup element of Example 1 can be manufactured by the following method. In other words, an SOI substrate is first prepared. Then, a first silicon layer is formed on the surface of the SOI substrate by an epitaxial growth method, and a p-type silicon layer is formed on the first silicon layer. + Then, a second silicon layer is formed on the first silicon layer by epitaxial growth, and an element isolation region 71, an oxide film 72, a p-type semiconductor region 41 are formed on the second silicon layer. + layer 42, n-type semiconductor region 43 and p +Layer 44. In addition, various transistors and the like constituting the control portion of the imaging element are formed on the second silicon layer, and a wiring layer 62, an interlayer insulating film 76 and various wirings are formed thereon, and then the interlayer insulating film 76 and a supporting substrate (not shown) are bonded together. Thereafter, the SOI substrate is removed to expose the first silicon layer. Note that the surface of the second silicon layer corresponds to the front surface 70A of the semiconductor substrate 70, and the surface of the first silicon layer corresponds to the back surface 70B of the semiconductor substrate 70. In addition, the first silicon layer and the second silicon layer are collectively represented as a semiconductor substrate 70. Then, on the back surface 70B side of the semiconductor substrate 70, an opening portion for forming each contact hole portion 61 is formed, and an HfO2 film 74, an insulating film 75 and a contact hole portion 61 are formed. In addition, a wiring portion 64, a pad portion 66, an interlayer insulating layer 81, a connection hole 65, a connection portion 67, a first electrode 21, a charge accumulation electrode 24 and an insulating layer 82 are formed. Then, the connection portion 68 is opened, and the photoelectric conversion unit 23, the second electrode 22, the protective layer 83, and the on-chip microlens 90 are formed. Thus, the solid-state imaging device of Embodiment 1 can be obtained.

[0221] Or, despite Fig. 10B A schematic partial cross-sectional view showing a modification of the imaging element 11 of Embodiment 1 (showing two imaging elements placed side by side), in which the photoelectric conversion unit 23 may be formed by the lower semiconductor layer 23 DN and the upper photoelectric conversion layer 23 UP The plurality of imaging elements 11 share the upper photoelectric conversion layer 23. UP In other words, in the plurality of imaging elements 11, an upper photoelectric conversion layer 23 is formed in the form of a layer. UP On the other hand, the lower semiconductor layer 23 DN In each imaging element 11, by providing the lower semiconductor layer 23 DN , for example, it is possible to prevent the recombination of charges when charges are accumulated. In addition, the efficiency of charge transfer from the charges accumulated in the photoelectric conversion unit 23 to the first electrode 21 can be improved. In addition, the charges generated in the photoelectric conversion unit 23 can be temporarily held, and the timing of charge transfer can be controlled. In addition, the generation of dark current can be suppressed. UP The material of the photoelectric conversion unit 23 may be appropriately selected from various materials constituting the photoelectric conversion unit 23. DN The material of the upper photoelectric conversion layer 23 is preferably a material with a high band gap energy (for example, a band gap energy value equal to or greater than 3.0 eV) and a mobility higher than that of the upper photoelectric conversion layer 23. UP Specifically, for example, an oxide semiconductor material such as IGZO can be listed. Alternatively, as the material constituting the lower semiconductor layer 23 DNIn the case where the charges to be accumulated are electrons, the materials having a higher charge density than that constituting the upper photoelectric conversion layer 23 can be listed. UP Alternatively, the impurity concentration of the material constituting the lower semiconductor layer is equal to or less than 1×10 18 cm -3 Note that the configuration and structure of Modification 2 of Embodiment 1 can be applied to other embodiments.

[0222] In the imaging element block of the solid-state imaging device of Embodiment 1, since a plurality of first electrodes are connected to the connection portion provided in the interlayer insulating layer, the arrangement state of the first electrodes, the charge accumulation electrode, and the photoelectric conversion portion constituting the imaging element can be in the same arrangement state with respect to the incident light in the imaging element of the imaging element block. Thus, there is no difference in the state in which the charges generated in the imaging element move to the first electrodes depending on the angle of the light incident on the imaging element.

[0223] In addition, in the imaging element of Example 1 or Examples 2 to 9 described below, a charge accumulation electrode is provided which is spaced apart from the first electrode and arranged opposite to the photoelectric conversion unit, and an insulating layer is inserted between the photoelectric conversion unit and the charge accumulation electrode. Therefore, when light is irradiated on the photoelectric conversion unit and photoelectric conversion is performed by the photoelectric conversion unit, a capacitor is formed by the photoelectric conversion unit, the insulating layer and the charge accumulation electrode, and charge can be accumulated in the photoelectric conversion unit. Therefore, it is possible to completely deplete the charge accumulation unit and erase the charge at the beginning of exposure. Thus, the occurrence of the phenomenon that kTC noise increases and random noise deteriorates, thereby causing a decrease in image quality, can be suppressed. In addition, since all pixels can be reset at once, a function generally referred to as a global shutter function can be realized.

[0224] Example 2

[0225] Example 2 is a variation of Example 1. Figure 1B The configuration state of the charge accumulation electrode, the first electrode and the isolation electrode (first isolation electrode) is schematically shown, and Fig.19A A schematic partial cross-sectional view is shown. Note that Fig.19A It is along Figure 1B Schematic partial cross-sectional view taken along the dotted line ABCD shown in FIG. In the solid-state imaging device of Embodiment 2, the imaging element block 10 is surrounded by a continuous isolation electrode (first isolation electrode 28). In addition, as shown in the figure, Figure 2AThe configuration state of the charge accumulation electrode 24, the first electrode 21, the first isolating electrode 28, and the second isolating electrode 29 is shown. The solid-state imaging device of Embodiment 2 can be configured such that a continuous second isolating electrode 29 extending from the first isolating electrode 28 along the second direction is provided between two imaging elements 11 along the first direction. The first isolating electrode 28 and the second isolating electrode 29 are connected to each other. By providing the second isolating electrode 29, it is possible to reliably suppress the charge generated by photoelectric conversion in the imaging element 11 from flowing into the adjacent imaging element in the imaging element block 10. Alternatively, as shown in the figure, Figure 2B Schematically showing the configuration state of the charge accumulation electrode 24, the first electrode 21, and the second isolating electrode 29, the solid-state imaging device of Embodiment 2 may be configured such that the second isolating electrode 29 extending along the second direction is provided between two imaging elements 11 along the first direction. Note that in this case, the first isolating electrode 28 is not provided. In the following description, the first isolating electrode 28 and the second isolating electrode 29 are sometimes collectively referred to as "isolating electrode 27".

[0226] exist Figure 2A , 2B , 4A, 4B, 6A and 6B, the wiring portion 64 is omitted from illustration.

[0227] Here, the first isolating electrode 28 is provided in a region opposite to the region of the photoelectric conversion unit 23 between the adjacent imaging elements 11 constituting the adjacent imaging element block 10 via the insulating layer 82. The first isolating electrode 28 is a lower first isolating electrode. Although the first isolating electrode 28 is formed at the same level as the first electrode 21 or the charge accumulation electrode 24, it may be formed at a different level. Meanwhile, in the imaging element block 10, the second isolating electrode 29 is provided in a region opposite to the region of the photoelectric conversion unit 23 between the adjacent imaging elements 11 constituting the imaging element block 10 via the insulating layer 82. In other words, the second isolating electrode 29 is also a lower second isolating electrode. Although the second isolating electrode 29 is also formed at the same level as the first electrode 21 or the charge accumulation electrode 24, it may be formed at a different level. More specifically, the isolating electrode 27 is formed in a region (a portion 82' of the insulating layer) opposite to the region 23' of the photoelectric conversion unit 23, wherein the insulating layer 82 is interposed between the two regions. In other words, the isolation electrode 27 is formed below the portion 82' of the insulating layer 82 in the region sandwiched between the charge accumulation electrode 24 and another charge accumulation electrode 24 that respectively constitute the adjacent imaging elements 11. The isolation electrode 27 is spaced apart from the charge accumulation electrode 24. Or, in other words, the isolation electrode 27 is spaced apart from the charge accumulation electrode 24 and is arranged to be opposed to the region 23' of the photoelectric conversion unit 23 with the insulating layer 82 interposed therebetween. This can also be applied to Embodiment 3 and Embodiment 4 described below.

[0228] In addition, the potential of the isolation electrode (the first isolation electrode 28) (in the case where the second isolation electrode 29 is provided therein, the potential of the second isolation electrode 29 also) has a fixed value V ES The isolation electrode 27 is connected to the drive circuit. Specifically, the isolation electrode 27 is connected to the vertical drive circuit 112 constituting the drive circuit through the connection portion 27A, the pad portion 27B and the wiring (not shown) provided in the interlayer insulating layer 81. This can also be applied to Embodiment 3 and Embodiment 4 described below.

[0229] In the first imaging element 11, the first electrode 21 and the charge accumulation electrode 24 are formed on the interlayer insulating layer 81 so as to be spaced apart from each other. In addition, the isolation electrode 27 is formed on the interlayer insulating layer 81 so as to be spaced apart from the charge accumulation electrode 24. The interlayer insulating layer 81, the charge accumulation electrode 24, and the isolation electrode 27 are covered by the insulating layer 82. The photoelectric conversion unit 23 is formed on the insulating layer 82, and the second electrode 22 is formed on the photoelectric conversion unit 23. The protective layer 83 is formed on the entire region including the second electrode 22, and the on-chip microlens 90 is provided on the protective layer 83. For example, the first electrode 21, the charge accumulation electrode 24, the isolation electrode 27, and the second electrode 22 are composed of transparent electrodes made of ITO (work function: about 4.4 eV). This can also be applied to Embodiments 3 to 4 described below.

[0230] Next, the operation of the solid-state imaging device according to the second embodiment will be described.

[0231] <Charge accumulation period>

[0232] Specifically, during the charge accumulation period, from the drive circuit, the potential V 11 Applied to the first electrode 21, the potential V 31 is applied to the charge accumulation electrode 24, and the potential V ES is applied to the isolation electrode 27. In addition, the potential V 21 is applied to the second electrode 22. As a result, charges (electrons) are accumulated in the photoelectric conversion section 23. The electrons generated by the photoelectric conversion are attracted to the charge accumulation electrode 24 and are retained in the region of the photoelectric conversion section 23 that is opposite to the charge accumulation electrode 24. In other words, charges are accumulated in the photoelectric conversion section 23. Since V 31 >V 11 Therefore, the electrons generated inside the photoelectric conversion unit 23 do not move to the first electrode 21. In addition, since the potential V 31 Higher than the potential V of the isolation electrode 27 ES, the electrons generated inside the photoelectric conversion unit 23 do not move toward the isolation electrode 27. In other words, the electrons generated by the photoelectric conversion can be suppressed from flowing into the adjacent imaging element 11. As the photoelectric conversion time elapses, the potential in the region of the photoelectric conversion unit 23 that is opposite to the charge accumulation electrode 24 has an increasing negative value. At the end of the charge accumulation period, a reset operation is performed. Therefore, the potential of the first floating diffusion layer FD1 is reset, and the potential (V FD ) becomes the power supply potential V DD .

[0233] <Charge Transfer Period>

[0234] After the reset operation is completed, the charge transfer period begins. During the charge transfer period, the potential V 12 is applied to the first electrode 21, and the potential V 32 is applied to the charge accumulation electrode 24. In addition, the potential V ES is applied to the isolation electrode 27. The electrons remaining in the region of the photoelectric conversion portion 23 opposed to the charge accumulation electrode 24 are read out to the first electrode 21, and further read out to the first floating diffusion layer FD1. In other words, the charges accumulated in the photoelectric conversion portion 23 are read out to the control portion. The potential of the isolation electrode 27 is lower than the potential of the first electrode 21, and lower than the potential of the charge accumulation electrode 24. In other words, V ES <V 32 <V 12 Therefore, the electrons generated inside the photoelectric conversion section 23 flow toward the first electrode 21 and do not move toward the isolation electrode 27. In other words, the electrons generated by the photoelectric conversion can be suppressed from flowing toward the adjacent imaging element 11.

[0235] This completes a series of operations such as charge accumulation, reset operation, and charge transfer.

[0236] In Embodiment 2, since the isolation electrode 27 is provided, it is possible to reliably suppress the charge generated by the photoelectric conversion from flowing into the adjacent imaging element 11 .

[0237] As shown in the figure, Fig.19B is a schematic partial cross-sectional view of a modified example of the imaging element 11 of Example 2 (showing two imaging elements 11 placed side by side), similar to Fig. 10B In the modified example of the solid-state imaging device of the first embodiment shown in FIG. 1 , the photoelectric conversion unit 23 may be formed as the lower semiconductor layer 23 DN and the upper photoelectric conversion layer 23 UP The stacking structure.

[0238] Example 3

[0239] Although Embodiment 3 is a modification of Embodiment 1 and Embodiment 2, it relates to a solid-state imaging device of the second configuration. Figure 3A The configuration state of the charge accumulation electrode 24 and the first electrode 21 is schematically shown. In the solid-state imaging device of Example 3, P=2 is satisfied, and Q is a natural number equal to or greater than 2. In the example shown, Q=2 is satisfied, but this is not restrictive. In addition, the first electrode 21 constituting each of the two imaging elements 11 along the first direction is connected to a connection portion 63 provided in the interlayer insulating layer 81. The connection portion 63 is connected to the contact hole portion 61. In P×Q imaging elements 11, the first electrodes 21 are connected to each other through the connection portion 63. Alternatively, as shown in the figure, Figure 3B The configuration state of the charge accumulation electrode 24, the first electrode 21 and the isolation electrode (first isolation electrode) 28 is schematically shown. In the modified example of the solid-state imaging device of Embodiment 3, the imaging element block 10 is surrounded by the continuous isolation electrode (first isolation electrode) 28. In addition, as shown in the figure, Figure 4A The configuration state of the charge accumulation electrode 24, the first electrode 21, the first isolating electrode 28, and the second isolating electrode 29 is schematically shown. The solid-state imaging device can be configured such that a continuous second isolating electrode 29 extending from the first isolating electrode 28 along the second direction is provided between two imaging elements 11 along the first direction. The first isolating electrode 28 and the second isolating electrode 29 are connected to each other. By providing the second isolating electrode 29, the inflow of charges generated by photoelectric conversion between adjacent imaging elements 11 in the imaging element block 10 can be reliably suppressed. Alternatively, as shown in the figure, Figure 4B Schematically showing the arrangement of the charge accumulation electrode 24, the first electrode 21, and the second isolating electrode 29, the solid-state imaging device can be configured such that the second isolating electrode 29 extending in the second direction is provided between two imaging elements 11 along the first direction. Note that in this case, the first isolating electrode 28 is not provided.

[0240] Since the operation of the solid-state imaging device of Embodiment 3 can be made similar to the operation of the solid-state imaging device described above in conjunction with Embodiments 1 and 2, a detailed description of the operation is omitted.

[0241] Example 4

[0242] Although the fourth embodiment is also a modification of the first and second embodiments, it relates to a solid-state imaging device of the 3A configuration and a solid-state imaging device of the 3B configuration. Figure 5AThe configuration state of the charge accumulation electrode 24 and the first electrode 21 is schematically shown, P=2 and Q=2 are satisfied, and the first electrode 21 constituting the two imaging elements 11 along the second direction is shared, and the shared first electrode 21 is connected to the connection portion 63 provided in the interlayer insulating layer 81. Alternatively, as shown in the figure, Fig. 7A The configuration state of the charge accumulation electrode 24 and the first electrode 21 is schematically shown, P=2 and Q=2 are satisfied, and the first electrode 21 constituting the two imaging elements 11 along the first direction is shared, and the shared first electrode 21 is connected to the connection portion 63 provided in the interlayer insulating layer 81. The connection portion 63 is connected to the contact hole portion 61. In the 2×2 imaging elements 11, the first electrodes 21 are connected to each other through the connection portion 63. However, in the solid-state imaging device of this 3B configuration, the Q value can also be made a natural number equal to or greater than 2 (for example, Q=4).

[0243] Or, as shown, Figure 5B and Figure 7B The configuration state of the charge accumulation electrode 24, the first electrode 21, and the first isolating electrode (first isolating electrode) 28 is schematically shown. In a modified example of the solid-state imaging device of Embodiment 4, the imaging element block 10 is surrounded by a continuous isolating electrode (first isolating electrode) 28. In addition, as shown in the figure, Fig. 6A The configuration state of the charge accumulation electrode 24, the first electrode 21, the first isolating electrode 28, and the second isolating electrode 29 is schematically shown. The solid-state imaging device can be configured such that a continuous second isolating electrode 29 extending from the first isolating electrode 28 along the second direction is provided between two imaging elements 11 along the first direction. The first isolating electrode 28 and the second isolating electrode 29 are connected to each other. By providing the second isolating electrode 29, it is possible to reliably suppress the inflow of charges generated by photoelectric conversion into the adjacent imaging elements 11 of the imaging element block 10. Alternatively, as shown in the figure, Figure 6B Schematically showing the arrangement of the charge accumulation electrode 24, the first electrode 21, and the second isolating electrode 29, the solid-state imaging device can be configured such that the second isolating electrode 29 extending in the second direction is provided between two imaging elements 11 along the first direction. Note that in this case, the first isolating electrode 28 is not provided. Fig. 6A and Figure 6B The structure of the second isolation electrode 29 shown can be applied to Figure 7B The solid-state imaging device shown.

[0244] Since the operation of the solid-state imaging device of Embodiment 4 can be made similar to the operation of the solid-state imaging device described above in conjunction with Embodiments 1 and 2, a detailed description of the operation is omitted.

[0245] Fig. 8A Show Fig. 6A A schematic perspective view of a modified example of the solid-state imaging device of Embodiment 4 shown in FIG. Figure 8B A schematic perspective view showing a modified example of a conventional solid-state imaging device.

[0246] As in Example 1 Figure 2A , 2B 4A, 4B, 6A and 6B, in the solid-state imaging devices of Embodiments 1 to 4, the second isolating electrode 29 is continuous. In other words, the second isolating electrode 29 does not have an end.

[0247] On the other hand, in a conventional solid-state imaging device, for example, it is assumed that one imaging element block is composed of four imaging elements and one first electrode 21' is shared by the four imaging elements. Figure 8B As shown, it is necessary to set the first electrode 21' in the area where the corners of the charge accumulation electrodes 24' constituting the four imaging elements are gathered. In addition, in the case where the second isolation electrode 29' corresponding to the second isolation electrode 29 in the present disclosure is provided in the four imaging elements, it is necessary to set the second isolation electrode 29' to be spaced apart from the first electrode 21' so that the second isolation electrode 29' and the first electrode 21' do not contact each other. In other words, the end portion 29" is necessarily formed on the second isolating electrode 29'. Due to the presence of the end portion 29" of the second isolating electrode 29', the potential generated by forming the second isolating electrode 29' having the end portion 29", the charge accumulation electrode 24 and the first electrode 21' thereon in this manner has a complex potential gradient. Therefore, a situation arises in which, during charge transfer, the charge generated in the photoelectric conversion portion 23 by photoelectric conversion and accumulated in the photoelectric conversion portion 23 does not flow properly and reliably from the photoelectric conversion portion 23 to the first electrode 21'. Specifically, the presence of the end portion 29" of the second isolating electrode 29' may cause a problem in that the amount of charge to be accumulated in the photoelectric conversion portion 23 is reduced, or the charge flows into the first electrode 21' of the adjacent imaging element during charge transfer. As a result, there is a possibility that the reliability of the solid-state imaging device is reduced and the resolution is reduced.

[0248] However, in the solid-state imaging device of the present disclosure, since the second isolating electrode 29 does not have any end, the potential generated by the second isolating electrode 29, the charge accumulation electrode 24, and the first electrode 21 does not have a complex potential gradient, and the charge generated by the photoelectric conversion can be appropriately and reliably flowed from the photoelectric conversion portion 23 to the first electrode 21. Therefore, the occurrence of a reduction in reliability and a reduction in resolution of the solid-state imaging device can be suppressed.

[0249] Furthermore, when focusing on the first electrode 21' and the charge accumulation electrode 24', Fig.43The configuration state of the first electrode and the like of a conventional solid-state imaging device for explaining the first problem is schematically shown. Assuming that light is emitted from Fig.43 Here, if the regions "A", "B", "B", and "C" of the photoelectric conversion unit located above the charge accumulation electrodes 24'1, 24'2, 24'3, and 24'4 are examined, during charge accumulation, since the region "A" is adjacent to the first electrode 21', a portion of the charges generated in the region "A" flows into the first electrode 21'. On the other hand, since the regions "B" and "C" are not adjacent to the first electrode 21', the charges generated in the regions "B" and "C" are less likely to flow into the first electrode 21'. Thus, there is a possibility that the signal output of the imaging element including the charge accumulation electrode 24'1 may become lower than the signal output of the imaging element including the charge accumulation electrodes 24'2, 24'3, and 24'4. In other words, depending on the incident state of light, a situation occurs in which the signal output generated by the imaging element becomes uneven.

[0250] On the other hand, for example, Figure 3A , Figure 3B , Figure 4A and Figure 4B In the solid-state imaging device of the third embodiment shown in FIG. Figure 3A , Figure 3B , Figure 4A and Figure 4B In the case of oblique incidence from the upper left, since the incident direction of light incident on the first electrode 21 and the charge accumulation electrode 24 is the same in the four imaging elements, it is unlikely that unevenness will occur in the signal output generated by the four imaging elements according to the incident state of the light, and this is Figure 3A , Figure 3B , Figure 4A and Figure 4B It is also obvious. Also in other embodiments, similarly, in a plurality of imaging elements in which the configuration of the charge accumulation electrode 24 and the first electrode 21 constituting the imaging element relative to the incident state of light is the same, a situation in which the generated signal output is not uniform is unlikely to occur. As described above, since in one imaging element block, a plurality of first electrodes 21 are connected to the connection portion 63 provided in the interlayer insulating layer 81, and the configuration state of the first electrode 21, the photoelectric conversion portion 23, and the charge accumulation electrode 24 relative to the incident light is the same, the incident direction of the light incident on the first electrode 21 and the charge accumulation electrode 24 is the same. Therefore, the situation in which the signal output generated in the imaging element becomes non-uniform based on the angle of the light incident on the imaging element can be suppressed as much as possible.

[0251] Example 5

[0252] Embodiment 5 is a modified example of Embodiments 1 to 4, and an upper isolating electrode 27 ′ (upper first isolating electrode, upper first isolating electrode and upper second isolating electrode, or upper second isolating electrode) is provided in place of the lower isolating electrode. Fig. 20 FIG. 2 is a schematic cross-sectional view showing a portion of an imaging element (two imaging elements placed side by side) according to Example 5. In the imaging element according to Example 5, a region 23 of the photoelectric conversion unit 23 located between adjacent imaging elements is A On the upper isolating electrode 27', an upper isolating electrode 27' is formed instead of the second electrode 22. The upper isolating electrode 27' is provided to be spaced apart from the second electrode 22. In other words, the second electrode 22 is provided for each imaging element, and the upper isolating electrode 27' is provided on the region -A of the photoelectric conversion unit 23 spaced apart from the second electrode 22, and surrounds at least a portion of the second electrode 22. The upper isolating electrode 27' is formed at the same level as the second electrode 22.

[0253] In addition, as shown in the figure, Fig.21A Schematic cross-sectional view showing a part of the imaging element (two imaging elements placed side by side) of Embodiment 5, the second electrode 22 can be divided into a plurality of pieces so that different potentials are applied to the divided second electrodes 22. Fig.21B As shown, the upper isolation electrode 27 ′ may be disposed between the separated second electrodes 22 .

[0254] The second electrode 22 and the upper isolating electrode 27' can be obtained by forming a material layer for constituting the second electrode 22 and the upper isolating electrode 27' on the photoelectric conversion unit 23 and then patterning the material layer. The second electrode 22 and the upper isolating electrode 27' are respectively connected to different wirings (not shown), and these wirings are connected to the driving circuit. For multiple imaging elements, the wiring connected to the second electrode 22 is shared. For multiple imaging elements, the wiring connected to the upper isolating electrode 27' is also shared.

[0255] In the imaging element of Example 5, during the charge accumulation period, the potential V 21 is applied to the second electrode 22, and the potential V ES is applied to the upper isolation electrode 27', and charges are accumulated in the photoelectric conversion section 23. During the charge transfer, from the drive circuit, the potential V 22 Applied to the second electrode 22, the potential V ES The charge accumulated in the photoelectric conversion unit 23 is applied to the upper isolation electrode 27', and is read out to the control unit through the first electrode 21. Here, since the potential of the first electrode 21 is set higher than the potential of the second electrode 22, V 21 ≥V ES And V 22 ≥VES .

[0256] As described above, in the imaging element of Example 5, since the upper isolating electrode is formed instead of the second electrode on the region of the photoelectric conversion portion located between adjacent imaging elements, the charge generated by photoelectric conversion can be suppressed from flowing into the adjacent imaging element by the upper isolating electrode. Therefore, the quality of the captured video (image) does not deteriorate.

[0257] Fig.22A A schematic cross-sectional view of a portion of a modified example of the imaging element of Example 5 (two imaging elements placed side by side). In this modified example, a second electrode 22 is provided for each imaging element, and an upper isolating electrode 27' is provided to be spaced apart from the second electrode 22 and surround at least a portion of the second electrode 22. Below the upper isolating electrode 27', there is a portion of the charge accumulation electrode 24. The size of the second electrode 22 provided above the charge accumulation electrode 24 is smaller than the size of the charge accumulation electrode 24. In addition, as shown in FIG. Fig. 22B In the example shown, the lower isolation electrode 27 is also disposed below the upper isolation electrode 27'. The size of the second electrode 22 is smaller than Fig.22A In other words, the area of ​​the second electrode 22 that is opposite to the upper isolation electrode 27' is relatively Fig.22A In the illustrated modification, a region of the second electrode 22 that faces the upper isolating electrode 27 ′ is located on the side of the first electrode 21 . The charge accumulation electrode 24 is surrounded by the lower isolating electrode 27 .

[0258] Example 6

[0259] Example 6 is a modification of Example 1 to Example 5. Fig.23 The solid-state imaging device of Example 6 of the schematic partial cross-sectional view shown is a front-illuminated solid-state imaging device. Specifically, the solid-state imaging device is configured to stack a green light imaging element (first imaging element) of Example 1 of a first type including a green light photoelectric conversion unit of a first type that absorbs green light and is sensitive to green light, a conventional blue light imaging element (second imaging element) of a second type including a blue light photoelectric conversion unit of a second type that absorbs blue light and is sensitive to blue light, and a conventional red light imaging element (third imaging element) of a second type including a red light photoelectric conversion unit of a second type that absorbs red light and is sensitive to red light. Here, the red light imaging element (third imaging element) and the blue light imaging element (second imaging element) are arranged in the semiconductor substrate 70 so that the second imaging element is located on the light incident side relative to the third imaging element. In addition, the green light imaging element (first imaging element) is arranged above the blue light imaging element (second imaging element).

[0260] On the front surface 70A side of the semiconductor substrate 70, various transistors constituting the control section are arranged similarly to those in Embodiment 1. The transistors may be arranged and configured to be substantially similar to those described above in conjunction with Embodiment 1. In addition, although the second imaging element and the third imaging element are arranged on the semiconductor substrate 70, these imaging elements may also be arranged and configured to be substantially similar to the second imaging element and the third imaging element described above in conjunction with Embodiment 1.

[0261] An interlayer insulating layer 81 is formed above the front surface 70A of the semiconductor substrate 70, and as necessary, in the interlayer insulating layer 81, the first electrode 21, the photoelectric conversion unit 23, the second electrode 22, and the isolation electrodes 27 and 27' are arranged similarly to the imaging elements of the solid-state imaging devices of Examples 1 to 5.

[0262] In this way, since the composition and structure of the solid-state imaging device of Example 6 can be similar to those of Examples 1 to 5 except that the solid-state imaging device is a front-illuminated type, its detailed description is omitted.

[0263] Example 7

[0264] Example 7 is a variation of Examples 1 to 6.

[0265] As Fig.24 The solid-state imaging device of Example 7 shown in the schematic partial cross-sectional view is a back-illuminated solid-state imaging device, and is configured so that two imaging elements are stacked, namely, the first imaging element of Example 1 of the first type and the second imaging element of the second type. Fig.25 The modified example of the solid-state imaging device of Embodiment 7 shown in the schematic partial cross-sectional view is a front-illuminated solid-state imaging device, and is configured so that two imaging elements are stacked, namely, the first imaging element of Embodiment 1 of the first type and the second imaging element of the second type. Here, the first imaging element absorbs light of a primary color, and the second imaging element absorbs light of a complementary color. Alternatively, the first imaging element absorbs white light, and the second imaging element absorbs infrared light.

[0266] As Fig.26 The modified example of the imaging element of the embodiment 7 shown in the schematic partial cross-sectional view is a back-illuminated solid-state imaging device, and is composed of the first imaging element of the embodiment 1 of the first type. Fig. 27The modified example of the solid-state imaging device of Embodiment 7 of the schematic partial cross-sectional view shown is a front-illuminated solid-state imaging device, and is composed of the first imaging element of Embodiment 1 of the first type. Here, the first imaging element is composed of three different imaging elements including an imaging element that absorbs red light, another imaging element that absorbs green light, and another imaging element that absorbs blue light. As a configuration of a plurality of such imaging elements, a Bayer array can be exemplified. On the light incident side of each imaging element, a color filter for spectrally separating blue, green, and red is configured as needed.

[0267] In addition to the above, since the configuration and structure of the solid-state imaging device of Embodiment 7 can be similar to the configuration and structure of the solid-state imaging device of Embodiments 1 to 5, the detailed description thereof is omitted. Note that the interlayer insulating layer 81 is formed over the front surface 70A of the semiconductor substrate 70, and the first electrode 21, the photoelectric conversion unit 23, the second electrode 22, and the isolation electrodes 27 and 27' are provided in the interlayer insulating layer 81 as necessary, similarly to the imaging element of the solid-state imaging device of Embodiments 1 to 5.

[0268] Instead of providing one imaging element of the first type in Embodiment 1, a form in which two such imaging elements are stacked (i.e., a form in which two photoelectric conversion units are stacked and the control units of the two photoelectric conversion units are provided on a semiconductor substrate) or another form in which three such imaging elements are stacked (i.e., a form in which three photoelectric conversion units are stacked and the control units of the three photoelectric conversion units are provided on a semiconductor substrate) may be used. The following table illustrates an example of a stacking structure of the first type imaging element and the second type imaging element.

[0269]

[0270] Example 8

[0271] Embodiment 8 is a modification of Embodiments 1 to 7, and relates to a solid-state imaging device including the transfer control electrode (charge transfer electrode) of the present disclosure. Fig.28 A schematic partial cross-sectional view showing a part of the solid-state imaging device of Embodiment 8, Fig.29 and Fig.30 An equivalent circuit diagram of a solid-state imaging device according to Embodiment 8 is shown. Fig.31 A schematic configuration diagram showing a first electrode, a transfer control electrode, and a charge accumulation electrode constituting an imaging element of a solid-state imaging device according to Embodiment 8, and a transistor constituting a control unit. Fig.32 and Fig.33 The potential states of various parts during operation of the imaging element of Example 8 are shown. Fig. 15B An equivalent circuit diagram of each part of the imaging element of Example 8 is shown.

[0272] The solid-state imaging device of Embodiment 8 further includes a transfer control electrode (charge transfer electrode) 25 disposed between the first electrode 21 and the charge accumulation electrode 24, spaced from the first electrode 21 and the charge accumulation electrode 24, and disposed opposite to the photoelectric conversion unit 23, with an insulating layer 82 interposed between the photoelectric conversion unit and the transfer control electrode. The transfer control electrode 25 is connected to the photoelectric conversion unit 23 via a connection portion 25B provided in the interlayer insulating layer 81, a pad portion 25A, and a wiring V OT Connected to the pixel driving circuit constituting the driving circuit.

[0273] Below, refer to Fig.32 and Fig.33 The operation of the imaging element (first imaging element) of Embodiment 8 will be described. Fig.32 and 33 , the potential applied to the charge accumulation electrode 24 and the potential at the point PC are different in value.

[0274] During the charge accumulation period, from the drive circuit, the potential V 11 Applied to the first electrode 21, the potential V 31 is applied to the charge accumulation electrode 24, and the potential V 41 is applied to the transfer control electrode 25. Photoelectric conversion occurs in the photoelectric conversion section 23 by light being incident on the photoelectric conversion section 23. Positive holes generated by the photoelectric conversion pass through the wiring V OU On the other hand, since the potential of the first electrode 21 is set higher than that of the second electrode 22, that is, since, for example, a positive potential is applied to the first electrode 21 and a negative potential is applied to the second electrode 22, V 31 >V 41 (For example, V 31 >V 11 >V 41 or V 11 >V 31 >V 41 ). Therefore, the electrons generated by the photoelectric conversion are attracted to the charge accumulation electrode 24, and stay in the region of the photoelectric conversion section 23 that is opposite to the charge accumulation electrode 24. In other words, the charges are accumulated in the photoelectric conversion section 23. Since V 31 >V 41 , thus electrons generated inside the photoelectric conversion section 23 can be reliably prevented from moving toward the first electrode 21. As the photoelectric conversion time elapses, the potential value in the region of the photoelectric conversion section 23 opposing the charge accumulation electrode 24 increases in the negative direction.

[0275] At the end of the charge accumulation period, a reset operation is performed. Therefore, the potential of the first floating diffusion layer FD1 is reset, and the potential of the first floating diffusion layer FD1 becomes the power supply potential VDD .

[0276] After the reset operation is completed, the charge is read out. In other words, during the charge transfer period, from the drive circuit, the potential V 12 Applied to the first electrode 21, the potential V 32 is applied to the charge accumulation electrode 24, and the potential V 42 is applied to the transfer control electrode 25. Here, it is assumed that V 32 ≤V 42 ≤V 12 (Preferably, V 32 <V 42 <V 12 ). Thus, the electrons remaining in the region of the photoelectric conversion portion 23 opposing the charge accumulation electrode 24 are reliably read out to the first electrode 21, and further to the first floating diffusion layer FD1. In other words, the charges accumulated in the photoelectric conversion portion 23 are read out to the control portion.

[0277] Thereby, a series of operations of charge accumulation, reset operation, and charge transfer are completed.

[0278] After the electrons are read out into the first floating diffusion layer FD1, the amplifying transistor TR1 amp and select transistor TR1 sel The operation is the same as that of a conventional amplifying transistor and a selecting transistor. In addition, for example, a series of operations such as charge accumulation, reset operation, and charge transfer of the second imaging element and the third imaging element are similar to a series of operations such as conventional charge accumulation, reset operation, and charge transfer.

[0279] As shown in the figure, Fig.34 A schematic configuration diagram showing a first electrode and a charge storage electrode constituting a modification of the image pickup element of Example 8 and transistors constituting a control unit, wherein the reset transistor TR1 rst The other source / drain region 51B may be grounded instead of being connected to the power supply V DD .

[0280] Furthermore, a plurality of transfer control electrodes may be provided from a position closest to the first electrode 21 toward the charge accumulation electrode 24 .

[0281] Example 9

[0282] Embodiment 9 is a modification of Embodiments 1 to 8 and relates to an image pickup element or the like including the charge discharge electrode of the present disclosure. Fig.35 A schematic partial cross-sectional view showing a part of the image pickup element of Example 9.

[0283] The imaging element of Example 9 also includes a charge discharge electrode 26 connected to the photoelectric conversion unit 23 through a connecting portion 26A and configured to be spaced apart from the first electrode 21 and the charge accumulation electrode 24. Here, the charge discharge electrode 26 is configured to surround the first electrode 21 and the charge accumulation electrode 24 (i.e., in the form of a picture frame). The charge discharge electrode 26 is connected to a pixel driving circuit constituting a driving circuit. The photoelectric conversion unit 23 extends in the connecting portion 26A. In other words, the photoelectric conversion unit 23 extends in the second opening portion 85 provided in the insulating layer 82 and is connected to the charge discharge electrode 26. The charge discharge electrode 26 is shared (commonly used) by a plurality of imaging elements. For example, the charge discharge electrode 26 can be used as a floating diffusion portion or an overflow drain of the photoelectric conversion unit 23. In the case where it is difficult to simultaneously provide the charge discharge electrode 26 and the lower isolation electrode 27, it is sufficient to provide the upper isolation electrode 27'.

[0284] In Example 9, during the charge accumulation period, the potential V 11 Applied to the first electrode 21, the potential V 31 is applied to the charge accumulation electrode 24, and the potential V 51 The charge is applied to the charge discharge electrode 26, and the charge is accumulated in the photoelectric conversion section 23. Photoelectric conversion is performed in the photoelectric conversion section 23 by the light incident on the photoelectric conversion section 23. The positive holes generated by the photoelectric conversion are transferred through the wiring V OU On the other hand, since the potential of the first electrode 21 is set higher than that of the second electrode 22, that is, for example, since a positive potential is applied to the first electrode 21 and a negative potential is applied to the second electrode 22, V 51 ≥V 11 (For example, V 31 >V 51 >V 11 ). Thus, the electrons generated by the photoelectric conversion are attracted to the charge accumulation electrode 24 and are retained in the region of the photoelectric conversion unit 23 opposite to the charge accumulation electrode 24, and can be reliably prevented from moving toward the first electrode 21. However, if the attraction of the charge accumulation electrode 24 is insufficient or the electrons remain without being accumulated in the photoelectric conversion unit 23 (generally referred to as overflow electrons), the electrons are sent to the drive circuit through the charge discharge electrode 26.

[0285] At the end of the charge accumulation period, a reset operation is performed. Therefore, the potential of the first floating diffusion layer FD1 is reset, and the potential of the first floating diffusion layer FD1 becomes the potential V of the power supply. DD .

[0286] After the reset operation is completed, the charge is read out. In other words, during the charge transfer period, from the drive circuit, the potential V 12Applied to the first electrode 21, the potential V 32 is applied to the charge accumulation electrode 24, and the potential V 52 is applied to the charge discharge electrode 26. Here, V 52 <V 12 (For example, V 52 <V 32 <V 12 ). Thus, the electrons remaining in the region of the photoelectric conversion portion 23 opposing the charge accumulation electrode 24 are reliably read out to the first electrode 21, and further to the first floating diffusion layer FD1. In other words, the charges accumulated in the photoelectric conversion portion 23 are read out to the control portion.

[0287] Thereby, a series of operations of charge accumulation, reset operation, and charge transfer are completed.

[0288] After the electrons are read out into the first floating diffusion layer FD1, the amplifying transistor TR1 amp and select transistor TR1 sel The operation is the same as that of a conventional amplifying transistor and a selecting transistor. In addition, for example, a series of operations such as charge accumulation, reset operation, and charge transfer of the second imaging element and the third imaging element are similar to a series of operations such as conventional charge accumulation, reset operation, and charge transfer.

[0289] In Embodiment 9, since the so-called overflow electrons are sent to the drive circuit through the charge discharge electrode 26, the electrons can be prevented from leaking into the charge accumulation portion of the adjacent pixel and the occurrence of halation can be prevented. Therefore, the imaging performance of the imaging element can be improved.

[0290] Although the present disclosure has been described based on the preferred embodiments, the present disclosure is not limited to the embodiments. The structure and composition, manufacturing conditions, manufacturing method and materials used of the solid-state imaging device described with reference to the embodiments are exemplary and can be appropriately changed. The imaging elements described in the embodiments can be appropriately combined.

[0291] In some cases, the floating diffusion layers FD2 , FD3 , 45C, and 46C as described above may also be shared.

[0292] In addition, as shown in the figure, for example, in combination with Example 1, Fig.36 As a modified example of the solid-state imaging device described above, the solid-state imaging device may be configured such that light is incident from the side of the second electrode 22, and the light shielding layer 92 is formed on the light incident side and not close to the second electrode 22. Note that various wirings provided on the light incident side relative to the photoelectric conversion unit may also be used as light shielding layers.

[0293] Note that although Fig.36In the example shown, the light shielding layer 92 is formed above the second electrode 22, that is, although the light shielding layer 92 is formed above the light incident side of the first electrode 21 and not close to the second electrode 22, Fig.37 As shown, the light shielding layer 92 may also be disposed on the surface of the second electrode 22 on the light incident side. Fig.38 As shown, the light shielding layer 92 may be formed on the second electrode 22 .

[0294] Alternatively, a structure may be adopted in which light is incident from the second electrode 22 side and light is not incident on the first electrode 21. Specifically, Fig.36 As shown, the light shielding layer 92 is formed above the first electrode 21 on the light incident side and not close to the second electrode 22. Alternatively, Fig.40 This structure shown can be used for the on-chip microlens 90 to be arranged above the charge accumulation electrode 24 and the second electrode 22, so that the light incident on the on-chip microlens 90 is focused on the charge accumulation electrode 24 and does not reach the first electrode 21. Note that in the case where the transfer control electrode 25 is arranged as described above in conjunction with Embodiment 11, a form in which the light is not incident on the first electrode 21 and the transfer control electrode 25 can be adopted, and specifically, as Fig.39 As shown, a structure in which the light shielding layer 92 is formed above the first electrode 21 and the transmission control electrode 25 may be adopted. Alternatively, a structure in which the light incident on the on-chip microlens 90 does not reach the first electrode 21 or the first electrode 21 and the transmission control electrode 25 may be adopted.

[0295] By adopting such a configuration or structure as described above, or by providing a light shielding layer 92 or designing an on-chip microlens 90, light is incident only on a portion of the photoelectric conversion unit 23 located above the charge accumulation electrode 24, and a portion of the photoelectric conversion unit 23 located above the first electrode 21 (or above the first electrode 21 and the transfer control electrode 25) does not contribute to photoelectric conversion. Therefore, all pixels can be reset at once with higher accuracy, and a global shutter function can be more easily realized. In other words, in a driving method of a solid-state imaging device including a plurality of imaging elements having such a configuration or structure as described above, the following steps are repeated: while charges are accumulated in the photoelectric conversion unit 23, in all imaging elements, the charges in the first electrode 21 are all discharged to the outside of the system at once; then, in all imaging elements, the charges accumulated in the photoelectric conversion unit 23 are all transferred to the first electrode 21 at once, and after the transfer is completed, the charges transferred to the first electrode 21 in each imaging element are sequentially read out.

[0296] In such a driving method for a solid-state imaging device as described above, each imaging element is configured so that light incident from the second electrode side does not enter the first electrode, and in all imaging elements, when the charge is accumulated in the photoelectric conversion unit, the charge in the first electrode is discharged to the outside of the system at once. Therefore, the resetting of the first electrode can be reliably performed all at once in all imaging elements. Afterwards, in all imaging elements, the charge accumulated in the photoelectric conversion unit is transferred to the first electrode, and after the transfer is completed, the charge transferred to the first electrode in the imaging element is read out in sequence. Therefore, the so-called global shutter function can be more easily realized.

[0297] Although in the embodiment, electrons are signal charges and the conductivity type of the photoelectric conversion unit formed on the semiconductor substrate is n-type, the technology according to the present disclosure can be applied to a solid-state imaging device in which positive holes are signal charges. In this case, it is sufficient as long as each semiconductor region is formed of a semiconductor region of the opposite conductivity type, and it is sufficient as long as the conductivity type of the photoelectric conversion unit formed on the semiconductor substrate is p-type.

[0298] In addition, although the embodiment is described by taking the CMOS type solid-state imaging device in which the unit pixels are configured in rows and columns according to the technology disclosed in the present invention and are applicable to detecting the signal charge as a physical quantity based on the amount of incident light, the application of the technology disclosed in the present invention is not limited to the CMOS type amplifier transistor, and the technology disclosed in the present invention can also be applied to the CCD type amplifier transistor. In the latter case, the signal charge is transmitted in the vertical direction through the vertical transfer register of the CCD type structure, and in the horizontal direction through the horizontal transfer register, and then amplified to output the pixel signal (image signal). In addition, the solid-state imaging device is not limited to a column-type solid-state imaging device in which the pixels are usually formed in a two-dimensional matrix and a column signal processing circuit is configured for each pixel column. In addition, in some cases, the selection transistor can also be omitted.

[0299] Furthermore, the application of the solid-state imaging device of the present disclosure is not limited to that of a solid-state imaging device that detects and captures the distribution of the incident light amount of visible light as an image, but the solid-state imaging device of the present disclosure can also be applied to a solid-state imaging device that captures the distribution of the incident light amount of infrared light, X-rays, particles, etc. as an image. Furthermore, in a broad sense, the solid-state imaging device of the present disclosure can be applied to a solid-state imaging device (physical quantity distribution detection device) such as a fingerprint detection sensor that generally detects and captures the distribution of any other physical quantity such as pressure or capacitance.

[0300] In addition, the solid-state imaging device of the present disclosure is not limited to a solid-state imaging device that sequentially scans unit pixels in an imaging area in units of rows to read out pixel signals from each unit pixel. The solid-state imaging device of the present disclosure can also be applied to an XY address type solid-state imaging device that selects any pixel in units of pixels to read out pixel signals from the selected pixels in units of pixels. The solid-state imaging device can be formed as a chip or can be formed as a module with an imaging function in which an imaging area and a driving circuit or an optical system are packaged together.

[0301] In addition, the technology according to the present disclosure is not limited to solid-state imaging devices, but can also be applied to imaging devices. Here, the imaging device refers to a camera system such as a digital camera or a video camera, and an electronic device having an imaging function such as a mobile phone. An imaging sensor sometimes has the form of a module incorporated in an electronic device, that is, an imaging sensor is sometimes formed as a camera module.

[0302] As an example, a solid-state imaging device 201 constituted by the solid-state imaging device of the present disclosure is used in an electronic device (camera) 200. Fig.41 Conceptual diagram in FIG. The electronic device 200 includes a solid-state imaging device 201, an optical lens 210, a shutter device 211, a drive circuit 212, and a signal processing circuit 213. The optical lens 210 forms an image of image light (incident light) from a photographic object on an imaging plane of the solid-state imaging device 201. Therefore, signal charge is accumulated in the solid-state imaging device 201 during a fixed period. The shutter device 211 controls the light irradiation period and the light shielding period of the solid-state imaging device 201. The drive circuit 212 provides a drive signal for controlling the transmission operation of the solid-state imaging device 201 and the shutter operation of the shutter device 211. In response to the drive signal (timing signal) provided from the drive circuit 212, signal transmission of the solid-state imaging device 201 is performed. The signal processing circuit 213 performs various signal processing. The video signal that has been subjected to signal processing is stored in a storage medium such as a memory, or output to a monitor. In such an electronic device 200 as described above, since it is possible to achieve refinement of the pixel size and improvement of the transmission efficiency of the solid-state imaging device 201, it is possible to obtain an electronic device 200 with improved pixel characteristics. The electronic device 200 to which the solid-state imaging device 201 can be applied is not limited to a camera, but can be applied to an imaging sensor such as a camera module for a mobile device such as a digital camera or a mobile phone.

[0303] In the case where P=2 and Q=2 are satisfied in the solid-state imaging device of Embodiment 3 or the solid-state imaging device of Embodiment 4, the driving method described below can be adopted. Fig.42 As shown in the schematic diagram of FIG. 1 , it is assumed that four imaging elements 11 constituting one imaging element block 2p+1，2q+1 , 11 2p+1，2q+2 , 112p+2，2q+1 and 11 2p+2，2q+2 (where p is 0 or a positive integer and q is 0 or a positive integer). 2p+1，2q+1 The charge accumulation electrode 24 is connected to the (2q+1)th horizontal driving line L 2q+1 . Image sensor 11 2p+1，2q+2 The charge accumulation electrode 24 is connected to the (2q+2)th horizontal driving line L 2q+2 . Image sensor 11 2p+2，2q+1 The charge accumulation electrode 24 is connected to the (2q)th horizontal driving line L 2q . Image sensor 11 2p+2，2q+2 The charge accumulation electrode 24 is connected to the (2q+3)th horizontal driving line L 2q+3 .

[0304] By configuring the solid-state imaging device in the manner described above, although four horizontal drive lines are generally required to drive the charge accumulation electrodes in the four imaging elements constituting one imaging element block, the number of horizontal drive lines can be reduced to two. 2q , L 2q+1 , L 2q+2 and L 2q+3 , it is possible to read out the image pickup element 11 2p+1，2q+1 , 11 2p+1，2q+2 , 11 2p+2，2q+1 and 11 2p+2，2q+2 The charge in .

[0305] The technology according to the present disclosure (the present technology) can be applied to various products. For example, the technology according to the present disclosure can be implemented as a device incorporated into any of various mobile bodies such as automobiles, electric vehicles, hybrid electric vehicles, motorcycles, bicycles, personal mobile devices, airplanes, drones, ships, robots, etc.

[0306] Fig.44 : is a block diagram showing a schematic configuration example of a vehicle control system as an example of a mobile object control system to which the technology according to the embodiment of the present disclosure is applied.

[0307] The vehicle control system 12000 includes a plurality of electronic control units connected to each other via a communication network 12001. Fig.44 In the example shown, the vehicle control system 12000 includes a drive system control unit 12010, a body system control unit 12020, an external information detection unit 12030, an internal information detection unit 12040, and an integrated control unit 12050. In addition, a microcomputer 12051, a sound / image output unit 12052, and an in-vehicle network interface (I / F) 12053 are shown as the functional configuration of the integrated control unit 12050.

[0308] The drive system control unit 12010 controls the operation of devices related to the drive system of the vehicle according to various programs. For example, the drive system control unit 12010 serves as a control device for a drive force generating device such as an internal combustion engine or a drive motor for generating a drive force of the vehicle, a drive force transmitting mechanism for transmitting the drive force to the wheels, a steering mechanism for adjusting the steering angle of the vehicle, and a braking device for generating a braking force of the vehicle.

[0309] The body system control unit 12020 controls the operation of various devices provided on the vehicle body according to various programs. For example, the body system control unit 12020 functions as a control device for the following devices: a keyless entry system; a smart key system; an automatic window device; or various lights such as headlights, taillights, brake lights, turn signal lights, or fog lights. In this case, radio waves or signals of various switches transmitted from a mobile device that replaces the key can be input to the body system control unit 12020. The body system control unit 12020 receives these input radio waves or signals and controls the door lock device, automatic window device, or lights of the vehicle.

[0310] The vehicle exterior information detection unit 12030 detects external information of the vehicle including the vehicle control system 12000. For example, the vehicle exterior information detection unit 12030 is connected to the camera unit 12031. The vehicle exterior information detection unit 12030 causes the camera unit 12031 to capture an image of the vehicle exterior and receives the captured image. Based on the received image, the vehicle exterior information detection unit 12030 can perform detection processing or distance detection processing on objects such as pedestrians, vehicles, obstacles, traffic signs, or letters on the road surface.

[0311] The imaging unit 12031 is an optical sensor that receives light and outputs an electrical signal corresponding to the amount of light received. The imaging unit 12031 can output the electrical signal as an image, or output the electrical signal as information related to distance measurement. In addition, the light received by the imaging unit 12031 can be visible light or non-visible light such as infrared light.

[0312] The in-vehicle information detection unit 12040 detects information about the interior of the vehicle. For example, the in-vehicle information detection unit 12040 is connected to a driver state detection unit 12041 that detects the state of the driver. For example, the driver state detection unit 12041 includes a camera that photographs the driver. Based on the detection information input from the driver state detection unit 12041, the in-vehicle information detection unit 12040 can calculate the driver's fatigue level or the driver's concentration level, or can determine whether the driver is dozing off.

[0313] The microcomputer 12051 can calculate the control target value of the driving force generating device, the steering mechanism or the braking device based on the information inside or outside the vehicle obtained by the vehicle exterior information detection unit 12030 or the vehicle interior information detection unit 12040, and output the control command to the driving system control unit 12010. For example, the microcomputer 12051 can perform coordinated control for realizing the functions of the advanced driver assistance system (ADAS), which includes: collision avoidance or impact reduction of the vehicle, following driving based on the following distance, speed maintenance driving, collision warning of the vehicle, and lane departure warning of the vehicle.

[0314] In addition, the microcomputer 12051 can also control the driving force generating device, the steering mechanism, and the braking device based on the information related to the outside or inside of the vehicle obtained by the outside information detection unit 12030 or the inside information detection unit 12040, thereby performing collaborative control of automatic driving aimed at achieving autonomous driving of the vehicle without relying on the driver's operation.

[0315] In addition, the microcomputer 12051 can output a control command to the body system control unit 12020 based on the information related to the exterior of the vehicle acquired by the exterior information detection unit 12030. For example, the microcomputer 12051 can perform cooperative control aimed at preventing glare by controlling the headlights to switch from high beam to low beam according to the position of the preceding vehicle or the oncoming vehicle detected by the exterior information detection unit 12030.

[0316] The sound / image output unit 12052 sends an output signal of at least one of sound and image to an output device capable of visually or auditorily notifying passengers on the vehicle or the outside of the vehicle of information. Fig.44 In the example of FIG. 1 , an audio speaker 12061, a display portion 12062, and an instrument panel 12063 are shown as output devices. For example, the display portion 12062 may include at least one of an in-vehicle display and a head-up display.

[0317] Fig.45 The figure shows an example of the installation position of the camera unit 12031.

[0318] exist Fig.45 In the figure, the camera unit 12031 includes camera units 12101, 12102, 12103, 12104 and 12105.

[0319] For example, the camera units 12101, 12102, 12103, 12104 and 12105 are arranged at the following positions: the front nose, rearview mirror, rear bumper, trunk door and the upper part of the windshield in the vehicle 12100. The camera unit 12101 arranged at the front nose and the camera unit 12105 arranged at the upper part of the windshield in the vehicle mainly obtain the front image of the vehicle 12100. The camera units 12102 and 12103 arranged at the rearview mirror mainly obtain the side image of the vehicle 12100. The camera unit 12104 arranged at the rear bumper or the trunk door mainly obtains the rear image of the vehicle 12100. The camera unit 12105 arranged at the upper part of the windshield in the vehicle is mainly used to detect the front vehicle, pedestrians, obstacles, traffic lights, traffic signs, or lanes, etc.

[0320] By the way, Fig.45 An example of the photographing range of the camera units 12101 to 12104 is shown. The photographing range 12111 indicates the photographing range of the camera unit 12101 provided at the front nose. The photographing ranges 12112 and 12113 respectively indicate the photographing ranges of the camera units 12102 and 12113 provided at the rearview mirror. The photographing range 12114 indicates the photographing range of the camera unit 12104 provided at the rear bumper or the trunk door. For example, by superimposing the image data photographed by the camera units 12101 to 12104, a bird's-eye view image of the vehicle 12100 when viewed from above is obtained.

[0321] At least one of the imaging units 12101 to 12104 may have a function of acquiring distance information. For example, at least one of the imaging units 12101 to 12104 may be a stereo camera composed of a plurality of imaging elements, or may be an imaging element having pixels for phase difference detection.

[0322] For example, the microcomputer 12051 can determine the distance to each three-dimensional object within the imaging range 12111 to 12114 and the change of the distance over time (relative speed relative to the vehicle 12100) based on the distance information obtained from the imaging units 12101 to 12104, thereby being able to extract the following three-dimensional object as the leading vehicle: in particular, the three-dimensional object is closest to the vehicle 12100 on the driving road and is traveling at a predetermined speed (for example, greater than or equal to 0 km / h) in the same direction as the vehicle 12100. In addition, the microcomputer 12051 can pre-set the following distance to be maintained in front of the leading vehicle, and can perform automatic braking control (including follow-up stop control) or automatic acceleration control (including follow-up start control), etc. Therefore, it is possible to perform cooperative control of automatic driving that is intended to achieve autonomous driving of the vehicle without relying on the driver's operation, etc.

[0323] For example, based on the distance information obtained from the camera units 12101 to 12104, the microcomputer 12051 can classify the three-dimensional object data about the three-dimensional object into three-dimensional object data of two-wheeled vehicles, ordinary vehicles, large vehicles, pedestrians or telephone poles, and other three-dimensional objects, extract the classified three-dimensional object data, and use the extracted three-dimensional object data to automatically avoid obstacles. For example, the microcomputer 12051 identifies obstacles around the vehicle 12100 as obstacles that the driver of the vehicle 12100 can visually identify and obstacles that the driver of the vehicle 12100 cannot visually identify. Then, the microcomputer 12051 determines the collision risk used to represent the risk of collision with each obstacle. When the collision risk is equal to or higher than the set value and therefore there is a possibility of collision, the microcomputer 12051 outputs a warning to the driver through the audio speaker 12061 or the display unit 12062, or performs forced deceleration or avoidance steering through the drive system control unit 12010. Thus, the microcomputer 12051 can assist driving to avoid collisions.

[0324] At least one of the camera units 12101 to 12104 may be an infrared camera that detects infrared rays. For example, the microcomputer 12051 may identify a pedestrian by determining whether there is a pedestrian in the image captured by the camera units 12101 to 12104. For example, such identification of pedestrians is performed by performing the following process: extracting feature points in the captured images of the camera units 12101 to 12104 as infrared cameras; and determining whether the object is a pedestrian by performing pattern matching processing on a series of feature points representing the contour of the object. When the microcomputer 12051 determines that there is a pedestrian in the image captured by the camera units 12101 to 12104 and thus identifies the pedestrian, the sound / image output unit 12052 controls the display unit 12062 so that a rectangular contour line for emphasis is superimposed and displayed on the recognized pedestrian. The sound / image output unit 12052 may control the display unit 12062 so that an icon or the like for indicating a pedestrian is displayed at a desired position.

[0325] Furthermore, for example, the technology according to the present disclosure can be applied to an endoscopic surgery system.

[0326] Fig.46 is a diagram showing an example of a schematic configuration of an endoscopic surgery system to which the technology according to an embodiment of the present disclosure (the present technology) can be applied.

[0327] exist Fig.46, a state is shown in which a surgeon (doctor) 11131 performs surgery on a patient 11132 on a bed 11133 using an endoscopic surgery system 11000. As shown in the figure, the endoscopic surgery system 11000 includes an endoscope 11100, other surgical tools 11110 such as a pneumoperitoneum tube 11111 or an energy device 11112, a support arm device 11120 supporting the endoscope 11100, and a cart 11200 on which various devices for endoscopic surgery are installed.

[0328] The endoscope 11100 includes: a barrel 11101, a region of which has a predetermined length from a distal end is inserted into a body cavity of a patient 11132; and a camera 11102 connected to a proximal end of the barrel 11101. In the example shown, the endoscope 11100 is configured as a rigid endoscope having a rigid barrel 11101. However, the endoscope 11100 may also be configured as a flexible endoscope having a flexible barrel 11101.

[0329] The lens barrel 11101 has an opening portion at its distal end in which an objective lens is mounted. The light source device 11203 is connected to the endoscope 11100 so that the light generated by the light source device 11203 is guided to the distal end of the lens barrel through a light guide member extending inside the lens barrel 11101 and illuminates the observation object in the body cavity of the patient 11132 through the objective lens. Note that the endoscope 11100 may be a forward-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0330] The optical system and the image sensor are arranged inside the camera head 11102 so that the reflected light (observation light) from the observation object is focused on the imaging element through the optical system. The observation light is photoelectrically converted by the imaging element to generate an electrical signal corresponding to the observation light, that is, an image signal corresponding to the observation image. The image signal is sent to the camera control unit (CCU: camera control unit) 11201 as raw data.

[0331] The CCU 11201 includes a central processing unit (CPU), a graphics processing unit (GPU), etc., and integrally controls the operations of the endoscope 11100 and the display device 11202. In addition, the CCU 11201 receives an image signal from the camera 11102, and performs various image processing such as development processing (demosaic processing) on ​​the image signal for displaying an image based on the image signal.

[0332] The display device 11202 displays an image based on an image signal on which image processing has been performed by the CCU 11201 , under the control of the CCU 11201 .

[0333] For example, the light source device 11203 includes a light source such as a light emitting diode (LED), and provides irradiation light to the endoscope 11100 when photographing a surgical site.

[0334] The input device 11204 is an input interface of the endoscopic surgery system 11000. The user can input various types of information or command input to the endoscopic surgery system 11000 via the input device 11204. For example, the user inputs commands and the like through the endoscope 11100 to change imaging conditions (type of irradiation light, magnification, focal length, etc.).

[0335] The treatment instrument control device 11205 controls the driving of the energy device 11112 for cauterizing or cutting tissue, sealing blood vessels, etc. The pneumoperitoneum device 11206 delivers gas to the body cavity of the patient 11132 through the pneumoperitoneum tube 11111 to expand the body cavity, thereby ensuring the field of view of the endoscope 11100 and ensuring the working space of the surgeon. The recorder 11207 is a device capable of recording various types of information related to the operation. The printer 11208 is a device capable of printing various information related to the operation in various forms such as text, images, or charts.

[0336] Note that when photographing the surgical site, the light source device 11203 that provides irradiation light to the endoscope 11100 may include a white light source, which includes, for example, an LED, a laser light source, or a combination thereof. When the white light source includes a combination of red, green, and blue (RGB) laser light sources, since the output intensity and output timing for each color (each wavelength) can be controlled with high precision, the white balance of the captured image can be adjusted by the light source device 11203. In addition, in this case, if the laser beams from each of the RGB laser light sources are irradiated to the observed object in a time-division manner, and the driving of the imaging element of the camera 11102 is controlled synchronously with the irradiation timing. Images corresponding to the colors R, G, and B, respectively, can be captured in a time-division manner. According to this method, a color image can be obtained even without a color filter being set for the imaging element.

[0337] In addition, the light source device 11203 can be controlled to change the intensity of the light to be output at a predetermined time. By controlling the drive of the imaging element of the camera 11102 in synchronization with the timing of the change in light intensity, images are acquired in a time-division manner, and the images are synthesized, so that a high dynamic range image without underexposed blocked up shadows and overexposed highlights can be generated.

[0338] In addition, the light source device 11203 can be configured to provide light of a predetermined wavelength band for special light observation. In special light observation, for example, by utilizing the wavelength dependence of light absorption in human tissue to irradiate light of a narrower band than the irradiation light (i.e., white light) during conventional observation, narrow-band observation (narrow-band imaging) for imaging predetermined tissues such as blood vessels in the surface layer of the mucosa with high contrast can be performed. Alternatively, in special light observation, fluorescence observation for obtaining an image by irradiating fluorescence generated by excitation light can be performed. In fluorescence observation, fluorescence from human tissue can be observed by irradiating excitation light onto the human tissue (autofluorescence observation), or a fluorescent image can be obtained by locally injecting a reagent such as indocyanine green (ICG) into the human tissue and irradiating excitation light corresponding to the fluorescence wavelength of the reagent onto the human tissue. The light source device 11203 can be configured to provide such narrow-band light and / or excitation light suitable for special light observation as described above. .

[0339] Fig.47 It shows Fig.46 A block diagram of an example of the functional configuration of the camera 11102 and CCU 11201 shown in FIG.

[0340] The camera 11102 includes a lens unit 11401, an imaging unit 11402, a driving unit 11403, a communication unit 11404, and a camera control unit 11405. The CCU 11201 includes a communication unit 11411, an image processing unit 11412, and a control unit 11413. The camera 11102 and the CCU 11201 are communicatively connected via a transmission cable 11400.

[0341] The lens unit 11401 is an optical system provided at a portion connected to the lens barrel 11101. Observation light incident from the distal end of the lens barrel 11101 is guided to the camera 11102 and enters the lens unit 11401. The lens unit 11401 includes a combination of a plurality of lenses including a zoom lens and a focus lens.

[0342] The number of imaging elements included in the imaging unit 11402 can be one (single-board type) or multiple (multi-board type). In the case where the imaging unit 11402 is constructed as a multi-board type imaging element, for example, image signals corresponding to each of R, G, and B are generated by the imaging element, and a color image can be obtained by synthesizing these image signals. The imaging unit 11402 can also be constructed to have a pair of imaging elements for respectively acquiring a right eye image signal and a left eye image signal prepared for three-dimensional (3D) display. If 3D display is performed, the surgeon 11131 can more accurately grasp the depth of the biological tissue in the surgical area. It should be noted that in the case where the imaging unit 11402 is constructed as a stereoscopic type imaging element, a plurality of lens unit 11401 systems are provided corresponding to each imaging element.

[0343] In addition, the imaging unit 11402 may not necessarily be disposed in the camera head 11102. For example, the imaging unit 11402 may be disposed inside the lens barrel 11101 and immediately behind the objective lens.

[0344] The driving unit 11403 includes an actuator, and under the control of the camera control unit 11405, the driving unit 11403 moves the zoom lens and the focus lens of the lens unit 11401 by a predetermined distance along the optical axis. Therefore, the magnification and focus of the image captured by the camera unit 11402 can be appropriately adjusted.

[0345] The communication unit 11404 includes a communication device for transmitting and receiving various types of information to and from the CCU 11201. The communication unit 11404 transmits an image signal obtained from the imaging unit 11402 to the CCU 11201 via the transmission cable 11400 as raw data.

[0346] In addition, the communication unit 11404 receives a control signal for controlling the driving of the camera 11102 from the CCU 11201, and provides the control signal to the camera control unit 11405. For example, the control signal includes information related to the imaging conditions, such as information specifying the frame rate of the captured image, information specifying the exposure value when imaging, and / or information specifying the magnification and focus of the captured image.

[0347] It should be noted that the imaging conditions such as the above-mentioned frame rate, exposure value, magnification or focus may be specified by the user, or may be automatically set based on the acquired image signal by the control unit 11413 of the CCU 11201. In the latter case, the endoscope 11100 has built-in automatic exposure (AE: auto exposure) function, automatic focus (AF: auto focus) function and automatic white balance (AWB: auto white balance) function.

[0348] The camera control unit 11405 controls the driving of the camera 11102 based on the control signal from the CCU 11201 received via the communication unit 11404 .

[0349] The communication unit 11411 includes a communication device for transmitting and receiving various types of information to and from the camera 11102. The communication unit 11411 receives an image signal transmitted from the camera 11102 via the transmission cable 11400.

[0350] In addition, the communication unit 11411 transmits a control signal for controlling the driving of the camera 11102 to the camera 11102. The image signal and the control signal may be transmitted through electrical communication, optical communication, or the like.

[0351] The image processing unit 11412 performs various image processing on the image signal in the form of raw data transmitted from the camera 11102 .

[0352] The control unit 11413 performs various controls related to imaging the operation area, etc. through the endoscope 11100 and displaying the captured image obtained by imaging the operation area, etc. For example, the control unit 11413 generates a control signal for controlling the driving of the camera head 11102 .

[0353] In addition, based on the image signal processed by the image processing unit 11412, the control unit 11413 controls the display device 11202 to display the captured image of the surgical area, etc. Thus, the control unit 11413 can use various image recognition technologies to recognize various objects in the captured image. For example, the control unit 11413 can recognize surgical tools such as forceps, specific biological areas, bleeding, and mist when the energy device 11112 is used by detecting the shape, color, etc. of the edge of the object included in the captured image. When the control unit 11413 controls the display device 11202 to display the captured image, the control unit 11413 can use the recognition result to display various surgical auxiliary information in a manner superimposed with the image of the surgical area. When the surgical auxiliary information is displayed in a superimposed manner and presented to the surgeon 11131, the burden of the surgeon 11131 can be reduced, and the surgeon 11131 can reliably perform the operation.

[0354] The transmission cable 11400 connecting the camera head 11102 to the CCU 11201 is an electric signal cable prepared for electric signal communication, an optical fiber prepared for optical communication, or a composite cable prepared for electric communication and optical communication.

[0355] Here, in the illustrated example, although communication is performed in a wired manner using the transmission cable 11400, communication between the camera 11102 and the CCU 11201 may be performed in a wireless manner.

[0356] Note that although the description has been given taking an endoscopic surgery system as an example, for example, the technology according to the present disclosure can also be applied to a microscope surgery system or the like.

[0357] Note that the present disclosure can adopt the configurations described below.

[0358] [A01] "Solid-state imaging device"

[0359] A solid-state imaging device, comprising:

[0360] A plurality of imaging element blocks, each of which is composed of a plurality of imaging elements, wherein:

[0361] Each of the imaging elements comprises:

[0362] The first electrode,

[0363] a charge accumulation electrode disposed spaced apart from the first electrode,

[0364] a photoelectric conversion portion which is in contact with the first electrode and is formed above the charge accumulation electrode with an insulating layer interposed between the photoelectric conversion portion and the charge accumulation electrode;

[0365] as well as

[0366] a second electrode formed on the photoelectric conversion unit,

[0367] The first electrode and the charge accumulation electrode are provided on an interlayer insulating layer, and

[0368] The first electrode is connected to a connection portion provided in the interlayer insulating layer.

[0369] [A02] A solid-state imaging device according to [A01], wherein the imaging element block is composed of P×Q imaging elements (where P≥2 and Q≥1) including P imaging elements along a first direction and Q imaging elements along a second direction different from the first direction.

[0370] [A03] "Solid-state imaging device of the first configuration"

[0371] The solid-state imaging device according to [A02], wherein:

[0372] satisfies P=2 and Q=1, and

[0373] First electrodes constituting two imaging elements along the first direction are connected to the connection portion provided in the interlayer insulating layer.

[0374] [A04] The solid-state imaging device according to [A03], wherein the imaging element block is surrounded by a continuous isolation electrode.

[0375] [A05] The solid-state imaging device according to [A04], wherein a second isolating electrode that is continuous and extends from the isolating electrode along the second direction is provided between the two imaging elements along the first direction.

[0376] [A06] The solid-state imaging device according to [A03], wherein a second isolating electrode extending along the second direction is provided between the two imaging elements along the first direction.

[0377] [A07] "Solid-state imaging device of the second structure"

[0378] The solid-state imaging device according to [A02], wherein

[0379] P=2, and Q is a natural number equal to or greater than 2, and

[0380] First electrodes constituting two imaging elements along the first direction are connected to the connection portion provided in the interlayer insulating layer.

[0381] [A08] The solid-state imaging device according to [A07], wherein the imaging element block is surrounded by a continuous isolation electrode.

[0382] [A09] The solid-state imaging device according to [A08], wherein a second isolating electrode that is continuous and extends from the isolating electrode along the second direction is provided between the two imaging elements along the first direction.

[0383] [A10] The solid-state imaging device according to [A07], wherein a second isolating electrode extending along the second direction is provided between the two imaging elements along the first direction.

[0384] [A11] "Solid-state imaging device having configuration 3A"

[0385] The solid-state imaging device according to [A02], wherein

[0386] Satisfying P = 2 and Q = 2,

[0387] The first electrodes constituting the two imaging elements along the second direction are shared,

[0388] The shared first electrode is connected to the connection portion provided in the interlayer insulating layer.

[0389] [A12] "Solid-state imaging device having configuration 3A"

[0390] The solid-state imaging device according to [A02], wherein

[0391] Satisfying P = 2 and Q = 2,

[0392] The first electrodes constituting the two imaging elements along the first direction are shared,

[0393] The shared first electrode is connected to a connection portion provided in the interlayer insulating layer.

[0394] [A13] The solid-state imaging device according to [A11] or [A12], wherein the imaging element block is surrounded by a continuous isolation electrode.

[0395] [A14] The solid-state imaging device according to [A13], wherein a second isolating electrode that is continuous and extends from the isolating electrode along the second direction is provided between the two imaging elements along the first direction.

[0396] [A15] The solid-state imaging device according to [A11], wherein a second isolation electrode extending along the second direction is provided between two imaging elements along the first direction.

[0397] [A16] The solid-state imaging device according to any one of [A01] to [A15], wherein the imaging elements are arranged line-symmetrically with respect to a boundary line extending along the second direction between imaging elements constituting the imaging element block.

[0398] [A17] The solid-state imaging device according to any one of [A04] to [A16], wherein the potential of the isolation electrode has a fixed value V ES .

[0399] [reference numerals list]

[0400] 10 Camera element block

[0401] 21. First electrode

[0402] 22. Second electrode

[0403] 23 Photoelectric conversion unit

[0404] twenty three UP Upper photoelectric conversion layer

[0405] twenty three DN Lower semiconductor layer

[0406] 24 Charge accumulation electrode

[0407] 25. Transfer control electrode (charge transfer electrode)

[0408] 25A, 26A connection part

[0409] 26 Charge discharge electrode

[0410] 27 Isolation electrode (lower isolation electrode)

[0411] 27' Upper Isolation Electrode

[0412] 28 first isolation electrode (lower first isolation electrode)

[0413] 29 Second isolation electrode (upper second isolation electrode)

[0414] 41 n-type semiconductor region constituting the second imaging element (second photoelectric conversion unit)

[0415] 43 n-type semiconductor region constituting the third imaging element (third photoelectric conversion unit)

[0416] 42, 44, 73 p + layer

[0417] FD1, FD2, FD3, 45C, 46C floating diffusion area

[0418] TR1 amp Amplifier transistor

[0419] TR1 rst Reset transistor

[0420] TR1 sel Selecting transistors

[0421] 51 Reset transistor TR1 rst The gate portion

[0422] 51A Reset transistor TR1 rst Channel formation region

[0423] 51B, 51C Reset transistor TR1 rst The source / drain region

[0424] 52 Amplifier transistor TR1 amp The gate portion

[0425] 52A amplifier transistor TR1 amp Channel formation region

[0426] 52B, 52C Amplifier transistor TR1 ampThe source / drain region

[0427] 53 Select transistor TR1 sel The gate portion

[0428] 53A Select transistor TR1 sel Channel formation region

[0429] 53B, 53C select transistor TR1 sel The source / drain region

[0430] TR2 trs Pass transistor

[0431] 45 Gate section of the transfer transistor

[0432] TR2 rst Reset transistor

[0433] TR2 amp Amplifier transistor

[0434] TR2 sel Selecting transistors

[0435] TR3 trs Pass transistor

[0436] 46 Gate section of the transfer transistor

[0437] TR3 rst Reset transistor

[0438] TR3 amp Amplifier transistor

[0439] TR3 sel Selecting transistors

[0440] V DD power supply

[0441] RST1, RST2, RST3 reset lines

[0442] SEL1, SEL2, SEL3 selection lines

[0443] 117, VSL1, VSL2, VSL3 signal lines

[0444] TG2, TG3 transmission gate lines

[0445] V OA 、V OB 、V OT 、V OU Wiring

[0446] 61 Contact hole part

[0447] 62 Wiring layer

[0448] 63 Connection

[0449] 64 Wiring Layer

[0450] 65 Connection hole

[0451] 66 pad part

[0452] 67, 68 connection part

[0453] 70 Semiconductor substrate

[0454] 70A First surface (front surface) of semiconductor substrate

[0455] 70B Second surface (back surface) of semiconductor substrate

[0456] 71 Component Isolation Area

[0457] 72 Insulation material film

[0458] 74 HfO2 film

[0459] 75 Insulation film

[0460] 76 Interlayer insulation film

[0461] 81 interlayer insulation layer

[0462] 82 Insulation layer

[0463] 83 protective layer

[0464] 84 Opening

[0465] 85 Second opening

[0466] 90 On-chip microlenses

[0467] 91 Various camera components located below the interlayer insulating layer

[0468] 92 Shading layer

[0469] 100 Solid-state imaging device

[0470] 101 Stacked Image Sensor

[0471] 111 Camera Area

[0472] 112 Vertical drive circuit

[0473] 113 column signal processing circuit

[0474] 114 Horizontal drive circuit

[0475] 115 Output Circuit

[0476] 116 drive control circuit

[0477] 118 horizontal signal line

[0478] 200 Electronic equipment (camera)

[0479] 201 Solid-state imaging device

[0480] 210 Optical lens

[0481] 211 Shutter Device

[0482] 212 drive circuit

[0483] 213 Signal processing circuit.

Claims

1. A solid-state imaging device, comprising: A plurality of imaging element blocks, each of which is composed of a plurality of imaging elements, wherein: Each camera element includes: a first electrode; a charge accumulation electrode disposed spaced apart from the first electrode; a photoelectric conversion unit which is in contact with the first electrode and is formed above the charge storage electrode via an insulating layer; and a second electrode formed on the photoelectric conversion unit, wherein the first electrode and the charge accumulation electrode are provided on an interlayer insulating layer, wherein the image pickup element block is composed of P image pickup elements along a first direction and Q image pickup elements along a second direction different from the first direction, wherein P ≥ 2 and Q ≥ 1, and The first electrode in the first imaging element among the P×Q imaging elements and the first electrode in the second imaging element among the P×Q imaging elements are connected to a common connection portion provided in the interlayer insulating layer.

2. The solid-state imaging device according to claim 1, wherein P=2 and Q=1 are satisfied.

3. The solid-state imaging device according to claim 2, wherein: The image pickup element block is surrounded by a continuous isolation electrode.

4. The solid-state imaging device according to claim 3, wherein: A continuous second isolating electrode extending from the isolating electrode along the second direction is provided between the two imaging elements along the first direction.

5. The solid-state imaging device according to claim 2, wherein: The second isolation electrode extending along the second direction is provided between the two imaging elements along the first direction.

6. The solid-state imaging device according to claim 1, wherein P=2, and Q is a natural number equal to or greater than 2, and The first imaging element and the second imaging element are two imaging elements along the first direction.

7. The solid-state imaging device according to claim 6, wherein: The image pickup element block is surrounded by a continuous isolation electrode.

8. The solid-state imaging device according to claim 7, wherein: A continuous second isolating electrode extending from the isolating electrode along the second direction is provided between the two imaging elements along the first direction.

9. The solid-state imaging device according to claim 6, wherein: The second isolation electrode extending along the second direction is provided between the two imaging elements along the first direction.

10. The solid-state imaging device according to claim 1, wherein Satisfying P = 2 and Q = 2, The first imaging element and the second imaging element are two imaging elements along the second direction, and the first electrode of the first imaging element and the second imaging element is shared, and The shared first electrode is connected to the common connection portion provided in the interlayer insulating layer.

11. The solid-state imaging device according to claim 1, wherein Satisfying P = 2 and Q = 2, The first imaging element and the second imaging element are two imaging elements along the first direction, and the first imaging element and the second imaging element share a first electrode, and The shared first electrode is connected to the common connection portion provided in the interlayer insulating layer.

12. The solid-state imaging device according to claim 10 or 11, wherein: The image pickup element block is surrounded by a continuous isolation electrode.

13. The solid-state imaging device according to claim 12, wherein: A continuous second isolating electrode extending from the isolating electrode along the second direction is provided between the two imaging elements along the first direction.

14. The solid-state imaging device according to claim 10, wherein: The second isolation electrode extending along the second direction is provided between two imaging elements along the first direction.

15. The solid-state imaging device according to claim 1, wherein The image pickup elements are provided symmetrically with respect to a boundary line extending along the second direction between the image pickup elements constituting the image pickup element block.

16. The solid-state imaging device according to claim 3, wherein: The potential of the isolated electrode has a fixed value V ES .

Images