Display device and method of manufacturing the same

Through the multi-layer packaging structure and PECVD deposition technology, the second packaging layer design of SiNx and SiOCx materials is used to solve the deterioration problem of OLED devices under the action of moisture and oxygen, improve the flexibility and bendability of the device, and effectively block the moisture permeability path.

CN112436035BActive Publication Date: 2025-08-15SAMSUNG DISPLAY CO LTD
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Patent Information

Application Number
CN202010855072.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2019-08-26
Filing Date
2020-08-24
Publication Date
2025-08-15
Estimated Expiration
2040-08-24

AI Technical Summary

Technical Problem

OLED devices are prone to deterioration under the action of external moisture and oxygen, and existing thin film packaging technology is difficult to effectively block the moisture permeability path, affecting the flexibility and bendability of the device.

Method used

A multi-layer encapsulation structure is adopted, wherein the second encapsulation layer includes a first film, a second film and a third film. The side surface of the third film is arranged in a more inward position. Combining SiNx and SiOCx materials, the moisture blocking ability of the encapsulation layer is enhanced, and the encapsulation layer is formed by PECVD deposition technology.

Benefits of technology

The moisture permeability of the display device is improved, the flexibility and bendability of the device are enhanced, and the light emitting elements are protected from external substances.

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Abstract

The present disclosure relates to a display device and a method for manufacturing the same. The display device includes a substrate, a light-emitting element layer disposed on the substrate, a first encapsulation layer and a second encapsulation layer disposed on the light-emitting element layer, and a buffer layer covering the first and second encapsulation layers. The second encapsulation layer includes a first film, a second film disposed on the first film, and a third film disposed between the first and second films, wherein a side surface of the third film is disposed more inward than the side surfaces of the first and second films.
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Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0104261, filed on August 26, 2019, which is hereby incorporated by reference herein in its entirety. Technical Field

[0003] The present disclosure relates to a display device and a method for manufacturing the same. Background Art

[0004] Recently, with the development of multimedia, various types of display devices such as liquid crystal display (LCD) devices and organic light emitting display (OLED) devices have been widely used. Among these various types of display devices, OLED devices are self-luminous devices and are attracting attention as next-generation display devices due to their wide viewing angles.

[0005] However, OLED devices have characteristics of being degraded by external moisture, oxygen, etc., and therefore it is desirable that the light-emitting element be sealed to protect the light-emitting element from external moisture, oxygen, etc. Recently, as a means for sealing the light-emitting element, thin film encapsulation (TFE) composed of a plurality of inorganic films or a plurality of layers including organic films and inorganic films may be used to allow the OLED device to be thin and / or flexible. Summary of the Invention

[0006] Embodiments of the present disclosure provide a display device having improved bending characteristics of an encapsulation layer, in which a moisture permeation path is effectively blocked.

[0007] Embodiments of the present disclosure also provide a method of manufacturing a display device having improved bending characteristics of an encapsulation layer, in which a moisture permeation path is effectively blocked.

[0008] According to an exemplary embodiment of the present disclosure, a display device includes: a substrate, a light-emitting element layer arranged on the substrate, a first encapsulation layer and a second encapsulation layer arranged on the light-emitting element layer, and a buffer layer covering the first encapsulation layer and the second encapsulation layer, wherein the second encapsulation layer includes: a first film, a second film arranged on the first film, and a third film arranged between the first film and the second film, and a side surface of the third film is arranged at a more inward position than the side surface of the first film and the side surface of the second film.

[0009] In example embodiments, a side surface of the second encapsulation layer may be disposed at a more inward position than a side surface of the first encapsulation layer.

[0010] In example embodiments, the second encapsulation layer may be disposed between the buffer layer and the first encapsulation layer, and the buffer layer may be in direct contact with the second film.

[0011] In example embodiments, the first encapsulation layer may be disposed between the buffer layer and the second encapsulation layer, and the first encapsulation layer may be in direct contact with the second film.

[0012] In an exemplary embodiment, each of the first film and the second film may include SiN x , and the third film may include SiOC x .

[0013] In example embodiments, the thickness of the third film may be greater than the thickness of the first film and the thickness of the second film.

[0014] In exemplary embodiments, the second film may cover side surfaces of the third film.

[0015] In exemplary embodiments, the second film may be in direct contact with a side surface of the first film.

[0016] In an exemplary embodiment, the display device may further include: a third encapsulation layer disposed between the first encapsulation layer and the second encapsulation layer.

[0017] In example embodiments, a side surface of the third encapsulation layer may be disposed at a more inward position than a side surface of the second encapsulation layer.

[0018] In an exemplary embodiment, the first region may be defined as a region between an end of the third film and an end of the first film, and the second region may be defined as a region between an end of the buffer layer and an end of the third film, wherein the length of the second region in one direction is defined by the following formula: L A2 =L TBA -L TA2 +L A1 (L TA1 ≥L TA2 ≥L TA3 )), where L A2 Indicates the length of the second region in one direction, L A1 Indicates the length of the first region in one direction, L TBA Indicates the length of the buffer layer in one direction, L TA1 Indicates the length of the first encapsulation layer in one direction, L TA2 represents the length of the second encapsulation layer in one direction, and L TA3 Indicates the length of the third encapsulation layer in one direction.

[0019] In an exemplary embodiment, a length of the first region in one direction may be smaller than a length of the second region in the one direction.

[0020] In example embodiments, a thickness of the third encapsulation layer may be greater than that of the first and second encapsulation layers, and the third encapsulation layer and the second film may include carbon compounds different from each other.

[0021] In an exemplary embodiment, the substrate includes a plurality of pixels, and the light-emitting element layer includes: a first electrode, a pixel-defining film disposed on the first electrode, a light-emitting layer disposed on the first electrode and the pixel-defining film, and a second electrode disposed on the light-emitting layer, wherein an opening is defined through the pixel-defining film to define the pixels.

[0022] According to an exemplary embodiment of the present disclosure, a method for manufacturing a display device includes: preparing a substrate; forming a light-emitting element layer on the substrate; providing a first encapsulation layer on the light-emitting element layer using a first mask; and providing a second encapsulation layer on the first encapsulation layer using a second mask, wherein the second encapsulation layer includes: a first film arranged on the first encapsulation layer, a second film arranged on the first film, and a third film arranged between the first film and the second film, and an end of the first mask is arranged at a more outward position than an end of the second mask.

[0023] In example embodiments, the second encapsulation layer may be formed using plasma enhanced chemical vapor deposition (PECVD), the first film and the second film may be deposited using a first gas, and the third film may be deposited using a second gas.

[0024] In an exemplary embodiment, the first gas may include SiH 4 , and the second gas may include hexamethyldisiloxane (HMDSO).

[0025] In an exemplary embodiment, the method may further include providing a buffer layer on the second encapsulation layer using a buffer layer mask, wherein an end of the buffer layer mask may be disposed at a more outward position than an end of the first mask.

[0026] In an exemplary embodiment, the method may further include providing a third encapsulation layer using a third mask between providing the first encapsulation layer and providing the second encapsulation layer, wherein an end of the third mask is disposed more inward than an end of the second mask.

[0027] In an exemplary embodiment, providing the light emitting element layer may include: providing a first electrode; providing a light emitting layer on the first electrode; providing a second electrode on the light emitting layer; and providing a capping layer on the second electrode. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The above and other features of the present disclosure will become more apparent by describing in detail exemplary embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0029] Figure 1 is a plan view of a display device according to an exemplary embodiment;

[0030] Figure 2 yes Figure 1 A side view of a display device;

[0031] Figure 3 It is along Figure 1 A sectional view taken along line III-III';

[0032] Figure 4 yes Figure 3 An enlarged view of region A;

[0033] Figure 5 yes Figure 4 An enlarged view of region B;

[0034] Figure 6 is an enlarged view of a display device according to an alternative exemplary embodiment;

[0035] Figure 7 yes Figure 6 An enlarged view of region C;

[0036] Figure 8 is a flowchart illustrating process operations in a method of manufacturing a display device according to an exemplary embodiment;

[0037] Figure 9 、 Figure 10 、 Figure 11 、 Figure 12 、 Figure 13 、 Figure 14 、 Figure 15 and Figure 16 are cross-sectional views illustrating process operations in a method of manufacturing a display device according to an exemplary embodiment;

[0038] Figure 17 is a flowchart illustrating process operations in a method of manufacturing a second encapsulation layer according to an exemplary embodiment;

[0039] Figure 18 、 Figure 19 and Figure 20 are cross-sectional views illustrating process operations in a method of manufacturing a second encapsulation layer according to an exemplary embodiment; and

[0040] Figure 21 is a conceptual diagram illustrating a method of manufacturing a display device according to an exemplary embodiment. DETAILED DESCRIPTION

[0041] The present invention will now be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. However, the present invention may be embodied in different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the scope of the invention to those skilled in the art.

[0042] It will also be understood that when a layer is referred to as being "on" another layer or substrate, it can be directly on the other layer or substrate, or intervening layers may also be present. Like reference numerals refer to like components throughout the specification.

[0043] Like reference numerals refer to like elements throughout the specification.

[0044] It will be understood that although the terms "first," "second," "third," etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or section from other elements, components, regions, layers, or sections. Thus, a first "element," "component," "region," "layer," or "section" discussed below may be referred to as a second "element," "component," "region," "layer," or "section" without departing from the teachings herein.

[0045] The terms used herein are only used for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms, including "at least one". "Or" means "and / or". "At least one of A and B" means "A and / or B". As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. It will also be understood that the terms "including" or "having" when used in this specification indicate the presence of stated features, regions, wholes, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, regions, wholes, steps, operations, elements, parts and / or groups thereof.

[0046] As used herein, "about" or "approximately" encompasses the stated value and an average within an acceptable range of deviation about the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean an average within one or more standard deviations, or within ±30%, 20%, 10%, 5% of the stated value.

[0047] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. It will also be understood that terms defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, rather than being interpreted in an idealized or overly formal sense, unless expressly defined as such herein.

[0048] Exemplary embodiments are described herein with reference to schematically illustrated cross-sectional illustrations that are idealized embodiments. Therefore, variations relative to the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are anticipated. Therefore, the embodiments disclosed herein should not be construed as limited to the specific shapes of the regions as shown herein, but rather should include deviations in shapes due to, for example, manufacturing. For example, a region shown or described as flat may typically have rough and / or non-linear features. In addition, sharp angles shown may be rounded. Therefore, the regions shown in the figures are schematic in nature, and the shapes of these regions are not intended to illustrate the exact shapes of the regions and are not intended to limit the scope of the claims.

[0049] Hereinafter, exemplary embodiments of the present disclosure will be described in detail with reference to the accompanying drawings.

[0050] Herein, the first direction DR1 represents a Y-axis direction, the second direction DR2 represents an X-axis direction, and the third direction DR3 represents a Z-axis direction.

[0051] Figure 1 is a plan view of a display device according to an exemplary embodiment. Figure 2 yes Figure 1 A side view of a display device.

[0052] Reference Figure 1 and Figure 2 In an exemplary embodiment, the display device 1 is a device that displays video or still images and can define a display screen of a portable electronic device or various products, such as a mobile phone, a smart phone, a tablet personal computer (PC), a smart watch, a watch phone, a mobile communication terminal, an electronic notebook, an electronic book, a portable multimedia player (PMP), a navigation system, an ultra-mobile PC, etc., or various products such as a television, a laptop PC, a monitor, a digital sign, a device for the Internet of Things (IoT), etc.

[0053] In an exemplary embodiment, the display device 1 may include a display panel 10. The display panel 10 may include a flexible substrate including a flexible polymer material such as polyimide, etc. Therefore, the display panel 10 may be flexible, bendable, foldable, or rollable.

[0054] The display panel 10 may include a display area DA as a portion configured to display an image and a non-display area NDA as a remaining portion except the display area DA. The display area DA may include a plurality of pixels PX.

[0055] The display panel 10 may include a main region MR and a bending region BR connected to one side of the main region MR. The display panel 10 may further include a sub-region SR connected to the bending region BR. The sub-region SR may overlap the main region MR in the thickness direction when the display panel 10 is bent.

[0056] The main region MR may include a display area DA. A peripheral edge portion of the display area DA of the main region MR may be a non-display area NDA.

[0057] The main region MR may have a shape similar to the outer shape of the display device 1 in a plan view. The main region MR may be a flat region located on one surface of the display device 1. However, the present disclosure is not limited thereto, and in the main region MR, at least one edge of the remaining edges other than the edge (side) connected to the bending region BR may be bent to form a curved surface, or may be bent in a predetermined direction, such as a vertical direction.

[0058] In an exemplary embodiment, when at least one edge (side) of the remaining edges of the main region MR, excluding the edge connected to the bending region BR, forms a curved surface or is bent, the display area DA may also be defined by a curved edge or a bent edge. However, the present disclosure is not limited thereto, and the non-display area NDA in which no image is displayed may be defined by a curved edge or a bent edge, or the display area DA and the non-display area NDA may be provided together at a curved edge or a bent edge.

[0059] In an exemplary embodiment, the non-display area NDA of the main region MR may be located in a region from an outer boundary of the display area DA to an edge of the display panel 10. Signal lines for applying signals to the display area DA, connection lines DM (see Figure 4 ) or the driving circuit may be disposed in the non-display area NDA of the main region MR. In this embodiment, the outermost black matrix may be disposed in the non-display area NDA of the main region MR, but the present disclosure is not limited thereto.

[0060] The bending region BR is connected to the main region MR. In one exemplary embodiment, for example, the bending region BR may be connected via one short side of the main region MR. In the bending region BR, the display panel 10 may be bent with a certain curvature in a direction opposite to the third direction DR3, that is, in a direction opposite to the display surface. When the display panel 10 is bent in the bending region BR, the surface of the display panel 10 may be flipped. In other words, one surface of the display panel 10 facing upward may be turned to face outward through the bending region BR, and then face downward.

[0061] The sub-region SR extends from the bending region BR. The sub-region SR may extend in a direction parallel to the main region MR from the point where the bending is completed. The sub-region SR may overlap with the main region MR in the third direction DR3, i.e., the thickness direction of the display panel 10. The sub-region SR may overlap with the non-display area NDA at the edge of the main region MR, or may overlap with the display area DA of the main region MR.

[0062] The driver chip 20 (or the driver chip and the pad portion electrically connected to the driver chip) may be disposed on the sub-region SR of the display panel 10. The driver chip 20 may generate a drive signal for driving the pixels PX and provide the drive signal to the pixels PX defined in the display area DA. In one exemplary embodiment, for example, the driver chip 20 may generate a data signal that determines the light emission brightness of the pixels PX. In this embodiment, the driver chip 20 may provide the data signal to the pixels PX via the connection lines DM and the signal lines.

[0063] The driving chip 20 may be attached to the display panel 10 through an anisotropic conductive film or may be attached to the display panel 10 through ultrasonic bonding. The width of the driving chip 20 in the second direction DR2 may be smaller than the width of the display panel 10 in the second direction DR2.

[0064] The driving substrate 30 may be connected to the side surface of the subregion SR of the display panel 10. A pad portion is provided on the side surface of the subregion SR, and the driving substrate 30 may be connected to the pad portion. The driving substrate 30 may be a flexible printed circuit board or film.

[0065] Figure 3 It is along Figure 1 A cross-sectional view taken along line III-III'. Figure 4 yes Figure 3 Magnified view of area A. Figure 5 yes Figure 4 Magnified view of area B.

[0066] Reference Figure 3 and Figure 4, an exemplary embodiment of the display device 1 may include a substrate SUB, a thin film transistor layer TFTL, a light emitting element layer EML, an encapsulation layer TFEL, and a sensing layer TSL.

[0067] The substrate SUB may be a flexible substrate that is flexible, bendable, foldable, or rollable. In an exemplary embodiment, the flexible substrate may include, for example, at least one material selected from the group consisting of polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyacrylate, polyimide (PI), polycarbonate (PC), cellulose triacetate (CAT), cellulose acetate propionate (CAP), and combinations thereof.

[0068] In an exemplary embodiment, Figure 4 As shown in FIG, the thin film transistor layer TFTL may be disposed on the substrate SUB. The thin film transistor layer TFTL may be disposed in the display area DA and the non-display area NDA.

[0069] The thin film transistor layer TFTL may include a semiconductor layer ACT, a first insulating layer IL1 , a first conductive layer 110 , a second insulating layer IL2 , a second conductive layer 120 , a third insulating layer IL3 , and a fourth insulating layer IL4 .

[0070] Each of the above-mentioned layers may be a single film or layer, or may have a structure of a stacked film or layer including a plurality of films. Other layers may also be provided between these layers.

[0071] The semiconductor layer ACT may be disposed on the substrate SUB. In example embodiments, a buffer film (not shown) may also be disposed between the semiconductor layer ACT and the substrate SUB.

[0072] The buffer film can prevent the diffusion of impurity ions, prevent the penetration of moisture, and provide a planarized surface on the layer below it. The buffer film may include silicon nitride, silicon oxide, silicon oxynitride, etc.

[0073] The semiconductor layer ACT forms channels of a plurality of transistors of a pixel. The semiconductor layer ACT may include polysilicon. Polysilicon may be formed by crystallizing amorphous silicon.

[0074] In an exemplary embodiment in which the semiconductor layer ACT includes polysilicon or is made of polysilicon and doped with ions, the ion-doped semiconductor layer ACT may have conductivity. Therefore, the semiconductor layer ACT may include not only channel regions of a plurality of transistors but also source and drain regions. The source and drain regions may be connected to opposite sides of each channel region.

[0075] In alternative exemplary embodiments, the semiconductor layer ACT may include single crystal silicon, low temperature polysilicon, amorphous silicon, or an oxide semiconductor. The oxide semiconductor may include, for example, a binary compound (AB) containing at least one of indium (In), zinc (Zn), gallium (Ga), tin (Sn), titanium (Ti), aluminum (Al), hafnium (Hf), zirconium (Zr), magnesium (Mg), or a combination thereof. x ), ternary compound (AB x C y ) or quaternary compound (AB x C y D z In example embodiments, the semiconductor layer ACT may include indium tin zinc oxide (ITZO) (or an oxide containing indium, tin, and zinc) or indium gallium zinc oxide (IGZO) (or an oxide containing indium, gallium, and zinc).

[0076] The first insulating layer IL1 is provided on the semiconductor layer ACT. The first insulating layer IL1 can generally be provided over the entire surface of the substrate SUB. The first insulating layer IL1 can be a gate insulating film having a gate insulating function. The first insulating layer IL1 can include a silicon compound, a metal oxide, or the like. In one exemplary embodiment, for example, the first insulating layer IL1 can include at least one material selected from the group consisting of silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, tantalum oxide, hafnium oxide, zirconium oxide, titanium oxide, and combinations thereof. The first insulating layer IL1 can be a single layer or a multilayer film formed by stacking films including or made of different materials.

[0077] A first conductive layer 110 is provided on the first insulating layer IL1. The first conductive layer 110 may include at least one metal selected from the following materials: molybdenum (Mo), aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), titanium (Ti), tantalum (Ta), tungsten (W), and copper (Cu). The first conductive layer 110 may be a single layer or a multilayer film and defines the gate electrode of the transistor and the lower electrode of the storage capacitor.

[0078] The second insulating layer IL2 is disposed on the first conductive layer 110. The second insulating layer IL2 may be disposed over the entire surface of the substrate SUB. The second insulating layer IL2 is used to insulate the first conductive layer 110 from the second conductive layer 120.

[0079] The second insulating layer IL2 may be an interlayer insulating film. The second insulating layer IL2 may include the same material as the first insulating layer IL1 described above, or may include at least one material selected from the materials of the first insulating layer IL1 listed above.

[0080] A third insulating layer IL3 may be disposed on the second insulating layer IL2. A conductive layer may be disposed between the second insulating layer IL2 and the third insulating layer IL3. The conductive layer may include an upper electrode of the storage capacitor, an initialization voltage line, and the like. The third insulating layer IL3 may include the same material as the first insulating layer IL1 described above, or may include at least one material selected from the materials of the first insulating layer IL1 listed above.

[0081] The second conductive layer 120 is disposed on the third insulating layer IL3. The second conductive layer 120 may include at least one metal selected from the following materials: Al, Mo, Pt, Pd, Ag, Mg, Au, Ni, Nd, Ir, Cr, Ca, Ti, Ta, W, and Cu. The second conductive layer 120 may be a single-layer film or a multi-layer film. In one exemplary embodiment, for example, the second conductive layer 120 may have a stacked structure of Ti / Al / Ti, Mo / Al / Mo, Mo / AlGe / Mo, Ti / Cu, etc. The second conductive layer 120 may include a signal line, a power line VSS, a source electrode 121, and a drain electrode 122. The source electrode 121 and the drain electrode 122 may be connected to the source region and the drain region of the semiconductor layer ACT, respectively, through contact holes defined through the third insulating layer IL3, the second insulating layer IL2, and the first insulating layer IL1.

[0082] The fourth insulating layer IL4 covers the second conductive layer 120. The fourth insulating layer IL4 may be a via layer. The fourth insulating layer IL4 may include an organic insulating material such as an acrylic resin (or polyacrylic resin), an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene resin, a polyphenylene sulfide resin, or benzocyclobutene (BCB).

[0083] The light emitting element layer EML may be disposed on the thin film transistor layer TFTL. The light emitting element layer EML may be disposed in the display area DA. However, the present disclosure is not limited thereto, and alternatively, the light emitting element layer EML may also be disposed in the non-display area NDA.

[0084] The light emitting element layer EML may include a first electrode 131, a pixel defining film PDL including an opening configured to expose the first electrode 131, a light emitting layer 132 disposed in the opening of the pixel defining film PDL, a second electrode 133 disposed on the light emitting layer 132 and the pixel defining film PDL, and a cover layer CPL.

[0085] The first electrode 131 is disposed on the fourth insulating layer IL4. The first electrode 131 may have a laminated film structure, but is not limited thereto, wherein a material layer having a high work function and a reflective material layer are stacked on top of each other. The high work function material layer is such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium oxide (In2O3), and the reflective material layer is such as silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), lead (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), or a combination thereof (e.g., a mixture). The material layer having a high work function may be disposed above the reflective material layer so as to be close to the light-emitting layer 132. The first electrode 131 may have a multilayer structure of ITO / Mg, ITO / MgF, ITO / Ag, or ITO / Ag / ITO, but the present disclosure is not limited thereto. The anode of the pixel may include the first electrode 131 or be formed by the first electrode 131. The anode may be connected to the drain electrode 122 through a contact hole defined through the fourth insulating layer IL4 .

[0086] The pixel-defining film (PDL) is provided on the first electrode 131. The pixel-defining film (PDL) may include an inorganic insulating material such as silicon oxide, silicon nitride, silicon oxynitride, hafnium oxide, aluminum oxide, titanium oxide, tantalum oxide, or zinc oxide, or may include an organic insulating material such as an acrylic resin (polyacrylic resin), epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene resin, polyphenylene sulfide resin, or BCB. The pixel-defining film (PDL) may be a single-layer film or a multi-layer film formed by stacking films including or made of different materials.

[0087] An opening is defined through the pixel defining layer PDL to expose the first electrode 131. The opening may define a light emitting region of each pixel PX.

[0088] The light emitting layer 132 may be disposed in the opening of the pixel defining layer PDL. The light emitting layer 132 may include an organic light emitting layer, a hole injection / transport layer, and an electron injection / transport layer.

[0089] The second electrode 133 is disposed on the light-emitting layer 132 and the pixel-defining film PDL. The cathode may be defined by the second electrode 133. The cathode may be disposed above the entire display area DA. The second electrode 133 may include a material layer having a low work function, for example, at least one material selected from the following materials: Li, Ca, LiF / Ca, LiF / Al, Al, Mg, Ag, Pt, Pd, Ni, Au, Nd, Ir, Cr, BaF, Ba, and compounds or mixtures thereof (for example, a mixture of Ag and Mg). The second electrode 133 may also include a transparent metal oxide layer disposed on the material layer having a low work function. The side surface of the second electrode 133 may be disposed in the non-display area NDA.

[0090] A capping layer CPL is disposed on the second electrode 133. The capping layer CPL may be disposed or formed above the display area DA and the non-display area NDA. The capping layer CPL may include at least one material selected from the following: 4,4'-bis[N-(1-naphthyl)-N-phenylamino]biphenyl (α-NPD), N,N'-di(naphth-1-yl)-N,N'-diphenylbenzidine (NPB), N,N'-bis(3-methylphenyl)-N,N'-bis(phenyl)benzidine (TPD), N1-phenyl-N4,N4-bis(4-(phenyl(m-tolyl)amino)phenyl)-N1-(m-tolyl)benzene-1,4-diamine (m-MTDATA), tris-8-hydroxyquinoline aluminum (Alq3), and titanium bronze (CuPc). In this embodiment, the capping layer CPL may be used to protect the light emitting element. In this embodiment, the capping layer CPL may be used to efficiently guide light provided from the light emitting layer 132. The side surface of the cover layer CPL may be disposed in the non-display area NDA. The side surface of the cover layer CPL may be disposed further inward than the corresponding side surface of the second electrode 133. Herein, the term "disposed further inward" may mean disposed relatively close to the center portion of the display area DA, and the term "disposed further outward" may mean disposed relatively close to the corresponding outermost edge of the substrate SUB. Therefore, the cover layer CPL may expose a portion of the second electrode 133, including the side surface of the second electrode 133.

[0091] The encapsulation layer TFEL may be disposed on the light-emitting element layer EML. In an exemplary embodiment, the encapsulation layer TFEL may be disposed in both the display area DA and the non-display area NDA. In this embodiment, the encapsulation layer TFEL covers the light-emitting element layer EML in the display area DA and the non-display area NDA and may cover the thin film transistor layer TFTL in the non-display area NDA.

[0092] The encapsulation layer TFEL may be used to prevent oxygen or moisture from penetrating into the light emitting element layer EML. In this embodiment, the encapsulation layer TFEL may be used to protect the light emitting element layer EML from foreign substances such as dust.

[0093] The encapsulation layer TFEL may include a first encapsulation layer TFE1, a second encapsulation layer TFE2, and a third encapsulation layer TFE3 disposed between the first encapsulation layer TFE1 and the second encapsulation layer TFE2. Each of the above layers may be defined by a single film or may have a stacked film structure including multiple films. Alternatively, other layers may also be disposed between these layers.

[0094] The first encapsulation layer TFE1 may be provided on the cover layer CPL. The first encapsulation layer TFE1 may be provided on the entire surface of the substrate SUB. The first encapsulation layer TFE1 may be an inorganic film. The inorganic film may include silicon oxide (SiO x ), silicon nitride (SiN x ) or silicon oxynitride (SiON x ), but the present disclosure is not limited thereto. The thickness of the first encapsulation layer TFE1 may be about 10,000 angstroms. The side surface of the first encapsulation layer TFE1 may be disposed in the non-display area NDA. The side surface of the first encapsulation layer TFE1 may be disposed more outward than the side surface of the second electrode 133. Therefore, the first encapsulation layer TFE1 may directly contact one surface of the second electrode 133 exposed by the cover layer CPL. In this embodiment, the first encapsulation layer TFE1 may directly contact one surface of the third insulating layer IL3.

[0095] The second encapsulation layer TFE2 may be disposed on the first encapsulation layer TFE1. The second encapsulation layer TFE2 may be disposed on the entire surface of the substrate SUB. A side surface of the second encapsulation layer TFE2 may be disposed in the non-display area NDA. A side surface of the second encapsulation layer TFE2 may be disposed between a side surface of the first encapsulation layer TFE1 and a side surface of the second electrode 133. One surface of the second encapsulation layer TFE2 may directly contact one surface of the first encapsulation layer TFE1.

[0096] The second encapsulation layer TFE2 may include or be formed of a plurality of inorganic films including materials different from each other. Figure 5 The interlayer configuration of the second encapsulation layer TFE2 is shown in detail.

[0097] Reference Figure 5 , the second encapsulation layer TFE2 may include a first film 210 , a second film 220 disposed on the first film 210 , and a third film 230 disposed between the first film 210 and the second film 220 .

[0098] The first film 210 may be provided on the first encapsulation layer TFE1. The first film 210 may be used to prevent oxygen or moisture from penetrating into the light emitting element layer EML. In this embodiment, the first film 210 may include SiO x 、SiN x or SiON x .

[0099] The thickness T210 of the first film 210 may be less than the thickness of the first encapsulation layer TFE1. The thickness T210 of the first film 210 may be approximately

[0100] The side surface of the first film 210 may be disposed in the non-display area NDA. The side surface of the first film 210 may be disposed more inward than the side surface of the first encapsulation layer TFE1. The first film 210 may expose a portion of the first encapsulation layer TFE1 including the side surface of the first encapsulation layer TFE1. The first film 210 may directly contact one surface of the first encapsulation layer TFE1.

[0101] The second film 220 may be provided on the first film 210. The second film 220 may be used together with the first film 210 to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. Therefore, in this embodiment, the moisture permeation delay performance of the second encapsulation layer TFE2 may be improved. The second film 220 may include the same material as the first film 210 or at least one material selected from the materials of the first film 210 listed above.

[0102] The thickness T220 of the second film 220 may be substantially equal to the thickness T210 of the first film 210. The thickness T220 of the second film 220 may be approximately

[0103] The side surface of the second film 220 may be disposed in the non-display area NDA. The side surface of the second film 220 may be disposed more inward than the side surface of the first encapsulation layer TFE1. The end or edge of the second film 220 may be aligned with the end or edge of the first film 210. One surface of the second film 220 may directly contact the side surface of the first film 210.

[0104] The third film 230 may be provided between the first film 210 and the second film 220. The third film 230 may include or be made of a material different from that of the first film 210 and / or the second film 220. In one exemplary embodiment, for example, the third film 230 may include silicon oxycarbide (SiOC). x ). The characteristics of the third film 230 may be based on SiOC xIn one exemplary embodiment, for example, the carbon content may be increased so that the third film 230 may have properties close to those of an organic substance and its hardness may be reduced. In this embodiment, the third film 230 may have increased fluidity and may therefore be easily deformed. In this embodiment, the bending characteristics of the encapsulation layer TFEL may be improved due to the third film 230. However, the material constituting the third film 230 is not limited to the above-mentioned materials and may be selected and applied from materials that can improve the bending characteristics of the second encapsulation layer TFE2.

[0105] The thickness T230 of the third film 230 may be greater than the thickness T210 of the first film 210 and / or the thickness T220 of the second film 220. In one exemplary embodiment, for example, the thickness T230 of the third film 230 may be approximately

[0106] The side surface of the third film 230 may be disposed in the non-display area NDA. The side surface of the third film 230 may be disposed at a more inward position than the side surface of the first encapsulation layer TFE1. In this embodiment, the side surface of the third film 230 may be disposed at a more inward position than the side surface of the first film 210 and / or the side surface of the second film 220. Therefore, the side surface of the third film 230 may be covered by the second film 220. In this embodiment, the upper surface of the third film 230 may directly contact the second film 220, and the lower surface of the third film 230 may directly contact the first film 210. Therefore, the third film 230 may be sealed by the first film 210 and / or the second film 220. In this embodiment, the moisture permeation path through the third film 230 may be effectively blocked.

[0107] In an exemplary embodiment, the end of the third film 230 may be positioned further inward than the end of the first film 210 and / or the end of the second film 220. The area between the end of the third film 230 and the end of the first film 210 and / or the end of the second film 220 may be defined as a first area A1. That is, the first area A1 may be an area in the second encapsulation layer TFE2 where the third film 230 is not provided. The first area A1 may not overlap with the third film 230. The first film 210 may directly contact the first encapsulation layer TFE1 in the first area A1. In this embodiment, the first film 210 may directly contact the second film 220 in the first area A1. Therefore, the third film 230 may be sealed by the first film 210 and / or the second film 220.

[0108] The length of the first region A1 in one direction, for example, the second direction DR2, may be approximately 5 micrometers (μm). The length of the first region A1 in one direction may be determined or adjusted based on the diffusivity of the materials of the first film 210, the second film 220, and the third film 230. Figure 5 The first area A1 is described in more detail.

[0109] Figure 5 In the exemplary embodiment shown, the second encapsulation layer TFE2 is formed by stacking the first film 210, the second film 220, and the third film 230, but the stacking structure of the second encapsulation layer TFE2 is not limited thereto. In an alternative exemplary embodiment, for example, the second encapsulation layer TFE2 may be formed into a stacking structure of five or seven layers by including a plurality of inorganic films.

[0110] In an exemplary embodiment in which the second encapsulation layer TFE 2 is formed in a five-layer structure, a fourth film and a fifth film may be further disposed on the third film 230 .

[0111] In this embodiment, the fourth film can be used together with the third film 230 to improve the bending characteristics of the second encapsulation layer TFE2. In this embodiment, the fourth film can include the same material as the third film 230 or at least one material selected from the materials of the third film 230 listed above. In this embodiment, the fifth film can be used together with the first film 210 and the second film 220 to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. Therefore, the moisture permeation delay performance of the second encapsulation layer TFE2 can be improved. In this embodiment, the fifth film can include the same material as the first film 210 and / or the second film 220 or at least one material selected from the materials of the first film 210 and / or the second film 220 listed above.

[0112] In an exemplary embodiment in which the second encapsulation layer TFE2 is formed in a seven-layer structure, a sixth film and a seventh film may be further provided on the fifth film.

[0113] The sixth film can be used together with the third film 230 and the fourth film to improve the bending characteristics of the second encapsulation layer TFE2. In this embodiment, the sixth film can include the same material as the third film 230 and / or the fourth film or at least one material selected from the materials of the third film 230 listed above. In this embodiment, the seventh film can be used together with the first film 210, the second film 220 and the fifth film to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. Therefore, the moisture permeation delay performance of the second encapsulation layer TFE2 can be improved. In this embodiment, the seventh film can include the same material as the first film 210, the second film 220 and / or the sixth film or at least one material selected from the materials of the first film 210 and / or the second film 220 listed above.

[0114] In an exemplary embodiment, as described above, when the second encapsulation layer TFE2 includes SiN x The first film 210 and the second film 220 and the SiOCx When the third film 230 is formed, the bending characteristics of the second encapsulation layer TFE2 can be improved, and the moisture penetration path can be effectively blocked. Therefore, the lifespan and reliability of the light-emitting element can be improved, and the display quality of the display device 1 can be improved.

[0115] Come back for reference Figure 4 , the third encapsulation layer TFE3 is disposed between the first encapsulation layer TFE1 and the second encapsulation layer TFE2 .

[0116] The third encapsulation layer TFE3 may be used to flatten the stepped portion caused by the pixel definition film PDL. The thickness of the third encapsulation layer TFE3 may be greater than the thickness of the first encapsulation layer TFE1 and / or the second encapsulation layer TFE2. In an exemplary embodiment, for example, the thickness of the third encapsulation layer TFE3 may be approximately The third encapsulation layer TFE3 may be an organic film, which may include acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc., but the present disclosure is not limited thereto.

[0117] The side surface of the third encapsulation layer TFE3 can be positioned more inward than the side surface of the first encapsulation layer TFE1 and / or the side surface of the second encapsulation layer TFE2. Therefore, the side surface of the third encapsulation layer TFE3 can be covered by the second encapsulation layer TFE2. In this embodiment, the upper surface of the third encapsulation layer TFE3 can directly contact the second encapsulation layer TFE2, and the lower surface of the third encapsulation layer TFE3 can directly contact the first encapsulation layer TFE1. Therefore, the third encapsulation layer TFE3 can be configured to be sealed by the first encapsulation layer TFE1 and / or the second encapsulation layer TFE2. In this embodiment, the moisture permeation path through the third encapsulation layer TFE3 can be effectively blocked.

[0118] The encapsulation layer TFEL may further include an optical control layer OL. The optical control layer OL may be disposed between the light emitting element layer EML and the first encapsulation layer TFE1. One surface of the optical control layer OL may contact the cover layer CPL, and the opposite surface of the optical control layer OL may directly contact the first encapsulation layer TFE1.

[0119] The optical control layer OL can be used to improve device efficiency by minimizing absorption of light from the light emitting layer 132 that passes through the second electrode 133. The optical control layer OL may have a refractive index higher than that of the second electrode 133. Therefore, the light extraction effect caused by the difference in refractive index between the optical control layer OL and the second electrode 133 can be increased. The optical control layer OL may include LiF, MgF2, or CaF2.

[0120] The sensing layer TSL may be disposed on the encapsulation layer TFEL. In an exemplary embodiment, the sensing layer TSL is directly disposed on the encapsulation layer TFEL, so that the thickness of the display panel 10 can be reduced compared to a case where a separate touch panel including the sensing layer TSL is attached to the encapsulation layer TFEL.

[0121] The sensing layer TSL may include a buffer layer TBF, a sensing conductive layer TCL, and a sensing insulating layer TIL. The sensing layer TSL may sense a user's touch in a self-capacitance manner or a mutual-capacitance manner.

[0122] Each of the above-mentioned layers may be a single-layer film or may have a laminated film including a plurality of films. Other layers may also be provided between these layers.

[0123] The buffer layer TBF may be provided on the second encapsulation layer TFE2. The buffer layer TBF may be used to prevent cracking and improve sensing sensitivity. In this embodiment, the buffer layer TBF may be used together with the encapsulation layer TFEL to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. The buffer layer TBF may include the same material as the first encapsulation layer TFE1 or at least one material selected from the materials of the first encapsulation layer TFE1 listed above. In an exemplary embodiment, for example, the buffer layer TBF may be an inorganic film. The inorganic film may include SiO x 、SiN x or SiON x , but the present disclosure is not limited thereto.

[0124] The side surface of the buffer layer TBF can be arranged at a more outward position than the side surface of the first encapsulation layer TFE1 and / or the side surface of the second encapsulation layer TFE2. Therefore, the buffer layer TBF can cover the side surface of the first encapsulation layer TFE1 and the side surface of the second encapsulation layer TFE2. In this embodiment, the first encapsulation layer TFE1 and the second encapsulation layer TFE2 can be sealed by the buffer layer TBF. In this case, the moisture penetration path can be more effectively blocked. In this embodiment, the side surface of the buffer layer TBF is arranged at a more outward position than the side surface of the first encapsulation layer TFE1, so that the buffer layer TBF can directly contact the third insulating layer IL3. Therefore, a sufficient contact area between the buffer layer TBF and the third insulating layer IL3 can be ensured, so that a stable adhesion between the buffer layer TBF and the substrate SUB can be maintained.

[0125] The end of the buffer layer TBF may be positioned further outward than the end of the encapsulation layer TFEL. In an exemplary embodiment, the end of the buffer layer TBF may be positioned further outward than the end of the third film 230 of the second encapsulation layer TFE2. The area between the end of the buffer layer TBF and the end of the third film 230 may be defined as a second area A2. In this embodiment, the second area A2 may be an area where the third film 230 is not provided. The second area A2 may not overlap with the third film 230. In the second area A2, the first encapsulation layer TFE1 may contact the first film 210 of the second encapsulation layer TFE2, and the first film 210 may directly contact the second film 220. In the second area A2, the top and side surfaces of the first and second encapsulation layers TFE1 and TFE2 may directly contact the buffer layer TBF. In this embodiment, the buffer layer TBF may seal the first and second encapsulation layers TFE1 and TFE2. Therefore, moisture permeation paths through the second encapsulation layer TFE2, such as those through the third film 230, may be more effectively blocked.

[0126] The length of the second area A2 in one direction may be determined based on the following Formula 1.

[0127] [Formula 1]

[0128] L A2 =L TBA -L TA2 +L A1

[0129] (L TA1 ≥L TA2 ≥L TA3 )

[0130] In formula 1, L A2 represents the length of the second area A2 in one direction, L A1 represents the length of the first area A1 in one direction, L TBA Indicates the length of the buffer layer TBF in one direction, L TA1 represents the length of the first encapsulation layer TFE1 in one direction, L TA2 represents the length of the second encapsulation layer TFE2 in one direction, and L TA3 represents the length of the third encapsulation layer TFE3 in one direction.

[0131] exist Figures 4 and 5 , reference characters TBA, TA1, TA2, TA3 respectively indicate regions of a buffer layer TBF, a first encapsulation layer TFE1, a second encapsulation layer TFE2, and a third encapsulation layer TFE3.

[0132] In an exemplary embodiment, the length of the second area A2 in one direction may be about 80 μm or more to prevent moisture penetration. In an exemplary embodiment, the length of the second area A2 in one direction may be about 130 μm or more, but the present disclosure is not limited thereto.

[0133] The sensing conductive layer TCL may be disposed on the buffer layer TBF. The sensing conductive layer TCL may include molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or alloys thereof. The sensing conductive layer TCL may include a plurality of sensing electrodes configured to sense a user's touch and sensing lines configured to connect the pads and the sensing electrodes.

[0134] The sensing insulating layer TIL may be disposed on the sensing conductive layer TCL. The sensing insulating layer TIL may be disposed over the entire surface of the substrate SUB to cover the sensing conductive layer TCL. The sensing insulating layer TIL may be used to insulate the sensing conductive layer TCL. The sensing insulating layer TIL may directly contact the buffer layer TBF.

[0135] The sensing insulating layer TIL may include an organic film and / or an inorganic film. The organic film may include, for example, at least one material selected from the following materials: acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, perylene resin, and combinations thereof. The inorganic film may include, for example, at least one material selected from the following materials: aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, hafnium oxide, and combinations thereof.

[0136] In the exemplary embodiment, as described above, the side surface of the buffer layer TBF is positioned further outward than the side surface of the encapsulation layer TFEL, so that the buffer layer TBF can seal the encapsulation layer TFEL. Therefore, it is possible to more effectively block the moisture permeation path through the second encapsulation layer TFE2, especially the moisture permeation path through the third film 230. In this embodiment, it is possible to ensure sufficient contact area between the buffer layer TBF and the third insulating layer IL3, so that stable adhesion between the buffer layer TBF and the substrate SUB can be maintained.

[0137] Hereinafter, an alternative exemplary embodiment of a display device according to the present disclosure will be described. Hereinafter, the same or similar reference numerals will be assigned to the same or similar components of the alternative exemplary embodiment as those of the exemplary embodiment described above, and any repetitive detailed description will be omitted or simplified.

[0138] Figure 6 is an enlarged view of a display device according to an alternative exemplary embodiment. Figure 7 yes Figure 6 Magnified view of area C.

[0139] Reference Figure 6 and Figure 7 , except that the first encapsulation layer TFE1 ' is disposed above the second encapsulation layer TFE2 ', the alternative exemplary embodiment of the display device is the same as that described above with reference to Figures 1 to 5 The exemplary embodiments described are essentially the same.

[0140] In this embodiment, the first encapsulation layer TFE1' may be disposed between the sensing layer TSL and the third encapsulation layer TFE3'. One surface of the first encapsulation layer TFE1' may contact the buffer layer TBF of the sensing layer TSL, and an opposing surface of the first encapsulation layer TFE1' may contact the third encapsulation layer TFE3' and the second encapsulation layer TFE2'. The side surface of the first encapsulation layer TFE1' may be disposed further outward than the side surface of the second encapsulation layer TFE2'. Therefore, the side surface of the second encapsulation layer TFE2' may be covered by the first encapsulation layer TFE1'.

[0141] In this embodiment, the first encapsulation layer TFE1' is the same as that described above with reference to Figures 1 to 5 The described first encapsulation layer TFE1 is substantially the same or similar, and thus any repetitive detailed description thereof will be omitted.

[0142] The second encapsulation layer TFE2' may be disposed between the light-emitting element layer EML and the third encapsulation layer TFE3'. One surface of the second encapsulation layer TFE2' may contact the third encapsulation layer TFE3', and an opposing surface of the second encapsulation layer TFE2' may contact the light-emitting element layer EML and the third insulating layer IL3. Therefore, sufficient contact area between the second encapsulation layer TFE2' and the third insulating layer IL3 may be ensured, thereby maintaining stable adhesion between the second encapsulation layer TFE2' and the substrate SUB.

[0143] The second encapsulation layer TFE2 ′ may include or be formed of a plurality of inorganic films including materials different from each other. Figure 7 The interlayer configuration of the second encapsulation layer TFE2 ′ is shown in detail.

[0144] Reference Figure 7 , the second encapsulation layer TFE2 ′ may include a first film 310 , a second film 320 disposed on the first film 310 , and a third film 330 disposed between the first film 310 and the second film 320 .

[0145] The first film 310 may be used to prevent oxygen or moisture from penetrating into the light emitting element layer EML. In this embodiment, the first film 310 may include SiO x 、SiN xor SiON x .

[0146] The thickness T310 of the first film 310 may be less than the thickness of the first encapsulation layer TFE1'. The thickness T310 of the first film 310 may be approximately

[0147] The side surface of the first film 310 may be disposed in the non-display area NDA. The side surface of the first film 310 may be disposed at a more inward position than the side surface of the first encapsulation layer TFE1 ′.

[0148] The second film 320 may be provided on the first film 310. The second film 320 may be used together with the first film 310 to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. Thus, the moisture permeation delay performance of the second encapsulation layer TFE2' may be improved. The second film 320 may include the same material as the first film 310 or at least one material selected from the materials of the first film 310 listed above.

[0149] The thickness T320 of the second film 320 may be substantially equal to the thickness T310 of the first film 310. The thickness T320 of the second film 320 may be approximately

[0150] The side surface of the second film 320 may be disposed in the non-display area NDA. The side surface of the second film 320 may be disposed more inward than the side surface of the first encapsulation layer TFE1'. The end of the second film 320, that is, the edge of the second film 320, may be aligned with the end of the first film 310. One surface of the second film 320 may directly contact the side surface of the first film 310.

[0151] The third film 330 may be provided between the first film 310 and the second film 320. The third film 330 may include or be made of a material different from that of the first film 310 and / or the second film 320. In one exemplary embodiment, for example, the third film 330 may include SiOC x The characteristics of the third film 330 can be determined according to the SiOC x The carbon content of the third film 330 can be controlled. In an exemplary embodiment, the carbon content of the third film 330 can be increased, so that the third film 330 can have properties close to those of organic substances, and its hardness can be reduced. In this embodiment, the third film 330 can have increased fluidity and thus be easily deformed. In this embodiment, as described above, the third film 330 can improve the bending characteristics of the encapsulation layer TFEL'.

[0152] The thickness T330 of the third film 330 may be greater than the thickness T310 of the first film 310 and / or the thickness T320 of the second film 320. In one exemplary embodiment, for example, the thickness T330 of the third film 330 may be approximately

[0153] The side surface of the third film 330 may be positioned more inward than the side surface of the first encapsulation layer TFE1', and the side surface of the third film 330 may be positioned more inward than the side surface of the first film 310 and / or the side surface of the second film 320. Therefore, the side surface of the third film 330 may be covered by the second film 320. In an exemplary embodiment, the upper surface of the third film 330 may directly contact the second film 320, and the lower surface of the third film 330 may directly contact the first film 310. In this embodiment, the third film 330 may be sealed by the first film 310 and / or the second film 320. In this embodiment, as described above, the moisture permeation path through the third film 330 can be effectively blocked.

[0154] In an exemplary embodiment, the end of the third film 330 may be positioned further inward than the end of the first film 310 and / or the end of the second film 320. The area between the end of the third film 330 and the end of the first film 310 and / or the end of the second film 320 may be defined as a first area A1. In this embodiment, the first area A1 may be an area where the third film 330 is not disposed. The first area A1 may not overlap with the third film 330. The first film 310 may directly contact the second film 320 in the first area A1. In this embodiment, the third film 330 may be sealed by the first film 310 and / or the second film 320.

[0155] The length of the first region A1 in one direction may be about 5 μm. The length of the first region A1 in one direction may be determined or adjusted based on the diffusivity of the materials forming the first film 310 , the second film 320 , and the third film 330 , which will be described in more detail later.

[0156] In an exemplary embodiment, as described above, the second encapsulation layer TFE2' includes a SiN x The first film 310 and the second film 320 and the SiOC x When the third film 330 is formed, the bending characteristics of the second encapsulation layer TFE2' can be improved, and the moisture penetration path can be effectively blocked. Therefore, as described above, the lifespan and reliability of the light-emitting element can be improved, and the display quality of the display device can be improved.

[0157] Come back for reference Figure 6 , the third encapsulation layer TFE3 ′ is disposed between the first encapsulation layer TFE1 ′ and the second encapsulation layer TFE2 ′.

[0158] The side surface of the third encapsulation layer TFE3' can be arranged at a more inward position than the side surface of the first encapsulation layer TFE1' and / or the side surface of the second encapsulation layer TFE2'. Therefore, the side surface of the third encapsulation layer TFE3' can be covered by the first encapsulation layer TFE1'. In this embodiment, the upper surface of the third encapsulation layer TFE3' can directly contact the first encapsulation layer TFE1', and the lower surface of the third encapsulation layer TFE3' can directly contact the second encapsulation layer TFE2'. Therefore, the third encapsulation layer TFE3' can be arranged to be sealed by the first encapsulation layer TFE1' and / or the second encapsulation layer TFE2'. In this embodiment, the moisture penetration path through the third encapsulation layer TFE3' can be effectively blocked.

[0159] In an exemplary embodiment, the third encapsulation layer TFE3' is Figures 1 to 5 The described third encapsulation layer TFE3 is substantially the same or similar, and thus any repetitive detailed description thereof will be omitted.

[0160] The encapsulation layer TFEL' may further include an optical control layer OL. The optical control layer OL may be disposed between the light emitting element layer EML and the second encapsulation layer TFE2'. One surface of the optical control layer OL may contact the cover layer CPL, and the opposite surface of the optical control layer OL may directly contact the second encapsulation layer TFE2'.

[0161] In this embodiment, the optical control layer OL is Figures 1 to 5 The described optical control layers OL are substantially the same, and thus any repetitive detailed descriptions thereof will be omitted.

[0162] The sensing layer TSL may be disposed on the encapsulation layer TFEL′. Since the sensing layer TSL is directly disposed on the encapsulation layer TFEL′, the thickness of the display device may be reduced compared to a case where a separate touch panel including the sensing layer TSL is attached to the encapsulation layer TFEL′.

[0163] The sensing layer TSL may include a buffer layer TBF, a sensing conductive layer TCL, and a sensing insulating layer TIL.

[0164] A buffer layer TBF may be provided on the first encapsulation layer TFE1'. The buffer layer TBF may be used, together with the encapsulation layer TFEL', to prevent oxygen or moisture from penetrating into the light-emitting element layer EML. The buffer layer TBF may include the same material as the first encapsulation layer TFE1' or at least one material selected from the materials for the first encapsulation layer TFE1' listed above.

[0165] The side surface of the buffer layer TBF can be arranged at a more outward position than the side surface of the first encapsulation layer TFE1' and / or the side surface of the second encapsulation layer TFE2'. Therefore, the buffer layer TBF can cover the side surface of the first encapsulation layer TFE1'. In this embodiment, the first encapsulation layer TFE1' can be sealed by the buffer layer TBF. In this embodiment, the moisture penetration path can be more effectively blocked. In this embodiment, since the side surface of the buffer layer TBF is arranged at a more outward position than the side surface of the first encapsulation layer TFE1', the buffer layer TBF can directly contact the third insulating layer IL3. Therefore, as described above, a sufficient contact area between the buffer layer TBF and the third insulating layer IL3 can be ensured, so that a stable adhesion between the buffer layer TBF and the substrate SUB can be maintained.

[0166] The end of the buffer layer TBF may be set at a more outward position than the end of the encapsulation layer TFEL'. In an exemplary embodiment, the end of the buffer layer TBF may be set at a more outward position than the end of the third film 230 of the second encapsulation layer TFE2'. The area between the end of the buffer layer TBF and the end of the third film 330 may be defined as a second area A2. In this embodiment, the second area A2 may be an area in which the third film 230 is not provided. The second area A2 may not overlap with the third film 330. In the second area A2, the upper surface and the side surface of the first encapsulation layer TFE1' may directly contact the buffer layer TBF. In addition, in the second area A2, the first encapsulation layer TFE1' may contact the first film 310 and the second film 320 of the second encapsulation layer TFE2'. Therefore, the buffer layer TBF may seal the first encapsulation layer TFE1' and the second encapsulation layer TFE2', so that the moisture penetration path through the second encapsulation layer TFE2', in particular the moisture penetration path through the third film 330, may be more effectively blocked. The second area A2 is similar to the reference Figure 5 The second area A2 is substantially the same as that of FIG. 1 , and any repetitive detailed description thereof will be omitted.

[0167] In the exemplary embodiment, as described above, the side surface of the buffer layer TBF is positioned further outward than the side surface of the encapsulation layer TFEL', so that the buffer layer TBF can seal the encapsulation layer TFEL'. Therefore, as described above, the moisture permeation path through the second encapsulation layer TFE2', especially the moisture permeation path through the third film 330, can be more effectively blocked.

[0168] Hereinafter, exemplary embodiments of a method for manufacturing a display device will be described. In each exemplary embodiment of the display device described herein, for ease of description, the method for manufacturing the display device will be described in detail below. Figures 1 to 5 Method for displaying a device. Figures 1 to 5Components that are substantially the same as those in the drawings will be denoted by the same reference numerals, and any repetitive detailed description thereof will be omitted.

[0169] Figure 8 is a flowchart illustrating process operations in a method of manufacturing a display device according to an exemplary embodiment. Figures 9 to 16 are cross-sectional views illustrating process operations in a method of manufacturing a display device according to example embodiments.

[0170] Reference Figure 8 An exemplary embodiment of a method for manufacturing a display device includes: preparing a substrate SUB (S1); providing, for example, forming a light emitting element layer EML on the substrate SUB (S2); providing, for example, forming a cover layer CPL on the light emitting element layer EML (S3); providing, for example, forming a first encapsulation layer TFE1 on the cover layer CPL (S4); providing, for example, forming a third encapsulation layer TFE3 on the first encapsulation layer TFE1 (S5); providing, for example, forming a second encapsulation layer TFE2 on the first encapsulation layer TFE1 and the third encapsulation layer TFE3 (S6); providing, for example, forming a buffer layer TBF on the second encapsulation layer TFE2 (S7); and providing, for example, forming a sensing conductive layer TCL and a sensing insulating layer TIL on the buffer layer TBF (S8).

[0171] In this embodiment, reference is made to Figure 8 and Figure 9 , prepare a substrate SUB (S1). Some components of the thin film transistor layer TFTL and the light emitting element layer EML can be provided or formed on the substrate SUB. For the convenience of illustration and description, Figure 9 The first electrode 131, the light emitting layer 132 and the pixel definition film PDL of the light emitting element layer EML provided on the substrate SUB are shown. The substrate SUB, the thin film transistor layer TFTL, the first electrode 131, the light emitting layer 132 and the pixel definition film PDL are shown in FIG. Figures 1 to 7 The corresponding components described are substantially the same, and thus any repetitive detailed description will be omitted.

[0172] In this embodiment, reference is made to Figure 8 and Figure 10 , a light emitting element layer EML (S2) is provided or formed on a substrate SUB. For ease of explanation, Figure 10 A process of forming the second electrode 133 of the light emitting element layer EML is shown.

[0173] The formation of the second electrode 133 may be performed using a chemical vapor deposition (CVD) method. In an exemplary embodiment, a source portion S configured to provide a source to the substrate SUB may be disposed to face the substrate SUB. A mask may be disposed between the source portion S and the substrate SUB. In an exemplary embodiment, the mask may be a fine slit mask. In this embodiment, the mask may include a blocking portion configured to block the material provided from the source portion S and an opening portion. In addition, the opening portion may include a plurality of patterns. In this document, the term "mask end" means the outermost boundary of the opening portion, and the same meaning may be used in the various masks described below.

[0174] Reference Figure 10 , the second electrode mask M133 may be disposed between the source part S and the substrate SUB. When the second electrode mask M133 is disposed while the source part S provides the deposition material, the second electrode 133 may be formed on the substrate SUB.

[0175] The end M1 of the second electrode mask M133 may be disposed in the non-display area NDA. Due to a phenomenon in which the deposited material laterally expands when passing through the second electrode mask M133 spaced apart from the substrate SUB, the end M1 of the second electrode mask M133 may be disposed further inward than the end of the second electrode 133. However, the present disclosure is not limited thereto, and the end of the second electrode 133 may match the end M1 of the second electrode mask M133, and thus the two ends may be aligned with each other.

[0176] In an exemplary embodiment, referring to Figure 8 and Figure 11 , a cover layer CPL is provided or formed on the light emitting element layer EML ( S3 ).

[0177] The formation of the capping layer CPL may be performed using a CVD method.

[0178] The capping layer mask MCPL may be disposed between the source part S and the substrate SUB. When the capping layer mask MCPL is disposed while the source part S provides the deposition material, the capping layer CPL may be formed on the light emitting element layer EML.

[0179] The end M2 of the cover layer mask MCPL may be positioned in the non-display area NDA. Due to the phenomenon described above in which the deposition material spreads while passing through the cover layer mask MCPL, which is spaced apart from the substrate SUB, during the deposition process, the end M2 of the cover layer mask MCPL may be positioned further inward than the end of the cover layer CPL. However, the present disclosure is not limited thereto, and the end of the cover layer CPL may match the end M2 of the cover layer mask MCPL, and thus the two ends may be aligned with each other.

[0180] In an exemplary embodiment, referring to Figure 8 and Figure 12 , a first encapsulation layer TFE1 is provided or formed on the cover layer CPL ( S4 ).

[0181] The formation of the first encapsulation layer TFE1 may be performed using a CVD method.

[0182] The first encapsulation layer mask MTFE1 may be disposed between the source part S and the substrate SUB. When the first encapsulation layer mask MTFE1 is disposed while the source part S provides the deposition material, the first encapsulation layer TFE1 may be formed on the capping layer CPL.

[0183] The end M3 of the first encapsulation layer mask MTFE1 may be disposed in the non-display area NDA. Due to the phenomenon described above in which the deposition material spreads when passing through the first encapsulation layer mask MTFE1 spaced apart from the substrate SUB during the deposition process, the end M3 of the first encapsulation layer mask MTFE1 may be disposed further inward than the end of the first encapsulation layer TFE1. However, the present disclosure is not limited thereto, and the end of the first encapsulation layer TFE1 may mate with the end M3 of the first encapsulation layer mask MTFE1, and thus the two ends may be aligned with each other.

[0184] In an exemplary embodiment, referring to Figure 8 and Figure 13 , providing or forming a third encapsulation layer TFE3 on the first encapsulation layer TFE1 ( S5 ).

[0185] The third encapsulation layer mask MTFE3 can be set on the substrate SUB. The third encapsulation layer TFE3 can be formed by vapor-depositing a monomer in a liquid state when setting the third encapsulation layer mask MTFE3 and then curing it by ultraviolet light UV to form a polymer. The polymer can be manufactured, for example, by polymerization of at least one monomer selected from the following materials: pentabromophenyl acrylate, 2-(9H-carbazol-9-yl)ethyl methacrylate, N-vinyl carbazole, bis(methacryloylthiophenyl) sulfide, and zirconium acrylate.

[0186] The end M4 of the third encapsulation layer mask MTFE3 may be disposed in the non-display area NDA. The end M4 of the third encapsulation layer mask MTFE3 may be disposed at a more outward position than the end of the third encapsulation layer TFE3. However, the present disclosure is not limited thereto, and the end of the third encapsulation layer TFE3 may match the end M4 of the third encapsulation layer mask MTFE3, and thus the two ends may be aligned with each other.

[0187] In an exemplary embodiment, referring to Figure 8 and Figure 14, a second encapsulation layer TFE2 is provided or formed on the first encapsulation layer TFE1 and the third encapsulation layer TFE3 ( S6 ).

[0188] In exemplary embodiments, the formation of the second encapsulation layer TFE2 may be performed using a plasma enhanced chemical vapor deposition (PECVD) method.

[0189] In the following, reference will be made to Figures 17 to 20 An exemplary embodiment of forming the second encapsulation layer TFE2 is described.

[0190] Figure 17 is a flowchart illustrating process operations in a method of manufacturing a second encapsulation layer according to an exemplary embodiment. Figures 18 to 20 are cross-sectional views illustrating process operations in a method of manufacturing a second encapsulation layer according to example embodiments.

[0191] Reference Figure 17 , an exemplary embodiment of a method of forming the second encapsulation layer TFE2 (S6) may include: forming a first film 210 using a first gas G1 (S61); forming a third film 230 on the first film 210 using a second gas G2 (S62); and forming a second film 220 on the third film 230 using the first gas G1 (S63).

[0192] In an exemplary embodiment, referring to Figure 17 and Figure 18 The second encapsulation layer mask MTFE2 may be disposed between the source portion S and the substrate SUB. When the second encapsulation layer mask MTFE2 is disposed while the source portion S provides the first gas G1, a first film 210 may be formed on the first encapsulation layer TFE1 and the third encapsulation layer TFE3. The first gas G1 may include silane (SiH4) gas.

[0193] The end M5 of the second encapsulation layer mask MTFE2 may be disposed in the non-display area NDA. Since the second encapsulation layer mask MTFE2 is spaced apart from the substrate SUB, the first gas G1 may diffuse from the end M5 of the second encapsulation layer mask MTFE2. Therefore, the end of the first film 210 may be disposed at a position further outward than the end M5 of the second encapsulation layer mask MTFE2. However, the present disclosure is not limited thereto, and the end of the first film 210 may match the end M5 of the second encapsulation layer mask MTFE2, and thus the two ends may be aligned with each other.

[0194] In an exemplary embodiment, referring to Figure 17 and Figure 19 , when the second encapsulation layer mask MTFE2 is set while the source part S supplies the second gas G2 , the third film 230 may be formed on the first film 210 .

[0195] The second gas G2 may include hexamethyldisiloxane (HMDSO) gas and / or oxygen (O2). However, the present disclosure is not limited thereto, and it is possible to form SiOC x Any reaction gas may be selectively applied as the second gas G2.

[0196] HMDSO has low diffusivity compared to SiH4, so that the end of the third film 230 can be set at a position further inward than the end of the first film 210. As described above, the distance from the end of the first film 210 to the end of the third film 230 ( Figure 5 The first area A1) may be approximately 5 μm.

[0197] The end M5 of the second encapsulation layer mask MTFE2 may be disposed further inward than the end of the third film 230. However, the present disclosure is not limited thereto, and the end of the third film 230 may match the end M5 of the second encapsulation layer mask MTFE2, and thus the two ends may be aligned with each other.

[0198] In an exemplary embodiment, referring to Figure 17 and Figure 20 , when the source portion S provides the first gas G1 while the second encapsulation layer mask MTFE2 is set, the second film 220 may be formed on the third film 230. The first gas G1 may be Figure 18 The described first gas G1 is substantially the same, and thus any repetitive detailed description will be omitted.

[0199] The end M5 of the second encapsulation layer mask MTFE2 may be disposed further inward than the end of the second film 220. However, the present disclosure is not limited thereto, and the end of the second film 220 may match the end M5 of the second encapsulation layer mask MTFE2, and thus the two ends may be aligned with each other.

[0200] In an exemplary embodiment, the first film 210, the second film 220, and the third film 230 of the second encapsulation layer TFE2 described above may be continuously formed using the same mask. In this embodiment, the process operation may be further simplified, and thus economic feasibility may be ensured.

[0201] In an exemplary embodiment, referring back to Figure 8 and Figure 15 , providing or forming a buffer layer TBF on the second encapsulation layer TFE2 ( S7 ).

[0202] The formation of the buffer layer TBF may be performed using a CVD method.

[0203] The buffer layer mask MTBF may be disposed between the source part S and the substrate SUB. When the buffer layer mask MTBF is disposed while the source part S provides the deposition material, a buffer layer TBF may be formed on the second encapsulation layer TFE2.

[0204] The end M6 of the buffer layer mask MTBF may be disposed in the non-display area NDA. The end M6 of the buffer layer mask MTBF may be disposed further inward than the end of the buffer layer TBF. However, the present disclosure is not limited thereto, and the end of the buffer layer TBF may match the end M6 of the buffer layer mask MTBF, and thus the two ends may be aligned with each other.

[0205] In an exemplary embodiment, referring to Figure 8 and Figure 16 , forming a sensing conductive layer TCL and a sensing insulating layer TIL on the buffer layer TBF, thereby completing the following steps: Figure 4 The display device (S8) shown in FIG.

[0206] The formation of the sensing conductive layer TCL and the sensing insulating layer TIL may be performed using a CVD method. Figures 1 to 7 The sensing conductive layer TCL and the sensing insulating layer TIL are described, and thus duplicate descriptions thereof will be omitted.

[0207] Figure 21 is a conceptual diagram illustrating a method of manufacturing a display device according to an exemplary embodiment.

[0208] Figure 21 The relative relationships among the second electrode mask M133 , the capping layer mask MCPL, the first encapsulation layer mask MTFE1 , the third encapsulation layer mask MTFE3 , the second encapsulation layer mask MTFE2 and the buffer layer mask MTBF provided on the substrate SUB are shown.

[0209] Reference Figure 21 , the end M4 of the third encapsulation layer mask MTFE3 can be positioned further inward than the end M3 of the first encapsulation layer mask MTFE1 and the end M5 of the second encapsulation layer mask MTFE2. Therefore, the third encapsulation layer TFE3 can be sealed by the first encapsulation layer TFE1 and the second encapsulation layer TFE2. Therefore, as described above, the moisture permeation path through the third encapsulation layer TFE3 can be effectively blocked.

[0210] In this embodiment, the end M5 of the second encapsulation layer mask MTFE2 can be positioned further inward than the end M3 of the first encapsulation layer mask MTFE1. Therefore, the second encapsulation layer TFE2 can be sealed by the first encapsulation layer TFE1. In this embodiment, as described above, the moisture permeation path through the second encapsulation layer TFE2, especially the moisture permeation path through the third film 230, can be more effectively blocked.

[0211] In an exemplary embodiment, the end M3 of the first encapsulation layer mask MTFE1 may be positioned further inward than the end M6 of the buffer layer mask MTBF. Therefore, the first encapsulation layer TFE1 may be sealed by the buffer layer TBF. Therefore, as described above, the moisture permeation path through the first encapsulation layer TFE1 may be more effectively blocked.

[0212] When using Figure 21 The relationship mask can be effectively manufactured as shown above. Figure 4 An exemplary embodiment of the display device 1 is described.

[0213] Exemplary embodiments of the display device may have improved bending characteristics of the encapsulation layer by configuring the second encapsulation layer using a plurality of inorganic films including materials different from each other.

[0214] In an exemplary embodiment, the second encapsulation layer can be sealed by the first encapsulation layer and the buffer layer to effectively block the moisture permeation path. Therefore, the lifespan characteristics and reliability of the light emitting element can be improved, and thus the display quality of the display device can be improved.

[0215] The present invention should not be construed as limited to the exemplary embodiments set forth herein. Rather, these exemplary embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of the present invention to those skilled in the art.

[0216] While the invention has been particularly shown and described with reference to exemplary embodiments thereof, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit or scope of the invention as defined in the appended claims.

Claims

1. A display device, comprising: substrate; a light-emitting element layer, disposed on the substrate; A first encapsulation layer and a second encapsulation layer are provided on the light emitting element layer; a third encapsulation layer, disposed between the first encapsulation layer and the second encapsulation layer; as well as a buffer layer, covering the first encapsulation layer and the second encapsulation layer, The second encapsulation layer includes a first film, a second film disposed on the first film, and a third film disposed between the first film and the second film, and wherein the side surface of the third film is disposed at a more inward position than the side surface of the first film and the side surface of the second film, in, A first region is defined as a region between an end of the third film and an end of the first film, The second region is defined as a region between an end of the buffer layer and an end of the third film, The length of the second region in one direction is defined by the following formula: L A2 =L TBA -L TA2 +L A1 ( LTA 1≥L TA2 ≥L TA3 ) in, L A2 represents the length of the second region in the one direction, L A1 represents the length of the first region in the one direction, L TBA represents the length of the buffer layer in the one direction, L TA1 represents the length of the first encapsulation layer in the one direction, L TA2 represents the length of the second encapsulation layer in the one direction, and L TA3 represents the length of the third encapsulation layer in the one direction.

2. The display device according to claim 1, wherein A side surface of the second encapsulation layer is disposed at a more inward position than a side surface of the first encapsulation layer.

3. The display device according to claim 2, wherein: The second encapsulation layer is disposed between the buffer layer and the first encapsulation layer, and The buffer layer is in direct contact with the second film.

4. The display device according to claim 2, wherein The first encapsulation layer is disposed between the buffer layer and the second encapsulation layer, and The first encapsulation layer is in direct contact with the second film.

5. The display device according to claim 1, wherein Each of the first film and the second film includes SiN x ,and The third film includes SiOC x . The display device according to claim 1 , wherein: The thickness of the third film is greater than the thickness of the first film and the thickness of the second film.

7. The display device according to claim 1, wherein The second film covers side surfaces of the third film.

8. The display device according to claim 7, wherein: The second film is in direct contact with a side surface of the first film.

9. The display device according to claim 1, wherein A side surface of the third encapsulation layer is disposed at a more inward position than a side surface of the second encapsulation layer.

10. The display device according to claim 1, wherein The length of the first region in the direction is smaller than the length of the second region in the direction.

11. The display device according to claim 1, wherein The thickness of the third encapsulation layer is greater than the thickness of the first encapsulation layer and the thickness of the second encapsulation layer, and The third encapsulation layer and the second film include carbon compounds different from each other.

12. The display device according to claim 1, wherein The substrate includes a plurality of pixels, and The light emitting element layer includes: a first electrode, a pixel defining film disposed on the first electrode, a light emitting layer disposed on the first electrode and the pixel defining film, and a second electrode disposed on the light emitting layer. An opening is defined through the pixel-defining film to define the pixel.

13. A method for manufacturing a display device, the method comprising: preparing a substrate; providing a light emitting element layer on the substrate; providing a first encapsulation layer on the light emitting element layer using a first mask; as well as providing a second encapsulation layer on the first encapsulation layer using a second mask, The second encapsulation layer includes: a first film disposed on the first encapsulation layer, a second film disposed on the first film, and a third film disposed between the first film and the second film, and The end of the first mask is disposed at a more outward position than the end of the second mask, in, A first region is defined as a region between an end of the third film and an end of the first film, The second region is defined as a region between an end of the buffer layer and an end of the third film, The length of the second region in one direction is defined by the following formula: L A2 =L TBA -L TA2 +L A1 (L TA1 ≥L TA2 ≥L TA3 )in, L A2 represents the length of the second region in the one direction, L A1 represents the length of the first region in the one direction, L TBA represents the length of the buffer layer in the one direction, L TA1 represents the length of the first encapsulation layer in the one direction, L TA2 represents the length of the second encapsulation layer in the one direction, and L TA2 represents the length of the third encapsulation layer in the one direction.

14. The method according to claim 13, wherein forming the second encapsulation layer using plasma enhanced chemical vapor deposition, The first film and the second film are deposited using a first gas, and The third film is deposited using a second gas.

15. The method according to claim 14, wherein The first gas includes SiH4, and The second gas includes hexamethyldisiloxane.

16. The method according to claim 14, further comprising: providing the buffer layer on the second encapsulation layer using a buffer layer mask, The end of the buffer layer mask is arranged at a more outward position than the end of the first mask.

17. The method according to claim 16, further comprising: Between providing the first encapsulation layer and providing the second encapsulation layer, providing the third encapsulation layer using a third mask, The end of the third mask is arranged at a more inward position than the end of the second mask.

18. The method according to claim 17, wherein Providing the light emitting element layer includes providing a first electrode, providing a light emitting layer on the first electrode, providing a second electrode on the light emitting layer, and providing a covering layer on the second electrode.

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