Display Devices
Through the conductive film packaging structure, the problem of difficult to manufacture a small-sized anisotropic conductive film in the prior art is solved, and effective electrical connection of pad electrodes and reduction of dead zones of display devices is achieved.
Patent Information
- Application Number
- CN202010919696.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-09-04
- Filing Date
- 2020-09-04
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2040-09-04
AI Technical Summary
The prior art is difficult to manufacture an anisotropic conductive film having a length of 0.6 mm or less in the second direction, resulting in a reduction in the pad area being difficult to achieve.
A conductive film encapsulation structure is adopted, including a base substrate, a raised electrode, a metal pattern, a first film layer and a conductive ball, and through the precise arrangement and bonding of these components, a conductive film capable of electrically connecting to the pad electrode is formed.
It is realized that the anisotropic conductive film is effectively formed when the pad area length is reduced, ensuring that the pad electrode can be electrically connected to the external device, and reducing the dead zone of the display device.
Smart Images

Figure CN112447649B_ABST
Abstract
Description
Technical Field
[0001] Example embodiments relate generally to a display device, and more particularly, to a display device including a conductive film package. Background Art
[0002] Flat panel display devices are used as display devices to replace cathode ray tube display devices due to their light weight and thin structure. For example, flat panel display devices include liquid crystal display devices and organic light emitting display devices.
[0003] The display device may include a lower substrate, an upper substrate and a plurality of pad electrodes. The plurality of pad electrodes may be electrically connected to an external device and may be arranged in a pad region of the lower substrate in a first direction while being spaced apart from each other. The length of the pad region in a second direction perpendicular to the first direction may generally be reduced so as to reduce the dead zone of the display device. In this case, the length of each of the pad electrodes in the second direction may also be reduced. An anisotropic conductive film and a flexible printed circuit board (e.g., a chip on a film) may be disposed on the pad electrode so as to be electrically connected to an external device. The anisotropic conductive film may bond the pad electrode to the flexible printed circuit board, and the pad electrode may be electrically connected to the flexible printed circuit board by a conductive ball included in the anisotropic conductive film. However, it is generally difficult to manufacture an anisotropic conductive film having a length of 0.6 mm or less in the second direction. In other words, the reduced length of the pad region (e.g., 0.5 mm or less) results in difficulties in forming an anisotropic conductive film on the pad electrode.
[0004] The above information disclosed in this Background section is only for understanding the background of the present inventive concept and therefore it may contain information that does not constitute prior art.
[0005] Public Content
[0006] A display device constructed according to an exemplary embodiment of the present invention includes a conductive film package.
[0007] Additional features of the inventive concept will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concept.
[0008] According to an exemplary embodiment, a display device includes a lower substrate, a display structure, a pad electrode and a conductive film package, wherein the lower substrate has a display area and a pad area; the display structure is arranged in the display area of the lower substrate; the pad electrode is arranged in the pad area of the lower substrate and is spaced apart in a first direction; the conductive film package includes a base substrate, a raised electrode, a metal pattern, a first film layer and a conductive ball, the base substrate is arranged on the pad electrode and includes a corner portion having an arc shape, the raised electrode is arranged in a first portion of the bottom surface of the base substrate and overlaps with the pad electrode, the metal pattern is arranged in a second portion of the bottom surface of the base substrate located at both sides of the first portion, the first film layer is arranged between the base substrate and the lower substrate and overlaps with the pad electrode, a portion of the raised electrode and the metal pattern, and the conductive ball is arranged inside the first film layer.
[0009] A corner portion of the base substrate may be disposed in a pad region of the lower substrate.
[0010] The metal pattern may include an alignment pattern disposed adjacent to a corner portion of the base substrate and an adhesion pattern disposed parallel to the bump electrode.
[0011] At least one of the corners of the first film layer may be aligned with a corner of the alignment pattern.
[0012] The first film layer may cover the bonding pattern.
[0013] The conductive balls may be arranged in a first direction and a second direction perpendicular to the first direction, and may be spaced apart from each other at the same interval.
[0014] The conductive film package may include a first region in which the pad electrode is disposed and a second region disposed between adjacent first regions.
[0015] The conductive balls may include first conductive balls disposed in the first region and second conductive balls disposed in the second region, each of the first conductive balls having a first diameter in a direction from the lower substrate to the base substrate, and each of the second conductive balls having a second diameter greater than the first diameter in a direction from the lower substrate to the base substrate.
[0016] At least a portion of each of the first conductive balls may contact the pad electrode and the bump electrode.
[0017] The first film layer may partially cover the conductive balls.
[0018] The first film layer disposed in the first region may have a thickness different from a thickness of the first film layer disposed in the second region.
[0019] The first film layer disposed in the first region may have a first thickness and expose at least a portion of each of the conductive balls disposed in the first region, and the first film layer disposed in the second region may have a second thickness greater than the first thickness and cover the conductive balls in the second region.
[0020] The conductive film package may further include a second film layer disposed between the first film layer and the base substrate.
[0021] The conductive balls may not be disposed inside the second film layer.
[0022] The second film layer may be disposed in the second region, a top surface of the second film layer contacting a bottom surface of the base substrate, and a bottom surface of the second film layer contacting a top surface of the first film layer.
[0023] A first end of each of the ridge electrodes may overlap the first film layer, each of the ridge electrodes may extend in a second direction perpendicular to the first direction, and a second end of each of the ridge electrodes may not overlap the first film layer.
[0024] The bump electrodes and the pad electrodes may be electrically connected to each other through the conductive balls.
[0025] The display device may further include an upper substrate disposed on the display structure in the display region and opposite to the lower substrate, wherein the pad region of the lower substrate may not overlap with the upper substrate.
[0026] A length of the pad region in a second direction perpendicular to the first direction may be less than about 600 micrometers, and a length of each of the pad electrodes in the second direction may be less than about 300 micrometers.
[0027] The curvature of the corner portion may be less than about 0.3R.
[0028] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept.
[0030] Figure 1 is a plan view showing a display apparatus according to an exemplary embodiment.
[0031] Figure 2 It is shown Figure 1 A perspective view of a display device.
[0032] Figure 3 It is shown Figure 1 A partial enlarged plan view of area "A".
[0033] Figure 4 It is shown that the Figure 1 A plan view of the rear side of a conductive film package in a display device.
[0034] Figure 5 is a block diagram illustrating external devices electrically connected to a display device.
[0035] Figure 6 is along Figure 1 A cross-sectional view taken along line II'.
[0036] Figure 7 is along Figure 3 A cross-sectional view taken along line II-II'.
[0037] Figure 8 It is shown Figure 6 A partial enlarged cross-sectional view of area "B".
[0038] Fig. 9 is a cross-sectional view showing a display device according to an exemplary embodiment.
[0039] Fig.10 , Fig.11 , Fig.12 , Fig.13 , Fig.14 , Fig.15 , Fig.16 , Fig.17 , Fig.18 and Fig.19 is a view illustrating a method of manufacturing a display device according to an exemplary embodiment. DETAILED DESCRIPTION
[0040] In the following description, for the purpose of explanation, many specific details are set forth for a thorough understanding of each exemplary embodiment or embodiment of the present invention. As used herein, "embodiment" and "embodiment" are interchangeable words, which are non-limiting examples of one or more devices or methods to which the inventive concepts disclosed herein are applied. However, it is apparent that each exemplary embodiment may be implemented without these specific details or with one or more equivalent arrangements. In other cases, in order to avoid unnecessary confusion of each exemplary embodiment, known structures and devices are shown in block diagram form. In addition, each exemplary embodiment may be different, but need not be exclusive. For example, without departing from the inventive concept, the specific shape, configuration and characteristics of the exemplary embodiment may be used or performed in another exemplary embodiment.
[0041] Unless otherwise noted, the exemplary embodiments shown are understood to be exemplary features that provide different details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise noted, the features, components, modules, layers, films, panels, regions and / or aspects of each embodiment (hereinafter individually or collectively referred to as "elements") may be combined, separated, exchanged and / or rearranged without departing from the inventive concept.
[0042] The use of hatching and / or shading in the accompanying drawings is generally used to make the boundaries between adjacent elements clear. Thus, unless otherwise specified, the presence or absence of hatching or shading does not convey or indicate any preference or requirement for a particular material, material property, size, ratio, commonality between the elements shown, and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the accompanying drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiments may be performed differently, a specific process sequence may be performed differently from the described sequence. For example, two consecutively described processes may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.
[0043] When an element such as a layer is referred to as being on another element or layer, being connected to or being coupled to another element or layer, it may be directly on the other element or layer, being connected to or being coupled to the other element or layer, or there may be an intervening element or layer. However, when an element such as a layer is referred to as being directly on another element or layer, being directly connected to or being directly coupled to another element or layer, there may not be an intervening element or layer. For this reason, the term "connection" may represent a physical connection, electrical connection and / or fluid connection with or without an intermediate element. In addition, the D1 axis, the D2 axis and the D3 axis are not limited to the three axes of a rectangular coordinate system, such as an x-axis, a y-axis and a z-axis, but can be explained with a broader meaning. For example, the D1 axis, the D2 axis and the D3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, for example, XYZ, XYY, YZ, and ZZ. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.
[0044] Although the terms "first", "second", etc. may be used herein to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the teachings of the present disclosure, the first element discussed below may be referred to as the second element.
[0045] Spatially relative terms, such as "beneath," "below," "under," "lower," "above," "upper," "over," "higher," "side" (e.g., as in "sidewall"), and the like, may be used herein for descriptive purposes, and thus may be used to describe the relationship of one element to another element as shown in the accompanying drawings. Spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture in addition to the orientation depicted in the accompanying drawings. For example, if the device in the accompanying drawings is turned over, elements described as being "below" or "beneath" other elements or features would then be oriented "above" the other elements or features. Thus, the exemplary term "below" may encompass both the above and below orientations. Furthermore, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and as such, the spatially relative descriptors used herein should be interpreted accordingly.
[0046] The terms used herein are for the purpose of describing specific embodiments and are not intended to be limiting. As used herein, the singular forms "a", "an", and "said" are intended to also include the plural meaning unless the context clearly indicates otherwise. In addition, the terms "comprises", "comprising", "includes", and / or "including" when used in this specification indicate the presence of the features, wholes, steps, operations, elements, components, and / or combinations thereof described, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components, and / or combinations thereof. It is also worth noting that, as used herein, the terms "substantially", "about", and other similar terms are used as approximate terms rather than as terms of degree, and as such, are used to allow for inherent deviations in measured values, calculated values, and / or provided values that will be recognized by those of ordinary skill in the art.
[0047] Various exemplary embodiments are described herein with reference to cross-sectional views and / or exploded views that are schematic diagrams of idealized exemplary embodiments and / or intermediate structures. As such, variations from the illustrated shapes due to, for example, manufacturing techniques and / or tolerances are contemplated. Therefore, the exemplary embodiments disclosed herein should not necessarily be construed as limited to the specifically illustrated shapes of the regions, but rather include shape deviations due to, for example, manufacturing. In this manner, the regions shown in the accompanying drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such, are not necessarily intended to be limiting.
[0048] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. Terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.
[0049] Figure 1 is a plan view showing a display apparatus according to an exemplary embodiment. Figure 2 It is shown Figure 1 A perspective view of a display device. Figure 3 yes Figure 1 A partial enlarged plan view of area "A". Figure 4 It is shown that the Figure 1 A plan view of the rear side of a conductive film package in a display device. Figure 5 is a block diagram illustrating external devices electrically connected to a display device. Figure 6 is along Figure 1 A cross-sectional view taken along line II'. Figure 7 is along Figure 3 For example, Figure 2 is a perspective view exemplarily showing when the conductive film package 500 is bent.
[0050] Reference Figure 1 , Figure 3 , Figure 4 , Figure 6 and Figure 7 The display device 100 may include a lower substrate 110, a display structure 200 (see Figure 8 ), an upper substrate 410, an insulating layer 460, a pad electrode 470, a conductive film package 500, etc. The lower substrate 110 may include a display area 10 and a pad area 60 located at one side of the display area 10. The conductive film package 500 may include a base substrate 510, a ridge electrode 520, a metal pattern 580, a driving integrated circuit 550, a conductive ball 600, and a film layer 630. In addition, the metal pattern 580 may include an alignment pattern 571 and an adhesive pattern 591, and the conductive ball 600 may include a first conductive ball 610 and a second conductive ball 620.
[0051] The lower substrate 110 may include a transparent or opaque material. The lower substrate 110 may include an ordinary quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped (F-doped) quartz substrate, a sodium-doped glass substrate, a non-alkaline glass substrate, etc. In other exemplary embodiments, the lower substrate 110 may be formed of a transparent resin substrate having flexibility, such as a polyimide substrate. In this case, the polyimide substrate may include a first polyimide layer, a barrier film layer, a second polyimide layer, etc.
[0052] Display structure 200 (e.g., Figure 8 The display structure 200 may be provided in the display region 10 on the lower substrate 110. An image, such as a video image, may be displayed in the display region 10 through the display structure 200.
[0053] The upper substrate 410 may be disposed in the display region 10 on the display structure 200. The upper substrate 410 may face the lower substrate 110 and may not be disposed in the pad region 60. The upper substrate 410 may include a material substantially the same as the lower substrate 110. For example, the upper substrate 410 may include an ordinary quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped (F-doped) quartz substrate, a sodium-doped glass substrate, a non-alkaline glass substrate, and the like. In other exemplary embodiments, the upper substrate 410 may include a transparent inorganic material or a flexible plastic. For example, the upper substrate 410 may be formed of a transparent resin substrate having flexibility. In this case, at least one inorganic layer and at least one organic layer may be alternately laminated to improve the flexibility of the display device 100 as an organic light emitting diode display device. For example, the laminated structure may include a first inorganic layer, an organic layer, and a second inorganic layer.
[0054] The outermost part of the display area 10 can be defined as a peripheral area. The sealing member can be arranged in the peripheral area between the lower substrate 110 and the upper substrate 410. In particular, the sealing member can be arranged along the peripheral area and surround the display structure 200. The sealing member may include glass frit, etc. In addition, the sealing member may also include a photocurable material. For example, the sealing member may include a mixture of an organic material and a photocurable material, and the sealing member may be formed by curing the mixture after irradiating the mixture with ultraviolet rays (UV), lasers, visible light, etc. The photocurable material contained in the sealing member may include acrylic resin, epoxy resin, epoxy acrylate resin, polyester acrylate resin, polyester polyurethane acrylate oligomer resin, polyurethane acrylate resin, polyurethane acrylate oligomer resin, polybutadiene acrylate resin, acrylic silicone resin, alkyl acrylate resin, vinyl phenol resin, bismaleimide resin, diallyl phthalate resin, etc. For example, the mixture can be irradiated with a laser. When the laser is irradiated, the mixture can be changed from a solid state to a liquid state, and the liquid mixture can be cured into a solid state after a predetermined time. According to the state change of the mixture, the upper substrate 410 may be sealed and coupled to the lower substrate 110 .
[0055] Wiring, such as gate signal wiring, data signal wiring, gate initialization signal wiring, initialization voltage wiring, light emission control signal wiring, and power supply voltage wiring, may be disposed in the peripheral region on the lower substrate 110. A first portion of the wiring may be electrically connected to the display structure 200, and a second portion of the wiring may be electrically connected to the pad electrode 470. In an exemplary embodiment, a gate driver and a data driver may be disposed in the peripheral region.
[0056] like Figure 6 and Figure 7 As shown, the pad electrode 470 may be disposed in the pad region 60 on the lower substrate 110. The pad electrodes 470 may be spaced apart from each other in a first direction D1 substantially parallel to the top surface of the lower substrate 110. The region overlapping the portion where the pad electrode 470 is disposed may be defined as a first region 61, and the region between two adjacent pad electrodes 470 (e.g., a region where the pad electrode 470 is not disposed) may be defined as a second region 62. For example, the first length d1 of each of the pad electrodes 470 in the second direction D2 perpendicular to the first direction D1 may be less than about 300 microns, and the second length d2 of the pad region 60 in the second direction D2 may be less than about 600 microns. In an exemplary embodiment, the first length d1 may be about 200 microns.
[0057] For example, the pad electrode 470 may include first to n-th pad electrodes, where n is an integer greater than or equal to 1, and the first to n-th pad electrodes may be arranged to be spaced apart from each other at a predetermined interval along the first direction D1 in the pad region 60. The portion in which the first to n-th pad electrodes are disposed may correspond to the first region 61, and a space spaced between the k-th and (k+1)-th pad electrodes may correspond to the second region 62, where k is an integer between 1 and n.
[0058] In addition, as described above, the pad electrode 470 may be electrically connected to a gate signal wiring, a data signal wiring, a gate initialization signal wiring, an initialization voltage wiring, a light emission control signal wiring, a power supply voltage wiring, etc. provided in the peripheral region. Figure 5 As shown in , the pad electrode 470 can electrically connect the display device 100 to the external device 101. For example, the external device 101 can generate a gate signal, a data signal, a gate initialization signal, an initialization voltage, a light emitting control signal, a power supply voltage, etc. The external device 101 can be electrically connected to the display device 100 through the conductive film package 500 and the pad electrode 470, and can provide the gate signal, the data signal, the gate initialization signal, the initialization voltage, the light emitting control signal, the power supply voltage, etc. to the display structure 200.
[0059] In addition, the pad electrode 470 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other. In other exemplary embodiments, each of the pad electrodes 470 may have a multilayer structure including a plurality of metal layers. For example, the metal layers may have different thicknesses or include different materials.
[0060] Return to reference Figure 6 and Figure 7, the insulating layer 460 may be disposed in a portion of the pad region 60 on the lower substrate 110. In particular, the insulating layer 460 may be disposed to surround each of the pad electrodes 470 in the pad region 60. For example, the insulating layer 460 may be disposed in the second region 62 on the lower substrate 110, and may not be disposed in the first region 61. In an exemplary embodiment, the top surface of the insulating layer 460 and the top surface of each of the pad electrodes 470 may be located at substantially the same level, without being limited thereto. For example, in other exemplary embodiments, the insulating layer 460 may cover both sides of each of the pad electrodes 470, and the top surface of the insulating layer 460 may be positioned lower or higher than the top surface of each of the pad electrodes 470. The insulating layer 460 may include an organic material or an inorganic material. In exemplary embodiments, the insulating layer 460 may include an organic material such as photoresist, a polyacryl-based resin, a polyimide-based resin, a polyamide-based resin, a siloxane-based resin, an acryl-based resin, and an epoxy-based resin.
[0061] Return to reference Figure 1 , Figure 3 , Figure 4 , Figure 6 and Figure 7 , the conductive film package 500 may be disposed to overlap the pad electrode 470 and the insulating layer 460. The conductive film package 500 may have a configuration in which, for example, an anisotropic conductive film (ACF) and a chip on film (COF) are laminated.
[0062] like Figure 1 , Figure 3 , Figure 4 and Figure 7 As shown in , the base substrate 510 may be located on the pad electrode 470. In an exemplary embodiment, the first corner portion E1 and the second corner portion E2 of the base substrate 510 may have an arc shape. The first corner portion E1 and the second corner portion E2 may be located in the pad region 60 on the lower substrate 110. The curvature of each of the first corner portion E1 and the second corner portion E2 may be less than about 0.3R, without being limited thereto. For example, in some exemplary embodiments, the curvature of each of the first corner portion E1 and the second corner portion E2 may be about 0.1R. The base substrate 510 may include a flexible film including a material having flexibility. For example, the base substrate 510 may include a polyimide resin, a polyester resin, or the like.
[0063] For example, in the process of manufacturing the display device 100, a cutting process may be performed to form the first corner portion E1 and the second corner portion E2 of the base substrate 510 in an arc shape. By performing the cutting process, the first corner portion E1 and the second corner portion E2 may be prevented from bending. Specifically, when the cutting process is not performed, the first corner portion E1 and the second corner portion E2 may be bent, which may cause defects in the display device 100. In addition, each of the first corner portion E1 and the second corner portion E2 may have a relatively small curvature. For example, when each of the first corner portion E1 and the second corner portion E2 has a relatively large curvature, the area in which the film layer 630 is disposed may be relatively reduced, and the corner of the film layer 630 may protrude from the first corner portion E1 and the second corner portion E2 of the base substrate 510. Therefore, the curvature of each of the first corner portion E1 and the second corner portion E2 may be formed relatively small. In an exemplary embodiment, the portion in which the first corner portion E1 and the second corner portion E2 are located may overlap with the pad area 60 of the lower substrate 110, and the corner portion of the base substrate 510 opposite to the first corner portion E1 and the second corner portion E2 may overlap with a printed circuit board (PCB), a flexible printed circuit board (FPCB), a flexible flat cable (FFC), or an external device 101.
[0064] Although the first and second corner portions E1 and E2 at one side of the base substrate 510 have been described as having an arc shape, the inventive concept is not limited thereto. For example, in other exemplary embodiments, a corner portion opposite to the first and second corner portions E1 and E2 may also have an arc shape.
[0065] In addition, although the base substrate 510 is shown as having substantially a rectangular plan shape, the inventive concept is not limited to a specific shape of the base substrate 510. For example, in some exemplary embodiments, the base substrate 510 may have a triangular plan shape, a circular plan shape, an elliptical plan shape, a diamond plan shape, a polygonal plan shape, or a track-shaped plan shape.
[0066] like Figure 3 As shown in FIG. 5 , the driving integrated circuit 550 may be disposed in the first surface S1 (eg, top surface) of the base substrate 510. The driving integrated circuit 550 may be provided in the first surface S1 (eg, top surface) of the base substrate 510. Figure 5 The external device 101 receives an input signal and a driving IC power supply voltage, and the driving integrated circuit 550 may provide an output signal to the display structure 200 based on the input signal. Therefore, the driving integrated circuit 550 may control the driving of the display structure 200. The driving integrated circuit 550 may be electrically connected to the ridge electrode 520. In other exemplary embodiments, the driving integrated circuit 550 may be mounted in the pad region 60 of the lower substrate 110.
[0067] like Figure 4 , Figure 6 and Figure 7 As shown in , the ridge electrodes 520 may be spaced apart from each other on the second surface S2 (e.g., the bottom surface) of the base substrate 510. In an exemplary embodiment, a first end of each of the ridge electrodes 520 may overlap with the film layer 630, and the ridge electrodes 520 may extend in the second direction D2. A second end opposite to the first end of each of the ridge electrodes 520 may not overlap with the film layer 630. A portion of the base substrate 510 in which the ridge electrodes 520 overlap with the film layer 630 is defined as a first portion of the base substrate 510. In addition, portions of the base substrate 510 located at both sides of the first portion, for example, portions adjacent to the first corner portion E1 and the second corner portion E2, are defined as a second portion of the base substrate 510.
[0068] The first portion of each of the ridge electrodes 520 may be positioned to overlap with the pad electrode 470 and may be electrically connected to the pad electrode 470. In addition, the second portion of each of the ridge electrodes 520 may overlap with the PCB, FPCB, FFC, or external device 101 and may be electrically connected to the PCB, FPCB, FFC, or external device 101. Each of the ridge electrodes 520 may overlap with each of the pad electrodes 470 in the first region 61 and may be electrically connected to the pad electrode 470 through a conductive ball 600 (e.g., a first conductive ball 610). Each of the ridge electrodes 520 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other. In other exemplary embodiments, each of the ridge electrodes 520 may have a multilayer structure including a plurality of metal layers. For example, the metal layers may have different thicknesses or include different materials.
[0069] Although the first end and the second end of each of the ridge electrodes 520 are described as being integral with each other, the inventive concept is not limited thereto. For example, the first end and the second end of each of the ridge electrodes 520 may be spaced apart from each other in the second direction D2. In this case, the first end may be electrically connected to one side of the driving integrated circuit 550, and the second end may be electrically connected to the other side of the driving integrated circuit 550.
[0070] like Figure 4 As shown in , the metal pattern 580 may be disposed in the second portion of the base substrate 510 .
[0071] The alignment pattern 571 of the metal pattern 580 may be disposed adjacent to the first corner portion E1 and the second corner portion E2. In an exemplary embodiment, the alignment pattern 571 may include a first alignment portion disposed adjacent to the first corner portion E1 and a second alignment portion disposed adjacent to the second corner portion E2. For example, in the process of manufacturing the display device 100, the alignment pattern 571 may help form the film layer 630 so that the film layer 630 is accurately formed in the first portion and the second portion on the second surface S2 of the base substrate 510. In particular, at least one corner of the film layer 630 may be aligned with a corner of the alignment pattern 571.
[0072] Although the alignment pattern 571 has been described as including two alignment portions, the inventive concept is not limited thereto. For example, the alignment pattern 571 may include one or more than two alignment portions.
[0073] The adhesive pattern 591 may be positioned adjacent to the alignment pattern 571 and may be disposed in parallel with the ridge electrode 520. However, in some exemplary embodiments, the adhesive pattern 591 may not be disposed in parallel with the ridge electrode 520, but may be disposed by rotating at a predetermined angle. In an exemplary embodiment, the adhesive pattern 591 may include a first adhesive portion positioned adjacent to the first alignment portion and a second adhesive portion positioned adjacent to the second alignment portion. For example, in the process of manufacturing the display device 100, the adhesive pattern 591 may be formed in the second portion on the second surface S2 of the base substrate 510 to increase the adhesive strength between the base substrate 510 and the film layer 630. In addition, in the process of bonding the conductive film package 500 to the pad region 60 of the lower substrate 110, pressure may be applied from the upper substrate 410 to the lower substrate 110 after the conductive film package 500 contacts the pad electrode 470. In this case, the uncured resin layer (e.g., the film layer 630) located in the second portion of the base substrate 510 may flow back, and the adhesive pattern 591 may be used as a dam to reduce the amount of the backflow.
[0074] Although the adhesive pattern 591 is illustrated as including six adhesive portions, the inventive concept is not limited to a specific number of adhesive portions. For example, in some exemplary embodiments, the adhesive pattern 591 may include at least two adhesive portions.
[0075] Each of the metal patterns 580 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. For example, each of the metal patterns 580 may include gold (Au), silver (Ag), aluminum (Al), platinum (Pt), nickel (Ni), titanium (Ti), palladium (Pd), magnesium (Mg), calcium (Ca), lithium (Li), chromium (Cr), tantalum (Ta), tungsten (W), copper (Cu), molybdenum (Mo), scandium (Sc), neodymium (Nd), iridium (Ir), aluminum-containing alloys, aluminum nitride (AlN), silver-containing alloys, tungsten nitride (WN), copper-containing alloys, molybdenum-containing alloys, titanium nitride (TiN), chromium nitride (CrN), tantalum nitride (TaN), strontium ruthenium oxide (SrRuO), zinc oxide (ZnO), indium tin oxide (ITO), tin oxide (SnO), indium oxide (InO), gallium oxide (GaO), indium zinc oxide (IZO), etc. These may be used alone or in combination with each other. In other exemplary embodiments, each of the metal patterns 580 may have a multi-layer structure including a plurality of metal layers. For example, the metal layers may have different thicknesses or include different materials.
[0076] like Figure 6 and Figure 7 As shown in , the conductive balls 600 may be disposed in the film layer 630. In an exemplary embodiment, the conductive balls 600 disposed in the first region 61 and the second region 62 may have shapes different from each other. For example, each of the first conductive balls 610 located in the first region 61 may have an elliptical planar shape, and each of the second conductive balls 620 located in the second region 62 may have a circular planar shape. In addition, each of the conductive balls 600 disposed in the remaining regions of the film layer 630 other than the first region 61 and the second region 62 may have a circular planar shape, and the second conductive balls 620 may be located in the remaining regions. For example, in the process of manufacturing the display device 100, during the process of bonding the conductive film package 500 to the pad region 60 of the lower substrate 110, after the conductive film package 500 contacts the pad electrode 470, pressure may be applied from the upper substrate 410 to the lower substrate 110. In this case, the distance between each of the pad electrodes 470 and each of the bump electrodes 520 may be reduced, and the shape of each of the conductive balls 600 located in the first region 61 may be changed.
[0077] The conductive balls 600 may be arranged on the pad electrodes 470 and the insulating layer 460 in the first direction D1 and the second direction D2, and may be spaced apart from each other at substantially the same interval (see Fig.13In particular, the conductive balls 600 may be arranged in only one layer and may not overlap each other in a third direction D3 perpendicular to the first direction D1 and the second direction D2. In some exemplary embodiments, the conductive balls 600 may be arranged in a plurality of layers or randomly arranged.
[0078] like Figure 7 As shown in FIG. 6 , the first conductive ball 610 may be disposed in the first region 61 between the pad electrode 470 and the ridge electrode 520, and the second conductive ball 620 may be disposed in the second region 62. The diameter of each of the first conductive balls 610 in the third direction D3 may be smaller than the diameter of each of the second conductive balls 620 in the third direction D3. In an exemplary embodiment, at least a portion of each of the first conductive balls 610 may be in direct contact with the pad electrode 470 and the ridge electrode 520. In this case, the film layer 630 may expose a portion of the first conductive ball 610. Each of the conductive balls 600 may have a structure in which a metal layer (e.g., a layer including nickel, cobalt, gold, silver, and copper) is coated on a spherical polymer.
[0079] Although the conductive balls 600 according to the illustrated exemplary embodiment have been described as being arranged in a grid shape, the inventive concept is not limited thereto. For example, in other exemplary embodiments, the conductive balls may be arranged in a rectangular or diamond shape on a plane.
[0080] In addition, although the conductive ball 600 according to the illustrated exemplary embodiment has been described as having a circular plan shape or an elliptical plan shape, the inventive concept is not limited to a specific shape of the conductive ball. For example, in other exemplary embodiments, the conductive ball may have a triangular plan shape, a rectangular plan shape, a rhombus plan shape, a polygonal plan shape, or a track-shaped plan shape.
[0081] like Figure 4 , Figure 6 and Figure 7As shown in , the film layer 630 may be disposed to overlap the pad electrode 470, a portion of the ridge electrode 520, and the metal pattern 580 between the base substrate 510 and the lower substrate 110. The film layer 630 may partially cover the conductive ball 600. In particular, the film layer 630 may be disposed in the first and second portions of the base substrate 510, and the bottom surface of the film layer 630 may be in contact with the pad electrode 470 and the insulating layer 460. In an exemplary embodiment, the film layer 630 disposed in the first region 61 and the second region 62 may have different thicknesses. For example, the film layer 630 may have a first thickness in the first region 61, and may expose at least a portion of each of the first conductive balls 610. In addition, the film layer 630 may have a second thickness greater than the first thickness in the second region 62, and may cover the second conductive ball 620 in the second region 62. In addition, as described above, at least one of the corners of the film layer 630 may be aligned with the corner of the alignment pattern 571. In addition, the film layer 630 may cover the adhesive pattern 591.
[0082] The film layer 630 may include a thermosetting resin or a photocurable resin. For example, the film layer 630 may include an epoxy resin, an amino resin, a phenolic resin, a urea-formaldehyde resin, a melamine resin, an unsaturated polyester resin, a polyurethane resin, a polyimide resin, or the like.
[0083] Generally, the length of the pad area 60 in the second direction D2 can be reduced to reduce the dead zone of the conventional display device. For example, the length of the pad area 60 can be about 0.5 mm or less. In this case, the length of each of the pad electrodes 470 in the second direction D2 can also be reduced. For example, the length of each of the pad electrodes 470 in the second direction D2 can be 0.3 mm or less. ACF and FPCB, such as COF, can be arranged on the pad electrode 470 to be electrically connected to the external device 101. The ACF can combine the pad electrode 470 to the FPCB, and the pad electrode 470 can be electrically connected to the FPCB through the conductive ball 600 included in the ACF. However, due to the manufacturing process (e.g., the cutting edge of the ACF), the ACF cannot be manufactured to have a length of 0.6 mm or less in the second direction D2. In other words, due to the reduced length of the pad area 60 (e.g., the first length d1), it is difficult to form the ACF on the pad electrode 470.
[0084] In an exemplary embodiment, after the film layer 630 is formed on the bottom surface of the base substrate 510, a conductive film package 500 is formed on the pad electrode 470, so that even when the second length d2 of the pad area 60 of the display device 100 is reduced to approximately 0.5 mm, the pad electrode 470 can be electrically connected to the external device 101 through the conductive film package 500.
[0085] In addition, the conductive film package 500 may include a base substrate 510 and an alignment pattern 571, the base substrate 510 includes a first corner portion E1 and a second corner portion E2 having a relatively small curvature, and the alignment pattern 571 is arranged adjacent to the first corner portion E1 and the second corner portion E2, so that the film layer 630 can be easily formed in the second surface S2 of the base substrate 510.
[0086] In addition, the conductive film package 500 may include the adhesive pattern 591 so that the adhesive strength between the base substrate 510 and the film layer 630 in the second portion of the base substrate 510 may be relatively increased, and the reflow amount of the uncured resin layer may be reduced during the process of bonding the conductive film package 500 to the pad area 60 of the lower substrate 110. Therefore, the display device 100 according to the exemplary embodiment may have a relatively reduced pad area 60.
[0087] Figure 8 It is shown Figure 6 A partial enlarged cross-sectional view of area "B".
[0088] Reference Figure 8 , the display structure 200 may include a semiconductor element 250, a planarization layer 270, a pixel defining layer 310, a lower electrode 290, a light emitting layer 330, and an upper electrode 340. The semiconductor element 250 may include an active layer 130, a gate insulating layer 150, a gate electrode 170, an interlayer insulating layer 190, a source electrode 210, and a drain electrode 230. The display structure 200 may be disposed in the display region 10 between the lower substrate 110 and the upper substrate 410.
[0089] In some exemplary embodiments, a buffer layer may be provided on the lower substrate 110. The buffer layer may be provided entirely above the lower substrate 110. The buffer layer may prevent metal atoms or impurities from diffusing from the lower substrate 110, and may achieve a substantially uniform active layer 130 to be obtained by adjusting a heat transfer rate during a crystallization process for forming the active layer 130. In addition, when the surface of the lower substrate 110 is uneven, the buffer layer may improve the flatness of the surface of the lower substrate 110. Depending on the type of the lower substrate 110, in some exemplary embodiments, at least two buffer layers may be provided on the lower substrate 110, or no buffer layer may be provided thereon. The buffer layer may include a silicon compound, a metal oxide, or the like.
[0090] The active layer 130 may be disposed on the lower substrate 110, and the active layer 130 may include an oxide semiconductor, an inorganic semiconductor (eg, amorphous silicon and polycrystalline silicon), an organic semiconductor, etc. The active layer 130 may have a source region and a drain region.
[0091] The gate insulating layer 150 may be disposed on the active layer 130. The gate insulating layer 150 may cover the active layer 130 and may be disposed on the lower substrate 110. For example, the gate insulating layer 150 may fully cover the active layer 130 and may have a substantially flat upper surface without generating steps around the active layer 130. In some exemplary embodiments, the gate insulating layer 150 may cover the active layer 130 on the lower substrate 110 and be disposed to have a uniform thickness along the contour of the active layer 130. The gate insulating layer 150 may include a silicon compound, a metal oxide, and the like. For example, the gate insulating layer 150 may include silicon oxide (SiO), silicon nitride (SiN), silicon oxynitride (SiON), silicon oxycarbide (SiOC), silicon carbon nitride (SiCN), aluminum oxide (AlO), aluminum nitride (AlN), tantalum oxide (TaO), hafnium oxide (HfO), zirconium oxide (ZrO), titanium oxide (TiO), and the like. In other exemplary embodiments, the gate insulating layer 150 may have a multi-layer structure including a plurality of insulating layers. For example, the insulating layers may have different thicknesses or include different materials.
[0092] The gate electrode 170 may be disposed on a portion of the gate insulating layer 150, wherein the active layer 130 is located below this portion. The gate electrode 170 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other. In other exemplary embodiments, the gate electrode 170 may have a multilayer structure including a plurality of metal layers. For example, the metal layers may have different thicknesses or include different materials.
[0093] The interlayer insulating layer 190 may be disposed on the gate electrode 170. The interlayer insulating layer 190 may cover the gate electrode 170 and may be disposed on the gate insulating layer 150. For example, the interlayer insulating layer 190 may fully cover the gate electrode 170 on the gate insulating layer 150 and may have a substantially flat upper surface without generating steps around the gate electrode 170. In some exemplary embodiments, the interlayer insulating layer 190 may be disposed to have a uniform thickness along the contour of the gate electrode 170 while covering the gate electrode 170 on the gate insulating layer 150. The interlayer insulating layer 190 may include a silicon compound, a metal oxide, and the like. In other exemplary embodiments, the interlayer insulating layer 190 may have a multilayer structure including a plurality of insulating layers. For example, the insulating layers may have different thicknesses or include different materials.
[0094] The source electrode 210 and the drain electrode 230 may be disposed on the interlayer insulating layer 190. The source electrode 210 and the drain electrode 230 may be connected to the source region and the drain region of the active layer 130 respectively via contact holes formed by removing a portion of the gate insulating layer 150 and the interlayer insulating layer 190. Each of the source electrode 210 and the drain electrode 230 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other. In other exemplary embodiments, the source electrode 210 and the drain electrode 230 may have a multilayer structure including a plurality of metal layers. For example, the metal layers may have different thicknesses or include different materials.
[0095] Thus, the semiconductor element 250 including the active layer 130 , the gate insulating layer 150 , the gate electrode 170 , the interlayer insulating layer 190 , the source electrode 210 , and the drain electrode 230 may be formed.
[0096] Although the semiconductor element 250 according to the illustrated exemplary embodiment has been described as having a top gate structure, the inventive concept is not limited thereto. For example, in some exemplary embodiments, the semiconductor element 250 may have a bottom gate structure or a double gate structure.
[0097] The planarization layer 270 may be disposed on the source electrode 210 and the drain electrode 230. The planarization layer 270 may cover the source electrode 210 and the drain electrode 230. In particular, the planarization layer 270 may be completely disposed above the interlayer insulating layer 190. In an exemplary embodiment, the planarization layer 270 may be disposed to have a relatively thick thickness to fully cover the source electrode 210 and the drain electrode 230. In this case, the planarization layer 270 may have a substantially flat upper surface, and a planarization process may be added to the planarization layer 270 to achieve the above-mentioned flat upper surface of the planarization layer 270. In some exemplary embodiments, the planarization layer 270 may be disposed to have a uniform thickness along the contours of the source electrode 210 and the drain electrode 230 while covering the source electrode 210 and the drain electrode 230. The planarization layer 270 may be formed of an organic material or an inorganic material. In an exemplary embodiment, the planarization layer 270 may include an organic material.
[0098] The lower electrode 290 may be disposed on the planarization layer 270. The lower electrode 290 may be connected to the drain electrode 230 via a contact hole formed by removing a portion of the planarization layer 270. Therefore, the lower electrode 290 may be electrically connected to the semiconductor element 250. The lower electrode 290 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other. In other exemplary embodiments, the lower electrode 290 may have a multilayer structure including a plurality of metal layers. For example, the metal layers may have different thicknesses or include different materials.
[0099] The pixel defining layer 310 may be disposed on the planarization layer 270 and may expose a portion of the top surface of the lower electrode 290. The pixel defining layer 310 may be formed of an organic material or an inorganic material. In an exemplary embodiment, the pixel defining layer 310 may include an organic material.
[0100] The light emitting layer 330 may be disposed on the exposed portion of the lower electrode 290. The light emitting layer 330 may be formed using at least one of the light emitting materials capable of emitting different colored light (e.g., red light, green light, and blue light) according to the sub-pixel. In some exemplary embodiments, the light emitting layer 330 may be formed by laminating a plurality of light emitting materials capable of generating different colored light (e.g., red light, green light, and blue light) to emit white light. In this case, a color filter may be disposed on the light emitting layer 330. The color filter may include at least one of a red color filter, a green color filter, and a blue color filter. In some exemplary embodiments, the color filter may also include a yellow color filter, a cyan color filter, and a magenta color filter. The color filter may include a photosensitive resin or a color photoresist.
[0101] The upper electrode 340 may be disposed on the pixel defining layer 310 and the light emitting layer 330. The upper electrode 340 may include a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. In other exemplary embodiments, the upper electrode 340 may have a multilayer structure including a plurality of metal layers. For example, the metal layers may have different thicknesses or include different materials.
[0102] Although the display device 100 according to the exemplary embodiment has been described as an organic light emitting display device, the inventive concept is not limited thereto. In other exemplary embodiments, the display device 100 may include a liquid crystal display device (LCD), a field emission display (FED), a plasma display panel (PDP), or an electrophoretic display device (EPD).
[0103] Fig. 9 is a cross-sectional view showing a display device according to another exemplary embodiment. In addition to the second film layer 710, Fig. 9 The display device 700 shown in FIG. 1 may have the same Figures 1 to 8 The display device 100 has substantially the same or similar configuration. Thus, repeated description of components substantially the same or similar to those already described above will be omitted.
[0104] Reference Figures 6 to 9, the display device 700 may include a lower substrate 110, a display structure 200, an upper substrate 410, an insulating layer 460, a pad electrode 470, a conductive film package 500, etc. The lower substrate 110 may include a display area 10 and a pad area 60 located at one side of the display area 10. The conductive film package 500 may include a base substrate 510, a ridge electrode 520, a metal pattern 580, a driving integrated circuit 550, a conductive ball 600, a first film layer 630, and a second film layer 710. In addition, the metal pattern 580 may include an alignment pattern 571 and an adhesive pattern 591, and the conductive ball 600 may include a first conductive ball 610 and a second conductive ball 620.
[0105] The second film layer 710 may be disposed on the insulating layer 460 in a portion of the pad region 60 and in the second region 62. In particular, the second film layer 710 may be inserted between the base substrate 510 and the first film layer 630. For example, the second film layer 710 may be in direct contact with the top surface of the first film layer 630, both side surfaces of each of the raised electrodes 520, and the bottom surface of the base substrate 510. In addition, the conductive ball 600 may not be disposed within the second film layer 710. The base substrate 510 and the first film layer 630 may be firmly adhered to each other through the second film layer 710. The second film layer 710 may include a thermosetting resin or a photocurable resin. For example, the second film layer 710 may include acrylic resin, epoxy resin, epoxy acrylate resin, polyester acrylate resin, polyester polyurethane acrylate oligomer resin, polyurethane acrylate resin, polyurethane acrylate oligomer resin, polybutadiene acrylate resin, silicone acrylate resin, alkyl acrylate resin, vinyl phenol resin, bismaleimide resin, diallyl phthalate resin, etc.
[0106] The display device 700 according to the exemplary embodiment shown may include the second film layer 710, thereby increasing the adhesive strength between the base substrate 510 and the first film layer 630. In addition, the second film layer 710 not including the conductive balls 600 may be disposed between the raised electrodes 520 in the second region 62, thereby preventing adjacent raised electrodes 520 from being short-circuited.
[0107] Figures 10 to 19 is a view showing a method of manufacturing a display device according to an exemplary embodiment. For example, Fig.10 , Fig.11 , Fig.14 , Fig.15 , Fig.16 , Fig.17 , Fig.18 and Fig.19 is a cross-sectional view of the display device, and Fig.12 and Fig.13 is a plan view of the display device.
[0108] Reference Figure 8 , Fig.10 and Fig.11 , a lower substrate 110 including a transparent or opaque material may be provided. The lower substrate 110 may be formed using a common quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped quartz substrate, a soda glass substrate, a non-alkaline glass substrate, or the like.
[0109] The active layer 130 may be formed on the lower substrate 110 in the display region 10 and may be formed using a metal oxide semiconductor, an inorganic semiconductor, or an organic semiconductor. The active layer 130 may have a source region and a drain region.
[0110] The gate insulating layer 150 may be formed on the active layer 130. The gate insulating layer 150 may cover the active layer 130 and may be formed on the lower substrate 110. For example, the gate insulating layer 150 may fully cover the active layer 130 and may have a substantially flat upper surface without generating steps around the active layer 130. In some exemplary embodiments, the gate insulating layer 150 may be formed to have a uniform thickness along the contour of the active layer 130 while covering the active layer 130 on the lower substrate 110. The gate insulating layer 150 may be formed using a silicon compound, a metal oxide, or the like. For example, the gate insulating layer 150 may include SiO, SiN, SiON, SiOC, SiCN, AlO, AlN, TaO, HfO, ZrO, and TiO.
[0111] The gate electrode 170 may be formed on a portion of the gate insulating layer 150 under which the active layer 130 is disposed. The gate electrode 170 may be formed by using metal, alloy, metal nitride, conductive metal oxide, transparent conductive material, etc. These may be used alone or in combination with each other.
[0112] An interlayer insulating layer 190 may be formed on the gate electrode 170. The interlayer insulating layer 190 may cover the gate electrode 170 and be formed on the gate insulating layer 150. For example, the interlayer insulating layer 190 may sufficiently cover the gate electrode 170 on the gate insulating layer 150 and may have a substantially flat upper surface without generating a step around the gate electrode 170. In some exemplary embodiments, the interlayer insulating layer 190 may be formed to have a uniform thickness along the contour of the gate electrode 170 while covering the gate electrode 170 on the gate insulating layer 150. The interlayer insulating layer 190 may include a silicon compound, a metal oxide, or the like.
[0113] A source electrode 210 and a drain electrode 230 may be formed on the interlayer insulating layer 190. The source electrode 210 and the drain electrode 230 may be connected to a source region and a drain region of the active layer 130, respectively, via contact holes formed by removing a portion of the gate insulating layer 150 and the interlayer insulating layer 190. Each of the source electrode 210 and the drain electrode 230 may be formed by using a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other.
[0114] Thus, the semiconductor element 250 including the active layer 130 , the gate insulating layer 150 , the gate electrode 170 , the interlayer insulating layer 190 , the source electrode 210 , and the drain electrode 230 may be formed.
[0115] A planarization layer 270 may be formed on the source electrode 210 and the drain electrode 230. The planarization layer 270 may cover the source electrode 210 and the drain electrode 230. In particular, the planarization layer 270 may be formed entirely above the interlayer insulating layer 190. In an exemplary embodiment, the planarization layer 270 may be formed to have a relatively thick thickness to fully cover the source electrode 210 and the drain electrode 230. In this case, the planarization layer 270 may have a substantially flat upper surface, and a planarization process may be added to the planarization layer 270 to achieve the above-mentioned flat upper surface of the planarization layer 270. In some exemplary embodiments, the planarization layer 270 may be formed to have a uniform thickness along the contours of the source electrode 210 and the drain electrode 230 while covering the source electrode 210 and the drain electrode 230. The planarization layer 270 may be formed using an organic material.
[0116] A lower electrode 290 may be formed on the planarization layer 270. The lower electrode 290 may be connected to the drain electrode 230 via a contact hole formed by removing a portion of the planarization layer 270. Thus, the lower electrode 290 may be electrically connected to the semiconductor element 250. The lower electrode 290 may be formed by using a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other.
[0117] A pixel defining layer 310 may be formed on the planarization layer 270, and the pixel defining layer 310 may expose a portion of a top surface of the lower electrode 290. The pixel defining layer 310 may be formed using an organic material.
[0118] The light emitting layer 330 may be formed on the exposed portion of the lower electrode 290. The light emitting layer 330 may be formed using at least one of the light emitting materials capable of emitting different colored light (e.g., red light, green light, and blue light) according to the sub-pixel. In some exemplary embodiments, the light emitting layer 330 may be formed by laminating a plurality of light emitting materials capable of generating different colored light (e.g., red light, green light, and blue light) to emit white light. In this case, a color filter may be formed on the light emitting layer 330. The color filter may include at least one of a red color filter, a green color filter, and a blue color filter. In some exemplary embodiments, the color filter may also include a yellow color filter, a cyan color filter, and a magenta color filter. The color filter may be formed by using a photosensitive resin or a color photoresist.
[0119] An upper electrode 340 may be formed on the pixel defining layer 310 and the light emitting layer 330. The upper electrode 340 may be formed by using a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, or the like.
[0120] Thus, the display structure 200 including the semiconductor element 250 , the planarization layer 270 , the pixel defining layer 310 , the lower electrode 290 , the light emitting layer 330 , and the upper electrode 340 may be provided.
[0121] The pad electrodes 470 may be formed on the lower substrate 110 in the pad region 60. The pad electrodes 470 may be spaced apart from each other in a first direction D1 substantially parallel to the top surface of the lower substrate 110. Fig.11 As shown in FIG. 6 , a portion in which the pad electrode 470 is formed may be defined as a first region 61, and a region between two adjacent pad electrodes 470 among the pad electrodes 470 may be defined as a second region 62. For example, referring back to FIG. Figure 6 , the first length d1 of the pad electrode 470 may be about 200 microns, and the second length d2 of the pad region 60 may be less than about 600 microns. The pad electrode 470 may be formed by using metals, alloys, metal nitrides, conductive metal oxides, transparent conductive materials, etc. These may be used alone or in combination with each other. In some exemplary embodiments, the pad electrode 470, the gate electrode 170, and / or the source electrode 210 and the drain electrode 230 may be formed simultaneously using the same material.
[0122] An insulating layer 460 may be formed on the lower substrate 110 in a portion of the pad region 60. In particular, the insulating layer 460 may be formed to surround each of the pad electrodes 470 in the pad region 60. For example, the insulating layer 460 may be formed in the second region 62 on the lower substrate 110, and may not be formed in the first region 61. In an exemplary embodiment, the top surface of the insulating layer 460 and the top surface of each of the pad electrodes 470 may be located at substantially the same level. In other exemplary embodiments, the insulating layer 460 may cover both sides of each of the pad electrodes 470, and the top surface of the insulating layer 460 may be positioned lower or higher than the top surface of each of the pad electrodes 470. The insulating layer 460 may be formed using an organic material. For example, the insulating layer 460 may include a photoresist, a polyacryl-based resin, a polyimide-based resin, a polyamide-based resin, a siloxane-based resin, an acryl-based resin, an epoxy-based resin, and the like. In exemplary embodiments, the insulating layer 460 and the planarization layer 270 may be simultaneously formed using the same material.
[0123] Reference Fig.10 , an upper substrate 410 may be provided. The upper substrate 410 may include substantially the same material as the lower substrate 110. For example, the upper substrate 410 may be formed using a common quartz substrate, a synthetic quartz substrate, a calcium fluoride substrate, a fluorine-doped quartz substrate, a soda glass substrate, a non-alkaline glass substrate, etc.
[0124] A sealing member may be formed on the bottom surface of the upper substrate 410. The sealing member may be formed at the outermost portion of the upper substrate 410. The sealing member may be formed using glass frit or the like. In addition, the sealing member may further include a photocurable material. For example, the sealing member may include a mixture of an organic material and a photocurable material.
[0125] After forming the sealing member on the bottom surface of the upper substrate 410 , the upper substrate 410 may be positioned on the lower substrate 110 and the display structure 200 such that the sealing member surrounds the display structure 200 .
[0126] After the upper substrate 410 is positioned on the lower substrate 110, the sealing member can be irradiated with ultraviolet rays, lasers, visible light, etc. to cure the sealing member. For example, the mixture can be irradiated with laser. When the laser is irradiated, the mixture can change from a solid state to a liquid state, and the liquid mixture can be cured into a solid state after a predetermined time. According to the state change of the mixture, the upper substrate 410 can be sealed and connected to the lower substrate 110.
[0127] Reference Fig.12, a base substrate 510 may be provided. In an exemplary embodiment, the first corner portion E1 and the second corner portion E2 of the base substrate 510 may be formed to have an arc shape. The curvature of each of the first corner portion E1 and the second corner portion E2 may be less than about 0.3R. In other exemplary embodiments, the curvature of each of the first corner portion E1 and the second corner portion E2 may be formed to be about 0.1R. The base substrate 510 may be formed using a flexible film including a material having flexibility. For example, the base substrate 510 may include a polyimide resin, a polyester resin, or the like. The driving integrated circuit 550 may be formed on the first surface S1 of the base substrate 510 (see Figure 3 ).
[0128] The ridge electrodes 520 may be spaced apart from each other on the second surface S2 (e.g., the bottom surface of the base substrate 510). The ridge electrodes 520 may extend in the second direction D2. Each of the ridge electrodes 520 may be formed by using a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. These may be used alone or in combination with each other.
[0129] The alignment pattern 571 may be formed adjacent to the first corner portion E1 and the second corner portion E2. In an exemplary embodiment, the alignment pattern 571 may include a first alignment portion formed adjacent to the first corner portion E1 and a second alignment portion formed adjacent to the second corner portion E2.
[0130] The adhesive pattern 591 may be located adjacent to the alignment pattern 571 and may be formed substantially parallel to the ridge electrode 520. In an exemplary embodiment, the adhesive pattern 591 may include a first adhesive portion located adjacent to the first alignment portion and a second adhesive portion located adjacent to the second alignment portion.
[0131] Thus, a metal pattern 580 including an alignment pattern 571 and an adhesive pattern 591 may be formed.
[0132] Each of the metal patterns 580 may be formed by using a metal, an alloy, a metal nitride, a conductive metal oxide, a transparent conductive material, etc. For example, each of the metal patterns 580 may include Au, Ag, Al, Pt, Ni, Ti, Pd, Mg, Ca, Li, Cr, Ta, W, Cu, Mo, Sc, Nd, Ir, an alloy containing aluminum, AlN, an alloy containing silver, WN, an alloy containing copper, an alloy containing molybdenum, TiN, CrN, TaN, SrRuO, ZnO, ITO, SnO, InO, GaO, IZO, etc. These may be used alone or in combination with each other.
[0133] Reference Fig.13, a first film layer 630 may be provided, and the conductive ball 600 may be located inside the first film layer 630 .
[0134] The first film layer 630 may cover the conductive balls 600. The first film layer 630 may be formed using an uncured resin layer in which the conductive balls 600 are arranged. For example, the uncured resin layer may include uncured epoxy resin, uncured amino resin, uncured phenolic resin, uncured urea-formaldehyde resin, uncured melamine resin, uncured unsaturated polyester resin, uncured polyurethane resin, uncured polyimide resin, etc.
[0135] Each of the conductive balls 600 may have a substantially circular planar shape. The conductive balls 600 may be arranged in the first film layer 630 in the first direction D1 and the second direction D2, and may be regularly spaced apart from each other at substantially the same intervals. In particular, the conductive balls 600 may be arranged to have a lattice shape only in one layer, and may not overlap each other in a third direction D3 perpendicular to the first direction D1 and the second direction D2. Each of the conductive balls 600 may have a structure in which a metal layer (e.g., a layer including nickel, cobalt, gold, silver, and copper) is coated on a spherical polymer.
[0136] Reference Fig.14 and Fig.15 , a second film layer 710 may be formed on the second surface S2 of the base substrate 510. The second film layer 710 may cover a portion of the raised electrode 520 and the metal pattern 580 on the second surface S2. The conductive ball 600 may not be arranged in the second film layer 710. In particular, the second film layer 710 may be formed using an uncured resin layer in which the conductive ball 600 is not arranged.
[0137] After the second film layer 710 is formed, the first film layer 630 in which the conductive balls 600 are arranged may be formed on the bottom surface of the second film layer 710 .
[0138] Thus, the conductive film package 500 including the base substrate 510, the driving integrated circuit 550, the bump electrode 520, the first film layer 630, the second film layer 710, the conductive ball 600, and the metal pattern 580 may be formed.
[0139] Reference Fig.16 and Fig.17 , the conductive film package 500 may be positioned in the pad region 60 of the lower substrate 110. A portion of the bottom surface of the first film layer 630 may be in direct contact with the pad electrode 470 and the insulating layer 460.
[0140] Reference Fig.18 and Fig.19, the heating member 750 may be brought into contact with the top surface of the conductive film package 500. The heating member 750 may be heated to a predetermined temperature, and may apply pressure to the conductive film package 500 in a direction opposite to the third direction D3. In this case, when the gap between the ridge electrode 520 and the pad electrode 470 is narrowed due to the pressure, a portion of the second film layer 710 and the first film layer 630 located in the first region 61 may flow back into the second region 62, and the first film layer 630 and the second film layer 710 may be cured due to heat.
[0141] As the gap narrows, the shape of the conductive ball 600 located in the first region 61 between the ridge electrode 520 and the pad electrode 470 may be changed from a circular planar shape to an elliptical planar shape. The conductive ball 600 having an elliptical planar shape and located in the first region 61 is defined as a first conductive ball 610, and the conductive ball 600 having a circular planar shape and located in the remaining region except the first region 61 is defined as a second conductive ball 620. In addition, at least a portion of each of the first conductive balls 610 may be exposed from the first film layer 630 in the first region 61, and the exposed portion of the first conductive ball 610 may be in direct contact with the ridge electrode 520 or the pad electrode 470.
[0142] Therefore, the first film layer 630 in the first region 61 and the second region 62 may have different thicknesses. For example, the first film layer 630 may have a first thickness in the first region 61, and may have a second thickness greater than the first thickness in the second region 62. In addition, the first film layer 630 may cover the second conductive ball 620 in the second region 62. In addition, the second film layer 710 located in the first region 61 may flow back to the remaining regions except the first region 61. In some exemplary embodiments, all of the second film layer 710 located in the first region 61 may not flow back, and a portion of the second film layer 710 may remain in the first region 61. In addition, when the heating member 750 applies a relatively large pressure in the direction opposite to the third direction D3, the diameter of the first conductive ball 610 may be relatively reduced in the third direction D3, or the first conductive ball 610 may penetrate each of the pad electrodes 470 to deform the shape of the pad electrode 470.
[0143] After the curing process is performed, the heating member 750 may be removed from the top surface of the conductive film package 500 .
[0144] Therefore, it is possible to produce Fig. 9 The display device 700 shown in FIG.
[0145] The display device according to the exemplary embodiment may be applied to various electronic devices including a display device, such as a vehicle display device, a ship display device, an aircraft display device, a portable communication device, a display device for display or information transmission, a medical display device, and the like.
[0146] In a display device according to an exemplary embodiment, after a film layer is formed on the bottom surface of the base substrate, a conductive film package is formed on the pad electrode, so that even when the second length of the pad area of the display device is reduced to approximately 0.5 mm, the pad electrode can be electrically connected to an external device through the conductive film package.
[0147] In addition, the conductive film package may include a base substrate including first and second corner portions having relatively small curvatures and alignment patterns positioned adjacent to the first and second corner portions, so that a film layer can be easily formed on a second surface of the base substrate.
[0148] In addition, the conductive film package may include an adhesive pattern so that the adhesive strength between the base substrate and the film layer in the second portion of the base substrate can be relatively increased, and the reflow amount of the uncured resin layer can be reduced in the bonding process of bonding the conductive film package to the pad area of the lower substrate. Therefore, the display device according to the exemplary embodiment can have a relatively reduced pad area.
[0149] Although certain exemplary embodiments and examples have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but rather lies in the broader scope of the appended claims and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.
Claims
1. Display equipment, including: A lower substrate having a display area and a pad area; A display structure, disposed in the display area of the lower substrate; pad electrodes disposed in the pad region of the lower substrate and spaced apart from each other in a first direction; as well as Conductive film packaging, including: a base substrate disposed on the pad electrode and including a corner portion having an arc shape; a ridge electrode disposed in a first portion of a bottom surface of the base substrate and overlapping the pad electrode; a metal pattern disposed in a second portion of the bottom surface of the base substrate located at both sides of the first portion, wherein the metal pattern comprises: an alignment pattern disposed adjacent to the corner portion of the base substrate; and a bonding pattern disposed in parallel with the raised electrodes and spaced apart from the alignment pattern; a first film layer disposed between the base substrate and the lower substrate and overlapping the pad electrode, a portion of the ridge electrode, and the metal pattern; and The conductive ball is arranged inside the first film layer.
2. The display device according to claim 1, wherein: The corner portion of the base substrate is disposed in the pad region of the lower substrate.
3. The display device according to claim 1, wherein: At least one of the corners of the first film layer is aligned with a corner of the alignment pattern.
4. The display device according to claim 1, wherein: The first film layer covers the bonding pattern.
5. The display device according to claim 1, wherein: The conductive balls are arranged in the first direction and a second direction perpendicular to the first direction and are spaced apart from each other at the same interval.
6. The display device according to claim 1, wherein: The conductive film package includes a first region and a second region, the pad electrode is disposed in the first region, and the second region is disposed between adjacent first regions.
7. The display device according to claim 6, wherein: The conductive ball comprises: first conductive balls disposed in the first region, each of the first conductive balls having a first diameter in a direction from the lower substrate toward the base substrate; and Second conductive balls are disposed in the second region, each of the second conductive balls having a second diameter greater than the first diameter in a direction from the lower substrate toward the base substrate.
8. The display device according to claim 7, wherein: At least a portion of each of the first conductive balls contacts the pad electrode and the bump electrode.
9. The display device according to claim 6, wherein: The first film layer partially covers the conductive ball.
10. The display device according to claim 9, wherein: The first film layer disposed in the first region has a thickness different from a thickness of the first film layer disposed in the second region.
11. The display device according to claim 6, wherein: The first film layer disposed in the first region has a first thickness and exposes at least a portion of each of the conductive balls disposed in the first region; as well as The first film layer disposed in the second region has a second thickness greater than the first thickness and covers the conductive ball in the second region.
12. The display device according to claim 6, wherein: The conductive film package further includes a second film layer disposed between the first film layer and the base substrate.
13. The display device according to claim 12, wherein: The conductive ball is not disposed inside the second film layer.
14. The display device according to claim 12, wherein: The second film layer is disposed in the second region, a top surface of the second film layer contacts the bottom surface of the base substrate, and a bottom surface of the second film layer contacts a top surface of the first film layer.
15. The display device according to claim 1, wherein: A first end of each of the ridge electrodes overlaps the first film layer, each of the ridge electrodes extends in a second direction perpendicular to the first direction, and a second end of each of the ridge electrodes does not overlap the first film layer.
16. The display device according to claim 1, wherein: The bump electrode and the pad electrode are electrically connected to each other through the conductive ball.
17. The display device according to claim 1, further comprising: an upper substrate, disposed on the display structure in the display area and opposite to the lower substrate, Wherein, the pad area of the lower substrate does not overlap with the upper substrate.
18. The display device according to claim 17, wherein: The length of the pad region in a second direction perpendicular to the first direction is less than 600 micrometers, and the length of each of the pad electrodes in the second direction is less than 300 micrometers.
19. The display device according to claim 1, wherein: The curvature of the corner portion is less than 0.3R.
Citation Information
Patent Citations
Display appatatus
KR1020130035096A
Ball grid array IC package and manufacturing method thereof
US20020185746A1
Polygonal, rounded, and circular flip chip ball grid array board
US20070018335A1
Display device
US20180006004A1
Circuit assembly and process for production thereof
US5729315A