Transparent display device

Abstract

The transparent display device includes a substrate, in which a sub-pixel having an organic light-emitting diode and an auxiliary sub-pixel adjacent to the sub-pixel and having an auxiliary organic light-emitting diode are placed, wherein the organic light-emitting diode includes a 1-1 electrode, in which a transparent conductive layer and a reflective layer are stacked, and the auxiliary organic light-emitting diode includes a 1-2 electrode, in which the transparent conductive layer extends and is arranged.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2019-0108401 filed on September 2, 2019 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a transparent display device, and more particularly, to a transparent display device capable of displaying an input image in a transmissive region as well as in an emissive region when the display device is driven. Background Art

[0004] Various display devices that are smaller and lighter than cathode ray tubes are being developed. Examples of display devices include liquid crystal displays (LCDs), field emission displays (FEDs), plasma display panels (PDPs), organic light emitting display devices (OLEDs), and the like.

[0005] Among these flat panel display devices, OLED is a self-emissive display device configured to emit light by exciting an organic compound. Compared with LCD, OLED does not require a backlight. Therefore, OLED has the advantages of thin profile, light weight, and simpler manufacturing process. In addition, since OLED can be manufactured at low temperature, has a fast response time of 1ms or less, and is characterized by low power consumption, wide viewing angle, and high contrast, OLED is widely used.

[0006] OLED includes an organic light emitting diode that converts electrical energy into light energy. The organic light emitting diode includes an anode, a cathode, and an organic emission layer disposed between the anode and the cathode. Holes and electrons are injected from the anode and the cathode, respectively, and recombined in the emission layer to form excitons, whereby when the excitons drop from an excited state to a ground state, the OLED displays an image.

[0007] Recently, research on transparent display devices has been actively conducted. A transparent display device refers to a display device that enables a user in front of a display panel to recognize visual information displayed on the display panel and an object located on the rear surface of the display panel. To this end, the transparent display device includes an emission area and a transmission area that transmits external light, and a driving element is provided at the emission area to display an input image.

[0008] In a transparent display device, the transmissive area needs to have a sufficient size to allow the user to more clearly recognize the background information located on the rear surface of the display panel. In addition, the emissive area needs to have a sufficient size to ensure a desired aperture ratio. Therefore, in order for the transparent display device to effectively perform its function, it is necessary to properly allocate the emissive area and the transmissive area within a limited space. However, a simple layout design of the emissive area and the transmissive area cannot meet the requirements of the transparent display device. Summary of the invention

[0009] An object to be achieved by the present disclosure is to provide a transparent display device capable of ensuring sufficient sizes of transmission areas and emission areas.

[0010] According to one aspect of the present disclosure, a transparent display device includes: a substrate, in which a sub-pixel having an organic light-emitting diode and an auxiliary sub-pixel adjacent to the sub-pixel and having an auxiliary organic light-emitting diode are arranged. The organic light-emitting diode includes a 1-1 electrode stacked with a transparent conductive layer and a reflective layer. The auxiliary organic light-emitting diode includes a 1-2 electrode, and the transparent conductive layer extends and is arranged in the 1-2 electrode.

[0011] In an embodiment, the organic light emitting diode and the auxiliary organic light emitting diode may share an organic emission layer located on the 1-1 electrode and the 1-2 electrode and a second electrode located on the organic emission layer.

[0012] In an embodiment, the sub-pixel includes a circuit unit including at least one transistor, and the circuit unit may be electrically connected to the organic light emitting diode and the auxiliary organic light emitting diode.

[0013] In an embodiment, the substrate is defined as a first region where the sub-pixels are arranged and a second region where the auxiliary sub-pixels are arranged. The second region emits light when the transparent display device is driven and transmits external light when the transparent display device is not driven.

[0014] In an embodiment, the transparent conductive layer may include a first transparent conductive layer located in the first region and a second transparent conductive layer located to extend from the first region to the second region. The 1-1 electrode may include a first transparent conductive layer, a reflective layer, and a second transparent conductive layer, and the 1-2 electrode may include a second transparent conductive layer.

[0015] In an embodiment, the first transparent conductive layer may be on the reflective layer in the first region, and the second transparent conductive layer may be under the reflective layer in the first region.

[0016] In an embodiment, the transparent display device further includes an intermediate insulating layer, the intermediate insulating layer being interposed between the reflective layer and the second transparent conductive layer, and the second transparent conductive layer being exposed through the intermediate insulating layer in the second region. The reflective layer and the second transparent conductive layer may be connected to each other in the first region via an opening penetrating the intermediate insulating layer.

[0017] In an implementation, the intermediate insulating layer may be located only in the first region.

[0018] In an embodiment, the transparent display device further includes a passivation layer and an overcoat layer stacked between the circuit unit and the second transparent conductive layer, and the overcoat layer may be removed from the second region.

[0019] In an embodiment, the second transparent conductive layer may be in contact with the upper coating layer in the first region and in contact with the passivation layer in the second region.

[0020] In an embodiment, the first transparent conductive layer may be located below the reflective layer in the first region, and the second transparent conductive layer may be located on the reflective layer in the first region.

[0021] In an embodiment, the transparent display device further includes a passivation layer and an overcoat layer stacked between the circuit unit and the second transparent conductive layer, and the overcoat layer may be removed from the second region.

[0022] In an embodiment, the second transparent conductive layer may be in contact with the reflective layer in the first region and in contact with the passivation layer in the second region.

[0023] According to an embodiment of the present disclosure, the display device includes a light transmission area and can therefore be used as a transparent display device. The transmission area also provides light for displaying an input image, and therefore, a sufficient aperture ratio can be ensured. Therefore, a high-quality transparent display device can be provided.

[0024] According to the embodiments of the present disclosure, the display device satisfies the required aperture ratio. In addition, the display device controls the size of the emission area and the transmission area according to the desired brightness, efficiency and transmittance of the organic light emitting diode. Therefore, a transparent display device with significantly improved design freedom can be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The above and other aspects, features and advantages of the present disclosure will be more clearly understood from the following detailed description in conjunction with the accompanying drawings, in which:

[0026] Figure 1 is a schematic block diagram of an organic light emitting display device;

[0027] Figure 2 schematically shows the circuit configuration of a sub-pixel;

[0028] Figure 3 An example of a detailed circuit configuration of a sub-pixel is shown;

[0029] Figure 4 The first embodiment of the present disclosure is schematically shown. Figure 1 A plan view of area A;

[0030] Figure 5 is along Figure 4 A cross-sectional view taken along line II';

[0031] Figure 6 is along Figure 4 A cross-sectional view taken along line II-II';

[0032] Figure 7 An embodiment of the configuration of the first electrode is shown;

[0033] Figure 8 is a schematic diagram showing a second embodiment of the present disclosure. Figure 1 A plan view of area A;

[0034] Fig. 9 and Fig.10 is along Figure 8 A cross-sectional view taken along line III-III';

[0035] Fig.11 is a first modified embodiment according to the second embodiment. Figure 8 A cross-sectional view taken along line III-III';

[0036] FIG. 12A to FIG. 12E Shown in chronological order Fig.11 A process of forming an organic light emitting diode and an auxiliary organic light emitting diode in a structure;

[0037] Fig.13 is a second modified embodiment according to the second embodiment. Figure 8 A cross-sectional view taken along line III-III'; and

[0038] FIG. 14A to FIG. 14C Shown in chronological order Fig.13 A process for forming an organic light emitting diode and an auxiliary organic light emitting diode in a structure. DETAILED DESCRIPTION

[0039] Hereinafter, embodiments of the present disclosure will be described with reference to the accompanying drawings. Throughout the specification, the same reference numerals represent substantially the same elements. In addition, in the following description, detailed descriptions of known techniques or configurations related to the present disclosure may be omitted to avoid unnecessarily obscuring the subject matter of the present disclosure. In the following embodiments, the same components are described in the first example, and the description of such components may be omitted in other embodiments.

[0040] The terms "first", "second", etc. may be used to describe various components, but these components are not limited by such terms. The terms are used only for the purpose of distinguishing one component from other components.

[0041] The display device according to the present disclosure includes a display element on a substrate. In one example, the substrate may be transparent. The display device may be implemented as a field emission display, a liquid crystal display, an electrophoretic display device, etc. However, hereinafter, for ease of understanding, the display device will be described as an organic light emitting display device in a field emission display.

[0042] Figure 1 is a schematic block diagram of an organic light emitting display device. Figure 2 The circuit configuration of a sub-pixel is schematically shown. Figure 3 An example of a detailed circuit configuration of a sub-pixel is shown.

[0043] like Figure 1 As shown in , the organic light emitting display device includes an image processor 110 , a timing controller 120 , a data driver 130 , a scan driver 140 , and a display panel 150 .

[0044] The image processor 110 outputs a data enable signal DE and a data signal DATA provided from the outside. In addition to the data enable signal DE, the image processor 110 may also output at least one of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal, but illustration of these signals will be omitted for ease of explanation.

[0045] The timing controller 120 receives a data signal DATA and a driving signal including at least one of a vertical synchronization signal, a horizontal synchronization signal, and a clock signal or a data enable signal DE from the image processor 110. The timing controller 120 outputs a gate timing control signal GDC for controlling the operation timing of the scan driver 140 and a data timing control signal DDC for controlling the operation timing of the data driver 130 based on the driving signal.

[0046] In response to the data timing control signal DDC provided from the timing controller 120, the data driver 130 samples and latches the data signal DATA provided from the timing controller 120. Then, the data driver 130 converts the data signal DATA into a gamma reference voltage and outputs it. The data driver 130 outputs the data signal DATA through the data lines DL1 to DLn. The data driver 130 may be configured in the form of an integrated circuit (IC).

[0047] The scan driver 140 outputs a scan signal in response to a gate timing control signal GDC provided from the timing controller 120. The scan driver 140 outputs the scan signal through the gate lines GL1 to GLm. The scan driver 140 may be configured in the form of an integrated circuit (IC) or may be provided on the display panel 150 in a gate-in-panel (GIP) scheme.

[0048] The display panel 150 displays an image in response to a data signal DATA and a scan signal respectively provided from the data driver 130 and the scan driver 140. The display panel 150 includes sub-pixels SP for displaying an image.

[0049] like Figure 2 As shown in , each sub-pixel SP includes a switching transistor SW, a driving transistor DR, a capacitor Cst, a compensation circuit CC, and an organic light emitting diode OLED.

[0050] In response to the scan signal provided through the first gate line GL1, the switching transistor SW performs a switching operation to allow the data signal provided through the data line DL to be stored in the capacitor Cst as a data voltage. The driving transistor DR operates according to the data voltage stored in the capacitor Cst to allow a driving current to flow between the power line EVDD (high potential voltage) and the cathode power line EVSS (low potential voltage). The organic light emitting diode OLED operates according to the driving current formed by the driving transistor DR to emit light.

[0051] The compensation circuit CC is a circuit added inside the sub-pixel to compensate for the threshold voltage of the driving transistor DR. The compensation circuit CC includes at least one transistor. The compensation circuit CC has various configurations depending on the external compensation method. An example thereof will be described below.

[0052] like Figure 3As shown in , the compensation circuit CC includes a sensing transistor ST and a sensing line VREF (or reference line). The sensing transistor ST is connected between the source electrode of the driving transistor DR and the anode electrode of the organic light emitting diode OLED (hereinafter, referred to as a sensing node). The sensing transistor ST operates to provide an initialization voltage (or sensing voltage) received through the sensing line VREF to the sensing node of the driving transistor DR. In addition, the sensing transistor ST operates to sense the voltage or current of the sensing node of the driving transistor DR or the voltage or current of the sensing line VREF.

[0053] The switching transistor SW includes a drain electrode connected to the first data line DL1 and a source electrode connected to the gate electrode of the driving transistor DR. The driving transistor DR includes a drain electrode connected to the power line EVDD and a source electrode connected to the anode electrode of the organic light emitting diode OLED. The capacitor Cst includes a first capacitor electrode connected to the gate electrode of the driving transistor DR and a second capacitor electrode connected to the anode electrode of the organic light emitting diode OLED. The organic light emitting diode OLED includes an anode electrode connected to the source electrode of the driving transistor DR and a cathode electrode connected to the second power line EVSS. The sensing transistor ST includes a drain electrode connected to the sensing line VREF and a source electrode connected to the anode electrode of the organic light emitting diode OLED and the source electrode of the driving transistor DR as a sensing node. In the above description, the transistor is implemented as an n-type transistor, but it may not be limited thereto.

[0054] Depending on the external compensation algorithm (or the configuration of the compensation circuit), the operation time of the sensing transistor ST may be similar / same or different from the operation time of the switching transistor SW. For example, the gate electrode of the switching transistor SW may be connected to the first gate line GL1, and the gate electrode of the sensing transistor ST may be connected to the second gate line GL2. In this case, the scan signal Scan is sent to the first gate line GL1, and the sensing signal Sense is sent to the second gate line GL2. In another example, the first gate line GL1 connected to the gate electrode of the switching transistor SW and the second gate line GL2 connected to the gate electrode of the sensing transistor ST may be connected to be shared together.

[0055] The sensing line VREF may be connected to a data driver. In this case, the data driver may sense the sensing node of each sub-pixel in real time during the non-display time of the image or during the Nth frame (N is an integer equal to or greater than 1) and generate a sensing result. At the same time, the switching transistor SW and the sensing transistor ST may be turned on at the same time. In this case, the sensing operation through the sensing line VREF and the data output operation of the output data signal may be separated (differentiated) based on the time division scheme of the data driver.

[0056] In addition, the compensation target according to the sensing result may be a digital data signal, an analog data signal or a gamma voltage. In addition, a compensation circuit that generates a compensation signal (or compensation voltage) based on the sensing result may be provided inside the data driver or inside the timing controller. In addition, the compensation circuit may be implemented as a separate circuit.

[0057] Figure 3 An example of a sub-pixel having a 3T (transistor) 1C (capacitor) structure is shown, which includes a switching transistor SW, a driving transistor DR, a capacitor Cst, an organic light emitting diode OLED, and a sensing transistor ST. However, if a compensation circuit CC is added, the sub-pixel can be configured to have a 3T2C, 4T2C, 5T2C, or 6T2C structure. Hereinafter, for ease of explanation, an example of a sub-pixel having a 3T1C structure will be described.

[0058] <First Embodiment>

[0059] Figure 4 The first embodiment of the present disclosure is schematically shown. Figure 1 A plan view of area A. Figure 5 is along Figure 4 A cross-sectional view taken along line II'. Figure 6 is along Figure 4 A cross-sectional view taken along line II-II'. Figure 7 An embodiment of the configuration of the first electrode is shown.

[0060] Reference Figure 4 The display device according to the first embodiment of the present disclosure includes pixels. The pixels may be arranged on a substrate of a display panel in a matrix form, but may not be limited thereto. The pixels include a first area EA and a second area TA.

[0061] The first area EA may be defined as an area emitting light for displaying an input image. The first area EA may be defined as an emission area. The first area EA may include sub-pixels PIX each having an organic light emitting diode. Each sub-pixel PIX may include a circuit unit electrically connected to the organic light emitting diode. The circuit unit may include at least one transistor and at least one capacitor.

[0062] The second area TA may be defined as an area that transmits external light so that a user can recognize an object located on the rear surface of the display device. In addition, the second area TA may be defined as an area outside the first area EA where no signal line is provided. If the signal line is formed of a transparent material and has a predetermined transparency, the area where the signal line is provided may also be allocated as the second area TA. The second area TA may be referred to as a transmission area.

[0063] The pixel includes a sub-pixel PIX. The display device according to the exemplary embodiment of the present disclosure can be implemented as a top emission type. Therefore, most of the areas where the sub-pixels PIX are provided can be allocated as the first area EA. The sub-pixels PIX can be arranged in a first direction (e.g., Y-axis direction) and a second direction (e.g., X-axis direction) that intersect each other. Each pixel may include sub-pixels PIX of red (R), green (G), blue (B), and white (W), but may not be limited to this. Hereinafter, for ease of explanation, an example of a pixel including sub-pixels PIX of red (R), green (G), blue (B), and white (W) will be described.

[0064] For example, the first area EA may include a first pixel and a second pixel adjacent to each other in the first direction. The first pixel includes a 1-1 sub-pixel PIX1-1, a 1-2 sub-pixel PIX1-2, a 1-3 sub-pixel PIX1-3, and a 1-4 sub-pixel PIX1-4. The second pixel includes a 2-1 sub-pixel PIX2-1, a 2-2 sub-pixel PIX2-2, a 2-3 sub-pixel PIX2-3, and a 2-4 sub-pixel PIX2-4. The 1-1 sub-pixel PIX1-1 and the 2-1 sub-pixel PIX2-1 emit light of the same first color. The 1-2 sub-pixel PIX1-2 and the 2-2 sub-pixel PIX2-2 emit light of the same second color. The 1-3 sub-pixel PIX1-3 and the 2-3 sub-pixel PIX2-3 emit light of the same third color. The 1-4 sub-pixel PIX1-4 and the 2-4 sub-pixel PIX2-4 emit light of the same fourth color. Each of the first, second, third, and fourth colors may be assigned any one of red (R), green (G), blue (B), and white (W).

[0065] The sub-pixels PIX arranged inside the pixel may be arranged in a quadrilateral type as shown. The 1-1 sub-pixel PIX1-1 and the 2-1 sub-pixel PIX2-1 may be arranged to be adjacent to the 1-2 sub-pixel PIX1-2 and the 2-2 sub-pixel PIX2-2 in the first direction, respectively. The 1-3 sub-pixel PIX1-3 and the 2-3 sub-pixel PIX2-3 may be arranged to be adjacent to the 1-4 sub-pixel PIX1-4 and the 2-4 sub-pixel PIX2-4 in the first direction, respectively. The 1-1 sub-pixel PIX1-1 and the 2-1 sub-pixel PIX2-1 may be arranged to be adjacent to the 1-3 sub-pixel PIX1-3 and the 2-3 sub-pixel PIX2-3 in the second direction, respectively. The 1-2 sub-pixel PIX1-2 and the 2-2 sub-pixel PIX2-2 may be arranged to be adjacent to the 1-4 sub-pixel PIX1-4 and the 2-4 sub-pixel PIX2-4 in the second direction, respectively.

[0066] Sub-pixels PIX emitting light of the same color are arranged in the first direction. That is, 1-1 sub-pixel PIX1-1 and 2-1 sub-pixel PIX2-1 may be arranged in the first direction, and 1-2 sub-pixel PIX1-2 and 2-2 sub-pixel PIX2-2 may be arranged in the first direction. In addition, 1-3 sub-pixel PIX1-3 and 2-3 sub-pixel PIX2-3 may be arranged in the first direction, and 1-4 sub-pixel PIX1-4 and 2-4 sub-pixel PIX2-4 may be arranged in the first direction.

[0067] In this case, two sub-pixels PIX emitting light of different colors from each other are sequentially arranged alternately in the first direction. That is, the 1-1 sub-pixel PIX1-1 emitting light of the first color, the 1-2 sub-pixel PIX1-2 emitting light of the second color, the 2-1 sub-pixel PIX2-1 emitting light of the first color, and the 2-2 sub-pixel PIX2-2 emitting light of the second color are sequentially arranged in the first direction. In addition, the 1-3 sub-pixels PIX1-3 emitting light of the third color, the 1-4 sub-pixels PIX1-4 emitting light of the fourth color, the 2-3 sub-pixels PIX2-3 emitting light of the third color, and the 2-4 sub-pixels PIX2-4 emitting light of the fourth color are sequentially arranged in the first direction.

[0068] Each of the sub-pixels PIX includes a transistor placed on a substrate and an organic light emitting diode electrically connected to the transistor.

[0069] For example, refer to Figure 5 and Figure 6 , a light shielding layer LS is positioned on the substrate SUB. The light shielding layer LS blocks light incident from the outside and suppresses the generation of photoelectric current in the transistor. A buffer layer BUF is positioned on the light shielding layer LS. The buffer layer BUF protects the thin film transistor to be formed in a subsequent process from impurities such as alkali ions flowing out of the light shielding layer LS. The buffer layer BUF may be silicon nitride (SiNx) or a multilayer thereof.

[0070] A semiconductor layer A of a driving transistor DR is positioned on the buffer layer BUF, and a capacitor lower electrode LCst is positioned to be separated from the semiconductor layer A. The semiconductor layer A and the capacitor lower electrode LCst may be formed of a silicon semiconductor or an oxide semiconductor. The silicon semiconductor may include amorphous silicon or crystallized polysilicon. The semiconductor layer A includes a drain region and a source region each containing a p-type or n-type impurity, and also includes a channel between the drain region and the source region. The capacitor lower electrode LCst may be doped with impurities and become conductive.

[0071] A gate insulating layer GI is positioned on the semiconductor layer A. The gate insulating layer GI may be silicon oxide (SiOx), silicon nitride (SiNx) or a multilayer thereof. At a specific region of the gate insulating layer GI on the semiconductor layer A, that is, at a position corresponding to the channel when the impurities are injected, a gate electrode G is positioned. The gate electrode G is formed by any one of the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or its alloy. In addition, the gate electrode G may be a multilayer formed by any one of the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd) and copper (Cu) or its alloy. For example, the gate electrode G may be a double layer of molybdenum / aluminum-neodymium or molybdenum / aluminum.

[0072] An interlayer insulating layer ILD is positioned on the gate electrode G to insulate the gate electrode G. The interlayer insulating layer ILD may be a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, or a multilayer thereof. The source electrode S and the drain electrode D are located on the interlayer insulating layer ILD. The source electrode S and the drain electrode D are connected to the semiconductor layer A through a contact hole, and the source region of the semiconductor layer A is exposed through the contact hole. Each of the source electrode S and the drain electrode D may be formed as a single layer or multiple layers. If each of the source electrode S and the drain electrode D is formed as a single layer, it may be formed by any one of the group consisting of molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), and copper (Cu) or an alloy thereof. If each of the source electrode S and the drain electrode D is formed as a multilayer, it may be formed as a double layer of molybdenum / aluminum-neodymium or a triple layer of titanium / aluminum / titanium, molybdenum / aluminum / molybdenum or molybdenum / aluminum-neodymium / molybdenum. Therefore, the driving transistor DR is configured to include the semiconductor layer A, the gate electrode G, the source electrode S, and the drain electrode D. In addition, the capacitor Cst is configured to include the capacitor lower electrode LCst and the drain electrode D serving as the capacitor upper electrode.

[0073] A passivation layer PAS is positioned on a substrate SUB including a driving transistor DR and a capacitor Cst. The passivation layer PAS is an insulating layer that protects the elements below the passivation layer PAS, and may be a silicon oxide (SiOx) layer, a silicon nitride (SiNx) layer, or a multilayer thereof. An upper coating layer OC is positioned on the passivation layer PAS. The upper coating layer OC may be a planarization layer for alleviating the steps of the underlying structure, and may be formed of organic materials such as polyimide, benzocyclobutene series resins, and acrylates. The upper coating layer OC may be formed by a spin coating on glass (SOG) method for coating an organic material in a liquid state and then curing the organic material. In a portion of the upper coating layer OC, a pixel contact hole PH is positioned that penetrates the upper coating layer OC and the passivation layer PAS to expose the source electrode S.

[0074] The organic light emitting diode includes a first electrode E1, an organic emission layer OL, and a second electrode E2 facing each other. The first electrode E1 may be an anode, and the second electrode E2 may be a cathode, but may not be limited thereto.

[0075] The first electrode E1 may be connected to the source electrode S of the driving transistor DR through a pixel contact hole PH penetrating the upper coating layer OC and the passivation layer PAS. The first electrode E1 may include a reflective layer and serve as a reflective electrode. The reflective layer may be formed of aluminum (Al), copper (Cu), silver (Ag), nickel (Ni), molybdenum (Mo), titanium (Ti) or an alloy thereof, or may be formed of APC (silver / palladium / copper alloy). However, the present disclosure may not be limited thereto. The reflective layer may reflect light from the organic emission layer OL in an upward direction. The first electrode E1 may be formed corresponding to each sub-pixel PIX in the first area EA.

[0076] For example, Figure 7 As shown in (a) of FIG. 1 , the first electrode E1 may have a structure in which a transparent conductive layer TE and a reflective layer ME are sequentially stacked. For another example, as shown in FIG. Figure 7 As shown in (b)B in FIG. 1 , the first electrode E1 may have a structure in which a reflective layer ME and a transparent conductive layer TE are sequentially stacked. Figure 7 As shown in (c) of FIG. 1 , the first electrode E1 may have a structure in which a first transparent conductive layer TE1, a reflective layer ME, and a second transparent conductive layer TE2 are sequentially stacked. In this case, each of the first transparent conductive layer and the second transparent conductive layer may be indium tin oxide (ITO), and the reflective layer may be molybdenum titanium (MoTi), but may not be limited thereto.

[0077] A bank layer BN is provided on the substrate SUB on which the first electrode E1 has been formed. The bank layer BN may be formed of an organic material such as polyimide, benzocyclobutene series resin, and acrylate. The bank layer BN includes an opening through which most of the first electrode E1 is exposed. The bank layer BN may be provided to expose a central portion of the first electrode E1 and cover at least a portion of a side end of the first electrode E1.

[0078] In order to ensure a predetermined transmittance of the second area TA, at least some of the insulating layer formed in the second area TA may be removed. Figure 6As shown in the figure, the upper coating layer OC and the bank layer BN may be patterned and removed from at least a portion of the second area TA. Although not shown in the drawings, at least one of the buffer layer BUF, the interlayer insulating layer ILD, and the passivation layer PAS may be patterned and removed from at least a portion of the second area TA. However, it should be noted that the insulating layer may be removed under the condition that the short circuit of the electrode and / or the signal line disposed in the second area TA can be suppressed.

[0079] The organic emission layer OL is disposed on the substrate SUB on which the bank layer BN has been formed. The organic emission layer OL is a layer in which electrons and holes are recombined to emit light and includes an emission layer EML. The organic emission layer OL may also include any one or more of a hole injection layer HIL, a hole transport layer HTL, an electron transport layer ETL, and an electron injection layer EIL.

[0080] The emission layer EML may be configured to emit white light. In this case, each sub-pixel PIX may be combined with a corresponding color filter to realize red (R), green (G), blue (B), or white (W). The emission layer EML may be formed in the first area EA where the sub-pixel PIX is disposed and extended and formed in the second area TA.

[0081] For example, the emission layer EML emitting white light may be extended to be formed as one body on the sub-pixel PIX. Red (R), green (G), and blue (B) color filters may be respectively assigned to the red (R), green (G), and blue (B) sub-pixels PIX. Although not shown in the drawings, a color filter may be formed on a facing substrate facing the substrate SUB in a direction in which light generated from the emission layer EML is emitted. For another example, the color filter may be disposed on a second electrode E2 on the substrate SUB.

[0082] The second electrode E2 is disposed on the organic emission layer OL. The second electrode E2 may be widely formed on the entire surface of the substrate SUB. The second electrode E2 may be used as a transmissive electrode. The second electrode E2 may be formed of a transparent conductive material such as indium tin oxide (ITO) and indium zinc oxide (IZO). Alternatively, the second electrode E2 may be formed of a material thin enough to transmit light such as magnesium (Mg), calcium (Ca), aluminum (Al), silver (Ag) or an alloy thereof.

[0083] The display device according to the first embodiment of the present disclosure is equipped with a display panel including a first area EA as an emission area and a second area TA as a transmission area. Therefore, when the display device is driven, visual information displayed on the first area EA of the display panel can be provided to a user in front of the display panel. In addition, when the display device is not driven, background information of an object located on the rear surface of the display panel can be provided to the user through the second area TA. Therefore, the display device according to the first embodiment of the present disclosure can be implemented as a transparent display device.

[0084] In a transparent display device, the second area TA needs to have a sufficient size to allow a user to more clearly recognize background information located on the rear surface of the display panel. In addition, the first area EA needs to have a sufficient size to ensure a desired aperture ratio. However, the size of the first area EA and the size of the second area TA have a trade-off relationship within a limited space. Therefore, a simple layout design is not sufficient to provide a high-quality transparent display device.

[0085] For example, in the first embodiment of the present disclosure, when the display device is driven, light for displaying an input image is provided only from the first area EA. That is, the area allocated as the second area TA is a non-emission area, and thus the aperture ratio is greatly reduced, which is a problem.

[0086] <Second Embodiment>

[0087] Figure 8 is a schematic diagram showing a second embodiment of the present disclosure. Figure 1 A plan view of area A. Fig. 9 and Fig.10 is along Figure 8 In the second embodiment of the present disclosure, detailed description of the parts identical to or corresponding to those of the above-described first embodiment will be omitted.

[0088] Reference Figure 8 , a display device according to a second embodiment of the present disclosure includes pixels. The pixels may be arranged in a matrix form on a substrate of a display panel, but may not be limited thereto. The pixel includes a first area EA and a second area TA. In the accompanying drawings, the first area EA and the second area TA are shown as being arranged adjacent to each other in a first direction, but may not be limited thereto. The first area EA and the second area TA may be arranged adjacent to each other in a second direction. Hereinafter, for ease of explanation, an example in which the first area EA and the second area TA are arranged adjacent to each other in the first direction will be described.

[0089] The first area EA may be defined as an area emitting light for displaying an input image. The first area EA may be defined as an emission area. The first area EA may include sub-pixels PIX each having an organic light emitting diode. Each sub-pixel PIX may include a circuit unit C electrically connected to the organic light emitting diode. The circuit unit C may include at least one transistor and at least one capacitor.

[0090] The second area TA may be defined as an area that transmits external light so that a user can recognize an object located on the rear surface of the display device. In addition, the second area TA may be defined as an area outside the first area EA where no signal line is provided. If the signal line is formed of a transparent material and has a predetermined transparency, the area where the signal line is provided may also be allocated as the second area TA. The second area TA may be referred to as a transmission area.

[0091] In the second embodiment of the present disclosure, when the display device is driven, the second area TA displays an input image, and thus, the second area TA may be referred to as an auxiliary emission area.

[0092] The second area TA includes auxiliary sub-pixels APIX each having an organic light emitting diode. Each of the auxiliary sub-pixels APIX includes an organic light emitting diode. The auxiliary sub-pixels APIX in the second area TA can be turned on / off simultaneously with the corresponding sub-pixels PIX in the first area EA. That is, the auxiliary sub-pixels APIX in the second area TA can be driven by the circuit unit that drives the corresponding sub-pixels PIX in the first area EA. In other words, the auxiliary sub-pixels APIX in the second area TA and the corresponding sub-pixels PIX in the first area EA can share a single circuit unit.

[0093] For example, the first area EA may include a first pixel and a second pixel adjacent to each other in the first direction. The first pixel includes a 1-1 sub-pixel PIX1-1, a 1-2 sub-pixel PIX1-2, a 1-3 sub-pixel PIX1-3, and a 1-4 sub-pixel PIX1-4. The second pixel includes a 2-1 sub-pixel PIX2-1, a 2-2 sub-pixel PIX2-2, a 2-3 sub-pixel PIX2-3, and a 2-4 sub-pixel PIX2-4. The 1-1 sub-pixel PIX1-1 and the 2-1 sub-pixel PIX2-1 emit light of the same first color. The 1-2 sub-pixel PIX1-2 and the 2-2 sub-pixel PIX2-2 emit light of the same second color. The 1-3 sub-pixel PIX1-3 and the 2-3 sub-pixel PIX2-3 emit light of the same third color. The 1-4 sub-pixel PIX1-4 and the 2-4 sub-pixel PIX2-4 emit light of the same fourth color. Each of the first, second, third, and fourth colors may be assigned any one of red (R), green (G), blue (B), and white (W).

[0094] The sub-pixels PIX arranged inside the pixel may be arranged in a quadrilateral type as shown. The 1-1 sub-pixel PIX1-1 and the 2-1 sub-pixel PIX2-1 may be arranged to be adjacent to the 1-2 sub-pixel PIX1-2 and the 2-2 sub-pixel PIX2-2 in the first direction, respectively. The 1-3 sub-pixel PIX1-3 and the 2-3 sub-pixel PIX2-3 may be arranged to be adjacent to the 1-4 sub-pixel PIX1-4 and the 2-4 sub-pixel PIX2-4 in the first direction, respectively. The 1-1 sub-pixel PIX1-1 and the 2-1 sub-pixel PIX2-1 may be arranged to be adjacent to the 1-3 sub-pixel PIX1-3 and the 2-3 sub-pixel PIX2-3 in the second direction, respectively. The 1-2 sub-pixel PIX1-2 and the 2-2 sub-pixel PIX2-2 may be arranged to be adjacent to the 1-4 sub-pixel PIX1-4 and the 2-4 sub-pixel PIX2-4 in the second direction, respectively.

[0095] Sub-pixels PIX emitting light of the same color are arranged in the first direction. That is, 1-1 sub-pixel PIX1-1 and 2-1 sub-pixel PIX2-1 may be arranged in the first direction, and 1-2 sub-pixel PIX1-2 and 2-2 sub-pixel PIX2-2 may be arranged in the first direction. In addition, 1-3 sub-pixel PIX1-3 and 2-3 sub-pixel PIX2-3 may be arranged in the first direction, and 1-4 sub-pixel PIX1-4 and 2-4 sub-pixel PIX2-4 may be arranged in the first direction.

[0096] In this case, two sub-pixels PIX emitting light of different colors from each other are sequentially arranged alternately in the first direction. That is, the 1-1 sub-pixel PIX1-1 emitting light of the first color, the 1-2 sub-pixel PIX1-2 emitting light of the second color, the 2-1 sub-pixel PIX2-1 emitting light of the first color, and the 2-2 sub-pixel PIX2-2 emitting light of the second color are sequentially arranged in the first direction. In addition, the 1-3 sub-pixels PIX1-3 emitting light of the third color, the 1-4 sub-pixels PIX1-4 emitting light of the fourth color, the 2-3 sub-pixels PIX2-3 emitting light of the third color, and the 2-4 sub-pixels PIX2-4 emitting light of the fourth color are sequentially arranged in the first direction.

[0097] The second area TA may include a 2-1 area and a 2-2 area on both sides of the first area EA in the first direction, respectively.

[0098] The 2-1 area may include a 1-1 auxiliary sub-pixel APIX1-1, a 1-2 auxiliary sub-pixel APIX1-2, a 2-1 auxiliary sub-pixel APIX2-1, and a 2-2 auxiliary sub-pixel APIX2-2 sequentially disposed in the second direction.

[0099] The 1-1 auxiliary sub-pixel APIX1-1 may be disposed adjacent to the 1-1 sub-pixel PIX1-1 in the first direction. In response to a signal of the 1-1 circuit unit C1-1 of the 1-1 sub-pixel PIX1-1, the 1-1 auxiliary sub-pixel APIX1-1 may be turned on / off together with the 1-1 sub-pixel PIX1-1. The 1-1 auxiliary sub-pixel APIX1-1 and the 1-1 sub-pixel PIX1-1 may emit light of the same first color.

[0100] The 1-2 auxiliary sub-pixel APIX1-2 may be disposed adjacent to the 1-2 sub-pixel PIX1-2 in the first direction. In response to a signal of the 1-2 circuit unit C1-2 of the 1-2 sub-pixel PIX1-2, the 1-2 auxiliary sub-pixel APIX1-2 may be turned on / off together with the 1-2 sub-pixel PIX1-2. The 1-2 auxiliary sub-pixel APIX1-2 and the 1-2 sub-pixel PIX1-2 may emit light of the same second color.

[0101] The 2-1 auxiliary sub-pixel APIX2-1 may be disposed adjacent to the 2-1 sub-pixel PIX2-1 in the first direction. In response to a signal of the 2-1 circuit unit C2-1 of the 2-1 sub-pixel PIX2-1, the 2-1 auxiliary sub-pixel APIX2-1 may be turned on / off together with the 2-1 sub-pixel PIX2-1. The 2-1 auxiliary sub-pixel APIX2-1 and the 2-1 sub-pixel PIX2-1 may emit light of the same first color.

[0102] The 2-2 auxiliary sub-pixel APIX2-2 may be disposed adjacent to the 2-2 sub-pixel PIX2-2 in the first direction. In response to a signal of the 2-2 circuit unit C2-2 of the 2-2 sub-pixel PIX2-2, the 2-2 auxiliary sub-pixel APIX2-2 may be turned on / off together with the 2-2 sub-pixel PIX2-2. The 2-2 auxiliary sub-pixel APIX2-2 and the 2-2 sub-pixel PIX2-2 may emit light of the same second color.

[0103] The 2-2 area may include a 1-3 auxiliary sub-pixel APIX1-3, a 1-4 auxiliary sub-pixel APIX1-4, a 2-3 auxiliary sub-pixel APIX2-3, and a 2-4 auxiliary sub-pixel APIX2-4 sequentially disposed in the second direction.

[0104] The 1-3 auxiliary sub-pixel APIX1-3 may be disposed adjacent to the 1-3 sub-pixel PIX1-3 in the first direction. In response to a signal of the 1-3 circuit unit C1-3 of the 1-3 sub-pixel PIX1-3, the 1-3 auxiliary sub-pixel APIX1-3 may be turned on / off together with the 1-3 sub-pixel PIX1-3. The 1-3 auxiliary sub-pixel APIX1-3 and the 1-3 sub-pixel PIX1-3 may emit light of the same third color.

[0105] The 1-4 auxiliary sub-pixel APIX1-4 may be disposed adjacent to the 1-4 sub-pixel PIX1-4 in the first direction. In response to a signal of the 1-4 circuit unit C1-4 of the 1-4 sub-pixel PIX1-4, the 1-4 auxiliary sub-pixel APIX1-4 may be turned on / off together with the 1-4 sub-pixel PIX1-4. The 1-4 auxiliary sub-pixel APIX1-4 and the 1-4 sub-pixel PIX1-4 may emit light of the same fourth color.

[0106] The 2-3 auxiliary sub-pixel APIX2-3 may be disposed adjacent to the 2-3 sub-pixel PIX2-3 in the first direction. In response to a signal of the 2-3 circuit unit C2-3 of the 2-3 sub-pixel PIX2-3, the 2-3 auxiliary sub-pixel APIX2-3 may be turned on / off together with the 2-3 sub-pixel PIX2-3. The 2-3 auxiliary sub-pixel APIX2-3 and the 2-3 sub-pixel PIX2-3 may emit light of the same third color.

[0107] The 2-4 auxiliary sub-pixel APIX2-4 may be disposed adjacent to the 2-4 sub-pixel PIX2-4 in the first direction. In response to a signal of the 2-4 circuit unit C2-4 of the 2-4 sub-pixel PIX2-4, the 2-4 auxiliary sub-pixel APIX2-4 may be turned on / off together with the 2-4 sub-pixel PIX2-4. The 2-4 auxiliary sub-pixel APIX2-4 and the 2-4 sub-pixel PIX2-4 may emit light of the same fourth color.

[0108] Reference Fig. 9 , on the substrate SUB, the 1-1 sub-pixel PIX1-1 in the first area EA may be disposed adjacent to the 1-1 auxiliary sub-pixel APIX1-1 in the second area TA in the first direction. The 1-1 sub-pixel PIX1-1 may include an organic light emitting diode OLE1 that emits light of a first color and a 1-1 circuit unit C1-1 that drives the organic light emitting diode OLE1. The 1-1 auxiliary sub-pixel APIX1-1 may include an auxiliary organic light emitting diode OLE2 that emits light of the first color. The auxiliary organic light emitting diode OLE2 may be driven by the 1-1 circuit unit C1-1.

[0109] More specifically, the 1-1 circuit unit C1-1 may be located on the substrate SUB. The 1-1 circuit unit C1-1 may include at least one transistor and at least one capacitor. A passivation layer PAS and an overcoat layer OC may be sequentially formed on the substrate SUB on which the 1-1 circuit unit C1-1 has been formed. The overcoat layer OC may be patterned and removed from the second area TA.

[0110] On the overcoat layer OC and the passivation layer PAS, an organic light emitting diode OLE1 and an auxiliary organic light emitting diode OLE2 may be positioned. The organic light emitting diode OLE1 may include a 1-1 electrode E1-1, a second electrode E2, and an organic emission layer OL disposed between the 1-1 electrode E1-1 and the second electrode E2. The auxiliary organic light emitting diode OLE2 may include a 1-2 electrode E1-2, a second electrode E2, and an organic emission layer OL disposed between the 1-2 electrode E1-2 and the second electrode E2. That is, the organic light emitting diode OLE1 and the auxiliary organic light emitting diode OLE2 may share the organic emission layer OL and the second electrode E2.

[0111] The 1-1 electrode E1-1 may be electrically connected to the 1-1 circuit unit C1-1 through a contact hole penetrating the upper coating layer OC and the passivation layer PAS. The 1-1 electrode E1-1 may have a structure in which a transparent conductive layer TE and a reflective layer ME are sequentially stacked. The order in which the transparent conductive layer TE and the reflective layer ME are stacked may be changed. The reflective layer ME may be disposed only in the first area EA. The first area EA in which the organic light emitting diode OLE1 has been formed includes the reflective layer ME. Therefore, the first area EA may be used as an emission area, but not as a transmission area.

[0112] The 1-2 electrode E1-2 may be a portion of the transparent conductive layer TE extending from the 1-1 electrode E1-1. That is, the 1-1 electrode E1-1 and the 1-2 electrode E1-2 may share the transparent conductive layer TE. The 1-2 electrode E1-2 may be a transparent electrode formed only of a transparent conductive layer. The second area TA in which the auxiliary organic light emitting diode OLE2 has been formed includes the 1-2 electrode E1-2 as a transparent electrode. Therefore, the second area TA may be used as an emission area when the display device is driven, and may also be used as a transmission area when the display device is not driven.

[0113] The 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 may be separated by the bank layer BN. That is, the bank layer BN may be located on the edge of the reflective layer ME between the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1.

[0114] For another example, Fig.10 As shown in , the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 may not be separated by the bank layer BN. That is, the bank layer BN may not be located between the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1. In this case, the aperture ratio can be further improved.

[0115] On the substrate SUB on which the bank layer BN has been formed, an organic emission layer OL and a second electrode E2 may be sequentially positioned.

[0116] As described above, the display device according to the second embodiment of the present disclosure includes the second area TA as a light transmission area. Therefore, the display device can be used as a transparent display device and provide light for displaying an input image in the second area TA as well as in the first area EA. Therefore, a sufficient aperture ratio can be ensured. Therefore, a high-quality transparent display device can be provided.

[0117] In addition, the display device according to the second embodiment of the present disclosure satisfies the required aperture ratio. In addition, the display device controls the sizes of the first area EA and the second area TA according to the desired brightness, efficiency and transmittance of the organic light emitting diode. For example, if the transmittance needs to be increased, the size of the first area EA can be reduced by controlling the size of the reflective layer ME to relatively increase the size of the second area TA. Therefore, according to the second embodiment of the present disclosure, a transparent display device with significantly improved design freedom can be provided.

[0118] The configuration implementation of the 1-1 sub-pixel and the 1-1 auxiliary sub-pixel has been described above. Although not shown in the drawings, Fig. 9 The structure shown can be similarly applied to each of the 1-2 sub-pixel PIX1-2 and 1-2 auxiliary sub-pixel APIX1-2, the 1-3 sub-pixel PIX1-3 and 1-3 auxiliary sub-pixel APIX1-3, the 1-4 sub-pixel PIX1-4 and 1-4 auxiliary sub-pixel APIX1-4, the 2-1 sub-pixel PIX2-1 and 2-1 auxiliary sub-pixel APIX2-1, the 2-2 sub-pixel PIX2-2 and 2-2 auxiliary sub-pixel APIX2-2, the 2-3 sub-pixel PIX2-3 and 2-3 auxiliary sub-pixel APIX2-3, and the 2-4 sub-pixel PIX2-4 and 2-4 auxiliary sub-pixel APIX2-4.

[0119] <First Modified Embodiment>

[0120] Fig.11 is a first modified embodiment according to the second embodiment. Figure 8 A cross-sectional view taken along line III-III'.

[0121] Reference Fig.11, on the substrate SUB, the 1-1 sub-pixel PIX1-1 in the first area EA may be disposed adjacent to the 1-1 auxiliary sub-pixel APIX1-1 in the second area TA in the first direction. The 1-1 sub-pixel PIX1-1 may include an organic light emitting diode OLE1 that emits light of a first color and a 1-1 circuit unit C1-1 that drives the organic light emitting diode OLE1. The 1-1 auxiliary sub-pixel APIX1-1 may include an auxiliary organic light emitting diode OLE2 that emits light of the first color. The auxiliary organic light emitting diode OLE2 may be driven by the 1-1 circuit unit C1-1.

[0122] More specifically, the 1-1 circuit unit C1-1 may be located on the substrate SUB. The 1-1 circuit unit C1-1 may include at least one transistor and at least one capacitor. A passivation layer PAS and an overcoat layer OC may be sequentially formed on the substrate SUB on which the 1-1 circuit unit C1-1 has been formed. The overcoat layer OC may be patterned and removed from the second area TA.

[0123] On the overcoat layer OC and the passivation layer PAS, an organic light emitting diode OLE1 and an auxiliary organic light emitting diode OLE2 may be positioned. The organic light emitting diode OLE1 may include a 1-1 electrode E1-1, a second electrode E2, and an organic emission layer OL disposed between the 1-1 electrode E1-1 and the second electrode E2. The auxiliary organic light emitting diode OLE2 may include a 1-2 electrode E1-2, a second electrode E2, and an organic emission layer OL disposed between the 1-2 electrode E1-2 and the second electrode E2. That is, the organic light emitting diode OLE1 and the auxiliary organic light emitting diode OLE2 may share the organic emission layer OL and the second electrode E2.

[0124] The 1-1 electrode E1-1 may be electrically connected to the 1-1 circuit unit C1-1 through a pixel contact hole PH penetrating the overcoat layer OC and the passivation layer PAS. For example, the first transparent conductive layer TE1 included in the 1-1 electrode E1-1 may be electrically connected to the 1-1 circuit unit C1-1 through the pixel contact hole PH.

[0125] The 1-1 electrode E1-1 may have a structure in which a first transparent conductive layer TE1, a reflective layer ME, and a second transparent conductive layer TE2 are sequentially stacked. An intermediate insulating layer IN may be disposed between the transparent conductive layer TE1 and the reflective layer ME. The first transparent conductive layer TE1 may be connected to the reflective layer ME through an opening INH penetrating the intermediate insulating layer IN. The intermediate insulating layer IN, the reflective layer ME, and the second transparent conductive layer TE2 may be disposed only in the first area EA. The first area EA in which the organic light emitting diode OLE1 has been formed includes the reflective layer ME. Therefore, the first area EA may be used as an emission area, but not as a transmission area.

[0126] The 1-2 electrode E1-2 may be a portion of the first transparent conductive layer TE1 extending from the 1-1 electrode E1-1. That is, the 1-1 electrode E1-1 and the 1-2 electrode E1-2 may share the first transparent conductive layer TE1. The 1-2 electrode E1-2 may be a transparent electrode formed only of a transparent conductive layer. The second area TA in which the auxiliary organic light emitting diode OLE2 has been formed includes the 1-2 electrode E1-2 as a transparent electrode. Therefore, the second area TA may be used as an emission area when the display device is driven, and may also be used as a transmission area when the display device is not driven.

[0127] The 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 may be separated by a bank layer BN. That is, the bank layer BN may be located between the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 on the edge of the intermediate insulating layer IN, the reflective layer ME, and the second transparent conductive layer TE2. The bank layer BN may include an opening through which the second transparent conductive layer TE2 in the first area EA and the first transparent conductive layer TE1 in the second area TA are exposed.

[0128] For another example, the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 may not be separated by the bank layer BN. That is, the bank layer BN may not be located between the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1. In this case, the aperture ratio may be further improved.

[0129] On the substrate SUB on which the bank layer BN has been formed, an organic emission layer OL and a second electrode E2 may be sequentially positioned.

[0130] The configuration implementation of the 1-1 sub-pixel and the 1-1 auxiliary sub-pixel has been described above. Although not shown in the drawings, Fig.11 The structure shown can be similarly applied to each of the 1-2 sub-pixel PIX1-2 and 1-2 auxiliary sub-pixel APIX1-2, the 1-3 sub-pixel PIX1-3 and 1-3 auxiliary sub-pixel APIX1-3, the 1-4 sub-pixel PIX1-4 and 1-4 auxiliary sub-pixel APIX1-4, the 2-1 sub-pixel PIX2-1 and 2-1 auxiliary sub-pixel APIX2-1, the 2-2 sub-pixel PIX2-2 and 2-2 auxiliary sub-pixel APIX2-2, the 2-3 sub-pixel PIX2-3 and 2-3 auxiliary sub-pixel APIX2-3, and the 2-4 sub-pixel PIX2-4 and 2-4 auxiliary sub-pixel APIX2-4.

[0131] FIG. 12A to FIG. 12E Shown in chronological order Fig.11 A process for forming an organic light emitting diode and an auxiliary organic light emitting diode in a structure.

[0132] Reference Fig. 12A , a first transparent conductive material is coated on a substrate on which an upper coating layer OC has been formed, and the first transparent conductive material is patterned by wet etching to form a first transparent conductive layer TE1. The first transparent conductive layer TE1 may be formed as a whole on an area corresponding to the 1-1 sub-pixel PIX1-1 in the first area EA (hereinafter, referred to as the "1-1 sub-pixel PIX1-1 area") and an area corresponding to the 1-1 auxiliary sub-pixel APIX1-1 in the second area TA (hereinafter, referred to as the "1-1 auxiliary sub-pixel APIX1-1 area"). The first transparent conductive material may be ITO, but may not be limited thereto. The first transparent conductive layer TE1 may be electrically connected to the 1-1 circuit unit C1-1 in the first area EA through a pixel contact hole PH penetrating the upper coating layer OC and the passivation layer PAS.

[0133] Reference Fig. 12B , an inorganic insulating material is coated on the substrate on which the first transparent conductive layer TE1 has been formed. Then, the inorganic insulating material is patterned by dry etching to form an opening INH, and at least a portion of the first transparent conductive layer TE1 is exposed through the opening INH. The inorganic insulating material may be silicon oxide (SiOx), but may not be limited thereto. The opening INH is formed by patterning the inorganic insulating material by dry etching, and therefore, the first transparent conductive layer TE1 may not be patterned.

[0134] Reference Fig. 12C , a metal material and a second transparent conductive material are sequentially coated on the inorganic insulating material. Then, the metal material and the second transparent conductive material are patterned by wet etching to form a reflective layer ME and a second transparent conductive layer TE2. The reflective layer ME and the second transparent conductive layer TE2 may be located only on the 1-1 sub-pixel PIX1-1 region. The reflective layer ME may be electrically connected to the first transparent conductive layer TE1 through the opening INH. The metal material may be molybdenum titanium (MoTi), and the second transparent conductive material may be ITO, but may not be limited thereto. The metal material and the second transparent conductive material are patterned by wet etching, and therefore, the inorganic insulating material may not be patterned. Therefore, damage to the first transparent conductive layer TE1 located below the inorganic insulating material during wet etching for forming the reflective layer ME and the second transparent conductive layer TE2 may be suppressed.

[0135] Reference Fig.12D, after forming the reflective layer ME and the second transparent conductive layer TE2, the inorganic insulating material is patterned by dry etching to form an intermediate insulating layer IN. During dry etching, only a portion of the inorganic insulating material located below the reflective layer ME and the second transparent conductive layer TE2 and covered by the reflective layer ME and the second transparent conductive layer TE2 may remain on the first transparent conductive layer TE1. After dry etching, the portion of the inorganic insulating material that remains may be referred to as the intermediate insulating layer IN. The intermediate insulating layer IN may be located only on the 1-1 sub-pixel PIX1-1 region and disposed between the first transparent conductive layer TE1 and the reflective layer ME. Since the inorganic insulating material is patterned, a portion of the first transparent conductive layer TE1 corresponding to the 1-1 auxiliary sub-pixel APIX1-1 region may be exposed.

[0136] Reference Fig.12E , a bank layer BN is formed for separating the 1-1 sub-pixel PIX1-1 region and the 1-1 auxiliary sub-pixel APIX1-1 region. The bank layer BN includes an opening. The opening can expose the second transparent conductive layer TE2 in the 1-1 sub-pixel PIX1-1 region and the first transparent conductive layer TE1 in the 1-1 auxiliary sub-pixel APIX1-1 region. On the substrate SUB on which the bank layer BN has been formed, an organic emission layer OL and a second electrode E2 are sequentially formed.

[0137] The first transparent conductive layer TE1, the reflective layer ME, and the second transparent conductive layer TE2 located on the 1-1 sub-pixel PIX1-1 region may be referred to as the 1-1 electrode E1-1. In addition, they may form an organic light-emitting diode OLE1 together with the organic emission layer OL and the second electrode E2. The first transparent conductive layer TE1 located on the 1-1 auxiliary sub-pixel APIX1-1 region may be referred to as the 1-2 electrode E1-2. In addition, it may form an auxiliary organic light-emitting diode OLE2 together with the organic emission layer OL and the second electrode E2.

[0138] <Second Modified Embodiment>

[0139] Fig.13 is a second modified embodiment according to the second embodiment. Figure 8 A cross-sectional view taken along line III-III'.

[0140] Reference Fig.13, on the substrate SUB, the 1-1 sub-pixel PIX1-1 in the first area EA may be disposed adjacent to the 1-1 auxiliary sub-pixel APIX1-1 in the second area TA in the first direction. The 1-1 sub-pixel PIX1-1 may include an organic light emitting diode OLE1 that emits light of a first color and a 1-1 circuit unit C1-1 that drives the organic light emitting diode OLE1. The 1-1 auxiliary sub-pixel APIX1-1 may include an auxiliary organic light emitting diode OLE2 that emits light of the first color. The auxiliary organic light emitting diode OLE2 may be driven by the 1-1 circuit unit C1-1.

[0141] More specifically, the 1-1 circuit unit C1-1 may be located on the substrate SUB. The 1-1 circuit unit C1-1 may include at least one transistor and at least one capacitor. A passivation layer PAS and an overcoat layer OC may be sequentially formed on the substrate SUB on which the 1-1 circuit unit C1-1 has been formed. The overcoat layer OC may be patterned and removed from the second area TA.

[0142] On the overcoat layer OC and the passivation layer PAS, an organic light emitting diode OLE1 and an auxiliary organic light emitting diode OLE2 may be positioned. The organic light emitting diode OLE1 may include a 1-1 electrode E1-1, a second electrode E2, and an organic emission layer OL disposed between the 1-1 electrode E1-1 and the second electrode E2. The auxiliary organic light emitting diode OLE2 may include a 1-2 electrode E1-2, a second electrode E2, and an organic emission layer OL disposed between the 1-2 electrode E1-2 and the second electrode E2. That is, the organic light emitting diode OLE1 and the auxiliary organic light emitting diode OLE2 may share the organic emission layer OL and the second electrode E2.

[0143] The 1-1 electrode E1-1 may be electrically connected to the 1-1 circuit unit C1-1 through a pixel contact hole PH penetrating the overcoat layer OC and the passivation layer PAS. For example, the first transparent conductive layer TE1 included in the 1-1 electrode E1-1 may be electrically connected to the 1-1 circuit unit C1-1 through the pixel contact hole PH.

[0144] The 1-1 electrode E1-1 may have a structure in which a first transparent conductive layer TE1, a reflective layer ME, and a second transparent conductive layer TE2 are sequentially stacked. The first transparent conductive layer TE1 and the reflective layer ME may be provided only in the first area EA. The first area EA in which the organic light emitting diode OLE1 has been formed includes the reflective layer ME. Therefore, the first area EA may be used as an emission area, but not as a transmission area.

[0145] The 1-2 electrode E1-2 may be a portion of the second transparent conductive layer TE2 extending from the 1-1 electrode E1-1. That is, the 1-1 electrode E1-1 and the 1-2 electrode E1-2 may share the second transparent conductive layer TE2. The 1-2 electrode E1-2 may be a transparent electrode formed only of a transparent conductive layer. The second area TA in which the auxiliary organic light emitting diode OLE2 has been formed includes the 1-2 electrode E1-2 as a transparent electrode. Therefore, the second area TA may be used as an emission area when the display device is driven, and may also be used as a transmission area when the display device is not driven.

[0146] The 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 may be separated by a bank layer BN. That is, the bank layer BN may be located between the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 on the edge of the first transparent conductive layer TE1 and the reflective layer ME. The bank layer BN may include an opening through which the second transparent conductive layer TE2 in the first area EA and the second transparent conductive layer TE2 in the second area TA are exposed.

[0147] For another example, the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1 may not be separated by the bank layer BN. That is, the bank layer BN may not be located between the 1-1 sub-pixel PIX1-1 and the 1-1 auxiliary sub-pixel APIX1-1. In this case, the aperture ratio may be further improved.

[0148] On the substrate SUB on which the bank layer BN has been formed, an organic emission layer OL and a second electrode E2 may be sequentially positioned.

[0149] The configuration implementation of the 1-1 sub-pixel and the 1-1 auxiliary sub-pixel has been described above. Although not shown in the drawings, Fig.13 The structure shown can be similarly applied to each of the 1-2 sub-pixel PIX1-2 and 1-2 auxiliary sub-pixel APIX1-2, the 1-3 sub-pixel PIX1-3 and 1-3 auxiliary sub-pixel APIX1-3, the 1-4 sub-pixel PIX1-4 and 1-4 auxiliary sub-pixel APIX1-4, the 2-1 sub-pixel PIX2-1 and 2-1 auxiliary sub-pixel APIX2-1, the 2-2 sub-pixel PIX2-2 and 2-2 auxiliary sub-pixel APIX2-2, the 2-3 sub-pixel PIX2-3 and 2-3 auxiliary sub-pixel APIX2-3, and the 2-4 sub-pixel PIX2-4 and 2-4 auxiliary sub-pixel APIX2-4.

[0150] FIG. 14A to FIG. 14C Shown in chronological order Fig.13 A process for forming an organic light emitting diode and an auxiliary organic light emitting diode in a structure.

[0151] Reference Fig.14A , a first transparent conductive material and a metal material are coated on a substrate on which an upper coating layer OC has been formed. Then, the first transparent conductive material and the metal material are patterned by wet etching to form a first transparent conductive layer TE1 and a reflective layer ME. The first transparent conductive layer TE1 and the reflective layer ME may be located only on the 1-1 sub-pixel PIX1-1 region. The first transparent conductive material may be ITO, and the metal material may be molybdenum titanium (MoTi), but may not be limited thereto. The first transparent conductive layer TE1 may be electrically connected to the 1-1 circuit unit C1-1 in the first area EA through a pixel contact hole PH penetrating the upper coating layer OC and the passivation layer PAS.

[0152] Reference Fig. 14B , a second transparent conductive material is coated on the substrate SUB on which the first transparent conductive layer TE1 and the reflective layer ME have been formed. Then, the second transparent conductive material is patterned by wet etching to form a second transparent conductive layer TE2. The second transparent conductive layer TE2 may be formed as a whole on the 1-1 sub-pixel PIX1-1 region and the 1-1 auxiliary sub-pixel APIX1-1 region. The second transparent conductive material may be ITO, but may not be limited thereto.

[0153] Reference Fig. 14C , forming a bank layer BN for separating the 1-1 sub-pixel PIX1-1 region and the 1-1 auxiliary sub-pixel APIX1-1 region. The bank layer BN includes an opening. The opening can expose a portion of the second transparent conductive layer TE2 in the 1-1 sub-pixel PIX1-1 region and a portion of the second transparent conductive layer TE2 in the 1-1 auxiliary sub-pixel APIX1-1 region. On the substrate SUB on which the bank layer BN has been formed, an organic emission layer OL and a second electrode E2 are sequentially formed.

[0154] The first transparent conductive layer TE1, the reflective layer ME, and the second transparent conductive layer TE2 located on the 1-1 sub-pixel PIX1-1 region may be referred to as the 1-1 electrode E1-1. In addition, they may form an organic light-emitting diode OLE1 together with the organic emission layer OL and the second electrode E2. The second transparent conductive layer TE2 located on the 1-1 auxiliary sub-pixel APIX1-1 region may be referred to as the 1-2 electrode E1-2. In addition, it may form an auxiliary organic light-emitting diode OLE2 together with the organic emission layer OL and the second electrode E2.

[0155] Those skilled in the art will appreciate that various changes and modifications may be applicable without departing from the technical concept of the present disclosure. Therefore, the technical scope of the present disclosure is not limited to the detailed description of the specification, but should be defined by the appended claims.

Claims

1. A transparent display device, comprising: a substrate in which a sub-pixel having an organic light emitting diode, an auxiliary sub-pixel adjacent to the sub-pixel and having an auxiliary organic light emitting diode, and a bank layer between the sub-pixel and the auxiliary sub-pixel are arranged, The organic light emitting diode comprises a 1-1 electrode stacked with a transparent conductive layer and a reflective layer. The auxiliary organic light emitting diode includes a 1-2 electrode, the transparent conductive layer extends and is arranged in the 1-2 electrode, and The substrate is defined as a first area where the sub-pixels are arranged and a second area where the auxiliary sub-pixels are arranged. Wherein, the transparent conductive layer comprises: A first transparent conductive layer located in the first region; and a second transparent conductive layer positioned to extend from the first region to the second region, The 1-1 electrode includes the first transparent conductive layer, the reflective layer and the second transparent conductive layer, and The 1-2 electrode includes the second transparent conductive layer, wherein the first transparent conductive layer is located on the reflective layer in the first region, and the second transparent conductive layer is located below the reflective layer in the first region, The transparent display device further includes an intermediate insulating layer, the intermediate insulating layer is between the reflective layer and the second transparent conductive layer, and the second transparent conductive layer is exposed in the second region through the intermediate insulating layer, and The bank layer is located between the sub-pixel and the auxiliary sub-pixel on edges of the intermediate insulating layer, the reflective layer and the first transparent conductive layer.

2. The transparent display device according to claim 1, wherein: The organic light emitting diode and the auxiliary organic light emitting diode share an organic emission layer located on the 1-1 electrode and the 1-2 electrode and a second electrode located on the organic emission layer.

3. The transparent display device according to claim 2, wherein: The sub-pixel includes a circuit unit, the circuit unit includes at least one transistor, and The circuit unit is electrically connected to the organic light emitting diode and the auxiliary organic light emitting diode.

4. The transparent display device according to claim 3, wherein: The second area emits light when the transparent display device is driven and transmits external light when the transparent display device is not driven.

5. The transparent display device according to claim 3, further comprising: in, The reflective layer and the second transparent conductive layer are connected to each other in the first region via an opening penetrating the intermediate insulating layer.

6. The transparent display device according to claim 5, wherein: The intermediate insulating layer is located only in the first region.

7. The transparent display device according to claim 6, further comprising: a passivation layer and an upper coating layer stacked between the circuit unit and the second transparent conductive layer, wherein the top coating is removed from the second region.

8. The transparent display device according to claim 7, wherein: The second transparent conductive layer is in contact with the upper coating layer in the first region and in contact with the passivation layer in the second region.

9. The transparent display device according to claim 3, wherein: In the first region, the first transparent conductive layer is located below the reflective layer, and In the first region, the second transparent conductive layer is located on the reflective layer.

10. The transparent display device according to claim 9, further comprising: A passivation layer and an overcoat layer are stacked between the circuit unit and the second transparent conductive layer, wherein the overcoat layer is removed from the second region.

11. The transparent display device according to claim 10, wherein: The second transparent conductive layer contacts the reflective layer in the first region and contacts the passivation layer in the second region.

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