Electronic device and method of manufacturing the same

Abstract

The present invention provides an electronic device, comprising: a first substrate, a plurality of phase-shifting electrodes, a second substrate, a plurality of patches, a common electrode layer, a dielectric layer and a liquid crystal layer; the plurality of phase-shifting electrodes are arranged on the first substrate, the second substrate has an inner side facing the first substrate, the plurality of patches are arranged on the inner side of the second substrate, the dielectric layer is arranged between the common electrode layer and the second substrate, and is arranged on the plurality of patches; and the liquid crystal layer is arranged between the plurality of phase-shifting electrodes and the common electrode layer. The present invention also provides a method for manufacturing the electronic device.

Description

Technical Field

[0001] The present invention relates to an electronic device and a manufacturing method thereof, and more particularly to an antenna device and a manufacturing method thereof. Background Art

[0002] Electronic products have become an indispensable necessity in modern society. With the booming development of such electronic products, consumers have high expectations for the quality, function or price of these products.

[0003] Some electronic products are further equipped with communication capabilities, such as antenna devices, but they still do not meet the requirements in all aspects. Therefore, developing a structural design that can further improve the performance or operational reliability of electronic products or electronic devices is still one of the topics that the industry is currently working on. Summary of the invention

[0004] According to some embodiments of the present invention, an electronic device is provided, characterized in that it includes: a first substrate, a plurality of phase-shifting electrodes, a second substrate, a plurality of patches, a common electrode layer, a dielectric layer, and a liquid crystal layer. The plurality of phase-shifting electrodes are arranged on the first substrate, the second substrate has an inner side facing the first substrate, the plurality of patches are arranged on the inner side of the second substrate, the dielectric layer is arranged between the common electrode layer and the second substrate, and is arranged on the plurality of patches. And the liquid crystal layer is arranged between the plurality of phase-shifting electrodes and the common electrode layer.

[0005] According to some embodiments of the present invention, an electronic device is provided, characterized in that it includes: a first substrate, a plurality of phase-shifting electrodes, a dielectric layer, a plurality of patches, a common electrode layer, a liquid crystal layer, a first alignment layer, and a second alignment layer. The plurality of phase-shifting electrodes are arranged on the first substrate, the dielectric layer is arranged on the plurality of phase-shifting electrodes, the plurality of patches are arranged on the dielectric layer, and the common electrode layer is arranged between the dielectric layer and the first substrate. The liquid crystal layer is arranged between the plurality of phase-shifting electrodes and the dielectric layer, the first alignment layer is arranged between the plurality of phase-shifting electrodes and the liquid crystal layer, and the second alignment layer is arranged between the common electrode layer and the liquid crystal layer.

[0006] According to some embodiments of the present invention, a method for manufacturing an electronic device is provided, comprising the following steps: providing a first substrate; forming a plurality of phase-shifting electrodes on the first substrate; providing a second substrate; forming a plurality of patches on the second substrate; forming a dielectric layer on the plurality of patches; forming a common electrode layer on the dielectric layer, wherein the dielectric layer is located between the common electrode layer and the second substrate; assembling the first substrate and the second substrate so that the plurality of patches are located on the inner side of the second substrate, the inner side facing the first substrate; and forming a liquid crystal layer between the first substrate and the second substrate, wherein the liquid crystal layer is located between the plurality of phase-shifting electrodes and the common electrode layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] In order to make the above-mentioned objects, features and advantages of the present invention more clearly understood, the specific embodiments of the present invention are described in detail below in conjunction with the accompanying drawings, wherein:

[0008] Figure 1 Shows a schematic diagram of a top view structure of an electronic device according to some embodiments of the present invention;

[0009] Figure 2 A three-dimensional schematic diagram showing a partial structure of an electronic device according to some embodiments of the present invention;

[0010] Figure 3 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0011] Figure 4 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0012] Figure 5 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0013] Figure 6 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0014] Figure 7 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0015] Figure 8 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0016] Fig. 9 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0017] Fig.10 Shows a schematic cross-sectional structure diagram of an electronic device according to some embodiments of the present invention;

[0018] Figures 11A to 11H A schematic diagram showing a cross-sectional structure of an electronic device at an intermediate stage of a manufacturing process according to some embodiments of the present invention;

[0019] Figures 12A to 12F A schematic diagram showing a cross-sectional structure of an electronic device at an intermediate stage of a manufacturing process according to some embodiments of the present invention.

[0020] Explanation of symbols

[0021] 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H, 10K electronic devices;

[0022] 100A modulation unit;

[0023] 102 first substrate;

[0024] 102a medial;

[0025] 102b lateral;

[0026] 104 phase shift electrode;

[0027] 106 first buffer layer;

[0028] 108 first alignment layer;

[0029] 202 second substrate;

[0030] 202a medial;

[0031] 202b lateral;

[0032] 202r concave;

[0033] 203 Coplanar waveguide;

[0034] 204 Patch;

[0035] 204t top surface;

[0036] 206 dielectric layer;

[0037] 206a medial;

[0038] 206b lateral;

[0039] 206e Hole;

[0040] 206p opening;

[0041] 206r Depression;

[0042] 208 common electrode layer;

[0043] 208p opening;

[0044] 210 second buffer layer;

[0045] 210p opening;

[0046] 212 second alignment layer;

[0047] 214 protective layer;

[0048] 214t top surface;

[0049] 216 cap layer;

[0050] 300 Liquid crystal layer;

[0051] 400 Feed structure;

[0052] 400A feed;

[0053] 400B feed line;

[0054] A-A' intercept;

[0055] d1 first distance;

[0056] d2 second distance;

[0057] D p diameter;

[0058] T1 first thickness;

[0059] T2 second thickness;

[0060] T3 third thickness;

[0061] T 3a thickness;

[0062] T 3b thickness;

[0063] W1 first width;

[0064] W2 second width;

[0065] W3 third width;

[0066] W4 fourth width;

[0067] W5 Fifth width. DETAILED DESCRIPTION

[0068] The following is a detailed description of an electronic device and a method for making the same according to an embodiment of the present invention. It should be understood that the following description provides many different embodiments or examples for implementing different aspects of some embodiments of the present invention. The specific elements and arrangements described below are only for simple and clear description of some embodiments of the present invention. Of course, these are only for illustrative purposes and are not limitations of the present invention. In addition, similar and / or corresponding numbers may be used in different embodiments to indicate similar and / or corresponding elements to clearly describe the present invention. However, the use of these similar and / or corresponding numbers is only for the purpose of simply and clearly describing some embodiments of the present invention, and does not represent any relevance between the different embodiments and / or structures discussed.

[0069] It should be understood that the elements or devices of the drawings may exist in various forms known to those skilled in the art. In addition, relative terms, such as "lower" or "bottom" or "upper" or "top", may be used in the embodiments to describe the relative relationship of one element of the drawings to another element. It is understood that if the device of the drawings is turned upside down, the element described on the "lower" side will become the element on the "upper" side. The embodiments of the present invention may be used in conjunction with the attached drawings. Figure 1 It is also understood that the drawings of the present invention are also considered as part of the invention description. It should be understood that the drawings of the present invention are not drawn according to scale, and in fact, the size of the elements may be arbitrarily enlarged or reduced to clearly show the features of the present invention.

[0070] Furthermore, when referring to a first material layer being located on or above a second material layer, it includes the situation where the first material layer is in direct contact with the second material layer, or the situation where there may be one or more other material layers in between, in which case the first material layer and the second material layer may not be in direct contact with each other.

[0071] In addition, it should be understood that although the terms "first", "second", "third", etc. may be used herein to describe various elements, components, or parts, these elements, components, or parts should not be limited by these terms. These terms are only used to distinguish different elements, components, regions, layers, or parts. Therefore, a first element, component, region, layer, or part discussed below may be referred to as a second element, component, region, layer, or part without departing from the teachings of the present invention.

[0072] In the text, the terms "about", "approximately", "substantially", and "roughly" usually mean within 10%, or within 5%, or within 3%, or within 2%, or within 1%, or within 0.5% of a given value or range. The numbers given here are approximate numbers, that is, in the absence of specific instructions for "about", "approximately", "substantially", and "roughly", the meanings of "about", "approximately", "substantially", and "roughly" can still be implied. In addition, the terms "range is from a first value to a second value", "range is between a first value and a second value" mean that the range includes the first value, the second value, and other values ​​between them.

[0073] In some embodiments of the present invention, terms such as "connection", "interconnection", etc., related to bonding and connection, unless otherwise defined, may refer to two structures being in direct contact, or may also refer to two structures not being in direct contact, wherein another structure is disposed between the two structures. Such terms related to bonding and connection may also include situations where both structures are movable, or both structures are fixed. In addition, the term "coupling" includes any direct and indirect electrical connection means.

[0074] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meanings as commonly understood by those skilled in the art to which the present invention belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present invention, and should not be interpreted in an idealized or overly formal manner unless specifically defined in the embodiments of the present invention.

[0075] According to some embodiments of the present invention, the method for manufacturing an electronic device can form a patch and a common electrode on the same side (single side) of a substrate, which can reduce the risk of degradation of the modulation material or cracking of the substrate due to process temperature or further simplify the process, but is not limited thereto. Furthermore, according to some embodiments of the present invention, the electronic device formed by the aforementioned manufacturing method can reduce the dielectric loss of electromagnetic waves or improve the reliability of operation.

[0076] According to some embodiments of the present invention, the provided electronic device may include an antenna device, a liquid crystal display device, a sensing device, a light-emitting device, a splicing device, other suitable devices or a combination of the above devices, but is not limited thereto. The electronic device may be a bendable or flexible electronic device. The antenna device may be, for example, a liquid crystal antenna, but is not limited thereto. The splicing device may be, for example, an antenna splicing device, but is not limited thereto. It should be understood that the electronic device may be any combination of the foregoing, but the present invention is not limited thereto.

[0077] Please refer to Figure 1 , Figure 1 The top view of the electronic device 10A according to some embodiments of the present invention is shown. It should be understood that for the sake of clarity, some elements are omitted in the figure, and only a portion of the modulation unit 100A of the electronic device 10A is schematically illustrated. In addition, Figure 1 Part of the coplanar waveguide 203 is also omitted. The coplanar waveguide 203 may overlap with one end (eg, near the feeding line 400B) of the phase-shifting electrode 104 in the normal direction (eg, Z direction) of the first substrate 102. For example, the coplanar waveguide 203 may be disposed on the second substrate 202 (eg, Figure 2 ), but is not limited thereto. In the present invention, if not specifically stated, "overlap" may include "overlap" and "partial overlap". In different embodiments, the number of modulation units 100A of the electronic device 10A may be adjusted according to actual needs. In addition, it should be understood that according to some embodiments, additional features may be added to the electronic device 10A described below. In other embodiments, some features of the electronic device 10A described below may be replaced or omitted.

[0078] like Figure 1As shown, the electronic device 10A may include a first substrate 102 and a plurality of modulation units 100A disposed on the first substrate 102. In some embodiments, the electronic device 10A may be an antenna device, and the modulation unit 100A may be an antenna unit for modulating electromagnetic waves (eg, radio frequency or microwave).

[0079] In some embodiments, the material of the first substrate 102 may include glass, quartz, sapphire, ceramic, polyimide (PI), liquid crystal polymer (LCP) material, polycarbonate (PC), photosensitive polyimide (PSPI), polyethylene terephthalate (PET), other suitable materials, or a combination of the foregoing materials, but is not limited thereto. In some embodiments, the first substrate 102 may include a printed circuit board (PCB). In some embodiments, the first substrate 102 may include a flexible substrate, a rigid substrate, or a combination of the foregoing.

[0080] Furthermore, if Figure 1 As shown, according to some embodiments, the electronic device 10A may include a feeding structure 400, and the feeding structure 400 may be disposed on the first substrate 102 to transmit an electromagnetic wave signal. In some embodiments, the feeding structure 400 has a feeding source 400A and a feeding line 400B, and the feeding line 400B may be coupled to the feeding source 400A, and the feeding source 400A may provide an initial feeding wave. In one embodiment, one feeding line 400B may be coupled to multiple feeding sources 400A, but is not limited thereto. In another embodiment, multiple feeding lines 400B may be coupled to one feeding source 400A, but is not limited thereto. In some embodiments, the feeding structure 400 has multiple feeding sources 400A that may be coupled to multiple feeding lines 400B, but is not limited thereto. In some embodiments, the initial feeding wave may be a high-frequency electromagnetic wave, but is not limited thereto. Furthermore, in some embodiments, the feeding structure 400 may be further coupled to a signal processor, a signal modulator, or a combination thereof (not shown).

[0081] In some embodiments, the feeding structure 400 may include a conductive material, such as a metal conductive material. In some embodiments, the metal conductive material may include copper (Cu), silver (Ag), tin (Sn), aluminum (Al), molybdenum (Mo), tungsten (W), gold (Au), chromium (Cr), nickel (Ni), platinum (Pt), titanium (Ti), copper alloy, silver alloy, tin alloy, aluminum alloy, molybdenum alloy, tungsten alloy, gold alloy, chromium alloy, nickel alloy, platinum alloy, titanium alloy, other suitable conductive materials, or combinations thereof, but are not limited thereto.

[0082] In addition, the electronic device 10A may include a plurality of phase-shifting electrodes 104 (or microstrip lines), and the phase-shifting electrodes 104 may be disposed on the first substrate 102. The phase-shifting electrodes 104 may be adjacent to the feeding structure 400, and the phase-shifting electrodes 104 may have a spiral shape or a loop shape, but are not limited thereto. At least one of the phase-shifting electrodes 104 may be used to receive an electromagnetic wave signal from the feeding structure 400. For example, the feeding structure 400 may couple the electromagnetic wave signal to the phase-shifting electrode 104 through the coplanar waveguide 203 by means of the feeding line 400B in the form of an induction current. However, in other embodiments, the phase-shifting electrodes 104 may also be used to feed out the processed or modulated electromagnetic wave signal, for example, to the feeding line 400B. Specifically, the refractive index of the modulation material located above or around the phase-shift electrode 104 can be modulated by changing the electric field or magnetic field between the phase-shift electrode 104 and the common electrode layer 208 by changing the potential of the phase-shift electrode 104, thereby changing the phase difference of the electromagnetic wave passing through. In another embodiment, the dielectric constant of the modulation material located above or around the phase-shift electrode 104 can be modulated by changing the electric field or magnetic field between the phase-shift electrode 104 and the common electrode layer 208 by changing the potential of the phase-shift electrode 104, thereby changing the capacitance.

[0083] In some embodiments, the material of the phase-shifting electrode 104 may include a metal conductive material, a transparent conductive material, or a combination thereof. The metal conductive material is similar to the metal conductive material of the feeding structure 400 and is not described in detail herein. The transparent conductive material may include a transparent conductive oxide (TCO). For example, the transparent conductive oxide may include indium tin oxide (ITO), tin oxide (SnO), zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium zinc oxide (IGZO), indium tin oxide (ITZO), antimony tin oxide (ATO), antimony zinc oxide (AZO), other suitable transparent conductive materials, or a combination of the foregoing materials, but is not limited thereto.

[0084] In addition, according to some embodiments, the phase-shift electrode 104 may be further electrically connected to a driving element (not shown). In some embodiments, the driving element may include an active driving element (e.g., a thin-film transistor (TFT)), a passive driving element, or a combination thereof. Specifically, in some embodiments, the phase-shift electrode 104 may be electrically connected to a thin-film transistor, and the thin-film transistor may be further electrically connected to a data line and / or a scan line (gate line). In some embodiments, the phase-shift electrode 104 may be electrically connected to an integrated circuit (IC) and / or a digital-to-analog converter.

[0085] Furthermore, the electronic device 10A may include a patch 204, and the patch 204 may be disposed on the phase-shifting electrode 104. In some embodiments, the patch 204 may partially overlap with the phase-shifting electrode 104 in the normal direction (e.g., Z direction) of the first substrate 102. Further, in some embodiments, the patch 204 may overlap with an end of the phase-shifting electrode 104 in the normal direction (e.g., Z direction) of the first substrate 102, but is not limited thereto. In another embodiment, the patch 204 may not overlap with the end of the phase-shifting electrode 104, but may overlap with other parts of the phase-shifting electrode 104. In some embodiments, the patch 204 may be electrically floated, coupled to a fixed potential (e.g., ground) or other functional circuits, but the present invention is not limited thereto.

[0086] In some embodiments, the material of the patch 204 may include a metal conductive material, a transparent conductive material, or a combination thereof. The metal conductive material and the transparent conductive material are similar to the material of the phase-shifting electrode 104 and are not described in detail herein.

[0087] Next, please refer to Figure 2 , Figure 2 A three-dimensional schematic diagram of a partial structure of an electronic device 10A according to some embodiments of the present invention is shown. It should be understood that for the sake of clarity, Figure 2 Draw only Figure 1 Some components of the modulation unit 100A. Figure 2 As shown, in some embodiments, the modulation unit 100A may include a first substrate 102, and a feeding line 400B and a phase shifting electrode 104 disposed on the first substrate 102. Figure 2 As shown, in some embodiments, one end of the feeding line 400B may correspond to one end of the phase-shifting electrode 104 , but the invention is not limited thereto.

[0088] Furthermore, in some embodiments, the modulation unit 100A may further include a second substrate 202 , a patch 204 and a common electrode layer 208 . The second substrate 202 may be disposed opposite to the first substrate 102 , and the common electrode layer 208 and the patch 204 may be disposed between the first substrate 102 and the second substrate 202 .

[0089] In some embodiments, the material of the second substrate 202 may be similar to that of the first substrate 102 , which will not be described in detail herein. In addition, the material of the second substrate 202 may be the same as or different from that of the first substrate 102 .

[0090] In addition, according to some embodiments, the first substrate 102 and the second substrate 202 may both be flexible substrates, thereby improving the overall flexibility or plasticity of the electronic device 10A, which is beneficial for installation on the surfaces of various objects, such as cars, motorcycles, airplanes, ships, buildings, or other applicable objects, but the present invention is not limited thereto.

[0091] Furthermore, if Figure 2 As shown, the common electrode layer 208 may have an opening 208p, and in the normal direction Z of the first substrate 102, the patch 204 partially overlaps with the opening 208p. In addition, in some embodiments, the end of the phase-shifting electrode 104 may overlap with the opening 208p, but is not limited thereto. According to some embodiments, different electric fields may be applied to the modulation material in the modulation unit 100A (for example, the liquid crystal layer 300 in the subsequent figures) to adjust the capacitance and / or phase difference, thereby controlling the transmission direction or other parameters of the electromagnetic wave signal passing through the opening 208p and the patch 204. The detailed structure of the electronic device 10A is further described as follows.

[0092] Please refer to Figure 3 , Figure 3 A schematic cross-sectional structure diagram of an electronic device 10A according to some embodiments of the present invention is shown. Specifically, Figure 3 Draw Figure 1 Schematic diagram of the cross-sectional structure of the modulation unit 100A along the section line A-A' in FIG. As mentioned above, the electronic device 10A includes a first substrate 102 and a second substrate 202. In detail, the first substrate 102 and the second substrate 202 are arranged opposite to each other, and the first substrate 102 has an inner side 102a facing the second substrate 202, and an outer side 102b opposite to the inner side 102a. Similarly, the second substrate 202 has an inner side 202a facing the first substrate 102, and an outer side 202b opposite to the inner side 202a.

[0093] Furthermore, the first substrate 102 may have a first thickness T1, and the second substrate 202 may have a second thickness T2. In some embodiments, the first thickness T1 of the first substrate 102 may be greater than or equal to the second thickness T2 of the second substrate 202. It is worth noting that, according to some embodiments, the second thickness T2 may be less than the first thickness T1, because the second substrate 202 is the main substrate through which the electromagnetic wave signal passes, thereby reducing the dielectric loss of the electromagnetic wave radiated outward from the patch 204 or the electromagnetic wave that is intended to enter the patch 204 from the outside, but it is not limited thereto.

[0094] Furthermore, according to the embodiment of the present invention, the “first thickness T1” of the first substrate 102 and the “second thickness T2” of the second substrate 202 refer to the maximum thickness of the first substrate 102 and the second substrate 202 in the normal direction Z of the first substrate 102 .

[0095] In addition, according to the embodiments of the present invention, an optical microscope (OM), a scanning electron microscope (SEM), an α-step, an ellipsometer or other suitable methods can be used to measure the thickness, width or distance between each element. Specifically, in some embodiments, after removing the liquid crystal layer 300, a scanning electron microscope can be used to obtain any cross-sectional image of the structure, and the thickness, width or distance between each element in the image can be measured.

[0096] like Figure 2 and Figure 3As shown, in some embodiments, the phase-shifting electrode 104 may be disposed on the inner side 102a of the first substrate 102. In some embodiments, the patch 204 may be disposed on the inner side 202a of the second substrate 202. As mentioned above, in some embodiments, in the normal direction Z of the first substrate 102, the patch 204 may overlap with the phase-shifting electrode 104.

[0097] In addition, the electronic device 10A may include a dielectric layer 206 and a common electrode layer 208 disposed between the first substrate 102 and the second substrate 202. Figure 3 As shown, the dielectric layer 206 may be disposed between the common electrode layer 208 and the second substrate 202, and disposed on the patch 204. For example, the patch 204 may be disposed between the second substrate 202 and the dielectric layer 206. Specifically, the dielectric layer 206 may be disposed adjacent to the second substrate 202, and the dielectric layer 206 has an inner side 206a facing the first substrate 102, and an outer side 206b opposite to the inner side 206a. In some embodiments, the patch 204 may be adjacent to the outer side 206b of the dielectric layer 206, and the common electrode layer 208 may be adjacent to the inner side 206a of the dielectric layer 206, and the dielectric layer 206 may separate the patch 204 and the common electrode layer 208 from each other.

[0098] In some embodiments, the material of the dielectric layer 206 may include an organic material, an inorganic material, or a combination of the aforementioned materials, but is not limited thereto. In some embodiments, the aforementioned organic material may include polyimide (PI), polymethylmethacrylate (PMMA), polyethyleneterephthalate (PET), liquid crystal polymer (LCP) material, polyethylene (PE), polyethersulfone (PES), polycarbonate (PC), isoprene, phenol-formaldehyde resin, benzocyclobutene (BCB), perfluorocyclobutane (PECB), other suitable materials, or a combination of the aforementioned materials, but is not limited thereto. In some embodiments, the aforementioned inorganic material may include silicon oxide, silicon nitride, silicon oxynitride, aluminum oxide, aluminum nitride, aluminum oxynitride, titanium oxide, other suitable materials, or a combination of the aforementioned materials, but is not limited thereto.

[0099] like Figure 3As shown, in some embodiments, the dielectric layer 206 may have a single-layer structure. However, in other embodiments, the dielectric layer 206 may have a multi-layer structure. Specifically, according to some embodiments, the number of the multi-layer structure of the dielectric layer 206 may be between 2 and 50 layers (2≦number≦50), between 2 and 40 layers, between 3 and 30 layers, between 4 and 20 layers, or between 5 and 15 layers, such as 6 layers, 7 layers, 8 layers, 9 layers, 10 layers, 11 layers, 12 layers, 13 layers, or 14 layers, etc., but not limited thereto. In some embodiments, the layers of the dielectric layer 206 having a multi-layer structure may be formed of the same or different materials, or may be formed of partially the same and partially different layers. In addition, in some embodiments, the dielectric layer 206 may include at least one polyimide film, but not limited thereto.

[0100] According to some embodiments, the dielectric layer 206 may have a multi-layer structure, and the material of the layer closest to the common electrode layer 208 (or the layer in contact with the common electrode layer 208) may include silicon oxide, silicon nitride, other suitable materials, or a combination of the foregoing materials, but is not limited thereto. In these embodiments, the difference in coefficient of thermal expansion (CTE) between the dielectric layer 206 and the common electrode layer 208 may be mitigated, thereby improving the warping problem of the second substrate 202.

[0101] Furthermore, the dielectric layer 206 may have a third thickness T3. In some embodiments, the third thickness T3 of the dielectric layer 206 may be greater than or equal to 5 micrometers (μm), and less than or equal to the second thickness T2 of the second substrate 202 (i.e., 5μm≦third thickness T3≦second thickness T2). In some embodiments, the third thickness T3 of the dielectric layer 206 may be greater than or equal to 0.01 times the wavelength λ of the electromagnetic wave modulated by the electronic device 10A, and less than or equal to 1 times the wavelength λ of the electromagnetic wave modulated by the electronic device 10A (i.e., 0.01λ≦third thickness T3≦λ), such as 0.05λ, 0.1λ, 0.3λ, 0.5λ, 0.7λ, or 0.9λ. For example, the third thickness T3 may be between 0.02 times and 0.5 times the wavelength λ of the electromagnetic wave modulated by the electronic device 10A (0.02λ≦T3≦0.5λ).

[0102] It should be understood that if the third thickness T3 of the dielectric layer 206 is too small (for example, less than 5 μm or 0.01 times λ), the distance between the patch 204 and the common electrode layer 208 may be too small, resulting in a decrease in the radiation efficiency of the electromagnetic wave; on the other hand, if the third thickness T3 of the dielectric layer 206 is too large (for example, greater than the second thickness T2 or 1 times λ), the intensity of the induced electromagnetic field may not be sufficient to achieve radiation.

[0103] Furthermore, according to the embodiment of the present invention, the “third thickness T3 ” of the dielectric layer 206 refers to the maximum thickness of the dielectric layer 206 in the normal direction Z of the first substrate 102 .

[0104] As mentioned above, the electronic device 10A includes a common electrode layer 208, such as Figure 3 As shown, the common electrode layer 208 may be patterned to have an opening 208p, and the opening 208p may expose a portion of the inner side 206a of the dielectric layer 206. Furthermore, the opening 208p may correspond to the patch 204. For example, in the normal direction Z of the first substrate 102, the patch 204 may overlap with the opening 208p. In addition, in some embodiments, the common electrode layer 208 may be electrically grounded. In one embodiment, the common electrode layer 208 may be patterned at the end corresponding to the phase-shifting electrode 104 to form a coplanar waveguide 203 (shown in FIG. 1 ). Figure 1 ).

[0105] In some embodiments, the material of the common electrode layer 208 may include a metal conductive material, a transparent conductive material, or a combination thereof. The metal conductive material and the transparent conductive material may be similar to the material of the phase-shifting electrode 104 and will not be described in detail herein.

[0106] like Figure 3 As shown, in some embodiments, the patch 204 may have a first width W1, and the opening 208p of the common electrode layer 208 may have a second width W2. In some embodiments, in a first direction (e.g., the X direction), the second width W2 of the opening 208p may be greater than or equal to the first width W1 of the patch 204; in a second direction (e.g., the Y direction), the width of the opening 208p may be less than or equal to the width W of the patch 204, thereby facilitating the electromagnetic wave signal to pass through the opening 208p and be transmitted to the patch 204. The first direction may be different from the second direction. For example, the first direction may be substantially perpendicular to the second direction.

[0107] It should be understood that, according to some embodiments of the present invention, the first direction may be the extension direction of the opening 208p, but is not limited thereto. In addition, the first direction may be the length direction of the opening 208p, but is not limited thereto. According to some embodiments of the present invention, the "length direction" refers to a direction along or substantially parallel to the long axis of an object. The long axis may be closest to its maximum lengthwise dimension. For an object without a clear long axis, the long axis may represent the long side of the smallest rectangle that can surround the object.

[0108] like Figure 3 As shown, according to some embodiments, the patch 204 and the common electrode layer 208 may be both disposed on the inner side 202a of the second substrate 202. In other words, the patch 204 and the common electrode layer 208 are disposed on the same side of the second substrate 202, but is not limited thereto.

[0109] It is worth noting that in an electronic device in which the patch 204 and the common electrode layer 208 are respectively arranged on both sides of the second substrate 202, a high-temperature metal plating process (such as a back plating process) needs to be subjected to a relatively long time, which may increase the risk of degradation of the modulation material or cracking of the substrate due to the high-temperature process. According to some embodiments of the present invention, the patch 204 and the common electrode layer 208 arranged on one side of the second substrate 202 can reduce the risk of degradation of the modulation material or cracking of the substrate due to the high-temperature process. The detailed manufacturing method of the electronic device 10A will be described later.

[0110] In addition, please refer to Figure 3 The electronic device 10A includes a liquid crystal layer 300, which can be disposed between the first substrate 102 and the second substrate 202, and between the phase shift electrode 104 and the common electrode layer 208. As mentioned above, according to some embodiments, different electric fields can be applied to the liquid crystal layer 300 to adjust the capacitance and phase difference, and control the transmission direction of the electromagnetic signal passing through the opening 208p and the patch element 204.

[0111] In some embodiments, the material of the liquid crystal layer 300 may include nematic liquid crystal, smectic liquid crystal, cholesteric liquid crystal, blue-phase liquid crystal, other suitable liquid crystal materials, or a combination of the foregoing materials, but not limited thereto. However, according to other embodiments, a material having a property of modulating the refractive index may be used to replace the liquid crystal layer 300, such as a transition metal nitride, an electro-optics material, or a combination of the foregoing, but not limited thereto. For example, the electro-optics material may include lithium niobate (LiNbO3), lithium tantalate (LiTaO3), cadmium telluride (CdTe), ammonium dihydrogen phosphate (NH4H2PO4), potassium dihydrogen phosphate (KH2PO4), potassium tantalate niobate (KTN), lead zirconate titanate (PZT), a transition metal nitride (such as TiN, HfN, TaN, or ZrN), or a combination of the foregoing, but not limited thereto. In one embodiment, the liquid crystal layer 300 may include isothiocyanate or other high polarity functional groups, but is not limited thereto.

[0112] Please refer to Figure 3 In some embodiments, the electronic device 10A may further include a first buffer layer 106, and the first buffer layer 106 may be disposed between the first substrate 102 and the phase-shifting electrode 104. For example, in some embodiments, the first buffer layer 106 may contact the inner side 102a of the first substrate 102 and the phase-shifting electrode 104. The first buffer layer 106 may reduce the difference in thermal expansion coefficient between the first substrate 102 and the phase-shifting electrode 104, thereby improving the warping problem of the first substrate 102.

[0113] In some embodiments, the electronic device 10A may further include a second buffer layer 210, which may be disposed between the second substrate 202 and the patch 204. In some embodiments, the second buffer layer 210 may contact the inner side 202a of the second substrate 202, the patch 204, and the dielectric layer 206. The second buffer layer 210 may reduce the difference in thermal expansion coefficient between the second substrate 202 and the patch 204, thereby improving the warping problem of the second substrate 202.

[0114] In some embodiments, the first buffer layer 106 and the second buffer layer 210 may include insulating materials. In some embodiments, the materials of the first buffer layer 106 and the second buffer layer 210 may include organic materials, inorganic materials, or a combination thereof, but are not limited thereto. In some embodiments, the aforementioned organic material may include polyethylene terephthalate (PET), polyethylene (PE), polyethersulfone (PES), polycarbonate (PC), polymethylmethacrylate (PMMA), isoprene, phenol-formaldehyde resin, benzocyclobutene (BCB), perfluorocyclobutane (PECB), or a combination thereof, but are not limited thereto. In some embodiments, the aforementioned inorganic material may include silicon nitride, silicon oxide, silicon oxynitride, aluminum oxide (AlOx), titanium oxide (TiOx), or a combination thereof, but are not limited thereto. Furthermore, the material of the first buffer layer 106 may be the same as or different from the material of the second buffer layer 210.

[0115] Furthermore, the first buffer layer 106 and the second buffer layer 210 may have a single-layer structure or a multi-layer structure, for example, may include multiple sublayers. In the embodiment where the first buffer layer 106 or the second buffer layer 210 includes multiple sublayers, the materials of each sublayer may be the same or different.

[0116] In addition, in some embodiments, the electronic device 10A may further include a circuit layer 110 (see Fig.11F ), the circuit layer 110 may be disposed between the first substrate 102 and the phase-shifting electrode 104. In some embodiments, the circuit layer 110 may include a driving element (such as a thin film transistor) and a signal line electrically connected to the driving element. The signal line may include, for example, a data line and a scan line (gate line).

[0117] Please continue to refer to Figure 3 In some embodiments, the electronic device 10A may further include a first alignment layer 108, and the first alignment layer 108 may be disposed between the phase shift electrode 104 and the liquid crystal layer 300. In some embodiments, the first alignment layer 108 may be disposed between the first buffer layer 106 and the liquid crystal layer 300. Figure 3 As shown, in some embodiments, the first alignment layer 108 may be conformally formed on the first buffer layer 106 and the phase-shifting electrode 104 , but is not limited thereto.

[0118] Furthermore, in some embodiments, the electronic device 10A may further include a second alignment layer 212, and the second alignment layer 212 may be disposed between the common electrode layer 208 and the liquid crystal layer 300. In some embodiments, the second alignment layer 212 may be disposed between the dielectric layer 206 and the liquid crystal layer 300. Figure 3 As shown, in some embodiments, the second alignment layer 212 may be conformally formed on the common electrode layer 208 and the dielectric layer 206, but is not limited thereto. In some embodiments, the second alignment layer 212 may also extend (or be disposed) in the opening 208p.

[0119] In some embodiments, the first alignment layer 108 and the second alignment layer 212 can help control the arrangement direction of the liquid crystal molecules in the liquid crystal layer 300. In some embodiments, the materials of the first alignment layer 108 and the second alignment layer 212 can include organic materials, inorganic materials, or a combination thereof. For example, the aforementioned organic material can include polyimide (PI), a photoreactive polymer material, or a combination thereof, but is not limited thereto. The aforementioned inorganic material can include silicon dioxide (SiO2), other materials having an alignment function, or a combination thereof, but is not limited thereto. In other embodiments, at least one of the first alignment layer 108 and the second alignment layer 212 can be omitted, but is not limited thereto.

[0120] Next, please refer to Figure 4 , Figure 4 The cross-sectional structure diagram of the electronic device 10B according to some other embodiments of the present invention is shown. It should be understood that the components or elements that are the same or similar to those in the previous text will be represented by the same or similar reference numerals, and their materials, manufacturing methods and functions are the same or similar to those described in the previous text, so this part will not be repeated in the following text.

[0121] Figure 4 The electronic device 10B shown is Figure 3The electronic device 10A shown is substantially similar, except that in the electronic device 10B, the second substrate 202 may be partially thinned. Specifically, in this embodiment, the second substrate 202 may have a recess 202r, and the recess 202r may correspond to the patch 204. In some embodiments, in the normal direction Z of the first substrate 102, the recess 202r may overlap with the patch 204.

[0122] In some embodiments, the recess 202r may be recessed by a first distance d1 from the outer side 202b of the second substrate 202 toward the inner side 202a, and the first distance d1 may be regarded as the depth of the recess 202r. In some embodiments, the first distance d1 may be less than the second thickness T2 of the second substrate 202. In some embodiments, the first distance d1 may be equal to the second thickness T2 of the second substrate 202, that is, an opening is formed that penetrates the second substrate 202 and exposes the second buffer layer 210 or the dielectric layer 206.

[0123] Furthermore, the recess 202r may have a third width W3. In some embodiments, the third width W3 of the recess 202r may be greater than or equal to the first width W1 of the patch 204. According to some embodiments of the present invention, the third width W3 refers to the maximum width of the recess 202r in the X direction on any cross section. Furthermore, in some embodiments, the area of ​​the recess 202r may be greater than or equal to the area of ​​the patch 204. According to some embodiments of the present invention, the aforementioned area refers to the bottom area of ​​the recess 202r and the patch 204.

[0124] It is worth noting that, according to some embodiments, the second substrate 202 having a smaller thickness at the position corresponding to the patch 204 can further reduce the dielectric loss of electromagnetic waves. Furthermore, it should be understood that, although the drawings only show the second substrate 202 being partially thinned, according to other embodiments, the second substrate 202 can also be thinned as a whole.

[0125] In addition, if Figure 4 As shown, in some embodiments, the electronic device 10B may further include a protective layer 214, and the protective layer 214 may be disposed (or filled) in the recess 202r. In some embodiments, the top surface 214t of the protective layer 214 may be lower than the outer side 202b of the second substrate 202. In other embodiments, the top surface 214t of the protective layer 214 may be substantially flush with the outer side 202b of the second substrate 202. In one embodiment, the dielectric constant of the protective layer 214 may be different from the dielectric constant of the second substrate 202, for example, the dielectric constant of the protective layer 214 is less than or equal to the dielectric constant of the second substrate 202. When the dielectric constant of the protective layer 214 is less than or equal to the dielectric constant of the second substrate, the dielectric loss of the electromagnetic wave may be reduced, but is not limited thereto.

[0126] In some embodiments, the material of the protective layer 214 may include polyimide (PI), polymethylmethacrylate (PMMA), polyethyleneterephthalate (PET), liquid-crystal polymer (LCP) material, polyethylene (PE), polyethersulfone (PES), polycarbonate (PC), isoprene, phenol-formaldehyde resin, benzocyclobutene (BCB), perfluorocyclobutane (PECB), or a combination thereof, but is not limited thereto.

[0127] Next, please refer to Figure 5 , Figure 5 Schematic diagrams of the cross-sectional structure of an electronic device 10C according to some other embodiments of the present invention are shown. Figure 5 The electronic device 10C shown is Figure 3 The electronic device 10A shown is substantially similar, except that the electronic device 10C may not have the second substrate 202. In this embodiment, the electronic device 10C may also not have the second buffer layer 210. In other words, in this embodiment, the outer side 206b of the dielectric layer 206 and the top surface 204t of the patch 204 may be exposed to the environment.

[0128] In detail, in this embodiment, the electronic device 10C includes a first substrate 102, a phase shift electrode 104, a dielectric layer 206, a patch 204, a common electrode layer 208, a liquid crystal layer 300, a first alignment layer 108, and a second alignment layer 212. Furthermore, the phase shift electrode 104 may be disposed on the first substrate 102, the dielectric layer 206 may be disposed on the phase shift electrode 104, the patch 204 may be disposed in the dielectric layer 206, and the common electrode layer 208 may be disposed between the dielectric layer 206 and the first substrate 102. In addition, the liquid crystal layer 300 may be disposed between the phase shift electrode 104 and the dielectric layer 206, the first alignment layer 108 may be disposed between the phase shift electrode 104 and the liquid crystal layer 300, and the second alignment layer 212 may be disposed between the common electrode layer 208 and the liquid crystal layer 300.

[0129] According to some embodiments, the electronic device 10C without the second substrate 202 can reduce the thickness of the entire structure. Furthermore, in some embodiments, the electronic device 10C may not have the first substrate 102, and a protective layer may be selectively disposed under the first buffer layer 106. In this way, the electronic device 10C can be made more flexible or plastic, which is conducive to being installed on the surface of various devices.

[0130] Next, please refer to Figure 6 , Figure 6 Schematic diagrams of cross-sectional structures of electronic devices 10D according to other embodiments of the present invention are shown. Figure 6 The electronic device 10D shown is Figure 5 The electronic device 10C is substantially similar, except that the electronic device 10D may further include a cover layer 216, which may contact the patch 204. The dielectric layer 206 may be disposed between the cover layer 216 and the common electrode layer 208. In this embodiment, the cover layer 216 may be disposed on the outer side 206b of the dielectric layer 206 to provide protection for the patch 204.

[0131] In some embodiments, the material of the cap layer 216 may be similar to that of the protection layer 214 , and will not be described in detail herein.

[0132] Next, please refer to Figure 7 , Figure 7 Schematic diagrams of the cross-sectional structure of an electronic device 10E according to some other embodiments of the present invention are shown. Figure 7 The electronic device 10E shown is Figure 3 The electronic device 10A shown is substantially similar, except that in the electronic device 10E, the dielectric layer 206 may be locally thinned. Specifically, in this embodiment, the dielectric layer 206 may further include a recess 206r, and the recess 206r may correspond to the patch 204. In some embodiments, in the normal direction Z of the first substrate 102, the recess 206r may overlap with the patch 204.

[0133] In some embodiments, the recess 206r may be recessed from the inner side 206a to the outer side 206b of the dielectric layer 206. In some embodiments, the thinned dielectric layer 206 (corresponding to the dielectric layer 206 at the recess 206r) may have a thickness T 3a In some embodiments, the thickness T 3a is smaller than the third thickness T3 of the dielectric layer 206. Furthermore, according to the embodiment of the present invention, the thickness T 3a " refers to the minimum thickness of the thinned region of the dielectric layer 206 in the normal direction Z of the first substrate 102. In one embodiment, the thickness T 3a It may be the minimum thickness at a portion not overlapping with the patch 204 .

[0134] In addition, the recess 206r may have a fourth width W4. In some embodiments, the fourth width W4 of the recess 206r may be greater than or equal to the first width W1 of the patch 204. According to some embodiments of the present invention, the fourth width W4 may refer to the width of the recess 206r in the recess direction relative to the opening 208p (for example, the X direction shown in the figure, also referred to as the width of the recess 206r). Figure 2 ) is the maximum width of any cross section parallel to the concave 206r. Furthermore, in some embodiments, the area of ​​the concave 206r may be greater than or equal to the area of ​​the patch 204. According to some embodiments of the present invention, the aforementioned area refers to the top area or bottom area of ​​the concave 206r and the patch 204.

[0135] It is worth noting that according to some embodiments, the dielectric layer 206 has a recess 206 r at a position corresponding to the patch 204 , which can improve the electromagnetic radiation signal in the electronic device 10E.

[0136] Furthermore, if Figure 7 As shown, in some embodiments, the second width W2 of the opening 208p of the common electrode layer 208 may be greater than the fourth width W4 of the recess 206r. In some embodiments, in the normal direction Z of the first substrate 102, the recess 206r may also overlap with the opening 208p. In some embodiments, the opening 208p and the recess 206r may form a stepped recess structure. In some embodiments, the second alignment layer 212 may conformably extend into the opening 208p and the recess 206r to form a second alignment layer 212 with a stepped structure. In these embodiments, the stepped recess structure formed by the opening 208p and the recess 206r may reduce the probability of damage or degradation of the second alignment layer 212.

[0137] Next, please refer to Figure 8 , Figure 8 Schematic diagrams of the cross-sectional structure of an electronic device 10F according to some other embodiments of the present invention are shown. Figure 8 The electronic device 10F shown is Figure 7 The electronic device 10E shown is substantially similar, except that, in the electronic device 10F, the dielectric layer 206 may be partially thinned to expose at least a portion of the patch 204. Specifically, in this embodiment, the dielectric layer 206 may include an opening 206p, and the opening 206p may correspond to the patch 204. In some embodiments, in the normal direction Z of the first substrate 102, the opening 206p may overlap with the patch 204. In addition, in this embodiment, the opening 206p may expose at least a portion of the patch 204.

[0138] In some embodiments, the opening 206p may extend from the inner side 206a to the outer side 206b of the dielectric layer 206. In some embodiments, the thinned dielectric layer 206 (corresponding to the dielectric layer 206 at the opening 206p) may have a thickness T3b In some embodiments, the thickness T 3b may be less than the third thickness T3 of the dielectric layer 206. In this embodiment, the thickness T 3b is substantially equal to the thickness (not shown) of the patch 204. Furthermore, according to the embodiment of the present invention, the thickness T 3b " refers to the minimum thickness of the thinned region of the dielectric layer 206 in the normal direction Z of the first substrate 102. In one embodiment, the thickness T 3b It may be the minimum thickness at a portion not overlapping with the patch 204 .

[0139] In addition, the opening 206p may have a fifth width W5. In some embodiments, the fifth width W5 of the opening 206p may be greater than or equal to the first width W1 of the patch 204. According to some embodiments of the present invention, the fifth width W5 may be the width of the opening 206p in the extending direction (e.g., the X direction shown in the figure, also referred to as the fifth width W5) of the opening 208p. Figure 2 ) is the maximum width of any cross section parallel to the opening 206p. Furthermore, in some embodiments, the area of ​​the opening 206p may be greater than or equal to the area of ​​the patch 204. According to some embodiments of the present invention, the aforementioned area refers to the top area or bottom area of ​​the opening 206p and the patch 204.

[0140] It is worth noting that according to some embodiments, the opening 206 p of the dielectric layer 206 at the position corresponding to the patch 204 can improve the electromagnetic radiation signal in the electronic device 10F.

[0141] Furthermore, if Figure 8 As shown, in some embodiments, the second width W2 of the opening 208p of the common electrode layer 208 may be greater than the fifth width W5 of the opening 206p. In some embodiments, in the normal direction Z of the first substrate 102, the opening 206p may also overlap with the opening 208p. In some embodiments, the opening 208p and the opening 206p may form a stepped recessed structure. In some embodiments, the second alignment layer 212 may conformably extend into the opening 208p and the opening 206p to form a second alignment layer 212 having a stepped structure.

[0142] Next, please refer to Fig. 9 , Fig. 9 Schematic diagrams of cross-sectional structures of electronic devices 10G according to other embodiments of the present invention are shown. Fig. 9 The electronic device 10G shown is Figure 3The electronic device 10A shown is substantially similar, except that, in the electronic device 10G, a portion of the second buffer layer 210 is removed to form an opening 210p, and the patch 204 may be disposed in the opening 210p. Specifically, in this embodiment, the opening 210p may overlap the patch 204 in the normal direction Z of the first substrate 102. Furthermore, in this embodiment, the second buffer layer 210 may not overlap the patch 204 in the normal direction Z of the first substrate 102. In this embodiment, the patch 204 may contact the inner side 202a of the second substrate 202.

[0143] like Fig. 9 As shown, the second buffer layer 210 is separated from the patch 204 by a second distance d2. In some embodiments, the second distance d2 may range from 1 μm to 100 μm (1 μm≦ second distance d2≦100 μm), or from 2 μm to 50 μm, such as 5 μm, 10 μm, 20 μm, 40 μm, 60 μm, or 80 μm. It should be understood that if the second distance d2 is too large, the coverage of the buffer layer 210 is low, and it is more difficult to reduce the difference between the expansion coefficients; conversely, if the second distance d2 is too small, the patch 204 is not easy to be disposed in the opening 210p.

[0144] It is worth noting that according to some embodiments, the second buffer layer 210 may not be disposed at a position corresponding to the patch 204 , thereby improving the electromagnetic radiation signal in the electronic device 10G.

[0145] Next, please refer to Fig.10 , Fig.10 Schematic diagrams of cross-sectional structures of electronic devices 10H according to other embodiments of the present invention are shown. Fig.10 The electronic device 10H shown is Figure 3 The electronic device 10A shown is substantially similar, except that in the electronic device 10H, the dielectric layer 206 may further include a plurality of holes 206e disposed therein. In this embodiment, the dielectric layer 206 may include holes 206e, which may be used to accommodate gas generated by the electronic device 10H in a high temperature operating environment, thereby improving the operating reliability of the electronic device 10H.

[0146] Specifically, the hole 206e may have a diameter D p In some embodiments, the diameter D p The range can be between 0.1μm and 100μm (1μm≦diameter D p ≦100 μm), between 0.5 μm and 90 μm, between 5 μm and 80 μm, or between 10 μm and 70 μm, for example, 10 μm, 25 μm, 40 μm, or 60 μm. According to some embodiments of the present invention, the diameter D pIt may refer to the direction in which the hole 206e extends relative to the opening 208p (for example, the X direction as shown in the figure, also referred to as Figure 2 ) is the maximum width on any cross section parallel to the

[0147] Next, please refer to Figures 11A to 11H , Figures 11A to 11H A schematic diagram of a cross-sectional structure of an electronic device 10A at an intermediate stage of a manufacturing process according to some embodiments of the present invention is shown. It should be understood that, according to some embodiments, additional operating steps may be provided before, during, and / or after the manufacturing method of the electronic device 10A is performed. According to some embodiments, some of the operating steps may be replaced or deleted. According to some embodiments, the order of the operating steps is interchangeable.

[0148] First, please refer to Fig.11A , a first substrate 102 is provided, and then a phase-shifting electrode 104 may be formed on the first substrate 102. Specifically, in some embodiments, a conductive material may be first formed on the first substrate 102, and then a portion of the conductive material may be removed to pattern the conductive material to form the phase-shifting electrode 104.

[0149] In some embodiments, the phase-shifting electrode 104 may be formed by a physical vapor deposition (PVD) process, a chemical vapor deposition (CVD) process, an electroplating process, an electroless plating process, other suitable methods, or a combination thereof. The physical vapor deposition process may include, for example, a sputtering process, an evaporation process, or a pulsed laser deposition process, but is not limited thereto. The chemical vapor deposition process may include, for example, a low pressure chemical vapor deposition process (LPCVD), a low temperature chemical vapor deposition process (LTCVD), a rapid temperature chemical vapor deposition process (RTCVD), a plasma assisted chemical vapor deposition process (PECVD), or an atomic layer deposition process (ALD), but is not limited thereto.

[0150] In some embodiments, a portion of the conductive material may be removed by a patterning process to form the phase-shifting electrode 104. In some embodiments, the patterning process may include a photolithography process and an etching process. The photolithography process may include photoresist coating (e.g., spin coating), soft baking, hard baking, mask alignment, exposure, post-exposure baking, photoresist development, cleaning, and drying, but is not limited thereto. The etching process may include a dry etching process or a wet etching process, but is not limited thereto.

[0151] like Fig.11AAs shown, in some embodiments, before forming the phase-shifting electrode 104 on the first substrate 102 , a first buffer layer 106 may be further formed on the first substrate 102 , and the first buffer layer 106 may be in contact with the first substrate 102 .

[0152] In some embodiments, the first buffer layer 106 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination thereof.

[0153] Furthermore, in some embodiments, before forming the phase-shifting electrode 104 on the first substrate 102, the circuit layer 110 may be formed on the first buffer layer 106. Fig.11A As shown, the circuit layer 110 may be formed between the first substrate 102 and the phase-shifting electrode 104 .

[0154] In some embodiments, the circuit layer 110 may be formed by physical vapor deposition, chemical vapor deposition, electroplating, electroless plating, other suitable methods, or combinations thereof. Furthermore, the circuit layer 110 may be patterned by one or more photolithography and etching processes.

[0155] like Fig.11A As shown, in some embodiments, after forming the phase-shifting electrode 104 on the first substrate 102, a first alignment layer 108 may be further formed on the phase-shifting electrode 104. In some embodiments, the first alignment layer 108 may be conformally formed on the phase-shifting electrode 104.

[0156] In some embodiments, the first alignment layer 108 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination thereof.

[0157] Next, please refer to Fig. 11B , provide a second substrate 202, and form a patch 204 on the second substrate 202. Specifically, in some embodiments, a conductive material may be first formed on the second substrate 202, and then a portion of the conductive material may be removed to pattern the conductive material to form the patch 204.

[0158] In some embodiments, the patch 204 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, an electroplating process, an electroless plating process, other suitable methods, or a combination thereof. Furthermore, the patch 204 may be patterned by one or more photolithography processes and etching processes. In some embodiments, the photolithography process may include photoresist coating (e.g., spin coating), soft baking, hard baking, mask alignment, exposure, post-exposure baking, photoresist development, cleaning, and drying, but is not limited thereto. In some embodiments, the etching process may include a dry etching process or a wet etching process, but is not limited thereto.

[0159] like Fig. 11B As shown, in some embodiments, before forming the patch 204 on the second substrate 202 , a second buffer layer 210 may be further formed on the second substrate 202 , and the second buffer layer 210 may be in contact with the second substrate 202 .

[0160] In some embodiments, the second buffer layer 210 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination thereof.

[0161] Next, please refer to Fig. 11C , a dielectric layer 206 is formed on the patch 204, and the dielectric layer 206 is also formed on the second substrate 202. Fig. 11C As shown, in some embodiments, the dielectric layer 206 may be in contact with the patch 204 and the second buffer layer 210 .

[0162] In some embodiments, the dielectric layer 206 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination thereof.

[0163] Next, please refer to Fig.11D , forming a common electrode layer 208 on the dielectric layer 206, the dielectric layer 206 is located between the common electrode layer 208 and the second substrate 202. Specifically, in some embodiments, the common electrode layer 208 may be patterned to have an opening 208p. As mentioned above, the patch 204 may have a first width W1, and the opening 208p of the common electrode layer 208 may have a second width W2. In some embodiments, the second width W2 may be greater than or equal to the first width W1.

[0164] In some embodiments, the common electrode layer 208 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, an electroplating process, an electroless plating process, other suitable methods, or a combination thereof. Furthermore, the common electrode layer 208 may be patterned by one or more photolithography processes and etching processes.

[0165] Next, please refer to Fig.11E In some embodiments, after forming the common electrode layer 208 on the dielectric layer 206, a second alignment layer 212 may be further formed on the common electrode layer 208. In some embodiments, the second alignment layer 212 may be conformally formed on the common electrode layer 208 and conformably extend (or be disposed) in the opening 208p.

[0166] In some embodiments, the second alignment layer 212 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination thereof.

[0167] Next, please refer to Fig.11F The first substrate 102 and the second substrate 202 are assembled, and the patch 204 is located on the inner side 202a of the second substrate 202, and the inner side 202a faces the first substrate 102. In addition, a liquid crystal layer 300 is formed between the first substrate 102 and the second substrate 202, and the liquid crystal layer 300 can be located between the phase shift electrode 104 and the common electrode layer 208.

[0168] In some embodiments, the liquid crystal layer 300 may be formed by one drop filling (ODF) before the first substrate 102 and the second substrate 202 are assembled, or liquid crystal may be filled by vacuum injection after the assembly, but the present invention is not limited thereto.

[0169] Next, please refer to Fig.11G and Fig.11H In some embodiments, after forming the liquid crystal layer 300 between the first substrate 102 and the second substrate 202, the second substrate 202 may be selectively removed to form the electronic device 10K. In some embodiments, after removing the second substrate 202, the second buffer layer 210 may be exposed to the environment. In some embodiments, the second buffer layer 210 may also be removed. In addition, after removing the second substrate 202 and / or the second buffer layer 210, a protective layer (not shown) may be formed on the patch 204 and the dielectric layer 206.

[0170] Next, please refer to Figures 12A to 12F , Figures 12A to 12F Schematic diagrams of cross-sectional structures of electronic devices 10E at intermediate stages of manufacturing processes according to some other embodiments of the present invention are shown.

[0171] Fig. 12A and Fig. 12B Similar to the above Fig.11A and Fig. 12B , I will not go into details here. Next, please refer to Fig. 12C , a dielectric layer 206 is formed on the patch 204, and the dielectric layer 206 is also formed on the second substrate 202. Fig. 11C As shown, in some embodiments, the dielectric layer 206 may contact the patch 204 and the second buffer layer 210. In some embodiments, after forming the dielectric layer 206 on the patch 204, a portion of the dielectric layer 206 may be removed, and the removed portion of the dielectric layer 206 may correspond to the patch 204.

[0172] Specifically, in some embodiments, after forming the dielectric layer 206 on the patch 204, a portion of the dielectric layer 206 may be removed to form the recess 206r. For example, exposure may be performed through a half-tone mask or a gray tone mask, and then the recess 206r may be formed after a development and etching step. In some embodiments, the recess 206r may overlap with the patch 204 in the normal direction Z of the first substrate 102. In addition, as mentioned above, the recess 206r may have a fourth width W4. In some embodiments, the fourth width W4 of the recess 206r may be greater than or equal to the first width W1 of the patch 204.

[0173] In some embodiments, the dielectric layer 206 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination thereof. Furthermore, the dielectric layer 206 may be patterned by one or more photolithography processes and etching processes to form the recess 206r. In other embodiments, the dielectric layer 206 may be formed as follows: Figure 8 The opening 206 p is shown instead of the recess 206 r to expose at least a portion of the patch 204 .

[0174] Next, please refer to Fig.12D , a common electrode layer 208 is formed on the dielectric layer 206, and the dielectric layer 206 is located between the common electrode layer 208 and the second substrate 202. Specifically, in some embodiments, the common electrode layer 208 may be patterned to have an opening 208p. In some embodiments, the second width W2 of the opening 208p of the common electrode layer 208 may be greater than or equal to the first width W1 of the patch 204. Furthermore, in some embodiments, the second width W2 of the opening 208p may be greater than or equal to the fourth width W4 of the recess 206r. In other embodiments, the opening 208p and the recess 206r (or the opening 206p) may be formed in sequence after the dielectric layer 206 and the common electrode layer 208 are formed, but it is not limited thereto.

[0175] It is worth noting that in some embodiments, the second width W2 of the opening 208p is greater than the fourth width W4 of the recess 206r, so that the opening 208p and the opening 206p form a stepped recess structure, thereby reducing the risk of the common electrode layer 108 filling the opening 206p due to process tolerance or reducing the difficulty of the process.

[0176] In some embodiments, the common electrode layer 208 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, an electroplating process, an electroless plating process, other suitable methods, or a combination thereof. Furthermore, the common electrode layer 208 may be patterned by one or more photolithography processes and etching processes to form the opening 208p.

[0177] Next, please refer to Fig.12E In some embodiments, after forming the common electrode layer 208 on the dielectric layer 206, a second alignment layer 212 may be further formed on the common electrode layer 208. In some embodiments, the second alignment layer 212 may be conformally formed on the common electrode layer 208 and conformably extend (or be disposed) in the recess 206r and the opening 208p.

[0178] In some embodiments, the second alignment layer 212 may be formed by the aforementioned physical vapor deposition process, the aforementioned chemical vapor deposition process, a coating process, a printing process, other suitable processes, or a combination thereof.

[0179] Next, please refer to Fig.12F The first substrate 102 and the second substrate 202 are assembled so that the patch 204 is located on the inner side 202a of the second substrate 202, and the inner side 202a faces the first substrate 102. In addition, a liquid crystal layer 300 is formed between the first substrate 102 and the second substrate 202, and the liquid crystal layer 300 is located between the phase shift electrode 104 and the common electrode layer 208.

[0180] In some embodiments, the liquid crystal layer 300 may be formed by one drop filling (ODF) before the first substrate 102 and the second substrate 202 are assembled, or liquid crystal may be filled by vacuum injection after the assembly, but the present invention is not limited thereto.

[0181] In summary, according to some embodiments of the present invention, the method for manufacturing an electronic device can form a patch and a common electrode on the same side (single side) of a substrate, which can reduce the risk of modulation material degradation or substrate cracking due to process temperature or further simplify the process, but is not limited thereto. Furthermore, according to some embodiments of the present invention, the electronic device formed by the aforementioned manufacturing method can reduce the dielectric loss of electromagnetic waves or improve the reliability of operation.

[0182] Although the embodiments of the present invention and their advantages have been disclosed as above, it should be understood that any person skilled in the art can make changes, substitutions and modifications without departing from the spirit and scope of the present invention. The features between the embodiments of the present invention can be mixed and matched as needed as long as they do not violate the spirit of the invention or conflict with each other. In addition, the scope of protection of the present invention is not limited to the processes, machines, manufacturing, material compositions, devices, methods and steps in the specific embodiments described in the specification. Any person skilled in the art can understand from the disclosure of the present invention that the processes, machines, manufacturing, material compositions, devices, methods and steps currently or in the future developed can be used according to the present invention as long as they can implement substantially the same functions or obtain substantially the same results in the embodiments described herein. Therefore, the scope of protection of the present invention includes the above-mentioned processes, machines, manufacturing, material compositions, devices, methods and steps. In addition, a claim constitutes an individual embodiment, and the scope of protection of the present invention also includes the combination of each claim and embodiment. The scope of protection of the present invention shall be subject to the definition of the claims. Any embodiment or claim of the present invention does not need to achieve all the purposes, advantages and features disclosed in the present invention.

Claims

1. An electronic device, characterized in that: include: a first substrate; A plurality of phase-shifting electrodes are disposed on the first substrate; a second substrate having an inner side facing the first substrate; a plurality of patches, disposed on the inner side of the second substrate; a common electrode layer; a dielectric layer disposed between the common electrode layer and the second substrate and disposed on the plurality of patches, wherein a thickness of the dielectric layer is greater than or equal to 5 micrometers and less than or equal to a thickness of the second substrate; and A liquid crystal layer is disposed between the plurality of phase-shift electrodes and the common electrode layer.

2. The electronic device according to claim 1, wherein: The dielectric layer is a multi-layer structure.

3. The electronic device according to claim 1, wherein: The dielectric layer includes a recess corresponding to at least one of the plurality of patches.

4. The electronic device according to claim 1, wherein: The dielectric layer includes an opening corresponding to at least one of the plurality of patches.

5. The electronic device as claimed in claim 4, characterized in that: The opening exposes a portion of the at least one of the plurality of patches.

6. The electronic device as claimed in claim 1, wherein: The second substrate includes a recess corresponding to at least one of the plurality of patches.

7. A method for manufacturing an electronic device, comprising: Providing a first substrate; forming a plurality of phase-shifting electrodes on the first substrate; providing a second substrate; forming a plurality of patches on the second substrate; Forming a dielectric layer on the plurality of patches, wherein a thickness of the dielectric layer is greater than or equal to 5 micrometers and less than or equal to a thickness of the second substrate; forming a common electrode layer on the dielectric layer, wherein the dielectric layer is located between the common electrode layer and the second substrate; Pair the first substrate with the second substrate so that the plurality of patches are located on an inner side of the second substrate, and the inner side faces the first substrate; as well as A liquid crystal layer is formed between the first substrate and the second substrate, and the liquid crystal layer is located between a plurality of phase-shifting electrodes and the common electrode layer.

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