Superconducting quantum computing circuit packaging

Abstract

A superconducting quantum computing circuit package (1). The package contains a substrate (2) on which a circuit is formed, and the circuit contains a plurality of circuit elements. The substrate (2) contains holes (8) arranged between the circuit elements and extending through the thickness of the substrate (2). The package also contains a support (3) and a cover (4), the support having a surface (9) for receiving the substrate (2), and the cover (4) being arranged on opposite sides of the substrate (2). The support (3) and the cover (4) are formed of metal and / or a superconductor. The support (3) also contains a protrusion (12) arranged on the surface (9) and protruding from the surface. The protrusion (12) protrudes through the hole (8) in the substrate (2) and contacts the cover (4) to suppress electromagnetic modes within the operating frequency range of the quantum computing circuit.

Description

[0001] The present invention relates to a superconducting quantum computing circuit package, and more particularly to a superconducting quantum computing circuit package comprising a support for a substrate of a superconducting quantum computing circuit.

[0002] In quantum computing architectures, it is desirable to build circuit chips containing many qubits so that useful computations can be performed. However, scaling the chip would increase the physical space occupied by the chip to a size that supports electromagnetic (EM) modes with frequencies comparable to the operating frequencies of the quantum computing circuits on the chip. For example, a rectangular chip encapsulated in a conductive material with a side length greater than a few millimeters (and both greater than the thickness) and a high dielectric constant of about 10 can support EM modes in the range of a few gigahertz to tens of terahertz.

[0003] Such electromagnetic "chip-like" modes are almost always undesirable, especially in the frequency range of a few gigahertz to tens of terahertz. These frequencies are similar to the desired operating frequencies of quantum computing circuits, and therefore they can interfere with the operation of quantum computing circuits by interacting with "circuit-like" modes such as qubit patterns, other circuit elements, and the control signals used. This can lead to a loss of coherence in the circuit, which is critical to maintaining in order to extend the useful life of the circuit so that effective quantum processing can be performed.

[0004] As the size of a quantum computing circuit chip increases, the frequency of the lowest-frequency chip-like mode it can support decreases, causing the chip to host a greater number of unwanted modes within the operating frequency space of the circuit. Another problem encountered when scaling quantum computing circuit chips and increasing the number of circuit elements in the circuit is the potential for unwanted interactions between circuit-like modes (e.g., crosstalk interactions between qubits), which can interfere with the operation of the quantum computing circuit.

[0005] This means that the problem of problematic interactions between chip-like and circuit-like modes, and between circuit-like and circuit-like modes, will generally only get worse as the size of quantum computing circuits increases, both in terms of physical size and number of circuit elements. For example, it is difficult to scale quantum computing circuits on high dielectric substrates beyond about 1 cm by 1 cm without taking steps to eliminate stray chip-like modes and / or their interactions with circuit-like modes.

[0006] One way to attempt to suppress stray chip modes and crosstalk is to form vias that extend through the thickness of the substrate of the circuit. This introduces conductors between circuit elements that disrupt and suppress stray chip modes by reducing the effective length scale over which standing waves can form in the chip, and also reduces crosstalk (e.g., between qubits) by providing conductors between circuit elements that can shield the circuit elements from field (e.g., capacitive and / or inductive) interactions.

[0007] However, providing vias in circuit chips introduces additional complexity to the manufacture of such chips and can negatively impact the operation of superconducting quantum computing circuits, as such circuits are particularly sensitive to the presence of impurities and defects, which cannot be improved by introducing additional steps in the manufacturing process.

[0008] It is an object of the present invention to provide a device that provides a cleaner frequency space for the operation of quantum computing circuits.

[0009] From a first aspect, the present invention provides a superconducting quantum computing circuit package, comprising:

[0010] a substrate having a superconducting quantum computing circuit formed thereon, wherein the superconducting quantum computing circuit comprises a plurality of circuit elements, and the substrate comprises one or more holes arranged among the plurality of circuit elements, wherein the one or more holes extend through a thickness of the substrate; and

[0011] a support and a cover, the support comprising a surface for receiving the substrate, the cover being arranged on a side of the substrate opposite to the support, wherein the support and the cover are formed of metal and / or a superconductor, and the support comprises one or more protrusions arranged on the surface and protruding from the surface;

[0012] The one or more protrusions protrude through the one or more holes in the substrate and contact the cover to suppress electromagnetic modes within an operating frequency range of the quantum computing circuit.

[0013] The present invention provides a superconducting quantum computing circuit package. The package comprises a substrate, a support for the substrate, and a cover on the side of the substrate opposite to the support. The substrate has a superconducting quantum computing circuit formed on, for example, its surface, wherein the circuit comprises a plurality of circuit elements, such as qubits. One or more holes are formed to extend (always) through the substrate, wherein the holes are arranged among (for example, two or more) circuit elements.

[0014] The substrate is located on the surface of a support formed of a metal and / or superconductor. The support has one or more protrusions formed on and protruding from the surface for receiving the substrate. The one or more protrusions on the support correspond to one or more holes in the substrate, so that (when the cover is placed on the support) the protrusions protrude through the holes and contact the (inner surface of the cover), so that the protrusions pass through the thickness of the substrate among multiple circuit elements. This current path between the support and the cover is via the one or more protrusions to disrupt the formation of standing waves in the chip (e.g., throughout the entire area of ​​the chip), thereby suppressing (e.g., substantially eliminating) those EM modes within the chip that are composed of such standing waves. This changes the field shape and frequency of EM "chip-like" modes (e.g., when multiple protrusions are present, any mode is confined between the edge of the substrate and one or more protrusions, or between the protrusions), thereby facilitating the prevention of electromagnetic modes that are detrimental to the operation of quantum computing circuits from existing in the package.

[0015] Thus, it will be appreciated that the separate substrate and support of the package allow for the provision of a conductive element (i.e., a protrusion of the support) among the circuit elements of the quantum computing circuit. The presence of the protrusion reduces the length scale over which standing waves can be established, thereby increasing the frequency of the lowest frequency EM mode. This helps to suppress (e.g., substantially eliminate) established EM chip-like modes having frequencies similar to the desired operating frequency of the quantum computing circuit. This helps to reduce interference between unwanted chip-like modes and the quantum computing circuit during operation.

[0016] The presence of holes and protrusions among circuit elements also helps confine chip-like modes (e.g., modes generally within the "chip," i.e., the substrate and circuits formed thereon) and circuit-like modes (e.g., qubit modes, resonator modes, control line modes, etc.) that are established in certain areas of the package, and therefore in certain areas of the quantum computing circuit, such as between the protrusions. This can help improve the addressability (ability to be independently addressed) of the circuit elements and reduce unwanted interactions (e.g., qubit crosstalk) in the quantum computing circuit during operation.

[0017] Separate support, cover and substrate also help to minimize the number of manufacturing steps required in the manufacture of the substrate and quantum computing circuit. Preferably, the substrate, support and cover are formed as discrete components. For example, the support and cover can be manufactured separately from the substrate (and each other), so that the substrate can simply require a hole to be formed through its thickness. This helps to minimize the number of defects and impurities in these parts.

[0018] Reduced interference, crosstalk, and the presence of impurities and defects in quantum computing circuits all help provide a clean electromagnetic environment for the quantum computing circuits and enable quantum computing circuits to be scaled to chips with, for example, a larger number of qubits without increasing the number of stray EM mode interactions. This helps extend the coherence of quantum computing circuit elements during operation, thereby improving the conditions for conducting quantum computing operations.

[0019] Applicants have also realised that the arrangement of the invention with separate support, cover and substrate provides a number of benefits relative to a substrate containing integrally formed through holes. This is because through holes can only remove chip-like modes. Therefore, if there are gaps between the housing surrounding the chip and the chip, stray modes that may still interfere with the quantum computing circuit may exist in these gaps, which are not removed by the through holes. Where the protrusions of the support of the invention pass through the holes in the substrate and contact the cover, the protrusions pass through any gap regions near the qubit, thereby also protecting the qubit from stray gap modes.

[0020] The substrate may be any suitable and desired substrate for forming a superconducting quantum computing circuit thereon, such as for use in a superconducting environment. Preferably, the substrate comprises a high dielectric substrate. The substrate may be formed of any suitable and desired material, such as silicon or sapphire.

[0021] The substrate may be of any suitable and desired shape.In one embodiment, the substrate is substantially planar (except for holes extending through the thickness of the substrate).

[0022] The plurality of circuit elements of the quantum computing circuit may include any suitable and desired circuit elements. In one embodiment, the plurality of circuit elements include one or more (e.g., all) of the following: qubits (e.g., including Josephson junctions and superconducting electrodes), control lines, and readout elements (e.g., resonators). Preferably, the plurality of circuit elements include multiple groups of qubits, control lines, and readout elements. The circuit elements may be arranged in any suitable and desired manner, for example, as outlined in the applicant's prior application published as WO 2017 / 021714 A1, in which the superconducting electrodes of the qubits are coaxial and coplanar, and the control lines and / or readout elements are arranged out of plane relative to the qubits. It should be understood that the arrangement of the quantum computing circuit package of the present invention (at least in a preferred embodiment) is suitable for a layout containing such a quantum computing circuit.

[0023] In a preferred embodiment, the plurality of circuit elements include a plurality of qubits and, for example, control lines and readout elements. The qubits may be any suitable and desired size and may be spaced any suitable and desired distance from one another. In one embodiment, the maximum dimension of a qubit is between 0.1 mm and 1 mm. In one embodiment, the plurality of qubits are spaced between 0.2 mm and 2 mm from adjacent qubits.

[0024] The circuit elements of the quantum computing circuit are preferably formed on the surface of the substrate. Preferably, the thickness of the substrate is significantly smaller than its other two dimensions (e.g., length and width), for example in a direction perpendicular to the thickness of the substrate. Thus, preferably, the substrate has two faces (separated by the thickness of the substrate) on opposite sides of the substrate on which the circuit elements can be formed. Preferably, when the substrate is placed on a support, one of these faces faces the surface of the support.

[0025] In one embodiment, the circuit elements are formed on only one side of the substrate, such as the side opposite the surface of the support. In another embodiment, the circuit elements are formed on both sides of the substrate. It will be appreciated that the design of the package allows this due to the separation of the conductive elements (i.e., the protrusions of the support) from the substrate. In contrast, a substrate containing through-holes (provided integrally in the substrate) may allow circuit elements to be disposed on both sides of the substrate; however, this would require a complex multi-stage manufacturing process. Thus, the package design of the present invention remains compatible with a variety of circuit designs.

[0026] In one embodiment, the substrate is not fixedly attached (e.g., glued or bonded) to a support or cover in the package. Instead, for example, (e.g., a face) of the substrate may simply rest on a surface of the support and / or cover. In some embodiments, this also helps allow circuit elements of the quantum computing circuit to be formed on the face of the substrate that faces the surface of the support (and thus, for example, on both faces of the substrate).

[0027] The support and cover may be formed from any suitable and desired metal and / or superconductor, such as a superconducting metal. In one embodiment, the metal comprises aluminum.

[0028] The support may be any suitable and desired shape for receiving a substrate. In one embodiment, the surface for receiving a substrate is substantially planar (except for the protrusions). In one embodiment, the support is substantially a rectangular parallelepiped.

[0029] In one embodiment, the surface for receiving the substrate is recessed from a face of the support, for example from a face of a cuboid.In other words, the support may include an edge surrounding (and protruding above) the surface for receiving the substrate.

[0030] The surface may be recessed to any suitable and desired depth. In one embodiment, the depth to which the surface is recessed from the face of the support is substantially equal to the thickness of the substrate, e.g., the height of the rim is substantially equal to the thickness of the substrate. Thus, preferably, when the substrate is received by the surface, the substrate (e.g., the outer surface) is substantially flush with the face of the support (and, e.g., the rim).

[0031] In one embodiment, the protrusions arranged on the surface protrude in a direction substantially perpendicular to the (eg planar) surface.Thus, preferably, the holes in the substrate extend in a direction substantially perpendicular to the surface (eg face) of the substrate.

[0032] The one or more protrusions on the surface of the support may be of any suitable and desired shape, size and at any suitable and desired distance from each other. Preferably, there are a plurality of protrusions arranged on the surface and protruding from the surface. The protrusions may be arranged in any suitable and desired manner (e.g., in position and / or quantity) relative to the circuit elements (e.g., qubits). In one embodiment, the support includes at least as many protrusions as the number of qubits in the quantum computing circuit on the substrate. In one embodiment, the protrusions are arranged so that there are multiple circuit elements (e.g., qubits) between each protrusion. Thus, for example, there may be at least as many circuit elements (e.g., qubits) as protrusions.

[0033] Preferably, the shape and (slightly larger) size of the holes in the substrate corresponds to the protrusions of the support, so that when the substrate is placed on the support, the holes receive the protrusions. Preferably, there are multiple holes in the substrate. Like the protrusions, similarly, the substrate may include at least as many holes as the number of qubits in the quantum computing circuit on the substrate. In one embodiment, the holes are arranged so that there are multiple circuit elements (e.g. qubits) between each hole. Thus, for example, there may be at least as many circuit elements (e.g. qubits) as holes. Preferably, the substrate includes a number of holes equal to the number of protrusions on the surface of the support.

[0034] The one or more holes (and thus the corresponding one or more protrusions) may be arranged among the plurality of circuit elements in any suitable and desired manner, for example in a configuration to suppress chip-like modes within the operating frequency range of the quantum computing circuit. Preferably, the one or more holes are arranged between the plurality of circuit elements, wherein the one or more protrusions protrude through at least a portion of the thickness of the substrate between the plurality of circuit elements.

[0035] Preferably, the one or more holes (and thus the one or more protrusions) are arranged among (e.g., between (e.g., interspersed)) qubits of a quantum computing circuit formed on a substrate. Preferably, the one or more protrusions (and thus the one or more holes) are arranged to pass between (e.g., adjacent) qubits. In addition to suppressing stray electromagnetic modes, this also helps to reduce unwanted interactions between modes of the circuit (e.g., reducing crosstalk between adjacent qubits). In one embodiment, the protrusions are arranged in a (e.g., regular geometric) grid, such as corresponding to a (e.g., regular geometric) grid of qubits in a quantum computing circuit.

[0036] It will be appreciated that the holes and corresponding protrusions may be arranged in any suitable and desired configuration such that they suppress chip-like and, e.g., circuit-like modes within the operating frequency range of the quantum computing circuit, e.g., to confine modes near individual qubits (so that the modes do not extend to multiple qubits). In a preferred embodiment, the maximum spacing between adjacent holes and / or protrusions corresponds to (e.g., will be able to support) chip-like modes having frequencies (e.g., significantly) greater than the maximum operating frequency of the quantum computing circuit.

[0037] Preferably, the arrangement (e.g., size and spacing) of the protrusions and corresponding holes is related to (e.g., matches) the arrangement (e.g., size and spacing) of circuit elements (e.g., qubits) of the quantum computing circuit on the substrate. In one embodiment, when the support includes a plurality of protrusions, the plurality of protrusions are spaced between 0.2 mm and 2 mm from adjacent protrusions (and the holes accommodate corresponding protrusions in a similar manner).

[0038] Preferably, the height of the one or more projections (eg each) (ie in the direction in which they project from the surface of the support) is between 0.2 mm and 1 mm (eg approximately 0.5 mm).

[0039] In order to contact the cover, one or more protrusions may extend partially through the thickness of the substrate, and the cover may include a corresponding protrusion (protruding from the surface of the cover) that also extends partially through the thickness of the substrate (from the other side of the substrate), so that the one or more protrusions of the support contact the corresponding one or more protrusions of the cover. When the cover includes one or more protrusions, preferably, the optional and preferred features outlined herein for the one or more protrusions of the support may also apply to the one or more protrusions of the cover.

[0040] As described above, it should be appreciated that the height of one or more protrusions may depend on the distance that the one or more protrusions protrude through the substrate. Thus, in one embodiment, the height of one or more protrusions (e.g., each) is greater than or equal to half the thickness of the substrate, such as substantially equal to the thickness of the substrate.

[0041] However, preferably, one or more protrusions (of the support) extend all the way through the thickness of the substrate to contact the cover. Thus, preferably, the height of the one or more protrusions (e.g., each) is greater than or equal to the thickness of the substrate. Applicants have found that when the protrusions extend all the way through the thickness of the substrate, this may be particularly effective in suppressing (e.g., substantially eliminating) electromagnetic modes within the operating frequency range of the quantum computing circuit.

[0042] When the support comprises a recess or an edge, preferably the depth of the recess or the height of the edge is substantially equal to the height of the one or more protrusions. Thus, preferably the depth of the recess or the height of the edge is between 0.2 mm and 1 mm (e.g., about 0.5 mm).

[0043] Preferably, the width of the one or more protrusions (e.g., each) (i.e., in a direction parallel to the surface of the support) is between 0.2 mm and 1 mm (e.g., about 0.5 mm). Thus, preferably, the width of the one or more holes (e.g., each) (i.e., in a direction parallel to the face of the substrate) is between 0.2 mm and 1 mm (e.g., about 0.5 mm).

[0044] Preferably, the one or more protrusions and the (corresponding) one or more holes (e.g., each) are substantially cylindrical. Thus, for example, the cross-section of the one or more protrusions (e.g., each) (in a plane substantially parallel to the surface of the support) is substantially constant in the direction in which the one or more protrusions protrude, e.g., in a direction substantially perpendicular to the surface of the support. Correspondingly, for example, the cross-section of the one or more holes (e.g., each) (in a plane substantially parallel to the face of the substrate, i.e., substantially perpendicular to the thickness of the substrate) is substantially constant in the direction in which the holes extend through the substrate, e.g., in a direction substantially perpendicular to the face of the substrate (i.e., substantially parallel to the thickness of the substrate).

[0045] Thus, the one or more protrusions may (e.g. each) be in the form of a wall or a column, and the (corresponding) one or more holes may (e.g. each) be in the form of a channel or a cylindrical hole. In one embodiment, the one or more protrusions and the one or more holes (e.g. each) have a circular cross-section (and thus the axis of the cylinder of the protrusion or hole), which is arranged in a direction substantially perpendicular to the surface of the support or in a direction substantially perpendicular to the face of the substrate (i.e. substantially parallel to the thickness of the substrate).

[0046] In a preferred embodiment, the distal end of the one or more protrusions (e.g., each of them) is tapered, such as rounded or pointed. This helps ensure that the one or more distal ends of the one or more protrusions contact the cover. Applicants have recognized that, at least in some embodiments of the present invention, a small gap between the one or more protrusions and the cover may cause problems in not being able to suppress the mode. For example, a gap as small as 1 μm may cause problems.

[0047] The one or more protrusions (and corresponding holes) may be arranged (e.g., shaped, sized, and / or positioned) to suppress (e.g., substantially eliminate) any suitable and desired electromagnetic (e.g., chip-like) modes within the operating frequency range of the quantum computing circuit. In one embodiment, the one or more protrusions are arranged to suppress (e.g., substantially eliminate) all electromagnetic (e.g., chip-like) modes within the operating frequency range of the quantum computing circuit.

[0048] However, in some embodiments, one or more protrusions may be arranged (e.g., positioned) to suppress some (but not all) electromagnetic (e.g., chip-like) modes within the operating frequency range of the quantum computing circuit. For example, one or more protrusions may be arranged (e.g., positioned) to design and use chip-like modes. For example, this may be used to mediate long-range interactions between qubits, which may be used to create quantum circuits with specific connectivity.

[0049] For example, when the package includes multiple protrusions, some protrusions (and corresponding holes in the substrate) may be arranged closer together (e.g., to suppress the mode and restrict it from penetrating beyond the individual qubits), while other protrusions are arranged farther apart from each other (or, for example, spaced away from the edge of the substrate) to allow the mode to exist and extend between qubits. The spacing of the protrusions and corresponding holes may be selected accordingly.

[0050] The operating frequency range of the quantum computing circuit may be any suitable and desired frequency range suitable for performing computations in the quantum computing circuit. In one embodiment, the operating frequency range is between 4 GHz and 12 GHz. Although the one or more protrusions protruding into the one or more holes of the substrate may suppress electromagnetic modes only within the operating frequency range of the quantum computing circuit, preferably, the one or more protrusions protruding into the one or more holes of the substrate are arranged to suppress electromagnetic modes within a larger frequency range.

[0051] In an embodiment, the one or more protrusions protruding into the one or more holes of the substrate are arranged to suppress electromagnetic modes having a frequency less than 12 GHz, such as less than 15 GHz, such as less than 20 GHz.

[0052] In one embodiment, the support includes one or more apertures formed through a surface of the support, wherein the quantum computing circuit package includes one or more wires arranged to pass through the one or more apertures to connect to the quantum computing circuit (e.g., multiple circuit elements thereof). Providing one or more apertures in the support facilitates routing control wiring for the quantum computing circuit, for example, to address qubits.

[0053] It will be appreciated that when circuit elements are arranged with control wires and / or readout elements out of plane relative to the qubits, for example as outlined in the applicant's prior application published as WO 2017 / 021714 A1, apertures provided in the support for passage of said control wires and / or said readout elements (and, for example, their connecting wires) help provide a compact and neatly arranged package. Thus, embodiments of the present invention lend themselves well to accommodating off-chip control wiring (and quantum computing circuits incorporating such wiring). Such configurations may be considered more scalable than those implementing on-chip control wiring.

[0054] The one or more apertures in the support are preferably arranged (e.g., interspersed) between the one or more protrusions, e.g., so that they correspond to circuit elements (e.g., qubits) of a quantum computing circuit formed on the substrate. This facilitates connecting the circuit elements of the quantum computing circuit to off-chip control wiring.

[0055] The cover and the support are positioned relative to the substrate, for example, the substrate is sandwiched between the support and the cover. The cover helps to shield the circuit elements from external electromagnetic radiation and further reduces stray electromagnetic modes that can be established. In one embodiment, the cover is arranged together with the support to enclose the substrate, for example when the support includes an edge.

[0056] The cover may be of any suitable and desired size. Preferably, the cover extends at least beyond the perimeter of the substrate (eg the dimension of the surface of the cover facing the substrate is greater than or equal to the corresponding dimension of the face of the substrate facing the cover).

[0057] In one embodiment, the cover includes one or more apertures formed through the cover, wherein the quantum computing circuit package includes one or more wires arranged to pass through the one or more apertures to connect to the quantum computing circuit (e.g., multiple circuit elements thereof). As with the apertures through the support, the apertures through the cover also help provide a route for connecting the wires to the quantum computing circuit, for example, when the quantum computing circuit has off-chip control wiring, and especially when the circuit elements of the quantum computing circuit are formed on both sides of the substrate. In the latter case, when the apertures are provided on both the support and the cover, this allows easy access to and connection of the circuit elements on both sides of the substrate.

[0058] The cover (e.g., a surface thereof) is preferably configured to be spaced apart from circuit elements on the substrate (e.g., a surface thereof) so that the cover does not contact circuit elements formed on the substrate (e.g., when at least some of the circuit elements are arranged on a face of the substrate facing the cover). This helps avoid shorting circuit elements of the quantum computing circuit (e.g., against a surface of the cover facing the substrate).

[0059] The cover can be of any suitable and desired shape. In one embodiment, the cover is substantially planar. In one embodiment, the cover is substantially cuboid. Preferably, the shape of the cover is complementary to the shape of the support (and, for example, the substrate), for example to enclose the substrate.

[0060] In one embodiment, the cover includes cutouts in its surface corresponding to and facing circuit elements on the substrate (eg, circuit elements arranged on a face of the substrate facing the cover) to space the cover apart from the circuit elements on the substrate.

[0061] In one embodiment, the cover cap is spaced apart from the substrate (eg, a (whole) face thereof) such that the cover cap is spaced apart from circuit elements on the substrate.

[0062] The cover can be spaced apart from the substrate in any suitable and desired manner. For example, the depth of the recess in the support can be greater than the thickness of the substrate, so that the face of the substrate facing the cover is spaced apart from the cover. In another example, the cover can include a recess so that the cover is spaced apart from the substrate. In another example, the height of one or more protrusions on the support can be greater than the thickness of the substrate, so that the one or more protrusions protrude through and beyond the thickness of the substrate to space the cover (which is, for example, arranged to abut one or more protrusions from the substrate) apart from the substrate.

[0063] When the substrate comprises circuit elements on a face of the substrate facing the support, preferably the support (e.g., its surface) is configured to be spaced apart from the circuit elements on the substrate (e.g., its face), for example in a similar manner as being spaced apart from the cover. Thus, for example, the support may comprise cutouts in its surface corresponding to and facing the circuit elements on the substrate (e.g., the circuit elements arranged on the face of the substrate facing the support) so as to space the support apart from the circuit elements on the substrate.

[0064] The one or more protrusions may contact the cover in any suitable and desired manner.Preferably, the one or more protrusions (eg each of them) are arranged to form an electrically conductive contact with the cover.

[0065] In one embodiment, the cover includes one or more recesses (on the surface of the cover facing the substrate) corresponding to one or more protrusions (e.g., their shape, size and / or position) (and corresponding to one or more holes through the substrate), wherein the one or more recesses are arranged to receive the one or more protrusions (e.g., one or more tapered distal ends thereof) so that the one or more protrusions contact the cover at the corresponding one or more recesses. The one or more recesses help to locate the corresponding one or more protrusions and help to form good contact between the one or more protrusions and the cover.

[0066] Preferably, the cover comprises a volume of conductive material in one or more recesses (e.g., each of them), wherein the material is softer (e.g., more ductile and / or tough) than the metal of the cover. The conductive material in the one or more recesses helps to form good (e.g., conductive) contact between the one or more protrusions and the cover (i.e., the one or more protrusions (e.g., each) are arranged to contact the conductive material in the corresponding one or more recesses). Preferably, when the one or more protrusions contact the conductive material, the conductive material deforms. It will be appreciated that this deformation helps to offset any manufacturing tolerances of the cover and the protrusions, and avoids having to match the shape and / or size of the cover (e.g., one or more recesses thereof) to the shape and / or size of the one or more protrusions. Preferably, the conductive material comprises a metal, such as indium.

[0067] In one embodiment, the support and cover include (i.e., have been subjected to) a surface treatment. This helps provide a (e.g., extremely) clean surface, thereby helping to avoid impurities or defects in the quantum computing circuit package. The surface treatment can be performed in any suitable and desired manner, such as by etching.

[0068] The support, substrate and cover can be manufactured in any suitable and desired manner. In one embodiment, one or more of the support, substrate and cover can be manufactured using laser processing, computer numerical control (CNC) processing or mechanical micro-processing. The holes in the substrate can be formed before or after the circuit elements are manufactured on the substrate.

[0069] Preferably, for example when the support is formed of a superconductor, the quantum computing circuit package, in particular the support and the cover, are arranged to be cooled by a (e.g., cryogenic) cooling system. Therefore, the present invention extends to a superconducting quantum computing system comprising a superconducting quantum computing circuit package according to an embodiment of the present invention and a (e.g., cryogenic) cooling system arranged to cool the support and the cover (e.g., to superconducting temperature). Therefore, preferably, the support and the cover formed of a metal or a superconductor are cooled by a cooling system to cool the substrate (e.g., to superconducting temperature).

[0070] It will be appreciated that, at least in preferred embodiments, the design of the support and cover helps maximize the surface contact area with the substrate (on which the circuit elements are disposed), which helps enhance the thermal connectivity of the substrate to the cooling system (and therefore helps maximize the rate of thermal conduction of the substrate) in order to cool the substrate (e.g., to superconducting temperatures).

[0071] Any suitable and desired (eg, cryogenic) cooling system may be used, such as a dilution refrigerator.

[0072] Preferred embodiments of the present invention will now be described, by way of example only, with reference to the accompanying drawings, in which:

[0073] Figure 1 A superconducting quantum computing circuit package according to an embodiment of the present invention is shown;

[0074] Figure 2 Show Figure 1 The substrate of the superconducting quantum computing circuit package shown;

[0075] Figure 3 Show Figure 1 The cover of the superconducting quantum computing circuit package shown;

[0076] Figure 4 A cross section showing a portion of a superconducting quantum computing circuit package according to an embodiment of the present invention;

[0077] Figure 5 and Figure 6 A graph showing the lowest frequency electromagnetic modes produced by a superconducting quantum computing circuit;

[0078] Figure 7 Spectral diagram showing electromagnetic modes generated for different superconducting quantum computing circuit packages.

[0079] A chip is scaled to contain multiple qubits so that the physical space occupied by the chip is increased to a size that supports electromagnetic modes having frequencies comparable to the operating frequencies of the quantum computing circuits on the chip. Such stray EM-like chip modes may interfere with the operation of the quantum computing circuits, resulting in a lack of coherence in the qubits. As will now be described, embodiments of the present invention provide a superconducting quantum computing circuit package in which these stray modes and crosstalk are suppressed.

[0080] Figure 1 A superconducting quantum computing circuit package 1 according to an embodiment of the present invention is shown. The package 1 comprises a substrate 2, a support 3 for the substrate 2 and a cover 4. The package 1 is Figure 1 is shown in an expanded configuration, e.g., prior to assembly.

[0081] Figure 2 Show Figure 1 The substrate 2 of the superconducting quantum computing circuit package 1 is shown. The substrate is usually made of silicon or sapphire. A quantum computing circuit 5 is formed on the surface of the substrate 2 (similar circuits can also be formed on the opposite surface of the substrate 2).

[0082] The quantum computing circuit 5 comprises a plurality of qubits 6 arranged in a regular geometric grid. The qubits 6 are connected together by respective interconnects 7. The qubits 6 are addressed by corresponding control lines and readout elements, for example as disclosed in the applicant's previous application published as WO2017 / 021714A1.

[0083] A plurality of holes 8 are formed (e.g., machined) through the thickness of substrate 2. Holes 8 are arranged in a regular geometric grid to intersperse qubits 6. (Similarly, on the back side of substrate 2, qubits and their interconnects will be formed between holes 8.)

[0084] Return to Figure 1 The support 3 of the superconducting quantum computing circuit package 1 made of aluminum (or another suitable superconducting metal) is generally in the shape of a rectangular parallelepiped. The upper surface 9 of the support 3 has a recess 10 formed in the surface 9 so that an edge 11 extends around the periphery of the upper surface 9. The depth of the recess 10 is substantially equal to the thickness of the substrate 2, so that when the substrate 2 is placed on the upper surface 9 of the support 3, the top surface of the substrate 2 is flush with the edge 11 of the support 3.

[0085] A plurality of cylindrical protrusions 12 are formed on the upper surface 9 of the support 3 in the recess 10. The protrusions 12 correspond in position and number to the holes 8 formed through the substrate 2. The cylindrical diameter of the protrusions 12 is slightly smaller than the corresponding diameter of the holes 8 in the substrate 2, and the height is slightly greater than the thickness of the substrate 2, so that when the substrate 2 is placed on the upper surface 9 of the support 3 and the cover 4 is placed on top of the support 3 to enclose the substrate 2, the protrusions 12 pass through the corresponding holes 8, and the tops of the protrusions 12 contact the inner surface of the cover 4.

[0086] A plurality of apertures 13 are formed through the support 3 within the recess 10. Similarly, a plurality of apertures 14 are formed through the cover 4. The apertures 13, 14 through the support 3 and the cover 4 correspond in number and position to the qubits 6 formed on the substrate 2. The apertures 13, 14 allow off-chip control wiring to be routed through the support 3 and the cover 4 to connect to the qubits 6 of the quantum computing circuit 5.

[0087] Figure 3The bottom surface of the cover 4 is shown. Apertures 14 through the cover 4 can be seen, as can cutout channels 15 extending between the apertures 14. The cutout channels 15 correspond in position and number to the interconnects 7 between the qubits 6 of the quantum computing circuit 5. The width of the cutout channels 15 is wider than the width of the interconnects 7 so that when the cover 4 is placed on top of the substrate 2, the cover 4 does not contact (and therefore does not short-circuit) the circuit elements of the quantum computing circuit 5. (When the quantum computing circuit is formed on the opposite side of the substrate 2, similar cutout channels may be provided between the apertures 13 formed through the support 3.)

[0088] Figure 3 The bottom surface of the cover 4 shown also shows a plurality of depressions 16 formed in said bottom surface of said cover 4. The depressions 16 correspond in position and number to the holes 8 formed through the substrate 2 and therefore also to the projections 12 of the support 3.

[0089] Figure 4 A cross section of a portion of a superconducting quantum computing circuit package 1 is shown. Figure 4 Shown is a support 3, a cover 4, a substrate 2 surrounding a recess 16 in the cover 4, a hole 8 in the substrate 2, and a protrusion 12 of the support 3. The protrusion 12 has a tapered distal end 17 that passes through the hole 8 in the substrate 2 and is aligned with the recess 16 in the cover 4. The cylindrical diameter of the recess 16 (and all other recesses 16 in the cover 4) is slightly larger than the corresponding diameter of the protrusion 12, so that the protrusion 12 is received by the recess 16.

[0090] The recess 16 (and all other recesses 16 in the cover 4) is almost filled with a volume of indium 18. Indium 18 is a soft metal which, when the substrate 2 is sandwiched between the cover 4 and the support 3, deforms so that the tapered distal end 17 of the protrusion 12 protrudes into the volume of the indium 18. This helps to establish a good conductive connection between the support 3 and the cover 4.

[0091] The components of the superconducting quantum computing circuit package 1 are manufactured using laser machining, computer numerical control (CNC) machining, or mechanical micromachining.

[0092] Now refer to Figure 1 , 2 , 3 and 4 and Figure 5 , 6 and 7 describe the use of the superconducting quantum computing circuit package 1. Figure 5 A graph showing the distribution of the electric field strength of the lowest frequency chip-like mode in a 1 cm x 1 cm sapphire substrate 2 having no holes therethrough (and therefore no protrusions through the substrate 2). Figure 6A distribution diagram showing the electric field intensity of the lowest frequency chip-like mode generated by a superconducting quantum computing circuit on a 1 cm×1 cm sapphire substrate 2. Figure 1-4 The support 3 and the cover 4 are shown enclosing. Figure 7 Spectral graphs showing electromagnetic modes generated for different superconducting quantum computing circuit packages.

[0093] Once the quantum computing circuit 5 is formed on the substrate 2, the elements of the quantum computing circuit 5 are connected to off-chip wiring that is used to control the computations performed by the quantum computing circuit 5. The substrate 2 is inserted into the recess 10 in the support 3 so that the substrate rests on the upper surface 9 of the support 3, with the protrusions 12 passing through the thickness of the substrate. The cover 4 is placed over the top of the substrate 2 and thus encapsulates the substrate so that the protrusions 12 contact the bottom surface of the cover 4 through the volume of indium 18 in the recess 16 in the bottom surface of the cover 4. The off-chip control wiring passes through the apertures 13, 14 in the support 3 and the cover 4 and is appropriately connected to the control circuit system.

[0094] The superconducting quantum computing circuit package 1 is placed in a suitable cryogenic system to enable it to operate at superconducting temperatures.

[0095] During operation of the quantum computing circuit 5, electromagnetic modes are established on the substrate 2. If the quantum computing circuit 5 is formed on a substrate 2 that does not have a hole therethrough (and therefore the protrusions do not pass through), then (in one particular operating mode) the distribution of the lowest frequency electromagnetic mode 20 generated is Figure 5 This distribution of the lowest frequency mode 20 shows that the generated mode 20 extends across the substrate 2 and therefore passes between the qubits 6 of the quantum computing circuit 5. The frequency of this mode is about 7 GHz and therefore is likely to cause interference and crosstalk between the qubits 6.

[0096] Figure 7 The frequency spectrum of the four lowest frequency electromagnetic modes generated during operation of the quantum computing circuit in this configuration (i.e., without holes and protrusions through the substrate 2) is shown. This shows that the four lowest frequency chip modes 22 generated are in the range between 6 GHz and 14 GHz. Therefore, these frequencies of the stray electromagnetic modes 20, 22 overlap with the microwave frequencies used to operate the quantum computing circuit 5, which are in the range of 4 GHz to 12 GHz (e.g., Figure 7 Due to the distribution of these stray modes 20, 22, crosstalk between the stray electromagnetic modes 20, 22 and the qubits 6 at these frequencies interferes with the operation of the quantum computing circuit 5, resulting in an undesirable lack of coherence in the qubits 6.

[0097] Figure 6 shows that when the substrate 2 is placed Figure 1-44. The distribution diagram of the lowest frequency electromagnetic mode 21 generated when the substrate 2 is placed on the support 3 and the cover 4 is shown. Since the protrusion 12 of the support 3 passes through the thickness of the substrate 2 when the substrate 2 is placed on the surface 9 of the support 3 and is therefore located between the circuit elements (including the qubit 6) of the quantum computing circuit 5, Figure 6 It can be seen in Figure 5 that the lowest electromagnetic mode 21 is still generated during operation of the quantum computing circuit 5, but it is confined to the volume between each set of adjacent protrusions 12. The frequency of this mode is about 20 GHz, and due to the large detuning of its operating frequency, it is unlikely to interfere with the qubits 6 or cause crosstalk between them. In addition, the protrusions will serve to locate the circuit mode to the nearest volume between each set of adjacent protrusions 12, further helping to reduce crosstalk between qubits 6.

[0098] In addition, if Figure 7 As shown, it is shown in this configuration (ie, as Figures 1 to 4 The frequency spectrum of the four lowest frequency electromagnetic modes 23 generated during operation of the quantum computing circuit (with the holes and protrusions shown passing through the substrate 2) is shown, as the modes are confined to these smaller volumes (such as Figure 6 As shown), the minimum frequency of the stray electromagnetic modes 21, 23 is therefore increased to be higher than the microwave frequency used to operate the quantum computing circuit 5.

[0099] therefore, Figure 7 It is shown that when a superconducting quantum computing circuit package according to an embodiment of the present invention is used, the suppression effect of the electromagnetic mode within the operating frequency range of the quantum computing circuit is increased due to the frequency increase of the lowest frequency spurious mode.

[0100] For these reasons, when using Figure 1-4 When the superconducting quantum computing circuit package 1 shown operates the quantum computing circuit 5, stray electromagnetic modes and crosstalk are highly suppressed. This helps to provide a cleaner frequency space for the operation of the quantum computing circuit 5, thereby helping to increase the coherence time of the qubit 6.

Claims

1. A superconducting quantum computing circuit package, comprising: a substrate having a superconducting quantum computing circuit formed thereon, wherein the superconducting quantum computing circuit comprises a plurality of circuit elements, and the substrate comprises one or more holes disposed between the plurality of circuit elements, wherein the one or more holes extend through a thickness of the substrate; as well as a support and a cover, the support comprising a surface for receiving the substrate, the cover being arranged on a side of the substrate opposite to the support, wherein the support and the cover are formed of metal and / or a superconductor, and the support comprises one or more protrusions arranged on the surface and protruding from the surface; wherein the one or more protrusions protrude through the one or more holes in the substrate and contact the cover to suppress electromagnetic modes within an operating frequency range of the superconducting quantum computing circuit; wherein the support comprises one or more apertures formed through the surface of the support, and / or the cover comprises one or more apertures formed through the cover; and The superconducting quantum computing circuit package includes one or more wires arranged to pass through the one or more holes respectively to be connected to the superconducting quantum computing circuit.

2. The superconducting quantum computing circuit package of claim 1 , wherein the plurality of circuit elements comprises one or more of: one or more qubits, one or more control lines, and one or more readout elements.

3. The superconducting quantum computing circuit package of claim 2, wherein the maximum spacing between adjacent holes in the substrate and / or between adjacent protrusions on the support corresponds to a chip-like mode having a frequency greater than a maximum operating frequency of the superconducting quantum computing circuit.

4. A superconducting quantum computing circuit package according to claim 2 or 3, wherein the one or more holes are arranged between the one or more qubits such that the one or more protrusions are arranged to pass between adjacent qubits.

5. The superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the surface for receiving the substrate is recessed from a surface of the support.

6. The superconducting quantum computing circuit package of claim 5, wherein a depth at which the surface is recessed from the face of the support is equal to the thickness of the substrate and / or equal to a height of the one or more protrusions.

7. A superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the shape and size of the one or more holes correspond to the one or more protrusions, so that when the substrate is on the support, the one or more holes receive the corresponding one or more protrusions.

8. The superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein a height of the one or more protrusions is greater than or equal to half of the thickness of the substrate.

9. A superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the one or more protrusions protruding into the one or more holes in the substrate are arranged to suppress electromagnetic modes with frequencies less than 12 GHz.

10. The superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein a cover is spaced apart from the plurality of circuit elements on the substrate.

11. The superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the cover lid comprises cutouts in a surface thereof corresponding to and facing the plurality of circuit elements on the substrate.

12. The superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the support and the cover have been surface treated.

13. A superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the cover comprises one or more recesses corresponding to the one or more protrusions, wherein the one or more recesses are arranged to receive the one or more protrusions so that the one or more protrusions contact the cover at the corresponding one or more recesses.

14. The superconducting quantum computing circuit package of claim 13, wherein the cover comprises a volume of conductive material in the one or more recesses, wherein the material is softer than the metal of the cover.

15. The superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the one or more protrusions protruding into the one or more holes in the substrate are arranged to suppress electromagnetic modes with frequencies less than 15 GHz.

16. The superconducting quantum computing circuit package according to any one of claims 1 to 3, wherein the one or more protrusions protruding into the one or more holes in the substrate are arranged to suppress electromagnetic modes with frequencies less than 20 GHz.

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