Semiconductor Devices

Abstract

The semiconductor device includes a semiconductor element (40), a wiring element (50) for sandwiching the semiconductor element, and a sealing resin body (30). The semiconductor element (40) has an SBD (12) on which a SiC substrate as a wide bandgap semiconductor is formed. The semiconductor element (40) has two main electrodes (41, 42) on both surfaces. The wiring element (50) includes (i) a heat sink (51) electrically connected to the first main electrode and (ii) a heat sink and terminals (52, 53) electrically connected to the second main electrode. The semiconductor device also includes an insulator (70). The insulator (70) has a non-conductive element (13) made of silicon. The insulator (70) has joints (71, 72) on both surfaces for mechanical connection of the heat sinks (51, 52).

Description

Technical Field

[0001] The present disclosure generally relates to a semiconductor device. Background Art

[0002] Patent document 1 discloses a semiconductor device. The semiconductor device includes: a semiconductor element having main electrodes formed on two main surfaces; a wiring element electrically connected to the main electrode; and a sealing resin body. The wiring element is arranged to sandwich the semiconductor element. The sealing resin body seals the semiconductor element and the wiring element in one body. The disclosure of the prior art document is incorporated herein by reference as an explanation of the technical elements in the present disclosure.

[0003] (Patent Document 1) Japanese Patent Laid-Open No. JP 2016-31948

[0004] When a wide bandgap semiconductor having a wider bandgap than silicon is used as a substrate for a semiconductor element, the element size can be made smaller than the element size made of silicon. When the element size is reduced, the stress acting on the semiconductor element increases. In view of the above or other aspects not mentioned, further improvements in semiconductor devices are needed. Summary of the invention

[0005] An object of the present disclosure is to provide a highly reliable semiconductor device.

[0006] The semiconductor device disclosed in this article includes: a semiconductor element having a first main electrode formed on a first main surface and made of a wide bandgap semiconductor as a substrate, and a second main electrode formed on a second main surface opposite to the first main surface; a wiring element, which is arranged to sandwich the semiconductor element in between, and includes: a first wiring element arranged on the first main surface and electrically connected to the first main electrode and a second wiring element arranged on the second main surface and electrically connected to the second main electrode; a sealing resin body for sealing the semiconductor element and the wiring element as a whole; and at least one insulator, which is sandwiched between the wiring elements together with the semiconductor element in the sealing resin body, and has a first joint portion connected to the first wiring element and a second joint portion connected to the second wiring element.

[0007] According to the semiconductor device of the present disclosure, the semiconductor element has a wide bandgap semiconductor as a substrate. However, not only the semiconductor element but also an insulator is inserted between the first wiring element and the second wiring element. In this way, since some force is distributed to the insulator, the stress acting on the semiconductor element during the molding of the sealing resin body is reduced. In this way, a highly reliable semiconductor device can be provided.

[0008] The various aspects disclosed in the specification adopt different technical solutions from each other to achieve their respective purposes. The reference numerals in brackets described in the claims and this section exemplarily show the corresponding relationship with the parts of the embodiments described later, and are not used to limit the technical scope. The purposes, features and advantages disclosed in this specification will become apparent by referring to the following detailed description and the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The objects, features and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings, in which:

[0010] Figure 1 is a circuit diagram of a power conversion apparatus to which the semiconductor device according to the first embodiment is applied;

[0011] Figure 2 is a plan view of a semiconductor device;

[0012] Figure 3 It is along Figure 2 A cross-sectional view taken along line III-III in FIG.

[0013] Figure 4 It is along Figure 2 A cross-sectional view taken along line IV-IV of ;

[0014] Figure 5 This is a diagram in which the sealing resin body is omitted;

[0015] Figure 6 is a reference diagram of the semiconductor device of the other arm;

[0016] Fig. 7A and Figure 7B They are the effect diagrams of insulators;

[0017] Figure 8 is a plan view of a semiconductor device according to a second embodiment;

[0018] Fig. 9 is along Figure 8 A cross-sectional view taken along line IX-IX in FIG.

[0019] Fig.10 is a plan view of a modified example;

[0020] Fig.11 is a cross-sectional view of a semiconductor device according to a third embodiment. DETAILED DESCRIPTION

[0021] Hereinafter, a plurality of embodiments are described with reference to the accompanying drawings. In the following embodiments, components corresponding / associated in function and / or structure may be provided with the same reference numerals. For corresponding components and / or associated components, additional descriptions may be made based on the descriptions of other (i.e., basic) embodiments.

[0022] (First embodiment, Figure 1-4 )

[0023] The semiconductor device according to the present embodiment is applied to a power conversion device. The power conversion device is applied to, for example, a vehicle drive system. The power conversion device can be applied to vehicles such as fuel cell vehicles (FCVs), electric vehicles (EVs), and hybrid vehicles (HVs).

[0024] <Vehicle drive system, Figure 1 >

[0025] First, the schematic structure of the vehicle drive system is described. Figure 1 As shown, the vehicle drive system 1 includes a direct current (DC) power source 2 , a motor 3 , and a power conversion device 4 .

[0026] The DC power supply 2 is, for example, a lithium-ion battery, a nickel-metal hydride battery, or a fuel cell. The motor 3 is a three-phase alternating current (AC) type rotating electric machine. The motor 3 is used as a source of driving force for the vehicle, that is, an electric motor. The power conversion device 4 performs power conversion between the DC power supply 2 and the motor 3.

[0027] <Power Converter>

[0028] Next, the power conversion device 4 is described. Figure 1 As shown, the power conversion device 4 includes a converter 5, a smoothing capacitor 6, and an inverter 7. The converter 5 and the inverter 7 are power conversion parts. The converter 5 is a DC-DC converter that converts a DC voltage into a DC voltage having a different voltage value.

[0029] The P line as the high potential side power line includes a VH line 8H and a VL line 8L. The VL line 8L is connected to the positive terminal of the DC power supply 2. The converter 5 is provided at a position between the VH line 8H and the VL line 8L, and the potential of the VH line 8H is higher than the potential of the VL line 8L. The N line 9 as the low potential side power line is connected to the negative terminal of the DC power supply 2.

[0030] The smoothing capacitor 6 is connected to a position between the VH line 8H and the N line 9. The smoothing capacitor 6 is provided at a position between the converter 5 and the inverter 7, and is connected in parallel with the converter 5 and the inverter 7. The smoothing capacitor 6 smoothes, for example, a DC voltage from the converter 5, and accumulates the charge of the DC voltage. The voltage across the smoothing capacitor 6 becomes a high DC voltage for driving the motor 3.

[0031] The inverter 7 is connected to a position between the VH line 8H and the N line 9. The inverter 7 converts the DC power boosted by the converter 5 into an AC power suitable for driving the motor 3, and supplies the AC power to the motor 3. The inverter 7 is a DC-AC converter. A three-phase inverter is used as the inverter 7. The power conversion device 4 may further include a filter capacitor (not shown). The filter capacitor is connected to a position between the DC power supply 2 and the converter 5 and between the VL line 8L and the N line 9.

[0032] <Converter>

[0033] Next, the converter 5 is described. Figure 1 As shown, the converter 5 includes a bridge arm 10 and a reactor 11 for each of the four phases. Figure 1 , the reference numerals in brackets added to the bridge arm 10 indicate which of the U phase, V phase, W phase and X phase the relevant bridge arm 10 belongs to: 10(U), 10(V), 10(W) and 10(X). The converter 5 of this embodiment does not have a step-down function, but has a step-up (i.e., boost) function.

[0034] The bridge arm 10 is connected to a position between the VH line 8H and the N line 9. A plurality of bridge arms 10 are connected in parallel to each other. The bridge arms 10 of each phase have a common structure. The bridge arm 10 is an upper arm and a lower arm circuit, wherein the upper arm and the lower arm are connected in series at a position between the VH line 8H and the N line 9. The upper arm of the bridge arm 10 has a rectifying element whose forward direction is defined as a direction from the DC power supply 2 to the smoothing capacitor 6 side. The lower arm of the bridge arm 10 has a switching element.

[0035] In the present embodiment, the upper arm of the bridge arm 10 has a Schottky barrier diode 12 as a rectifying element and a non-conductive element 13. The Schottky barrier diode 12 may be referred to as SBD 12 hereinafter. The SBD 12 is formed on a chip having silicon carbide (SiC) as a substrate as described later. The anode of the SBD 12 is connected to the VH line 8H.

[0036] The non-conductive element 13 is connected in parallel with the SBD 12. The non-conductive element 13 is an element in which a plurality of diodes (i.e., PN diodes) are connected in series so that their forward directions are opposite to each other. The non-conductive element 13 is formed on a chip having silicon (Si) as a substrate as described below. The non-conductive element 13 includes two PN diodes 13a and 13b. The anodes of the PN diodes 13a and 13b are connected to each other. The cathode of the PN diode 13a is connected to the anode of the SBD 12, and the cathode of the PN diode 13b is connected to the cathode of the SBD 12.

[0037] Due to the above structure, the forward voltage Vf of the non-conductive element 13 has a value greater than the forward voltage Vf of the SBD 12. Therefore, no current flows through the non-conductive element 13. In addition, the non-conductive element 13 has a breakdown voltage performance equal to or higher than the breakdown voltage performance of the SBD 12. The non-conductive element 13 is configured not to interfere with the operation of the SBD 12 under actual use conditions.

[0038] On the other hand, the lower arm of the bridge arm 10 has an n-channel MOSFET 14 and a diode 15 as a switching element. Like the SBD 12, the MOSFET 14 is formed on a chip with SiC as a base material. The source of the MOSFET 14 is connected to the N line 9. The drain of the MOSFET 14 is connected to the cathode of the SBD 12. The switching operation of the MOSFET 14 is controlled by a control circuit unit (not shown).

[0039] The diode 15 is connected in anti-parallel to the MOSFET 14. The diode 15 is formed on a chip with Si as a base material. The anode of the diode 15 is connected to the drain (of the MOSFET 14), and the cathode is connected to the source (of the MOSFET 14).

[0040] One end of reactor 11 is connected to the positive terminal of DC power supply 2 via VL line 8L. The other end of reactor 11 is connected to the connection point between the upper and lower arms of bridge arm 10, that is, the connection point between the cathode of SBD 12 and the drain of MOSFET 14.

[0041] <Semiconductor devices, Figure 2-5 >

[0042] For convenience, in Figure 3 In the example above, the Z direction is up (and down is the opposite direction). The X direction is right (and left is the opposite direction). Figure 2 In the Y direction, it is the back direction (the opposite direction is the front direction). Figure 3 In this example, we observe the front side of the cross section of the device (along the Figure 2 Next, the semiconductor devices constituting the converter 5 are described. Figures 2 to 5 Semiconductor devices forming an upper arm of a bridge arm 10 for one phase of the converter 5 are shown. Figure 5 is from Figure 2 The figure of the sealing resin body is omitted. Hereinafter, the plate thickness direction of the semiconductor element is referred to as the Z direction, and a direction orthogonal to the Z direction, specifically, the longitudinal direction of the wiring element is referred to as the X direction. In addition, the direction orthogonal to both the Z direction and the X direction is referred to as the Y direction. Unless otherwise specified, the shape in the plan view viewed from the Z direction, in other words, the shape on the XY plane defined by the X direction and the Y direction is a planar shape. In addition, the plan view viewed from the Z direction is referred to as a plan view. As Figures 2 to 5 As shown, the semiconductor device 20 includes a sealing resin body 30 , a semiconductor element 40 , a wiring element 50 , main terminals 60 and 61 , and an insulator 70 .

[0043] exist Figure 2 In the embodiment, the sealing resin body 30 seals a part of other components forming the semiconductor device 20. The remaining other components are exposed to the outside of the sealing resin body 30. The sealing resin body 30 is made of, for example, epoxy resin. The sealing resin body 30 is formed, for example, by transfer molding. The sealing resin body 30 has a substantially rectangular parallelepiped shape. Figure 2 As shown, the sealing resin body 30 has a substantially rectangular shape in a top view (looking down). Figure 3 In FIG. 1 , the sealing resin body 30 has a bottom surface 30 a and a top surface 30 b opposite to the bottom surface 30 a in the Z direction. The bottom surface 30 a and the top surface 30 b are, for example, flat surfaces.

[0044] The semiconductor element 40 is formed by a chip having a wide bandgap semiconductor with a wider bandgap than Si as a substrate. The semiconductor element 40 can be referred to as a semiconductor chip. A wide bandgap semiconductor is, for example, a semiconductor having a bandgap greater than 1.5 eV. Wide bandgap semiconductors include, for example, silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3) and diamond.

[0045] The semiconductor element 40 has a lower main electrode 41 and an upper main electrode 42, and the lower main electrode 41 and the upper main electrode 42 are arranged on the main surface arranged along the plate thickness direction, that is, the Z direction. In the semiconductor element 40, an element with a vertical structure is formed so that the main current flows between the main electrodes 41 and 42. As described above, the semiconductor element 40 of the present embodiment is an element in which the SBD (Schottky barrier diode) 12 element is formed on a chip with SiC as a substrate. A cathode electrode is formed on the lower main surface of the semiconductor element 40 as the lower main electrode 41. An anode electrode is formed on the upper main surface opposite to the lower main surface as the upper main electrode 42. The main electrode 42 (i.e., the anode electrode) can also be called a Schottky electrode. The lower main electrode 41 corresponds to the first main electrode, and the upper main electrode 42 corresponds to the second main electrode.

[0046] The wiring element 50 sandwiches the semiconductor element 40 in the Z direction. The wiring element 50 is electrically connected to the main electrode. As the wiring element 50, for example, a metal plate made of Cu, Cu alloy, etc., or a structure in which a conductor is provided on at least one surface of an insulating substrate can be used. A direct bonded copper (DBC) substrate is an example of an insulating substrate on which a conductor is arranged. The wiring element 50 of the present embodiment includes heat sinks 51 and 52 and terminals 53. The lower heat sink 51 is arranged on the lower side of the semiconductor element 40. The lower heat sink 51 corresponds to the first wiring element. The upper heat sink 52 and the terminal 53 are arranged on the upper side of the semiconductor element 40. The upper heat sink 52 and the terminal 53 are connected by solder 54. The upper heat sink 52, the terminal 53 and the solder 54 correspond to the second wiring element.

[0047] The heat sinks 51 and 52 are metal members made of Cu, Cu alloy, etc. The heat sinks 51 and 52 are used to conduct the heat of the semiconductor element 40 to the outside of the semiconductor device 20. The heat sinks 51 and 52 can also be called heat dissipation members. The heat sinks 51 and 52 have a substantially rectangular planar shape, and their longitudinal sides are arranged along the X direction. The heat sinks 51 and 52 include (overlap) the semiconductor element 40 in a plan view. The heat sinks 51 and 52 have similar shapes.

[0048] Terminal 53 is located in the middle of the conductive path and the heat conduction path between semiconductor element 40 (i.e., main electrode 42) and heat sink 52. Terminal 53 is formed by including a metal material such as Cu or Cu alloy. Terminal 53 has a columnar body having a substantially rectangular shape in a plan view and having substantially the same size as main electrode 42 in a plan view. Terminal 53 can be referred to as a metal block or a relay member.

[0049] The lower main electrode 41 of the semiconductor element 40 is connected to the lower inner surface 51a of the heat sink 51 via solder 55. The upper main electrode 42 is connected to one end of the terminal 53 via solder 56. The other end of the terminal 53 is connected to the inner surface 52a of the heat sink 52 via the above solder 54.

[0050] Most of the heat sinks 51 and 52 are covered by the sealing resin body 30. The lower outer surface 51b (of the lower heat sink 51) and the upper outer surface 52b (of the upper heat sink 52) are exposed from the sealing resin body 30. The outer surfaces 51b and 52b may also be referred to as heat dissipation surfaces or exposed surfaces. The lower outer surface 51b is substantially flush with the bottom surface 30a of the sealing resin body 30, and the upper outer surface 52b is substantially flush with the top surface 30b.

[0051] The left main terminal 60 electrically connects the lower main electrode 41 to an external device. The lower heat sink 51 is located between the left main terminal 60 and the lower main electrode 41. The right main terminal 61 electrically connects the upper main electrode 42 to an external device. The upper heat sink 52 is located between the right main terminal 61 and the upper main electrode 42.

[0052] The left main terminal 60 extends rearward from the lower heat sink 51. The right main terminal 61 extends rearward from the upper heat sink 52. Alternatively, the right main terminal 61 may extend rearward from the terminal 53. The main terminals 60 and 61 may also be constructed as components separate from the corresponding heat sinks 51 and 52 and may be joined thereto as extensions, or may be a single integral structure. In the present embodiment, the main terminals 60 and 61 extend from the corresponding heat sinks 51 and 52 as corresponding continuous metal components.

[0053] The main terminal 60 extends from the heat sink 51 in the Y direction (backward) and protrudes from the rear side 30c of the sealing resin body 30 to the outside thereof. The main terminal 61 extends from the heat sink 52 in the Y direction and protrudes to the outside from the rear side 30c that is the same as the main terminal 60. The semiconductor device 20 also includes a plurality of virtual terminals 62. The virtual terminal 62 is a terminal having the same structure as the signal terminal 162 described later, but does not provide an electrical connection function, in other words, a wiring function. The virtual terminal 62 is a component that is not electrically connected to the semiconductor element 40, nor is it electrically connected to the wiring element 50. The virtual terminal 62 extends in the Y direction and protrudes from the front side 30d of the sealing resin body 30 toward the outside thereof. The front side 30d is a surface opposite to the rear side 30c in the Y direction.

[0054] The dummy terminal 62 is constructed as a lead frame as a common component together with the heat sink 51 and the main terminal 60. The lead frame is a component having different widths from part to part (for example, partially thinned). In the lead frame, the heat sink 51 is partially thick, while the main terminal 60 and the dummy terminal 62 are partially thin. After molding the sealing resin body 30, unnecessary parts of the lead frame (for example, the tie rod between the dummy terminals) are cut off (i.e., removed). Please note that in the continuous metal component in which the heat sink 52 and the main terminal 61 are integrally arranged, the heat sink 52 portion is thicker than the main terminal 61 portion.

[0055] The insulator 70 is located in the sealing resin body 30. The insulator 70 is sandwiched by the wiring element 50 together with the semiconductor element 40. The insulator 70 has an insulating function of electrically separating the lower heat sink 51 from the upper heat sink 52. The insulator 70 has a joint 71 for mechanical connection to the lower heat sink 51 (optionally through the solder 55), and a joint 72 for mechanical connection to the solder 56, the terminal 53, and the upper heat sink 52.

[0056] As described above, the insulator 70 of the present embodiment has the non-conductive element 13 formed on the chip with silicon as the base material. The insulator 70 has the same thickness as the semiconductor element 40. The insulator 70 has substantially the same planar shape and size as the semiconductor element 40. That is, the insulator 70 has almost the same size as the semiconductor element 40. The joint 71 is formed on the surface of the insulator 70 on the first wiring element side thereof, and the joint 72 is formed on the surface of the insulator 70 on the second wiring element side thereof. The joints 71 and 72 are metal members provided to establish a mechanical connection with the wiring element 50. The joint 72 has substantially the same planar shape and size as the main electrode 42.

[0057] The second wiring element has two terminals 53, and in a plan view, one of the terminals 53 is arranged at a position overlapping with the main electrode 42 of the semiconductor element 40. In a plan view, the other terminal 53 is arranged at a position overlapping with the joint 72 of the insulator 70. The two terminals 53 are set as a common member (i.e., the same part). The joint 71 is connected to the inner surface 51a of the heat sink 51 via solder 55. The joint 72 is connected to one end of the terminal 53 via solder 56. The upper joint 71 corresponds to the first joint, and the lower joint 72 corresponds to the second joint.

[0058] like Figure 5 As shown, the insulator 70 is located to the right of the semiconductor element 40. With respect to a virtual center line CL of the wiring element 50 extending perpendicularly to the longitudinal direction of the wiring element 50, the semiconductor element 40 is arranged in the left region, and the insulator 70 is arranged in the right region. Specifically, the insulator 70 and the semiconductor element 40 are arranged approximately mirror-symmetrically with respect to the center line CL.

[0059] As described above, in the semiconductor device 20, the sealing resin body 30 seals the semiconductor element 40 and the insulator 70 forming the upper arm of the bridge arm 10 for one phase. The sealing resin body 30 integrally seals the semiconductor element 40, the insulator 70, a portion of the heat sink 51, a portion of the heat sink 52, the terminal 53, a portion of each main terminal 60, 61, and a portion of each dummy terminal 62.

[0060] The semiconductor element 40 is arranged at a position between the heat sink 51 and the heat sink 52 in the Z direction. (The semiconductor element 40 is arranged at an intermediate position of the arrangement / stack of the heat sinks 51 and 52 along the Z direction.) Thus, the heat of the semiconductor element 40 can be radiated / dissipated to both sides of the Z direction. The semiconductor device 20 has a double-sided heat dissipation structure. The outer surface 51b of the heat sink 51 is substantially flush with the bottom surface 30a of the sealing resin body 30. The outer surface 52b of the heat sink 52 is substantially flush with the top surface 30b of the sealing resin body 30. Since the outer surfaces 51b and 52b are exposed surfaces, heat dissipation can be improved.

[0061] Figure 6 is a reference diagram showing a semiconductor device 120 forming a lower arm of the bridge arm 10 for one phase of the converter 5 . Figure 2 Corresponds to Figure 6 . The semiconductor device 120 has the same structure as the semiconductor device 20. In the semiconductor device 120, a semiconductor element 140 is provided instead of the semiconductor element 40. In addition, a semiconductor element 145 is provided instead of the insulator 70, and a signal terminal 162 is provided instead of the dummy terminal 62. The sealing resin body 130 corresponds to the sealing resin body 30, and the wiring element 150 corresponds to the wiring element 50. The main terminals 160 and 161 correspond to the main terminals 60 and 61. The main terminals 160 and 161 protrude toward the outside from the side surface 130c of the sealing resin body 130.

[0062] Like the semiconductor element 40, the semiconductor element 140 uses a wide bandgap semiconductor, specifically SiC as a substrate. The above-mentioned MOSFET 14 is formed in the semiconductor element 140. The semiconductor element 140 has main electrodes (not shown) on both sides of the Z direction. One of the main electrodes is a drain electrode, and the other main electrode is a source electrode. The drain electrode is welded to a heat sink (not shown) forming the wiring element 150. The source electrode is connected to the heat sink 152 via a terminal (not shown). The semiconductor element 140 is different from the semiconductor element 40 in terms of the elements formed on the chip, but the semiconductor material, plane shape and size and thickness constituting the substrate are almost the same as those of the semiconductor element 40.

[0063] Like the insulator 70, the semiconductor element 145 uses Si as a substrate. The above-mentioned diode 15 is formed in the semiconductor element 145. The semiconductor element 140 has main electrodes (not shown) on both sides of the Z direction. One of the main electrodes is a cathode electrode, and the other main electrode is an anode electrode. The cathode electrode is welded to the same heat sink as the drain electrode. The anode electrode is connected to the same heat sink 152 as the source electrode via a terminal. Although the semiconductor element 145 is different from the insulator 70 in terms of the elements formed on the chip, the semiconductor material, the plane shape and size, and the thickness of the substrate are basically the same as the insulator 70.

[0064] The signal terminal 162 is an external connection terminal that provides an electrical connection function. The signal terminal 162 is connected to a pad (not shown) of the semiconductor element 140 via a bonding wire 180. The pad is formed on the same main surface as the source electrode in the semiconductor element 140. The signal terminal 162 protrudes toward the outside from the side 130d of the sealing resin body 130. The side 130d is the surface opposite to the side 130c. The structure of the signal terminal 162 is the same as that of the dummy terminal 62. Figure 6 In FIG. 1 , the portion of the signal terminal 162 covered by the sealing resin body 130 and the bonding wire 180 are indicated by dotted lines.

[0065] The signal terminal 162 is formed / provided as a lead frame including: (i) a heat sink connected to the drain electrode of the semiconductor element 140 and the cathode electrode of the semiconductor element 145; and (ii) the main terminal 160. This lead frame is a common member (i.e., a common component) with the (above-mentioned) lead frame including the heat sink 51, the main terminal 60, and the dummy terminal 62 forming the semiconductor device 20.

[0066] Therefore, the semiconductor device 20 forming the upper arm can be formed by the same manufacturing process using the same components as the semiconductor device 120 forming the lower arm. For example, this makes it possible to reduce manufacturing time and cost. In addition, the signal terminal 162 of the semiconductor device 120 is mounted on a circuit board on which at least a portion of the above-mentioned control circuit unit is formed. In the present embodiment, the semiconductor device 20 has the same structure as the semiconductor device 120 and has a dummy terminal 62. Therefore, the dummy terminal 62 can be mounted on the circuit board. The semiconductor device 20 is held on the circuit board by the dummy terminal 62.

[0067] <Method for manufacturing semiconductor device>

[0068] Next, a method of manufacturing the semiconductor device 20 is described.

[0069] First, a connection structure in which the semiconductor element 40 and the insulator 70 are sandwiched between or held by the wiring elements 50 is formed.

[0070] More specifically, (i) a lead frame including a heat sink 51, main terminals 60 and dummy terminals 62, and (ii) a heat sink 52 including a series of main terminals 61 are prepared together with the semiconductor element 40, the insulator 70 and the terminal 53. Then, the semiconductor element 40 and the insulator 70 are respectively arranged on the inner surface 51a of the heat sink 51 via the solder 55. Alternatively, for example, the terminal 53 pre-soldered on both sides is arranged on the semiconductor element 40 with the solder 56 facing the semiconductor element 40 side. The terminal 53 is arranged on the insulator 70 in the same manner.

[0071] The semiconductor device 20 with a double-sided heat dissipation structure is sandwiched between the two sides of the Z direction by a cooler (not shown), for example. Therefore, it is required that the surface has high parallelism in the Z direction and high dimensional accuracy between the parallel surfaces. Therefore, the amount of solder 54 configured can absorb the height variation of the semiconductor device 20. That is, a large amount of solder 54 is arranged. In other words, the solder 54 is configured to be thicker than solders 55 and 56. Then, in this setting state, the first reflow is performed. Such a setting makes it possible to obtain a stacked body in which the semiconductor element 40, the insulator 70, the heat sink 51 and the terminal 53 are integrally connected to have a body.

[0072] Next, the heat sink 52 is set on one surface of the base not shown so that the inner surface 52a faces upward. Then, the above-mentioned laminated body is set on the heat sink 52 so that the solder 54 faces the heat sink 52, and the second reflow is performed. In the second reflow, a load is applied from the heat sink 51 side in the Z direction so that the height of the semiconductor device 20 has a predetermined height / size. For example, by applying a load, a spacer (not shown) is brought into contact with both the inner surface 51a of the heat sink 51 and one surface of the base. In this way, the height of the semiconductor device 20 is set to have a predetermined height.

[0073] By performing the second reflow, the stacked body and the heat sink 52 having the series of main terminals 61 are integrated into a one-piece connection structure. The solder 54 absorbs height variations caused by dimensional tolerances of components constituting the semiconductor device 20 and assembly tolerances.

[0074] After forming the connection structure, the sealing resin body 30 is molded. In the present embodiment, a transfer molding method is adopted. The connection structure is placed in a mold, and the sealing resin body 30 is molded. In the present embodiment, the sealing resin body 30 is molded so that the heat sinks 51 and 52 are completely covered, and cut after molding. The sealing resin body 30 is cut together with a part of the heat sinks 51 and 52. In this way, the outer surfaces 51b and 52b are exposed from the sealing resin body 30. The outer surface 51b is substantially flush with the bottom surface 30a. The outer surface 52b is substantially flush with the top surface 30b.

[0075] Next, the semiconductor device 20 can be obtained by removing tie bars and the like (not shown).

[0076] Note that the sealing resin body 30 can be molded in a state where the outer surfaces 51b and 52b are pressed against the cavity wall surface of the molding mold and are in close contact with each other. In this case, when the sealing resin body 30 is molded (i.e., when the molding is completed), the outer surfaces 51b and 52b are (already) exposed from the sealing resin body 30. Therefore, it is not necessary to perform post-molding cutting. In addition, although an example of performing two reflow soldering has been shown above, the present invention is not limited to such an example. The connection structure can be formed by a single reflow soldering process. Alternatively, the connection structure can be formed by a solder chip bonding method, etc. without reflow soldering.

[0077] <Overview of First Embodiment>

[0078] Wide bandgap semiconductors such as SiC have properties such as higher dielectric breakdown field strength, higher saturation velocity, and higher thermal conductivity compared to Si. Therefore, if the performance is comparable, the component size can be made smaller than Si. Generally, when the component size is reduced, the heat radiation / dissipation area size is also reduced, resulting in difficulty in dissipating the generated heat. Wide bandgap semiconductors have higher thermal conductivity and higher heat power than Si, thereby allowing / enabling a reduction in component size. Costs can also be reduced by reducing component size.

[0079] As described above, the semiconductor device 20 of the present embodiment includes the semiconductor element 40 having a wide bandgap semiconductor as a substrate. The element size of the semiconductor element 40 is smaller than that of an element having equivalent performance formed on a chip having Si as a substrate. Fig. 7A 7B shows the step of filling the mold cavity with resin 30A to form a sealing resin body 30. Fig. 7A As shown, when the sealing resin body 30 is formed to cover the outer surfaces 51b and 52b of the heat sinks 51 and 52, for example, a gap is sometimes formed between the outer surface 52b of the heat sink 52 and the cavity wall surface 80 that is not filled with the resin 30A. In this case, there is a difference between the force applied from the resin 30A to the inner surface 52a of the heat sink 52 and the force applied from the resin 30A to the outer surface 52b. That is, when the forces on the outer surface and the inner surface are not equal (that is, when static pressure cannot be obtained by the forces acting on both surfaces), stress acts on the columnar portion that mechanically connects the heat sinks 51 and 52. That is, stress acts on the semiconductor element 40.

[0080] If only the semiconductor element 40 having a small element size is disposed at a position between the heat sinks 51 and 52, stress is concentrated on the semiconductor element 40. For example, stress is concentrated on the solder joint between the semiconductor element 40 and the wiring element 50. In the present embodiment, the insulator 70 also serves as a column that mechanically connects the heat sinks 51 and 52, thereby distributing / releasing stress acting during molding of the sealing resin body 30 to the insulator 70. Therefore, stress concentration on the semiconductor element 40 can be suppressed. In this way, a highly reliable semiconductor device 20 can be provided.

[0081] When the sealing resin body 30 is molded by bringing the outer surfaces 51b, 52b into contact with the cavity wall surface 80 ( Figure 7B), the direction of the force received by the inner surface 51a of the heat sink 51 from the resin 30A and the direction of the force received by the inner surface 52a of the heat sink 52 from the resin 30A are opposite to each other. Therefore, the semiconductor element 40 is subjected to (i.e., receives) stress in the pulling direction toward both sides of the Z direction. In the present embodiment, due to the presence of the insulator 70, the stress acting when the sealing resin body 30 is molded is distributed toward the insulator 70. Therefore, it is possible to suppress the concentration of stress on the semiconductor element 40. In this way, a highly reliable semiconductor device 20 can be provided. Fig. 7A In / 7B, the white arrows indicate the force that the heat sink receives from the resin.

[0082] In this embodiment, the non-conductive element 13 formed on a chip with Si as a base material is used as the insulator 70. Therefore, the function of mechanically connecting the wiring element 50 is achieved without hindering the operation of the semiconductor element 40. The non-conductive element 13 has a structure in which the PN diodes 13a and 13b are connected in opposite directions and can be easily formed on a semiconductor substrate.

[0083] The arrangement direction of the semiconductor element 40 and the insulator 70 is not limited to the above examples. For example, the lateral direction of the wiring element 50 can be set as the arrangement direction. However, the longitudinal direction of the wiring element 50, that is, the X direction, is set as the arrangement direction. In this way, the increase in the size / volume of the wiring element 50 can be suppressed, and thus the increase in the size / volume of the semiconductor device 20 can be suppressed. For example, in the heat sink 52, a rotational moment may be generated due to the difference in force acting on the inner surface 52a and the outer surface 52b. The rotational moment is particularly large in the longitudinal direction of the heat sink 52, but the rotational moment can be suppressed by setting the arrangement direction to the longitudinal direction. And, by this arrangement, the stress acting on the semiconductor element 40 can be reduced.

[0084] In particular, in the present embodiment, the semiconductor element 40 is arranged in one region in the longitudinal direction, and the insulator 70 is arranged in another region with respect to the virtual center line CL in the longitudinal direction of the wiring element 50. Therefore, for example, the semiconductor element 40 and the insulator 70 located on the left and right sides with respect to the rotation axis in a plan view can effectively eliminate the rotation moment.

[0085] Although the nonconductive element 13 is formed of two PN diodes 13a and 13b, the nonconductive element 13 is not limited to this structure. A structure in which three or more PN diodes are connected in series may be adopted so that the forward directions of adjacent PN diodes among the three or more diodes are opposite to each other.

[0086] (Second embodiment, Figure 8 , 9 )

[0087] The second embodiment is a modification of the previous embodiment as a basic structure, and can be described in conjunction with it. In the previous embodiment, in a plan view, the area size of the insulator 70 is made substantially equal to the area size of the semiconductor element 40. In addition, an example in which only one insulator 70 is provided is shown. However, the present disclosure is not limited to such an example.

[0088] Figure 8 and 9 The semiconductor device 20 of the present embodiment is shown. Similar to the previous embodiment, a semiconductor element 40 and an insulator 70 are provided between wiring elements 50. In a plan view, the area size of the insulator 70 is larger than the area size of the semiconductor element 40. In this way, the area size of the solder joint between the heat sinks 51 and 52 and the terminal 53 forming the wiring element 50 is larger for the connection portion of the insulator 70 than for the connection portion of the semiconductor element 40. The other structures are the same as those of the previous embodiment.

[0089] <Overview of Second Embodiment>

[0090] In the present embodiment, in a plan view, the insulator 70 is larger than the semiconductor element 40, and therefore, the stress acting on the insulator 70 is increased compared to the previous embodiment. In this way, the stress acting on the semiconductor element 40 can be further reduced. Therefore, the reliability of the semiconductor device 20 can be further improved.

[0091] The structure of the semiconductor device 20 is not limited to the above example. Fig.10 In the illustrated modification, the semiconductor device 20 may include a plurality of insulators 70. Fig.10 In the embodiment, the semiconductor device 20 includes two insulators 70. The two insulators 70 are arranged side by side in the Y direction. By providing a plurality of insulators 70, the number of columns mechanically connecting the heat sink 51 and the heat sink 52 increases. This makes it possible to divide and distribute the stress that otherwise concentrates on the molding of the sealing resin body 30 into two columns. It should be noted that the structure may include three or more insulators 70. In addition, the provision of the plurality of insulators 70 is not limited to Fig.10 For example, the arrangement line of the plurality of insulators 70 may extend along the X direction.

[0092] In addition, Fig.10 In the example of FIG. 5 , the total area size of the plurality of insulators 70, that is, the sum of the area sizes of the insulators 70 is greater than the area size of the semiconductor element 40. In this way, the same Figure 8 The structure shown has the same effect.

[0093] (Third embodiment, Fig.11 )

[0094] The third embodiment is a modification of the previous embodiment as a basic structure and may be described in conjunction therewith. In the previous embodiment, the non-conductive element 13 is the insulator 70. The insulator is not limited to such a component.

[0095] Fig.11 is a cross-sectional view showing a semiconductor device 20 of the present embodiment, Figure 3 The semiconductor device 20 includes an insulator 70A. The other structures are the same as those of the first embodiment. The insulator 70A has joints 71 and 72 on both surfaces of an insulating substrate. The insulating substrate is formed using an inorganic material having electrical insulation such as glass, ceramics, or semiconductors. The non-conductive element 13 is not formed on the insulator 70A (i.e., the insulating substrate).

[0096] By using an insulating base material made of an inorganic material, the breakdown voltage of the insulator 70A is equal to or higher than the breakdown voltage of the semiconductor element 40. In addition, the insulator 70A electrically separates (i) the heat sink 51 as the first wiring element from (ii) the heat sink 52 and the terminal 53 as the second wiring element. Therefore, no current flows between the first wiring element and the second wiring element through the insulator 70A, and the operation of the semiconductor element 40 is not hindered under the use conditions of the semiconductor device 20. The insulator 70A serves as a support for mechanically connecting the heat sink 51 and the heat sink 52.

[0097] <Overview of Third Embodiment>

[0098] As shown in this embodiment, by utilizing the characteristics of the substrate, the insulator 70A can be used as the insulator. The semiconductor device 20 including the insulator 70A can also achieve the same effect as the semiconductor device 20 including the insulator 70. For the insulator 70, a material having a linear expansion coefficient close to the linear expansion coefficient of the substrate forming the semiconductor element 40 can be preferably used.

[0099] The structure of this embodiment and the structure of the second embodiment are combinable. This embodiment can achieve the same effect as the structure described in the second embodiment. For example, the area size of the insulator 70A can be larger than the area size of the semiconductor element 40. Moreover, the structure may include a plurality of insulators 70A. The total area size of the plurality of insulators 70A can be larger than the area size of the semiconductor element 40.

[0100] (Other embodiments)

[0101] The contents disclosed in the specification and the drawings are not limited to the exemplary embodiments. The present disclosure includes the illustrated embodiments and modifications to the embodiments by those skilled in the art. For example, the present disclosure is not limited to the combination of parts and / or elements shown in the embodiments. The present disclosure can be implemented in various combinations. The present disclosure can have additional parts that can be added to the embodiments. The present disclosure includes the omission of parts and / or elements of the embodiments. The present disclosure covers the replacement or combination of parts and / or elements between one embodiment and another embodiment. The technical scope of the present disclosure is not limited to the description of the embodiments. It is understood that some technical scopes disclosed are shown by the description of the claims and also include meanings equivalent to the description of the claims and modifications within the scope.

[0102] The disclosure of the specification, drawings, etc. is not limited by the description of the claims. The disclosure of the specification, drawings, etc. includes the technical concepts described in the claims, and further extends to technical concepts broader than the technical concepts in the claims. Therefore, various technical concepts can be extracted from the disclosure of the specification, drawings, etc. without being limited to the description of the claims.

[0103] Although an example is shown in which the semiconductor device 20 includes the dummy terminal 62, the present invention is not limited to this example. The dummy terminal 62 is optional and may be omitted.

[0104] The number and arrangement of the main terminals 60 and 61 are not limited to the above example. For example, a structure in which at least one of the main terminals 60 and 61 is provided in plural may be used.

[0105] The circuit structure of the converter 5 to which the semiconductor device 20 is applied is not limited to the above example. The number of phases of the converter 5 is not limited to multi-phase. The number of phases therein may be single-phase. In the case of multi-phase, the number of phases is not limited to four. In the bridge arm 10 for one phase, the upper arm may have a parallel structure. For example, the parallel circuits of the SBD 12 and the non-conductive element 13 may be arranged in two groups, and the two groups of such parallel circuits may be connected in parallel to each other. The application target of the semiconductor device 20 is not limited to the upper arm of the converter 5 having a boost function.

[0106] The number of semiconductor elements 40 included in the semiconductor device 20 is not limited to the above example. As described above, when one upper arm is composed of two sets of parallel circuits, two semiconductor elements 40 and two insulators 70 (ie, non-conductive elements 13) may be provided.

[0107] The structure described in this embodiment has: a semiconductor element in which a vertical element is formed with a wide bandgap semiconductor as a substrate; a wiring element arranged to sandwich the semiconductor element; and a sealing resin body that seals the semiconductor element and the wiring element as a whole. In this structure, by adding an insulator, the stress acting on the semiconductor element when molding the sealing resin body can be reduced, thereby providing a highly reliable semiconductor device. The vertical element is not limited to the above-mentioned SBD 12. The vertical element may also be a switching element such as a MOSFET.

[0108] In a plan view, the area size of the insulator 70 (or 70A) can be made smaller than the area size of the semiconductor element 40. By providing the insulator 70 (or 70A), the stress acting on the semiconductor element 40 can be reduced compared with a structure without the insulator 70 / 70A.

[0109] Although an example is shown in which the second wiring element includes the heat sink 52 and the terminal 53, the present disclosure is not limited to such an example. The terminal 53 may be omitted. For example, instead of the terminal 53, the heat sink 52 may be provided with a protrusion protruding toward the semiconductor element 40.

[0110] An example has been shown in which the outer surfaces 51 b and 52 b of the heat sinks 51 and 52 are exposed from the sealing resin body 30 , but the present disclosure is not limited to such an example. The outer surfaces 51 b and 52 b may be configured not to be exposed from the sealing resin body 30 .

Claims

1. A semiconductor device, comprising: A semiconductor element, wherein a Schottky barrier diode element is formed on a chip having a wide bandgap semiconductor as a substrate, and wherein: a first main electrode formed on the first main surface and made of a wide bandgap semiconductor as a base material; and a second main electrode formed on a second main surface opposite to the first main surface; a wiring element arranged to sandwich the semiconductor element, comprising a first wiring element arranged on the first main surface side and electrically connected to the first main electrode and a second wiring element arranged on the second main surface side and electrically connected to the second main electrode, the first wiring element corresponding to a lower heat sink, an upper heat sink and a terminal arranged on the upper side of the semiconductor element, the upper heat sink and the terminal being connected by solder, and the second wiring element corresponding to the upper heat sink, the terminal, and the solder; A sealing resin body for integrally sealing the semiconductor element and the wiring element; and at least one insulator which is also sandwiched by the wiring elements and has a first connection joined to the first wiring element and a second connection joined to the second wiring element, The at least one insulator is a non-conductive element, in which a plurality of diodes are formed on a semiconductor substrate and connected in series so that the forward directions of the plurality of diodes are opposite to each other in the series connection, The non-conductive element is connected in parallel with the Schottky barrier diode element, and The at least one insulator electrically separates the lower heat sink from the upper heat sink.

2. The semiconductor device according to claim 1, wherein In a plan view of the semiconductor element viewed from a board thickness direction, an area size of the insulator is larger than an area size of the semiconductor element.

3. The semiconductor device according to claim 2, wherein There is only one insulator in the semiconductor device, and The insulator has an area size greater than that of the semiconductor element.

4. The semiconductor device according to claim 2, wherein A plurality of insulators are provided, and The total area size of the plurality of insulators is larger than the area size of the semiconductor element.

5. The semiconductor device according to any one of claims 1 to 4, wherein The semiconductor element and the insulator are arranged side by side along a longitudinal direction of the wiring element.

6. The semiconductor device according to claim 5, wherein When the wiring element is cut in half into two regions by a virtual center line (CL) of the wiring element extending perpendicularly to the longitudinal direction thereof, the semiconductor element is arranged in one region and the insulator is arranged in the other region.

7. A semiconductor device comprising: Lower radiator; a first left solder directly atop a left portion of the lower heat sink; A semiconductor element, wherein the semiconductor element is an element in which a Schottky barrier diode element is formed on a chip with a wide bandgap semiconductor as a substrate, and comprises a lower main electrode and an upper main electrode, wherein the lower main electrode is directly located on top of the first left solder; a second left solder directly atop the upper main electrode; a left terminal located directly on top of the second left solder; a third left solder directly on top of the left terminal; a left portion of an upper heat sink that is directly on top of the third left solder; a first right solder directly atop a right portion of the lower heat sink; a lower joint located directly on top of the first right solder; an insulator located directly atop the lower connector; an upper connector located directly on top of the insulator; a second right solder directly atop the upper joint; a right terminal located directly on top of the second right solder; a third right solder directly on top of the right terminal; and The right side portion of the upper heat sink is directly located on top of the third right side solder, wherein The insulator is a non-conductive element in which a plurality of diodes are formed on a semiconductor substrate and connected in series so that the forward directions of the plurality of diodes are opposite to each other in the series connection. The non-conductive element is connected in parallel with the Schottky barrier diode element, and The insulator electrically separates the lower heat sink from the upper heat sink.

8. The semiconductor device according to claim 7, further comprising: a sealing resin body including: (i) a central portion located between the semiconductor element and the insulator, and (ii) a peripheral portion surrounding the left side, right side, front side, and rear side of the lower heat sink and surrounding the left side, right side, front side, and rear side of the upper heat sink, wherein a lower outer surface of the lower heat sink is flush with a lower surface of the sealing resin body so that the lower outer surface is not covered by the sealing resin body, and The upper surface of the upper heat sink is flush with the upper surface of the sealing resin body, so that the upper surface of the upper heat sink is not covered by the sealing resin body.

9. The semiconductor device according to claim 8, further comprising: a left main terminal extending substantially rearward through the rear side of the sealing resin body and electrically connected to the lower heat sink; and a right main terminal extending substantially rearward through the rear side of the sealing resin body and electrically connected to the upper heat sink; A dummy terminal is provided which enters the front side surface of the sealing resin body and is not electrically connected to the semiconductor element.

10. The semiconductor device according to claim 8, wherein When viewed in plan view, the semiconductor element is substantially a mirror image of the insulator relative to a front-to-back centerline so that stress is distributed symmetrically about the centerline.

11. The semiconductor device according to claim 8, in, The semiconductor element is a Schottky barrier diode, and The insulator includes a pair of PN diodes, so that the semiconductor device is configured to be used as an upper arm in one bridge arm of a converter.

12. The semiconductor device according to claim 8, further comprising: Dummy terminals are provided which enter the front side of the sealing resin body and are not electrically connected to the semiconductor element, so that the dummy terminals are configured to be used for fixing the semiconductor device to a circuit board during a manufacturing process.

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