Single-chip element, electronic module, and electronic device including the same

Abstract

The present application provides a single-chip element for driving a panel including fingerprint sensing pixels, display pixels and touch sensors, an electronic module and an electronic device including the same. The single-chip element includes a main body, a first set of pads and a second set of pads arranged in the main body. The first set of pads includes a plurality of first pads for driving the fingerprint sensing pixels and is arranged on at least one of a left portion and a right portion of the main body with respect to an axis. The second set of pads includes a plurality of second pads for driving the display pixels and the touch sensors and is arranged on the other of the left portion and the right portion, wherein at least one group of the first set of pads and the second set of pads is arranged only on the one of the left portion and the right portion.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to a single-chip element for driving a panel including fingerprint sensing pixels, display pixels, and touch sensors, an electronic module, and an electronic device including the same, and more particularly, to a single-chip element for driving a panel including fingerprint sensing pixels, display pixels, and touch sensors, an electronic module, and an electronic device including the same. BACKGROUND

[0002] For computing devices such as smartphones, tablets, or other information processing devices, touch screens are an integral component for user interaction. In order to simplify circuit area, circuit layout, and make the computing devices thinner, touch and display driver integration (TDDI) integrated circuits (ICs) have been utilized to drive and control the display panels using liquid crystal display (LCD) display technology and the associated touch sensors for the display panels of computing devices such as smartphones and tablets.

[0003] On the other hand, fingerprint sensing is increasingly becoming a standard functionality for the computing devices to meet the emerging demands for enhanced security in various applications such as fingerprint recognition for unlocking the computing devices. With the development of the technology, some smartphones today are equipped with front-facing in-display or under-display fingerprint sensors.

[0004] As such, with the increasing complexity of the circuits due to the requirements of touch sensing, fingerprint sensing, and display driving associated with the display panels, the circuit routing and control circuit design for the display panels associated with touch sensing and fingerprint sensing elements in computing devices such as smartphones or tablets are challenging. SUMMARY

[0005] Based on at least one embodiment of the present disclosure, an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors using a single-chip element in a computing device. Based on the architecture, the single-chip element can be implemented such that the pads thereof are arranged in a manner that the electrical connections of the pads for the fingerprint sensing pixels, display pixels, and touch sensors and control lines or related lines can be achieved using routing that does not cross over each other. In this manner, circuit layout simplification and circuit load balancing of the routing can be facilitated.

[0006] The present disclosure provides a single-die element for driving a panel including a plurality of display pixels, a plurality of touch sensors, and a plurality of fingerprint sensing pixels, as exemplified in some embodiments below. The single-die element includes a body; a first set of pads disposed in the body; and a second set of pads disposed in the body. The body has a left portion and a right portion with respect to an axis. The first set of pads includes a plurality of first pads for driving the plurality of fingerprint sensing pixels, wherein the first set of pads is disposed on at least one of the left portion and the right portion and configured to couple to the plurality of fingerprint sensing pixels. The second set of pads includes a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is disposed on the other of the left portion and the right portion and configured to couple to the panel, wherein at least one group of the first set of pads and the second set of pads is disposed only on the one of the left portion and the right portion.

[0007] Optionally, the plurality of first pads is disposed only on one of the left portion and the right portion.

[0008] Optionally, the plurality of second pads is disposed only on the other of the left portion and the right portion.

[0009] Optionally, the plurality of second pads is disposed on the left portion and the right portion.

[0010] Optionally, the plurality of first pads is closer to the axis than the plurality of second pads.

[0011] Optionally, the plurality of second pads is closer to the axis than the plurality of first pads.

[0012] Optionally, the plurality of second pads is disposed only on the other of the left portion and the right portion.

[0013] Optionally, the plurality of first pads is disposed on the left portion and the right portion.

[0014] Optionally, the plurality of first pads is closer to the axis than the plurality of second pads.

[0015] Optionally, the plurality of second pads is closer to the axis than the plurality of first pads.

[0016] Optionally, the body has a rectangular shape with a first side, a second side parallel to and closer to the faceplate than the first side, a left side on the left portion and perpendicular to the first and second sides, and a right side on the right portion and parallel to the left side, and the axis intersects the first and second sides.

[0017] Optionally, all of the first set of pads and all of the second set of pads are disposed along the first side.

[0018] Optionally, the first set of pads is closer to the axis than the second set of pads.

[0019] Optionally, the second set of pads is closer to the axis than the first set of pads.

[0020] Optionally, all of the first set of pads and all of the second set of pads are disposed along the second side.

[0021] Optionally, the first set of pads is closer to the axis than the second set of pads.

[0022] Optionally, the second set of pads is closer to the axis than the first set of pads.

[0023] Optionally, all of the first set of pads are disposed along one of the first and second sides, and all of the second set of pads are disposed along both the left and right sides.

[0024] Optionally, all of the first set of pads are disposed along both the left and right sides, and all of the second set of pads are disposed along one of the first and second sides.

[0025] Optionally, all of the first set of pads are disposed along at least one of the left and right sides, and all of the second set of pads are disposed along at least one of the left and right sides.

[0026] Optionally, the first plurality of pads is disposed along only the one of the left and right sides.

[0027] Optionally, the second plurality of pads is disposed along only the other of the left and right sides.

[0028] Optionally, the second plurality of pads is disposed along both the left and right sides.

[0029] Optionally, the second plurality of pads is disposed along only one of the left and right sides.

[0030] Optionally, the plurality of first pads are arranged along both the left side and the right side.

[0031] Optionally, the plurality of first pads comprise a plurality of fingerprint-on-array gate-drive select pads.

[0032] Optionally, the plurality of second pads comprise a plurality of gate-driver-on-array select pads.

[0033] Optionally, the panel is further coupled to a plurality of data lines of the plurality of display pixels, a plurality of fingerprint sensing lines of the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines, and the second group of pads further comprises a plurality of third pads configured for coupling to the panel and for controlling the plurality of selection circuits.

[0034] Optionally, each of the plurality of selection circuits is further coupled to at least one of the plurality of fingerprint sensing lines.

[0035] Optionally, the plurality of third pads are arranged on both the left portion and the right portion.

[0036] Optionally, the body has a rectangular shape with a first side and a second side parallel to the first side and closer to the panel than the first side, and the plurality of third pads are arranged along the first side.

[0037] Optionally, the body has a rectangular shape with a first side and a second side parallel to the first side and closer to the panel than the first side, and the plurality of third pads are arranged along the second side.

[0038] Optionally, the panel further comprises a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and the single-chip element further comprises a third group of pads arranged in the body for driving the plurality of data lines or receiving fingerprint sensing signals from the plurality of fingerprint sensing lines, or coupled to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

[0039] Optionally, the third set of pads includes a first subset of pads configured to drive the plurality of data lines in a time-division manner and receive fingerprint sensing signals from the plurality of fingerprint sensing lines, and a second subset of pads configured to couple to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

[0040] Optionally, the panel further includes a plurality of selection circuits, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and a corresponding one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured to couple to the plurality of selection circuits.

[0041] Optionally, the first subset of pads and the second subset of pads are alternately arranged on the body.

[0042] Optionally, the first subset of pads is configured to drive the plurality of data lines in a time-division manner, and the second subset of pads is configured to receive touch signals from the plurality of touch sensing lines.

[0043] Optionally, the body has a rectangular shape with a first side and a second side parallel to the first side and closer to the panel than the first side, and the third set of pads is arranged along the second side.

[0044] Optionally, the single wafer element further includes a fingerprint driver circuit and a touch display driver circuit. The fingerprint driver circuit is arranged in the body and coupled to the plurality of first pads. The touch display driver circuit is arranged in the body and coupled to the plurality of second pads and the plurality of third pads.

[0045] Optionally, in the right portion, none of the plurality of third pads is arranged between the plurality of first pads and the plurality of second pads, and in the left portion, none of the plurality of third pads is arranged between the plurality of first pads and the plurality of second pads.

[0046] Optionally, the plurality of third pads are arranged beside the plurality of second pads instead of beside the plurality of first pads.

[0047] Optionally, the plurality of second pads are arranged beside the plurality of first pads and beside the plurality of third pads.

[0048] Optionally, the body is configured to be arranged on a thin film as a chip-on-film structure.

[0049] Optionally, the body is configured to be arranged on a glass as a chip-on-glass structure.

[0050] Optionally, the single-chip component further includes a fingerprint driver circuit and a touch display driver circuit. The fingerprint driver circuit is disposed in the body and coupled to the first set of pads. The touch display driver circuit is disposed in the body and coupled to the second set of pads.

[0051] Optionally, in the right portion, none of the first set of pads is disposed between the second set of pads, and none of the second set of pads is disposed between the first set of pads, and in the left portion, none of the first set of pads is disposed between the second set of pads, and none of the second set of pads is disposed between the first set of pads.

[0052] Optionally, the panel further includes at least one first gate-on-array (GOA) circuit, and the first set of pads is configured to be coupled to the plurality of fingerprint sensing pixels via the at least one first GOA circuit.

[0053] Optionally, the panel further includes at least one second gate-on-array (GOA) circuit, and the second set of pads is configured to be coupled to the plurality of display pixels and the plurality of touch sensors via the at least one second GOA circuit.

[0054] The present disclosure further provides an electronic module for driving a panel including a plurality of fingerprint sensing pixels, a plurality of display pixels, and a plurality of touch sensors, as exemplified in some embodiments below. The electronic module includes a thin film; and a single-chip component disposed on the thin film, wherein the single-chip component is as exemplified in any one or any combination of at least one of the embodiments, as appropriate.

[0055] The present disclosure further provides an electronic device, as exemplified in some embodiments below. The electronic device includes a panel including a plurality of display pixels, a plurality of touch sensors, and a plurality of fingerprint sensing pixels; and a single-chip component for coupling to the panel, wherein the single-chip component is as exemplified in any one or any combination of at least one of the embodiments, as appropriate.

[0056] Optionally, the plurality of fingerprint sensing pixels corresponds to a fingerprint sensing region, the panel has a display region, the plurality of touch sensors corresponds to a touch sensing region, and sizes of the fingerprint sensing region, the display region, and the touch sensing region are substantially the same.

[0057] Optionally, the electronic device further comprises a substrate, and the plurality of display pixels, the plurality of touch sensors, and the plurality of fingerprint sensing pixels are disposed on the substrate.

[0058] Optionally, the substrate comprises glass, and the single-chip element is disposed on a portion of the glass as a chip-on-glass structure.

[0059] Optionally, the substrate further comprises a thin film, and the single-chip element is disposed on the thin film as a chip-on-film structure. BRIEF DESCRIPTION OF DRAWINGS

[0060] In order to more clearly illustrate the technical solutions of the embodiments of the present application or the prior art, the following will briefly introduce the drawings required to be used in the embodiment description. Obviously, the drawings in the following description are only some of the embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without creative labor.

[0061] Figure 1 is a schematic diagram illustrating an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors using a single-chip element in an operation device according to various embodiments disclosed herein.

[0062] Figure 2 is a schematic diagram illustrating an embodiment of the architecture of Figure 1

[0063] Figure 3 is a schematic diagram illustrating a possible example of an electronic module combining TDDI and readout IC (ROIC).

[0064] Figure 4A is a schematic diagram illustrating various embodiments of a single-chip element for driving fingerprint sensing pixels, display pixels, and touch sensors based on Figure 1

[0065] Figure 4B is a schematic diagram illustrating an example of a wire connecting to the pads of the single-chip element in Figure 4A

[0066] Figure 5A is a schematic diagram illustrating another example embodiment of pad arrangement of a single-chip element.

[0067] Figure 5B is a schematic diagram illustrating another example embodiment of pad arrangement of a single-chip element.

[0068] Figure 6A ​​​is a schematic diagram illustrating a panel coupled to a monolithic chip element in accordance with a specific embodiment disclosed herein.

[0069] Figure 6B is a schematic diagram illustrating a panel including display pixels and fingerprint sensing pixels coupled to a monolithic chip element in accordance with a specific embodiment disclosed herein.

[0070] Figure 6C is a schematic diagram illustrating a panel including display pixels and fingerprint sensing pixels coupled to a monolithic chip element in accordance with another specific embodiment disclosed herein.

[0071] Figure 6D is a schematic diagram illustrating a panel including display pixels and fingerprint sensing pixels coupled to a monolithic chip element in accordance with yet another specific embodiment disclosed herein.

[0072] Figure 6E is a schematic diagram illustrating a panel including display pixels and fingerprint sensing pixels coupled to a monolithic chip element in accordance with another specific embodiment disclosed herein.

[0073] Figure 7 is a schematic diagram illustrating a fingerprint sensing pixel in accordance with a specific embodiment disclosed herein.

[0074] Figure 8 is a timing diagram illustrating a specific embodiment of driving a fingerprint sensing pixel, a display pixel, and a touch sensor.

[0075] Figure 9A is a schematic diagram illustrating a specific embodiment of pad placement along a first side edge of a monolithic chip element.

[0076] Figure 9B is a schematic diagram illustrating a specific embodiment of pad placement along a first side edge of a monolithic chip element.

[0077] Figure 9C is a schematic diagram illustrating a specific embodiment of pad placement along a first side edge of a monolithic chip element.

[0078] Figure 10A is a schematic diagram illustrating a specific embodiment of pad placement along a second side edge of a monolithic chip element.

[0079] Figure 10B is a schematic diagram illustrating a specific embodiment of pad placement along a second side edge of a monolithic chip element.

[0080] Figure 10C is a schematic diagram illustrating a specific embodiment of pad placement along a second side edge of a monolithic chip element.

[0081] Figure 10D is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its second side edge.

[0082] Figure 11A is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its first side edge.

[0083] Figure 11B is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its first side edge.

[0084] Figure 11C is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its first side edge.

[0085] Figure 11D is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its first side edge.

[0086] Figure 12A is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its left and right side edges.

[0087] Figure 12B is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its left and right side edges.

[0088] Figure 12C is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its left and right side edges.

[0089] Figure 12D is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element along its left and right side edges.

[0090] Figure 13A is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element.

[0091] Figure 13B is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element.

[0092] Figure 13C is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element.

[0093] Figure 14 is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element.

[0094] Figure 15 is a schematic diagram illustrating another particular embodiment of the placement of pads of a single wafer element.

[0095] Figure 16 is a schematic diagram illustrating a particular embodiment of the placement of pads of a single wafer element.

[0096] Figure 17 is a schematic diagram illustrating a routing structure between a single-chip element (or an electronic module) and the panel according to a specific embodiment of the present application.

[0097] Figure 18 is a schematic diagram illustrating a selection circuit on a single-chip element (or an electronic module) and the panel according to a specific embodiment of the present application.

[0098] Figure 19 is a waveform diagram illustrating the plurality of control signals for controlling the switching member depicted in Figure 18

[0099] Reference signs

[0100] 1: arithmetic device

[0101] 5: processing unit

[0102] 9, 9A, 9B, 9C, 9D, 9E: panel

[0103] 9_1A-9_1D, 9_2A-9_2D: panel

[0104] 9_3A-9_3D, 9_4A-9_4D, 9_5A-9_5D: panel

[0105] 10, 10A, 20, 20_1A-20_1D, 20_2A-20_2D, 20_3A-20_3D, 20_4A-20_4D, 20_5A-20_5D, 20A, 30A, 30B, 40: single-chip element

[0106] 11, 11A: display driver circuit

[0107] 11B: touch and display driver integrated circuit

[0108] 12, 12A, 49: touch driver circuit

[0109] 19, 19A, 29A, 29B, 41: fingerprint driver circuit

[0110] 19B: readout integrated circuit

[0111] 21A, 21B: touch and display driver integrated circuit; touch display driver circuit

[0112] 30C: single-chip element

[0113] 90_1C, 90_1D, 90_2C, 90_2D: glass site

[0114] ​91: display pixel array

[0115] 93: touch sensing array

[0116] 95: fingerprint sensing array

[0117] 100, 100_1A, 100_1B, 100_2A, 100_2B, 100A, 100_5A-100_5D: thin film 110, 111, 190, T, T11_3A, T12_3A, T11_3B, T12_3B, T11_3C, T12_3C, T11_3D, T12_3D, T21_3A, T22_3A, T21_3B, T22_3B, T21_3C, T22_3C, T21_3D, T22_3D, T30A, T30B, T31A, T31B, T32A, T32B, T40: trace

[0118] 126: fingerprint sensor

[0119] 150, 150_1A-150_1D, 150_2A-150_2D: flexible printed circuit (FPC)

[0120] 150_3A-150_3D, 150_4A-150_4D, 150_5A-150_5D: flexible printed circuit (FPC)

[0121] 200, 200_1A-200_1D, 200_2A-200_2D, 200_3A-200_3D, 200_4A-200_4D, 200_5A-200_5D, 300A-300C: main body

[0122] 210, G11_1A, G12_1A, G11_1B, G12_1B, G11_1C, G12_1C, G11_1D, G12_1D, G11_2A, G12_2A, G11_2B, G12_2B, G11_2C, G12_2C, G11_2D, G12_2D, G11_3A, G12_3A, G11_3B, G12_3B, G11_3C, G12_3C, G11_3D, G12_3D, G11_4A, G12_4A, G11_4B, G12_4B, G11_4C, G12_4C, G11_4D, G12_4D, G11_5B, G12_5A, G11_5C, G12_5D: first group of pads

[0123] 210_1, 210_2 to 210_N, 240A: pad

[0124] 220, G21_1A, G22_1A, G21_1B, G22_1B, G21_1C, G22_1C, G21_1D, G22_1D, G21_2A, G22_2A, G21_2B, G22_2B, G21_2C, G22_2C, G21_2D, G22_2D, G21_3A, G22_3A, G21_3B, G22_3B, G21_3C, G22_3C, G21_3D, G22_3D, G21_4A, G22_4A, G21_4B, G22_4B, G21_4C, G22_4C, G21_4D, G22_4D, G21_5A, G22_5B, G21_5C, G22_5C, G21_5D, G22_5D: second group of pads

[0125] 230A, 230B: third group of pads

[0126] 410, 412: gate on array (GOA) driver

[0127] 413: fingerprint receiver multiplexing circuit

[0128] 414: fingerprint analog front end circuit

[0129] 415: fingerprint control circuit

[0130] 416, 496: data interface circuit

[0131] 493: touch panel receiver multiplexing circuit

[0132] 494: touch analog front end circuit

[0133] 495: touch control circuit

[0134] 501: first switch member

[0135] 502: second switch member

[0136] 502_1: first switch element

[0137] 502_2: second switch element

[0138] 503: third switch member

[0139] 504: fourth switch member

[0140] AA: active area

[0141] AX: axis

[0142] B: blue sub-pixel

[0143] B1: block

[0144] DAC: signal converter

[0145] DP: display pixel

[0146] DS: display driving signal

[0147] FGL: fingerprint scan line

[0148] FGOA1, FGOA2: gate-on-array (GOA) scan circuit on fingerprint array

[0149] FP_S: fingerprint sensing signal

[0150] FPR_GCK: reset signal

[0151] FPR_S1, FPR_S2: fingerprint driving signal

[0152] FPR_SEL: selection signal; acquisition signal

[0153] FS: fingerprint sensing pixel

[0154] G: green sub-pixel

[0155] GOA1, GOA2, RG1, RG2, TG1, TG2: gate-on-array (GOA) circuit

[0156] LS: wire; transmission line

[0157] N1D, N1F: first terminal

[0158] N2: second terminal

[0159] N3D, N3F: third terminal

[0160] N4: fourth terminal

[0161] OBF: output buffer

[0162] P1: left portion

[0163] P2: right portion

[0164] P11A, P12A, P11B, P12B: first pad

[0165] P21A, P22A, P21B, P22B: second pad

[0166] P31A, P32A, P31B, P32B: third pad

[0167] P4A, P4B: fourth pad

[0168] P41A, P41B: first sub-group pad

[0169] P42A, P42B: second sub-set of pads

[0170] PD: photodiode

[0171] R: red sub-pixel

[0172] S1: first side

[0173] S2: second side

[0174] S3: left side

[0175] S4: right side

[0176] SC, SC1, SC2: selection circuit

[0177] SL_FP: fingerprint sensing line

[0178] SLD: display data line; data line

[0179] SLR, SLG, SLB: data line

[0180] SM1: selection module

[0181] SM2: selection module

[0182] SW1SD, SW1FP, SW3FP, SW2R, SW2G, SW2B, SW2FP: control signal

[0183] SWR, SWG, SWB, SW_FP: switch

[0184] T, T1, T2 to TN: trace

[0185] TS1, TS2: switch

[0186] TI1: display driving phase

[0187] TI2: fingerprint sensing phase

[0188] T11_1A, T12_1A, T11_1B, T12_1B, T11_1C, T12_1C, T11_1D, T12_1D, T11_2A, T12_2A, T11_2B, T12_2B, T11_2C, T12_2C, T11_2D, T12_2D, T11_4A, T12_4A, T11_4B, T12_4B, T11_4C, T12_4C, T11_4D, T12_4D, T11_5B, T12_5A, T11_5C: first trace

[0189] T21_1A, T22_1A, T21_1B, T22_1B, T21_1C, T22_1C, T21_1D, T22_1D, T21_2A, T22_2A, T21_2B, T22_2B, T21_2C, T22_2C, T21_2D, T22_2D, T21_4A, T22_4A, T21_4B, T22_4B, T21_4C, T22_4C, T21_4D, T22_4D, T21_5A, T22_5B, T21_5C, T22_5C, T21_5D, T22_5D: second trace

[0190] TDDI_S1: display driving signal

[0191] TDDI_S2: selection signal

[0192] TDDI_SW_FP: selection signal

[0193] TDDI_SWR, TDDI_SWG, TDDI_SWB: selection signal

[0194] TGL: scan line

[0195] TP: touch

[0196] Vout: node

[0197] VDD, Vbias: voltage DETAILED DESCRIPTION

[0198] The single-chip element, the electronic module, and the electronic device including the same for driving a panel including fingerprint sensing pixels, display pixels, and touch sensors according to embodiments of the disclosure will be described more fully with reference to the accompanying drawings.

[0199] To facilitate an understanding of the principles, features, and actions of the disclosed application, specific embodiments of the disclosed application are provided with reference to the accompanying drawings. The following specific embodiments are provided to illustrate various implementations, however, the disclosed application is not limited to the specific embodiments provided and the specific embodiments provided can be combined as appropriate. In the present application, the terms "coupled," "coupling," "connecting," and "connected" can refer to any direct or indirect connection. For example, "a first device is coupled to a second device" can be interpreted as "the first device is directly connected to the second device" or "the first device is indirectly connected to the second device through other devices or connection means." The term "signal" can refer to a current, a voltage, a charge, a temperature, data, an electromagnetic wave, or any one or more signals. In addition, the term "and / or" can refer to "at least one of." For example, "a first signal and / or a second signal" can be interpreted as "at least one of the first signal and the second signal."

[0200] In the following, an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors using a single-chip element in an operation device will be provided. Based on the architecture, the single-chip element can be implemented to include its pads arranged in the following manner: electrical connections of the pads for the plurality of fingerprint sensing pixels, display pixels, and touch sensors and control lines or related lines can be implemented using traces that do not cross each other. The pad arrangement of the single-chip element can facilitate circuit layout simplification and circuit load balancing of the plurality of traces.

[0201] The following provides an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors using a single-chip element in an operation device.

[0202] Reference is made to Figure 1 , for an architecture for driving fingerprint sensing pixels, display pixels, and touch sensors using a single-chip element in an operation device, for various embodiments in accordance with the present disclosure. As shown in Figure 1 , an operation device 1 includes a processing unit 5, a single-chip element 10, and a panel 9 including a plurality of display pixels, associated with a plurality of touch sensors; and a plurality of fingerprint sensing pixels. The single-chip element 10 can be used to couple between the processing unit 5 and the panel 9 and serve as a "bridge" between the processing unit 5 and the panel 9, where the panel 9 is associated with the plurality of touch sensors and fingerprint sensing pixels. The processing unit 5 can be configured to control the single-chip element 10 to drive the plurality of display pixels, the plurality of fingerprint sensing pixels, and / or the plurality of touch sensors, so as to display images or videos, obtain fingerprint data, and / or touch data. The panel 9 can be a display panel, for example, implemented in an in-cell type or on-cell type display panel with fingerprint sensors. The single-chip element 10 can be implemented to integrate and include a display driver circuit 11, a touch driver circuit 12, and a fingerprint driver circuit 19. In this way, the single-chip element 10 can be referred to as a fingerprint, touch, display driver integration (FTDI) IC. Based on the architecture shown in Figure 1 , the single-chip element 10 (as will be shown in Figure 4A , Figure 5A , Figure 5B , Figures 9A to 12D , Figures 13A to 13C , Figures 14 to 16 , and different embodiments) can be configured to include pads arranged in the following manner: electrical connections between the plurality of pads for the plurality of fingerprint sensing pixels, display pixels, and touch sensors and control lines or associated lines can be implemented using traces that do not cross each other.

[0203] It is noted that the single-chip element 10 can directly perform the driving on the display pixels, the fingerprint sensing pixels, and / or the touch sensors by directly providing relevant driving signals to the display pixels, the fingerprint sensing pixels, and / or the touch sensors. Alternatively, the single-chip element 10 can indirectly perform the driving on the display pixels, the fingerprint sensing pixels, and / or the touch sensors by providing relevant driving or control signals to other control circuits (e.g., gate driver on array; GOA circuit) which can then directly provide driving signals to the display pixels, the fingerprint sensing pixels, and / or the touch sensors. In other words, the term "driving" can mean "direct driving" which can include generating and directly applying driving signals, or can mean "indirect driving" which can include causing the generation and / or provision of the direct driving signals in different implementations.

[0204] In some embodiments, the computing device 1 (or electronic device) further includes a substrate, and the display pixels, the touch sensors, and the fingerprint sensing pixels are arranged on (e.g., directly attached to, embedded in, or arranged above, but not limited to) the substrate. For example, the substrate includes glass, and the single-chip element 10 is arranged on a portion of the glass as a chip-on-glass structure, where the portion of the glass can be an extended portion separated from another portion (e.g., active area (AA)) of the glass on which the display pixels, the touch sensors, and the fingerprint sensing pixels are arranged.

[0205] In some embodiments, the substrate includes a thin film. The single-chip element can be arranged on the thin film as a chip-on-film structure.

[0206] Based on the architecture used in the computing device 1 as exemplified in Figure 1 Any electronic device such as a smartphone, a tablet, or any other information processing device can be implemented based on the architecture used in the computing device 1 as exemplified in

[0207] In embodiments, as exemplified in Figure 2As illustratively shown, the single-chip element 10A (e.g., an FTDI IC) integrates and includes a display driver circuit 11 A, a touch driver circuit 12A, and a fingerprint driver circuit 19A for electrically coupling to a display pixel array 91 including display pixels, a touch sensing array 93 including touch sensors, and a fingerprint sensing array 95 including fingerprint sensing pixels, respectively. The design of the FTDI IC (e.g., single-chip element 10 or 10A) can be made by combining individual or discrete versions of the display driver circuit 11 A, touch driver circuit 12A, and fingerprint driver circuit 19A into a single chip, or by integrating the display driver circuit 11 A, touch driver circuit 12A, and fingerprint driver circuit 19A into a single chip in any suitable manner. For example, the FTDI IC (e.g., single-chip element 10 or 10A) can be implemented to have reduced overall circuit area by sharing the same set of circuits such as power circuit, multi-time-programmable (MTP) read-only memory (ROM), and / or oscillation circuit, etc. In an exemplary implementation of the FTDI IC, the display driver circuit 11 A and touch driver circuit 12A (e.g., touch and display driver integrated (TDDI) IC) can be configured to communicate with the fingerprint driver circuit 19A (e.g., including a fingerprint readout IC (ROIC)) via an internal communication interface that can be easily implemented and controlled in a time-shared manner. In some embodiments, the FTDI IC has different sets of circuits that are internally shared, such as exemplified in U.S. Patent Publication No. 2018 / 0164943 Al. Of course, implementation of the disclosed subject matter is not limited to the above-described examples.

[0208] Regarding Figure 1 or Figure 2The hardware structure of the components in the specific embodiments, the display driver circuit (e.g., 11 or 11A), the touch driver circuit (e.g., 12 or 12A), and the fingerprint driver circuit (e.g., 19 or 19A) can be implemented individually or integrated based on a control circuit (which includes a microcontroller-type or processor-type core with computing capability). Alternatively, the design of the display driver circuit (e.g., 11 or 11A), the touch driver circuit (e.g., 12 or 12A), and the fingerprint driver circuit (e.g., 19 or 19A) can be performed based on techniques using hardware description languages (HDL) or any other design method for digital circuits familiar to those skilled in the art, and can be performed based on hardware circuits implemented using field programmable gate arrays (FPGA), complex programmable logic devices (CPLD), or application-specific integrated circuits (ASIC).

[0209] In some embodiments, the display pixel array 91 is, for example, a liquid crystal display (LCD) pixel array, an organic light emitting diode (OLED) pixel array, or any other suitable pixel array. The panel 9 can be implemented, for example, by an in-cell type or on-cell type display panel integrated with a fingerprint sensor, in which the pixel array 91, the touch sensing array 93, and the fingerprint sensing array 95 can be integrated together in layers or in any suitable manner. The touch sensing array 93 can be implemented by using a capacitive touch sensor in the form of a touch sensing array or any other suitable touch sensor. The fingerprint sensing array 95 can be implemented, for example, by an optical fingerprint sensor, a capacitive fingerprint sensor, an ultrasonic fingerprint sensor, or any suitable device for sensing a fingerprint signal. Of course, the implementation of the present disclosure is not limited to the above examples.

[0210] In some embodiments, the plurality of fingerprint sensing pixels of the fingerprint sensing array 95 corresponds to a fingerprint sensing area, the panel (or the display pixel array 91) has a display area, the plurality of touch control sensors of the touch control array 93 corresponds to a touch control sensing area, and the sizes of the fingerprint sensing area, the display area, and the touch control sensing area are substantially the same; for example, these areas are the same, close to the same, or slightly different or the difference of these areas is within a range, thereby facilitating the panel to achieve full-screen fingerprint sensing function. Of course, the implementation of the present disclosure is not limited to the plurality of examples. For example, the size of the fingerprint sensing area can be different from the display area.

[0211] The following content indicates the criticality of the pad arrangement of the single-chip element.

[0212] In actual implementations, the electrical connections between the single-chip element 10 or 10A (i.e., FTD I IC) and the plurality of display pixels and the plurality of associated touch control sensors and fingerprint sensing pixels of the panel 9 are relatively simple. Figure 1 Or Figure 2 The single-chip element 10 (or 10A) is more complicated, as schematically shown in FIG. 10B. A plurality of pads of the single-chip element 10 (or 10A) are arranged thereon, and a plurality of corresponding traces need to be arranged to connect the plurality of pads of the single-chip element 10 (or 10A) to the plurality of control lines and associated lines of the plurality of display pixels and the plurality of associated touch control sensors and fingerprint sensing pixels. In some implementations, the plurality of corresponding traces are arranged to connect the plurality of pads of the single-chip element 10 (or 10A) to a first GOA circuit for driving fingerprint sensing pixels, and a second GOA circuit for driving the plurality of display pixels and the plurality of associated touch control sensors. If the plurality of pads and the plurality of corresponding traces for connecting the single-chip element to the plurality of control lines and associated lines are not properly implemented, signal interference on the plurality of traces will inevitably become serious and reduce the performance of the touch control or fingerprint sensing.

[0213] To indicate the criticality of the pad arrangement of the single-chip element, as shown in FIG. 11A, the single-chip element 10 (or 10A) is arranged on the panel 9, and the plurality of pads of the single-chip element 10 (or 10A) are connected to the plurality of control lines and associated lines of the plurality of display pixels and the plurality of associated touch control sensors and fingerprint sensing pixels. Figure 3The possible implementation shown is an example. In this example, a display panel 9B associated with touch sensing components (such as touch sensors) and fingerprint sensing components (such as fingerprint sensing pixels) is configured to operate together with a combination of TDDIIC 11B and ROIC 19B for fingerprint sensing, as mentioned above. The TDDIIC 11B and ROIC 19B are bonded to a thin film 100 using a chip-on-film (COF) method. The thin film 100 is connected to a flexible printed circuit 150, through which the plurality of integrated circuits (ICs) on the thin film 100 are electrically connected to a processing unit (such as...). Figure 1 or Figure 2 (As shown in the diagram). The display panel 9B includes array-on-gate (GOA) circuits TG1 and TG2, which will be driven by the TDDIIC 11B; and GOA circuits RG1 and RG2, which will be driven by the ROIC 19B on the plurality of left and right boundaries of the display panel 9B, respectively. The TDDIIC 11B includes pads for outputting corresponding control signals to control the plurality of GOA circuits TG1 and TG2, while the ROIC 19B includes pads for outputting corresponding control signals to control the plurality of GOA circuits RG1 and RG2. Figure 3 As shown, the TDDIIC 11B and ROIC 19B are bonded to the thin film 100, so that the plurality of traces 190 from the left side of the ROIC 19B inevitably need to cross the plurality of traces from the TDDIIC 11B on the display panel 9B, such as the plurality of traces 111 for controlling the data lines (or display data lines or source lines) of the display panel 9B and the plurality of traces 110 for controlling the plurality of GOA circuits TG1 and TG2. In this way, the following disadvantages arise: the multiple traces crossing each other will cause signal interference and can easily degrade the performance of the display, touch sensing, or fingerprint sensing, thereby affecting the user experience. To reduce signal interference caused by the multiple traces crossing each other, additional processing using specific materials is required in the layer corresponding to the area where the multiple traces crossing each other occur, which will also increase the overall cost. Figure 3In some embodiments, the TDDI IC 11B is positioned on the left side and the ROIC 19B is positioned on the right side. Since the multiple junctions of the TDDI IC 11B and ROIC 19B on the thin film 100 are asymmetric to the center line of the display panel 9B, the multiple RC loads on the multiple left and right sides of the display panel are not equal due to the asymmetric lengths of the multiple traces. This not only affects the ability of the multiple signals to the multiple GOA circuits on the multiple left and right sides of the display panel, but also affects the performance of display, touch sensing, or fingerprint recognition.

[0214] To reduce signal interference, referring to Figure 4A , a monolithic element 20 for driving fingerprint sensing pixels, display pixels, and touch sensors is illustratively shown in accordance with various embodiments as will be exemplified below.

[0215] In Figure 4A , the monolithic element 20 includes a body 200, a first set of pads 210, and a second set of pads 220, all of which are disposed in the body 200. The first set of pads 210 is configured for coupling to the fingerprint sensing pixels (e.g., via a first GOA circuit) and includes a plurality of first pads for driving the fingerprint sensing pixels. The second set of pads 220 is configured for coupling to the panel (e.g., 9, 9A, or 9B) (e.g., via a second GOA circuit) and includes a plurality of second pads for driving the display pixels and the touch sensors. An axis AX (e.g., a center line across the body 200) defines the body 200 into a left portion PI and a right portion P2. In other words, the body 200 has the left portion PI and the right portion P2 with respect to the axis AX. The first set of pads 210 is disposed on at least one of the left portion PI and the right portion P2, and the second set of pads 220 is disposed on at least the other of the left portion PI and the right portion P2. As exemplified in Figure 4A , for example, the first set of pads 210 (or the second set of pads 220) can be disposed in a symmetric manner or a near-equal distribution manner on both the left portion PI and the right portion P2 so that traces (e.g., represented by T) can be connected to the first set of pads 210 and extend in a similar manner. Of course, the implementation of the monolithic element is not limited to the examples. As will be exemplified later, for example, in Figure 5B , Figure 13A , Figure 13B , Figure 13C, or any related embodiments, the first set of pads 210 can be arranged on at least one of the left portion P1 and the right portion P2, while the second set of pads 220 can be arranged on at least the other of the left portion P1 and the right portion P2. Moreover, the first set of pads 210 in the left portion P1 or the right portion P2 is separate from the second set of pads 220, and the second set of pads 220 in the left portion P1 or the right portion P2 is separate from the first set of pads 210. Accordingly, the pad arrangement of the single-chip element 20 (as will be exemplified later, for example, in Figure 5A , Figures 9A to 15 , or any related embodiments) facilitates that corresponding first and second sets of traces (which can be coupled to the plurality of fingerprint sensing pixels and the plurality of display pixels, respectively) do not cross each other, and can effectively achieve reduced signal interference.

[0216] In particular, in Figure 4A , the body 200 represents an integrated circuit of the single-chip element 20, which includes a display driver circuit 11, a touch driver circuit 12, and a fingerprint driver circuit 19 (or Figure 2 , as shown), where the body can also be referred to as a wafer body. Referring to Figure 4A and Figure 4B , Figure 4A , the first set of pads 210 represents a plurality of conductive (e.g., metallic) pads (e.g., pads 210_1, 210_2, through 210_N (where N > 1) as exemplified in Figure 4B , which are disposed on the body 200, Figure 4A , the plurality of traces T to the body 200 represents, for example, traces (or wires) T1, T2, through TN as exemplified in Figure 4B , which can be bonded so as to be electrically connectable to components or circuits in the single-chip element 20 for driving the plurality of fingerprint sensing pixels (as represented by the fingerprint driver circuit 19). Likewise, the second set of pads 220 are conductive (e.g., metallic) pads disposed on the body 200, to which traces (or wires) can be bonded so as to be electrically connectable to components or circuits in the single-chip element 20 for driving the plurality of display pixels and the plurality of touch sensors (as represented by the display driver circuit 11 and the touch driver circuit 12). In the following figures, for ease of illustration, the plurality of pads and traces will be shown as Figure 4A or Figure 4B , as shown.

[0217] In some embodiments of the single-chip element 20, Figure 4AThe body 200 in the above-mentioned embodiments (e.g., in a top view or a bottom view) has a rectangular shape with a first side S1, a second side S2, a left side S3, and a right side S4. As shown in Figure 4A , the second side S2 is parallel to the first side S1 and closer to the display panel than the first side S1 (as shown in Figure 1 , Figure 2 , or Figure 3 ). The left side S3 is on the left portion P1 and perpendicular to the first side S1 and the second side S2, while the right side S4 is on the right portion P2 and parallel to the left side S3. In addition, the axis AX intersects the first side S1 and the second side S2. The single-chip element 20 can be implemented to include the first set of pads (or the second set of pads) distributed on the left portion P1 and the right portion P2. In Figure 4A , although the first set of pads and the second set of pads are shown on the first side S1 approximately equally with respect to the axis AX, the first set of pads and the second set of pads can also be distributed on any position of the second side S2 or both the left and right sides with respect to the axis AX, as shown by the dashed rectangle in Figure 4A . Of course, implementations of the disclosed subject matter are not limited to the above-mentioned examples.

[0218] Referring to Figure 5A , an exemplary embodiment of the pad arrangement of a single-chip element based on Figure 4A is shown. As shown in Figure 5A , a single-chip element 20_1A includes a body 200_1A and a plurality of pads. An electronic module including the thin film 100_1A and the single-chip element 20_1A arranged on the thin film 100_1A can be implemented based on Figure 5A . The plurality of pads includes a first set of pads represented by G11_1A and G12_1A, and a second set of pads represented by G21_1A and G22_1A. The first set of pads G11_1A and G12_1A includes a plurality of first pads for driving the plurality of fingerprint sensing pixels, and the second set of pads G21_1A and G22_1A includes a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors. In Figure 5AIn some embodiments, the first group of pads G11_1A and G12_1A and the second group of pads G21_1A and G22_1A are arranged along a first side edge of the main body 200_1A, and the first group of pads G11_1A and the second group of pads G21_1A are arranged on a left portion of the main body 200_1A with respect to the axis AX, while the first group of pads G12_1A and the second group of pads G22_1A are arranged on a right portion of the main body 200_1A with respect to the axis AX. In an example, the single-chip element 20_1A is bonded on the thin film 100_1A in a COF manner. A plurality of first traces represented by T11_1A and T12_1A can be implemented to be connected to the first group of pads G11_1A and G12_1A, respectively, and extend to the plurality of left and right boundaries of the display panel 9_1A to drive a plurality of fingerprint scan lines FGL (partially exemplified) connected to a fingerprint sensing array associated with the display panel 9_1A (as partially exemplified in Figure 6B , Figure 6C , or Figure 6D ). A plurality of second traces represented by T21_1A and T22_1A can be implemented to be connected to the second group of pads G21_1A and G22_1A, respectively, and extend to the plurality of left and right boundaries of the display panel 9_1A to drive a plurality of TDDI scan lines TGL (partially exemplified) connected to a display pixel array and a touch sensing array associated with the display panel 9_1A (as partially exemplified in Figure 6B , Figure 6C , or Figure 6D ). In addition, alignment marks (e.g., cross-hairs) can be marked on the housing of the main body as in Figure 5A .

[0219] As exemplified in Figure 5A , the pad arrangement of the single-chip element 20_1A based on Figure 4A can facilitate the implementation of the plurality of traces and make the traces not cross each other. In addition, the pad arrangement of the single-chip element 20_1A based on Figure 4A can facilitate the implementation of the plurality of traces in a nearly symmetrical manner in terms of trace length and trace pattern, thus reducing the impact of uneven RC loading of the plurality of traces. As compared with an implementation manner as shown in Figure 3 in which traces need to cross each other, this not only can improve the ability to drive the plurality of signals of the plurality of GOA circuits on the plurality of left and right side edges of the panel, but also improve the performance of display, touch sensing, or fingerprint recognition. Also, as compared with an implementation manner as shown in Figure 3 , the pad arrangement of the single-chip element 20_1A based on Figure 4AThe pad arrangement of the single-chip element 20_1A can save manufacturing cost of additional processing of specific material needed to be utilized in layers corresponding to areas where the plurality of traces cross each other.

[0220] As shown in Figure 5A , in an example, the single-chip element 20_1A can further include a third group of pads 230A arranged, for example, along a second side edge of the body 200_1A for connection to the display panel 9_1A. For example, the third group of pads 230A are for driving data lines of the display panel 9_1A or receiving fingerprint sensing signals from fingerprint sensing lines of the display panel 9_1A, or coupled to touch sensing lines of the display panel 9_1A for receiving touch signals from the plurality of touch sensing lines. In Figure 5A , the plurality of traces T30A can be implemented to connect the third group of pads 230A to the display panel 9_1A through Film-on-glass (FOG) connections.

[0221] As shown in Figure 5A , in an example, the single-chip element 20_1A can further include a plurality of pads 240A arranged along the first side edge of the body 200_1A for connection to the flexible printed circuit 150_1A. In Figure 5A , the plurality of traces T40 can be implemented to connect the plurality of pads 240A to the flexible printed circuit 150_1A through Film-on-film (FOF) connections.

[0222] Referring to Figure 5B , another exemplary embodiment of a pad arrangement of a single-chip element based on Figure 4A is illustrated. As shown in Figure 5B , a single-chip element 20_5A includes a body and a plurality of pads. An electronic module including a film 100_5A and the single-chip element 20_5A arranged on the film 100_5A can be implemented based on Figure 5B . The plurality of pads include a first group of pads represented by G11_5A and a second group of pads represented by G21_5A. The first group of pads G12_5A includes a plurality of first pads for driving the plurality of fingerprint sensing pixels and the second group of pads G21_5A includes a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors. In Figure 5BIn an embodiment, the first group of pads G12_5A and the second group of pads G21_5A are arranged on a first side edge of the body 200_5A, and the second group of pads G21_5A is arranged on a left portion of the body with respect to the axis AX, while the first group of pads G12_5A is arranged on a right portion of the body with respect to the axis AX. In an embodiment, the single-chip component 20_5A is bonded on the thin film 100_5A in a COF manner. A plurality of second traces T21_5A can be implemented to be respectively connected to the second group of pads G21_5A and extend to the left boundary of the display panel 9_5A to drive a plurality of TDDI scan lines TGL (partial display) connected to a display pixel array and a fingerprint sensing array associated with the display panel 9_5A (as partially illustrated in any of the embodiments of the modification examples of Figure 6E or through Figure 6E ). A plurality of first traces T12_5A can be implemented to be respectively connected to the first group of pads G12_5A and extend to the right boundary of the display panel 9_5A to drive a plurality of fingerprint scan lines FGL (partial display) connected to a fingerprint sensing array associated with the display panel 9_5A (as partially illustrated in any of the embodiments of the modification examples of Figure 6E or through Figure 6E ). Also, in an embodiment, the single-chip component 20_5A can further include a third group of pads 230B arranged, for example, on a second side edge of the body of the single-chip component 20_5A for connection to the display panel 9_5A. For example, the third group of pads 230B are for driving data lines of the display panel 9_5A or receiving fingerprint sensing signals from fingerprint sensing lines of the display panel 9_5A, or coupled to touch sensing lines of the display panel 9_5A for receiving touch signals from the plurality of touch sensing lines. In Figure 5A , a plurality of traces T30A can be implemented to connect the third group of pads 230B to the display panel 9_5A through a film on glass (FOG) connection.

[0223] To show how the pad arrangement of the single-chip component affects the implementation of the architecture based on Figure 1 , the following specific embodiments are related to devices for display, touch sensing, and fingerprint sensing based on the architecture using FTDI IC (as illustrated in Figure 4A , Figure 5A , Figure 5B , etc.).

[0224] In some embodiments related to the electronic device, some embodiments illustrate the grouping and setting of TDDI and fingerprint (FPR) gate output (CGOUT) signals outputted through the FTDI IC via internal leads, external leads, and side leads on the FTDI IC for a display panel. Both pads for TDDI and fingerprint CGOUT signals can be coupled to TDDI GOA (gate driver on array) and FPR GOA on the display panel, then the plurality of scan lines of the display pixel array are driven through using the TDDI GOA while the plurality of scan lines of the plurality of FPR sensing pixels are driven through using FPR GOA. Further, some embodiments based on the pad setting of the single-chip element show the routing setting of pads for TDDI and fingerprint CGOUT signals on the display panel. Each embodiment of the grouping of the plurality of TDDI and FPR CGOUT signals is also provided.

[0225] Reference Figure 6A , a display panel including display pixels and fingerprint sensing pixels coupled to a single-chip element is illustrated according to embodiments. Taking the panel architecture illustrated in Figure 6A as an example, the active area (AA) of the display panel 9C can be divided into zones for a fingerprint sensing array including a plurality of fingerprint sensing pixels, for example 20 zones in the Y direction, while the number of the plurality of fingerprint sensing pixels in the X direction can be the same as the plurality of display pixels for each display row, wherein each or more display pixels can be equipped with a fingerprint sensing pixel. Figure 6B is a zoomed-in schematic view of some components (as represented by block B1 in Figure 6A or Figure 6B . As Figure 6A and Figure 6BAs shown in FIG. 1A, the single-chip element 20A disposed on the thin film 100A is configured to output a plurality of fingerprint driving signals (as represented by FPR_S1, FPR_S2) from the fingerprint driver circuit 29A of the single-chip element 20A to the gate on array (GOA) circuit GOA1 for the array of the plurality of fingerprint sensing pixels FS. The single-chip element 20A is also configured to output a plurality of display driving signals (or touch related signals) (as represented by TDDI_S1) from the TDDI circuit 21A of the single-chip element 20A to the GOA circuit GOA2 for the plurality of display pixels DP. Accordingly, the single-chip element 20A includes a first set of pads including a plurality of first pads for driving the plurality of fingerprint sensing pixels, and a second set of pads including a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors (as exemplified in any one of Figure 5A 、 Figures 9A to 12D 、 Figure 15 FIGS. 1A to 1C).

[0226] In Figure 6A and Figure 6B , for example, the block B1 disposed on the panel 9C includes a selection circuit (which can include a signal selector, switches, a multiplexer, a demultiplexer, or any combination thereof), which is schematically exemplified by switches SWR, SWG, SWB, and SW_FP. Figure 6B The selection circuit of the block B1 in FIG. 1A can be implemented as a combination of a data line selection circuit for selecting a data line from a set of data lines (such as a display data line or source line for a sub-pixel of one or more display pixels), and a fingerprint sensing line selection circuit for selecting at least one fingerprint sensing line. For example, the selection circuit including the plurality of switches SWR, SWG, SWB is disposed in the panel 9C for selecting data lines (as represented by SLR, SLG, and SLB) for a set of red sub-pixels (R), green sub-pixels (G), and blue sub-pixels for display pixels DP. The single-chip element 20A, for example, generates driving signals for driving the plurality of selected data lines, and generates selection signals TDDI_S2 (signals represented by TDDI_SWR, TDDI_SWG, TDDI_SWB, as exemplified in Tables 1 and 2 later) for controlling the plurality of switches SWR, SWG, SWB for selectively driving the plurality of data lines SLR, SLG, and SLB. Accordingly, for example, the second set of pads of the single-chip element 20A further includes a plurality of third pads for controlling the selection circuit. In this way, the number of traces and corresponding pads for electrical coupling or connection between the single-chip element 20A and the plurality of data lines of the panel 9C can be reduced.

[0227] Furthermore, in block B1, the switch SW_FP is used to select one of the plurality of fingerprint sensing lines to receive fingerprint sensing signals from fingerprint sensing pixels (e.g., represented by FS). In an example, the plurality of third pads further include pads for outputting a selection signal (e.g., a signal represented by TDDI_SW_FP, as exemplified later in Table 1 or Table 2) to control block B1 to use traces LS for receiving the fingerprint sensing signals, wherein the traces LS are connected to the pads of the third set of pads of the single-chip element 20A. In this example, the pads connected to the traces LS may be used to drive the plurality of data lines (e.g.,...) of the panel 9C. Figure 6B The fingerprint sensing signals from the fingerprint sensing line SL_FP of the panel 9C are selectively received at different times (SLR, SLG, SLB) as illustrated. In this way, if... Figure 6B The specific embodiments shown are applied to Figure 5A In this situation, Figure 5A The single-chip element 20_1A can be implemented to include a reduced number of third sets of pads 230A.

[0228] In the specific embodiments described above, as follows Figure 6B The configuration of the selection circuit (such as block B1) in the panel shown requires the single-chip element 20A to include the plurality of third pads for controlling the selection circuit (such as for outputting the plurality of selection signals TDDI_S2), and the routing of the corresponding traces is selective.

[0229] For example, the single-chip element can be implemented to drive the plurality of display pixels using a selection circuit, but directly receive the fingerprint sensing signal, such as... Figure 6C As shown, where Figure 6C The single-chip component 20A in the example needs to include the plurality of third pads (and corresponding traces) for controlling the selection circuit including the plurality of switches SWR, SWG, and SWB. In this example, Figure 6C The selection circuit in block B1 is a data line selection circuit.

[0230] In another example, the single-chip element could even be implemented to drive the plurality of display pixels and directly receive fingerprint sensing signals without using selection circuitry (such as block B1), as... Figure 6D As shown, where Figure 6D The single-chip element 20A in the above does not need to include the plurality of third pads (and corresponding traces).

[0231] The above examples (such as) Figures 6B to 6DAny of the embodiments shown can be used in any specific implementation of the single-chip element, as long as appropriate, for example... Figure 5A , Figures 9A to 16 , Figure 6E Any of the examples.

[0232] Moreover, refer to Figure 6A A display panel, including display pixels coupled to a single-chip element and fingerprint sensing pixels, is illustrated according to another specific embodiment, wherein it also employs... Figure 5A The panel architecture illustrated herein. As with... Figure 5B or Figure 6E Compared to the panel in the image (whose GOA circuits GOA1 and GOA2 are arranged on its left and right boundaries), Figure 5B The panel includes a GOA circuit GOA1 on the right edge of the panel for the plurality of fingerprint sensing pixels FS; and a GOA circuit GOA2 on the left edge of the panel for the plurality of display pixels DP. Accordingly, a single-chip element 20B disposed on the thin film 100A includes a first set of bonding pads, which includes a plurality of first bonding pads (such as...) for driving the plurality of fingerprint sensing pixels. Figure 13A , Figure 13B , Figure 13C ,or Figure 5B (as shown); and the second set of solder pads (as shown). Figure 13A , Figure 13B , Figure 13C ,or Figure 6E As shown in the diagram), it includes multiple second pads for driving the plurality of display pixels and the plurality of touch sensors. The monolithic element 20B may be implemented to include a fingerprint driver circuit 29B (as shown in the diagram). Figure 5B As shown in the figure, it is used via the plurality of first pads (as shown) connected to the fingerprint driver circuit 29B. Figure 13A , Figure 13B , Figure 13C ,or Figure 5B As shown in the diagram, multiple fingerprint driving signals (e.g., represented by FPR_S) are output. The single-chip element 20B may be implemented including a TDDI circuit 21B, which is used to output multiple fingerprint driving signals (e.g., as shown in the diagram) via the multiple second pads connected to the TDDI circuit 21B. Figure 13A , Figure 13B , Figure 13C ,or Figure 6E As shown in the figure, multiple display drive signals (or touch-related signals) are output (such as those represented by TDDI_S1).

[0233] Figure 6B The panel described herein includes selection circuitry (such as block B1), each of which is connected to... Figure 6Esimilar to that shown in FIG. 1 1 A. Accordingly, for example, the second set of pads of the single-chip element 20B further includes a plurality of third pads for controlling the selection circuit. In this way, the single-chip element 20B can be implemented to include a reduced number of third pads 230B for the purpose similar to that of the third set of pads 230B exemplified in FIG. 1 1 A. Further, a reduced number of traces T30B can be implemented to connect the third set of pads 230B to the display panel 9_5A. Figure 5B The number of traces and corresponding pads for electrical coupling or connection between the single-chip element 20B and the plurality of data lines of the panel in FIG. 1 1 A can be reduced. If the embodiment of FIG. 1 1 A is applied to the configuration shown in FIG. 1 1 B, for the purpose similar to that of the third set of pads 230B exemplified in FIG. 1 1 A, the single-chip element 20_5A can be implemented to include a reduced number of third pads 230B. Further, a reduced number of traces T30B can be implemented to connect the third set of pads 230B to the display panel 9_5A. Figure 6E The number of traces and corresponding pads for electrical coupling or connection between the single-chip element 20B and the plurality of data lines of the panel in FIG. 1 1 A can be reduced. If the embodiment of FIG. 1 1 A is applied to the configuration shown in FIG. 1 1 B, for the purpose similar to that of the third set of pads 230B exemplified in FIG. 1 1 A, the single-chip element 20_5A can be implemented to include a reduced number of third pads 230B. Further, a reduced number of traces T30B can be implemented to connect the third set of pads 230B to the display panel 9_5A. Figure 5A The number of traces and corresponding pads for electrical coupling or connection between the single-chip element 20B and the plurality of data lines of the panel in FIG. 1 1 A can be reduced. If the embodiment of FIG. 1 1 A is applied to the configuration shown in FIG. 1 1 B, for the purpose similar to that of the third set of pads 230B exemplified in FIG. 1 1 A, the single-chip element 20_5A can be implemented to include a reduced number of third pads 230B. Further, a reduced number of traces T30B can be implemented to connect the third set of pads 230B to the display panel 9_5A. Figure 6E The number of traces and corresponding pads for electrical coupling or connection between the single-chip element 20B and the plurality of data lines of the panel in FIG. 1 1 A can be reduced. If the embodiment of FIG. 1 1 A is applied to the configuration shown in FIG. 1 1 B, for the purpose similar to that of the third set of pads 230B exemplified in FIG. 1 1 A, the single-chip element 20_5A can be implemented to include a reduced number of third pads 230B. Further, a reduced number of traces T30B can be implemented to connect the third set of pads 230B to the display panel 9_5A.

[0234] In the above embodiments, the configuration of the selection circuit (e.g., the block B1) in the panel shown in FIG. 1 1 A requires the single-chip element 20B to include the plurality of third pads (e.g., for outputting the plurality of selection signals TDDI_S2) for controlling the selection circuit, and requires the corresponding traces to be arranged as needed. For example, the single-chip element can be implemented to drive the plurality of display pixels by using the selection circuit, but directly receive the fingerprint sensing signals, as shown in FIG. 1 1 B. In another example, the single-chip element can even be implemented to drive the plurality of display pixels, and directly receive the fingerprint sensing signals without using the selection circuit (e.g., the block B1), as shown in FIG. 1 1 C. The above examples (e.g., any one of FIGS. 1 1 A-C) can be adopted for any embodiment of the single-chip element, for example, any one of FIGS. 1 1 D, 1 1 E, or 1 1 F, or any modification of at least one embodiment of FIGS. 1 1 D, 1 1 E, or 1 1 F. For example, the single-chip element can be implemented by modifying any one of the embodiments of FIGS. 1 1 D, 1 1 E, or 1 1 F, such that either the first set of pads or the second set of pads is arranged on only any one of the left portion or the right portion, resulting in the embodiment similar to that shown in any one of FIGS. 1 1 G, 1 1 H, or 1 1 I. Of course, the implementation of the disclosed subject matter is not limited thereto. Figure 6C Figure 6D Figures 6B to 6E Figure 5B Figures 13A to 13C Figure 5B Figures 13A to 13C Figure 5A Figures 9A to 12D Figures 14 to 16 Figure 5A Figures 9A to 12D Figures 14 to 16 Figure 5B Figures 13A to 13C Figure 7

[0235] ​​​​​​​​​​​​​​​​More information about the structure and operation of the display panel and FTDI IC can be found in Annex I and Annex II of U.S. Provisional Patent Application No. 62 / 912,666, filed on October 9, 2019, which are incorporated herein by reference as part of the present application. However, implementations of the present application are not limited thereto.

[0236] Referring to Figure 8 and Figure 7 , the specific implementations of the circuit architecture and operation principle of the fingerprint sensing pixel are illustrated, for example, as follows.

[0237] In Figure 8 , the fingerprint sensing pixel includes a photodiode (PD), a switch, and a capacitor. In Figure 8 , the multiple operation cycles in the FTDI IC are exemplified and represented by blocks denoted by “Display”, “Touch”, and “Fingerprint” respectively for display pixel driving, touch sensor driving, and fingerprint sensing pixel driving. In addition, exemplary waveforms of the multiple corresponding control signals during each operation cycle for display, touch, and fingerprint are exemplified under the blocks representing the multiple operation cycles in Figure 6A , which will be illustrated by examples below and in Tables 1 and 2.

[0238] The following are examples of the operation of fingerprint sensing using the fingerprint sensing pixel.

[0239] In the first step, the fingerprint driver circuit (or fingerprint recognition circuit) for the fingerprint (FPR) section sequentially outputs a start pulse signal (e.g., FPR_STV[4:6], corresponding to the example shown in Figure 6A to the area in the panel where a finger press occurs (e.g., section 4-6 in Figure 6B ), and the reset signal FPR_GCK sequentially turns on the reset switch TS1 for each relevant section to reset the cathode of the corresponding photodiode PD to voltage VDD (e.g., 5V) and the anode to voltage Vbias (e.g., 0V).

[0240] In the second step, the reset signal FPR GCK turns off the switch TS1 (as a reset switch), and the voltage across the photodiode is 5V. When the light illuminates the fingerprint, it will generate reflected light. The reflected light illuminates the photodiode PD, thereby making the discharge rate of the photodiode faster. The reflected light of the fingerprint ridge is brighter, which makes the resistance of the photodiode PD smaller, and the discharge rate at the cathode of the photodiode PD is fast and the voltage of the cathode is small (e.g. about 2V). The reflected light of the fingerprint valley is darker than the fingerprint ridge, which makes the resistance of the photodiode PD larger, and the discharge rate at the cathode of the photodiode PD is slow and the voltage of the cathode is larger (e.g. about 3V).

[0241] In the third step, the select signal (or called as the acquire signal) FPR SEL sequentially turns on the switch TS2 of each segment, and the cathode voltage of the photodiode PD is transmitted to the fingerprint sensing line connected to the node (Vout). In the FPR segment, the TDDI SW FP signal of the plurality of TDDI CGOUT signals will output a signal at a high level (or asserted) to select the FTDI data line or the fingerprint sensing line function for fingerprint voltage sensing, and the remaining TDDI SWR / TDDI SWG / TDDI SWB signals of the plurality of TDDI CGOUT signals will be at a low level. At the same time, the analog front-end (AFE) circuit of the FTDI IC can read the corresponding sensing result Vout1.

[0242] In the fourth step, the reset signal FPR GCK turns on the switch TS1, the cathode of the photodiode is reset to VDD (e.g. 5V) again, and the 5V voltage is transmitted to the node Vout, so the AFE circuit can read the corresponding reset result Vout2.

[0243] In the fifth step, the fingerprint information is obtained by subtracting the sensing result Vout1 from the reset result Vout2.

[0244] The following provides various embodiments of the CGOUT signal of the FTDI IC (e.g. the single-chip element 20 or 20_1A).

[0245] Table 1 and Table 2 list FPR CGOUT signals and TDDI CGOUT signals, respectively, with their brief descriptions according to specific embodiments, wherein the symbol "_L" or "_R" in the Table 1 or Table 2 indicates that the signal can be implemented on the left side or right side of the single wafer element. Of course, the present application is not limited thereto. In any panel design, the plurality of signals provided by the FTDI wafer to the FPR GOA can be changed according to the design requirements, and the plurality of signals listed in Table 1 can be classified as the plurality of FPR CGOUT signals. Likewise, the plurality of signals provided by the FTDI wafer to the TDDI GOA can be changed according to the design requirements, and the plurality of signals listed in Table 2 can be classified as the plurality of TDDI CGOUT signals.

[0246] Table 1

[0247]

[0248]

[0249] Table 2

[0250]

[0251]

[0252] As exemplified in Table 1 and Table 2, the TDDI CGOUT signals and FPR CGOUT signals are grouped due to the fact that the operating voltages for the circuit components used for display, touch sensing, and fingerprint recognition on the panel belong to different categories. Classifying the CGOUT signals into different groups can facilitate the circuit design simplification and clear panel wiring. In other words, the traces for TDDI CGOUT and the FPR CGOUT signals are not interleaved or cross each other. In some implementations, the fingerprint sensing line selection circuit for FTDI can be integrated with the data line selection circuit for display data signals, and such integration (e.g., the selection circuit in Block B1 in Figure 6B Table 2) will bring the advantage of reduced number of pinout or pad requirements for electrical connections in the panel design, in the circuit manufacturing and design, and in the FTDI. In this way, for the selection circuit integration, the TDDI_SW_FP signal can be classified as the TDDI CGOUT voltage signal category and placed in the TDDI CGOUT signal group.

[0253] Further, any of the plurality of TDDI CGOUT and FPR CGOUT signal groups can be further classified into sub-groups according to design requirements. The plurality of traces (etc.) of the plurality of signals in the sub-groups are adjacent to each other and do not cross the plurality of traces (etc.) of the plurality of signals of other sub-groups, but the present disclosure is not limited thereto. In some embodiments, each of the plurality of TDDI CGOUT and FPR CGOUT signal groups can be divided into at least two sub-groups (e.g., left and right sub-groups) that provide (e.g., as illustrated in Figures 9A to 12D FIG. 1) the GOA on the left and right side edges of the panel, respectively. Preferably, the corresponding pads for the left and right sub-groups can be arranged along the left and right side edges of the FTDI IC, respectively.

[0254] In some embodiments, in addition to the TDDI CGOUT and FPR CGOUT, the signals output to the panel and the signals output to the FTDI IC can be further divided into other signal groups (shown or classified as other ILB pads (or other ILB signal groups) in Figures 9A to 12D FIG. 2). In a similar manner as for the above-mentioned signal groups, the plurality of traces (and pads) for another signal group can be arranged adjacent to each other and do not cross the plurality of traces of the plurality of pads of the two groups of TDDI CGOUT and FPR CGOUT. For example, some or all of the plurality of pads for TDDI power and / or FPR power can be classified as other ILB pads. That is, the signals for power can be considered to belong to the group of other ILB pads shown in Figure 1 FIG. 2. Further, a separate signal group for power helps in the electrical connection of a capacitor on a flexible printed circuit (FPC).

[0255] The above Tables 1 and 2 are merely examples. In another example, the FPR CGOUT signals can further include one or more signals for power supply (e.g., high and low voltage signals provided to the FPR GOA, and bias voltage or voltage source signals provided to the FPR sensor), where the pads and traces for the signals for power supply can be arranged adjacent to each other and do not cross the traces of the left and right subgroups of the FPR CGOUT signals. Similarly, the TDDI CGOUT signals can include one or more signals for power supply (e.g., the high and low voltage signals provided to the TDDI GOA, and bias voltage or voltage source signals provided to the FPR sensor), where the pads and traces for the signals for power supply can be arranged adjacent to each other and do not cross the traces of the left and right subgroups of the TDDI CGOUT signals.

[0256] In some embodiments, some or all of the pads for signals for TDDI power supply and / or for FPR power supply can be classified as other ILB pads. In other embodiments, the pads for signals for power supply can be classified as a subgroup of the TDDI CGOUT group or a subgroup of the FPR CGOUT group.

[0257] In some embodiments, the left and right subgroups of the FPR CGOUT signals can be further subdivided into at least one of the following subgroups, e.g., GOA SEL (e.g., the acquisition signals included in Table 1), GOA Reset (e.g., the reset signals in Table 1). In embodiments, since any GCK (e.g., FPR_GCK1, FPR_GCK2, FPR_GCK3) of the FPR CGOUT signals is transmitted to the gate clock shift register circuit on the same section of the panel, the GCK CGOUT signals can also be classified as the same reset signal subgroup, where the pads and traces of the GCK CGOUT signals can be arranged adjacent to each other and do not cross the traces of other signal subgroups (e.g., acquisition signals). Similarly, the left and right subgroups of the TDDI CGOUT signals can be subdivided into at least one of the following subgroups: a subgroup of the selection signals (e.g., as depicted in Table 2), or a subgroup of other control signals (e.g., other signals as depicted in Table 2), where the pads and traces for these subgroups can be configured to be adjacent to each other without crossing the pads and traces for other subgroups (e.g., the signals of the control signal subgroup).

[0258] In other words, the plurality of signals of the plurality of FTDI dies can be divided into at least two groups (e.g. FPR CGOUT signals and TDDI CGOUT signals) or more groups according to design requirements, and the plurality of signals in each group can be adjacent to each other and the pads and traces are not interleaved with the plurality of signals of another group. The plurality of signals in each group can be further subdivided into at least one subgroup according to design requirements (e.g. the plurality of voltage ranges of the plurality of signals, functional properties, and locations of corresponding GOA circuits on the panel), and the plurality of pads (e.g. the first set of pads) and signal traces of the subgroup can be configured adjacent to each other and not interleaved (or crossed) with the plurality of pads and traces of signals of other subgroups.

[0259] Through the discussion and various embodiments of the above-mentioned signal grouping, it should be understood that under the architecture shown in Figure 4A , the pad assignment for the first set of pads and the second set of pads based on the embodiments exemplified in Figure 1 is technically helpful for the benefits of trace planning and manufacturing, signal interference reduction, and trace RC load balancing. Overall, such pad assignment can promote the performance of display, touch sensing, and fingerprint sensing. Moreover, the industry can enjoy the pad assignment provided by the single-die element, and electronic products such as single-die elements, electronic modules based on the single-die elements, and computing devices based on the electronic modules can be easily and effectively implemented and developed accordingly.

[0260] The following provides various pad assignments for the first set of pads and the second set of pads, and manufacturing techniques (e.g. COF or COG) for single-die elements based on the architecture of Figure 5A . For example, as shown in Figure 5A , 5BIn diagrams such as 9A-17, single-crystal components (such as 20_1A-20_1D, 20_2A-20_2D, 20_3A-20_3D, 20_4A-20_4D, 20_5A-20_5D, 30A-30C, or 40) include main bodies (such as 200_1A-200_1D, 200_2A-200_2D, 200_3A-200_3D, 200_4A-200_4D, 200_5A-200_5D, or 300A) One of -300C), single-chip components are arranged on a panel or thin film and coupled between the panel and the flexible printed circuit; the panel (e.g., a portion of the example display panel) is represented by a block corresponding to one of, for example, symbols 9_1A-9_1D, 9_2A-9_2D to 9_5A-9_5D, and the flexible printed circuit (FPC) (e.g., a portion thereof) is represented by another block corresponding to one of, for example, symbols 150_1A-150_1D to 150_5A-150_5D. Furthermore, the third set of pads may also be arranged in any manner (e.g., with...) Figure 5B or Figures 9A to 17 The third set of pads for the single-wafer element 20_1A or 20_5A shown in the diagram are in a similar manner. Figure 5A As shown in any specific embodiment of the single-wafer element. As in the following... Figure 5B , Figures 9A to 12D , Figures 13A to 13C , Figure 1 In the various specific embodiments illustrated herein, for the sake of simplicity, the specific pad assignments for TDDI GOA and FPR GOA are not shown.

[0261] Based on Figure 4A and Figures 9A to 9C In some specific embodiments, such as Figure 4A , Figure 5A As illustrated, all the first group of pads and all the second group of pads are along the lower side of the single-wafer element (or as shown in the example). Figure 9A The first side (S1) is arranged in the middle.

[0262] As an example of using COF packaging, refer again Figure 9B The single-chip element 20_1A bonded to the thin film 100_1A has all the first set of pads G11_1A to G12_1A for fingerprint sensing arranged along the first side (or lower lateral side), and the second set of pads G21_1A to G22_1A for display and touch sensing (such as TDDI).

[0263] In another example of using COF packaging, refer to Figure 9CThe single crystal die 20_1B bonded on the thin film 100_1B contains all the first set of pads G11_1B to G12_1B for fingerprint sensing arranged along the first side (or lower lateral side), and the second set of pads G21_1B to G22_1B for display and touch sensing (e.g. TDDI). A plurality of first traces represented by T11_1B and T12_1B can be implemented to connect to the first set of pads G11_1B and G12_1B respectively, and extend to the plurality of left and right borders of the display panel 9_1B to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_1B. A plurality of second traces represented by T21_1B and T22_1B can be implemented to connect to the second set of pads G21_1B and G22_1B respectively, and extend to the plurality of left and right borders of the display panel 9_1B to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a touch sensing array associated with the display panel 9_1B.

[0264] In an example using COG packaging, refer to Figure 9B The single crystal die 20_1C bonded on the glass site 90_1C of the display panel 9_1C contains all the first set of pads G11_1C to G12_1C for fingerprint sensing arranged along the first side (or lower lateral side), and the second set of pads G21_1C to G22_1C for display and touch sensing (e.g. TDDI). On the glass site 90_1C, a plurality of first traces T11_1C and T12_1C can be implemented to connect to the first set of pads G11_1C and G12_1C respectively, and extend to the plurality of left and right borders of the display panel 9_1C to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_1C. A plurality of second traces T21_1C and T22_1C can be implemented to connect to the second set of pads G21_1C and G22_1C respectively, and extend to the plurality of left and right borders of the display panel 9_1C to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a touch sensing array associated with the display panel 9_1C.

[0265] In another example using COG packaging, refer to Figure 5AThe single-chip element 20_1D bonded on the glass site 90_1D of the display panel 9_1D includes all the first set of pads G11_1D to G12_1D for fingerprint sensing arranged along the first side (or lower lateral side), and the second set of pads G21_1D to G22_1D for display and touch sensing (e.g. TDDI). On the glass site 90_1D, a plurality of first traces T11_1D and T12_1D can be implemented to connect to the first set of pads G11_1D and G12_1D, respectively, and extend to the plurality of left and right borders of the display panel 9_1D. A plurality of second traces T21_1D and T22_1D can be implemented to connect to the second set of pads G21_1D and G22_1D, respectively, and extend to the plurality of left and right borders of the display panel 9_1D. For simplicity, the plurality of detailed information and Figure 9B similar are not repeated.

[0266] In the examples shown in Figure 9A and Figure 9C , the first set of pads is closer to the axis AX than the second set of pads. In the examples shown in Figure 5A and Figures 9A to 9C , the second set of pads is closer to the axis AX than the first set of pads. In some examples, the first set of pads and the second set of pads in any of Figure 1 , Figure 4A may be inner wire-bonded pads. However, the present disclosure is not limited thereto.

[0267] In some embodiments based on Figures 10A to 10D and Figure 4A , as exemplified in Figure 10A , all the first set of pads and all the second set of pads are arranged along the higher side of the single-chip element (or the second side S2 in Figure 10B ).

[0268] As an example of using COF packaging, refer to Figure 10CThe single-chip element 20_2A bonded on the thin film 100_2A contains all the first set of pads G11_2A to G12_2A for fingerprint sensing and the second set of pads G21_2A to G22_2A for display and touch sensing (e.g. TDDI) arranged along the second side edge (or higher lateral side edge). A plurality of first traces T11_2A and T12_2A can be implemented to connect to the first set of pads G11_2A and G12_2A respectively, and extend to the plurality of left and right boundaries of the display panel 9_2A to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_2A. A plurality of second traces T21_2A and T22_2A can be implemented to connect to the second set of pads G21_2A and G22_2A respectively, and extend to the plurality of left and right boundaries of the display panel 9_2A to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a touch sensing array associated with the display panel 9_2A.

[0269] In another example of using COF packaging, refer to Figure 10D The single-chip element 20_2B bonded on the thin film 100_2B contains all the first set of pads G11_2B to G12_2B for fingerprint sensing and the second set of pads G21_2B to G22_2B for display and touch sensing (e.g. TDDI) arranged along the second side edge.

[0270] In an example of using COG packaging, refer to Figure 10B The single-chip element 20_2C bonded on the glass site 90_2C of the display panel 9_2C contains all the first set of pads G11_2C to G12_2C for fingerprint sensing and the second set of pads G21_2C to G22_2C for display and touch sensing (e.g. TDDI) arranged along the second side edge.

[0271] In another example of using COG packaging, refer to Figure 10C The single-chip element 20_2D bonded on the glass site 90_2D of the display panel 9_2D contains all the first set of pads G11_2D to G12_2D for fingerprint sensing and the second set of pads G21_2D to G22_2D for display and touch sensing (e.g. TDDI) arranged along the second side edge.

[0272] In Figure 10D (or Figures 10B to 10D , Figure 10AIn this configuration, multiple first traces T11_2B and T12_2B (or T11_2C and T12_2C; T11_2D and T12_2D) can be implemented to connect the first set of pads G11_2B and G12_2B (or G11_2C and G12_2C; G11_2D and G12_2D) to the panel 9_2B (or 9_2C, 9_2D), respectively. Multiple second traces T21_2B and T22_2B (or T21_2C and T22_2C; T21_2D and T22_2D) can be implemented to connect the second set of pads G21_2B and G22_2B (or G21_2C and G22_2C; G21_2D and G22_2D) to the panel 9_2B (or 9_2C, 9_2D), respectively. For simplicity, regarding... Figure 10C The detailed information provided is similar to the aforementioned examples and will not be repeated here.

[0273] In such Figure 10B and Figure 9C In the various examples shown, the first set of solder pads is closer to the axis AX than the second set of solder pads. In, as... Figures 10A to 10D and Figure 5A In the various examples shown, the second set of solder pads is closer to the axis AX than the first set of solder pads. In some examples, such as Figures 9A to 9C The first and second groups of pads in either of them may be external-lead-bonding (OLB) pads. As with Figures 10A to 10D , Figure 1 Compared to those in the middle, shorter wiring can achieve... Figure 4A The present invention is not limited to the examples shown.

[0274] Based on Figures 11A to 11D and Figure 4A In some specific embodiments, such as Figure 11A As illustrated, all the first group of pads and all the second group of pads are along the lower side of the single-wafer element (or as shown in the example). Figure 11B The first side (S1) is arranged in the middle, and the traces connected to the first set of pads or the second set of pads can be routed from the shorter side (such as the left side (S3) and the right side (S4)). Figure 11C and Figure 11D Using COF settings, while Figure 11B and Figure 11D Use COG settings. Figure 11A or Figure 11CIn this context, the second set of pads G21_3B to G22_3B or G21_3D to G22_3D (e.g., TDDICGOUT) are ILB pads of the single-chip element 20_3B or 20_3D that are closer to the axis AX than the first set of pads G11_3B to G12_3B or G11_3D to G12_3D (e.g., FPR CGOUT). The plurality of traces T11_3B to T12_3B or T11_3D to T12_3D of the first group of solder pads G11_3B to G12_3B or G11_3D to G12_3D are routed from the plurality of shorter sides (such as the left side S3 and the right side S4) to the display panel via line-on-film (LOF) lines or line-on-glass (LOG) lines, while the plurality of traces T21_3B to T22_3B or T21_3D to T22_3D of the second group of solder pads G21_3B to G22_3B or G21_3D to G22_3D are routed from the lower side (such as the first side S1). Figure 1 or Figures 12A to 12D In this context, the first set of pads G11_3A to G12_3A or G11_3C to G12_3C (e.g., FPRCGOUT) are ILB pads of the single-chip element 20_3A or 20_3C that are closer to the axis AX than the second set of pads G21_3A to G22_3A or G21_3C to G22_3C (e.g., TDDICGOUT). The plurality of traces T21_3A to T22_3A or T21_3C to T22_3C of the second group of pads G21_3A to G22_3A or G21_3C to G22_3C are routed to the display panel from the plurality of shorter sides (such as the left side S3 and the right side S4) via thin-film overlay (LOF) lines or glass overlay (LOG) lines, while the plurality of traces T11_3A to T12_3A or T11_3C to T12_3C of the first group of pads G11_3A to G12_3A or G11_3C to G12_3C are routed from the lower side (such as the first side S1). This allows the panel manufacturer the flexibility to choose whether to route the plurality of traces from the plurality of longer sides of the wafer (such as FTDIIC) or the plurality of traces from the plurality of shorter sides to the display panel.

[0275] Based on Figure 12A And in some specific embodiments of the single-chip element described in Figure 4, such as Figure 12B As illustrated, all the first group of pads are arranged along the left side S3 and the right side S4, and all the second group of pads are arranged along the left side S3 and the right side S4.

[0276] Figure 12C and Figure 12D with COF setup, Figure 12A and Figure 12C with COF setup. The first group of pads G11_4A to G12_4A, G11_4B to G12_4B, G11_4C to G12_4C, or G11_4D to G12_4D (as FPR CGOUT) and the second group of pads G21_4A to G22_4A, G21_4B to G22_4B, G21_4C to G22_4C, or G21_4D to G22_4D (as TDDI CGOUT) are pads from the shorter sides of the single wafer component 20_4A, 20_4B, 20_4C, or 20_4D. In Figure 12B or Figure 12D , the second group of pads (as TDDI CGOUT) is configured close to the OLB pads, and the first group of pads (as FPR CGOUT) is configured close to the ILB pads. In Figure 12A or Figure 12B , the second group of pads is configured close to the ILB pads, and the first group of pads is configured close to the OLB pads. In Figure 12C (or ​ , ​ , or FIG. 12D ), a plurality of first traces T11_4A and T12_4A (or T11_4B, T12_4B; T11_4C, T12_4C; T11_4D, T12_4D) can be implemented to connect the first group of pads G11_4A and G12_4A (or G11_4B, G12_4B; G11_4C, G12_4C; G11_4D, G12_4D) to the panel 9_4A (or 9_4B, 9_4C, 9_4D) respectively. A plurality of second traces T21_4A and T22_4A (or T21_4B, T22_4B; T21_4C, T22_4C; T21_4D, T22_4D) can be implemented to connect the second group of pads G21_4A and G22_4A (or G21_4B, G22_4B; G21_4C, G22_4C; G21_4D, G22_4D) to the panel 9_2B (or 9_2C, 9_2D) respectively.

[0277] In some embodiments of the single wafer component based on FIG. 1 and FIG. 4A , all the first group of pads are arranged along one of the first side S1 and the second side S2 (as FIG. 5A , FIGS. 9A-9C ; FIGS. 10A-10D(as illustrated in the example), and all the second group of pads are arranged along both the left side S3 and the right side S4 (as shown in the example). FIGS. 12A-12D exemplified in ).

[0278] Based on FIG. 1 and FIG. 4A In some specific embodiments of the single-chip element, all the first set of pads are arranged along both the left side S3 and the right side S4 (e.g., FIGS. 12A-12D (as illustrated in the example), and all the second group of pads are arranged along one of the first side S1 and the second side S2 (e.g.) FIG. 5A , FIGS. 9A-9C ; FIGS. 10A-10D exemplified in ).

[0279] Of course, the invention disclosed herein is not limited to the plurality of examples described above. As will be exemplified below, single-chip devices (e.g., based on the architectures of single-chip devices 10, 10A, or 20) can be implemented. FIGS. 13A-13C The single-chip components 20_5B, 20_5C, and 20_5D in the example. In particular, such as... FIG. 13A , FIG. 13B , FIG. 13C (and as exemplified above) FIG. 5B As illustrated in [example description], the first set of pads for the single-chip device may be disposed on at least one of the left and right portions, while the second set of pads may be disposed on at least the other of the left and right portions. Furthermore, at least one group of the first and second sets of pads may be disposed on only one of the left and right portions. In this manner, the following provides further specific embodiments of the pad arrangement for the single-chip device.

[0280] In some specific embodiments, such as FIG. 13A (or FIG. 5B As shown in the diagram, the plurality of first solder pads are arranged on only one of the left and right portions, while the second set of solder pads is arranged on only the other of the left and right portions. FIG. 13A As shown, the first set of solder pads (e.g., G11_5B) is arranged only in the left portion, while the second set of solder pads (e.g., G22_5B) is arranged only in the right portion.

[0281] In addition, FIG. 13A (or FIG. 5B) the single wafer element 20_5B (or 20_5A) is bonded on the thin film 100_5B (or 100_5A) in a COF manner. A plurality of first traces denoted by T11_5B (or T12_5A) can be implemented to be connected to the first group of pads G11_5B (or G12_5A) and extend to the left border (or right border) of the display panel 9_5B (or 9_5A) to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_5B (or 9_5A). In FIG. 13A (Or FIG. 5B ) a plurality of second traces denoted by T22_5B (or T21_5A) can be implemented to be connected to the second group of pads G22_5B (or G21_5A) respectively and extend to the right border (or left border) of the display panel 9_5B (or 9_5A) to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a fingerprint sensing array associated with the display panel 9_5B (or 9_5A).

[0282] In some embodiments, the first group of pads is arranged in only one of the left and right sites, while the second group of pads can be arranged in both the left and right sites. In an example, as shown in FIG. 13B the first group of pads (e.g., G11_5C) is arranged in only the left site, while the second group of pads (e.g., G21_5C and G22_5C) is arranged in both the left and right sites. In another example, as shown in FIG. 13C the first group of pads (e.g., G12_5D) is arranged in only the right site, while the second group of pads (e.g., G21_5D and G22_5D) is arranged in both the left and right sites.

[0283] Further, as shown in FIG. 13B (Or FIG. 13CAs shown in FIG. 5C (or FIG. 5D), the single wafer element 20_5C (or 20_5D) is bonded on the thin film 100_5C (or 100_5D) in a COF manner. A plurality of first traces denoted by T11_5C can be implemented to be connected to the first set of pads G11_5C (or G12_5D) respectively, and extend to the left border (or right border) of the display panel 9_5C (or 9_5D) to drive a plurality of fingerprint scan lines FGL connected to a fingerprint sensing array associated with the display panel 9_5C (or 9_5D). A plurality of second traces denoted by T21_5C and T22_5C (or T21_5D and T22_5D) can be implemented to be connected to the second set of pads G21_5C and G22_5C (or G21_5D and G22_5D) respectively, and extend to the plurality of right and left borders of the display panel 9_5C (or 9_5D) to drive a plurality of TDDI scan lines TGL connected to a display pixel array and a fingerprint sensing array associated with the display panel 9_5C (or 9_5D).

[0284] Similar to the examples shown in FIG. 5A or FIG. 5B , in some embodiments, the first set of pads is arranged in only one of the left and right locations, while the second set of pads can be arranged in both the left and right locations.

[0285] In some embodiments, a single wafer element can be implemented by modifying the embodiments of FIG. 5A , FIGS. 9A-12D , FIGS. 14-16 so that either the first set of pads or the second set of pads is arranged on only one of the left or right locations, resulting in embodiments similar to those shown in FIG. 5B , FIGS. 13A-13C . Of course, the implementations disclosed herein are not limited to this.

[0286] Optionally, the first set of pads is closer to the axis than the second set of pads, as shown in FIG. 13B or FIG. 13C .

[0287] Optionally, the second set of pads is closer to the axis than the first set of pads, which can also be implemented by using the examples shown in FIG. 13B or FIG. 13C .

[0288] Although in FIG. 13B or FIG. 13CIn various embodiments shown in FIGS. 1-4, the first set of pads and the second set of pads are exemplified at locations close to the first side (e.g., the lower side of the single-chip component), but the implementation of the single-chip component is not limited to the above-mentioned examples. As similar to various embodiments in FIG. 5A or FIGS. 9A-12D , the single-chip component can be implemented in any manner such that the first set of pads is in at least one of the left portion and the right portion, and the second set of pads is in at least the other of the left portion and the right portion, so that no crossing occurs on the plurality of traces coupled to the plurality of display pixels, the plurality of fingerprint sensing pixels, and the touch sensor between the first set of pads and the second set of pads. In this regard, in some embodiments, the single-chip component shown in any of FIG. 5A , FIGS. 9A-12D may be modified such that the first set of pads is arranged in only one of the left portion or the right portion. Further, in some embodiments, the single-chip component shown in any of FIG. 3 , FIG. 5A may be modified such that the second set of pads is arranged in only one of the left portion or the right portion.

[0289] Thus, as compared to the possible implementations described in FIG. 5B , the above-mentioned embodiments regarding the pad arrangement (e.g., exemplified in any of FIGS. 9A-13C , FIG. 1 , FIG. 1 , or related embodiments) can facilitate the corresponding traces to be configured in an appropriate manner (e.g., first set of pads and second set of pads in either portion), or in a nearly symmetrical manner for one type of pad (e.g., first set of pads or second set of pads), or in a nearly symmetrical manner for both the first set of pads and the second set of pads, and the traces do not cross each other. Accordingly, signal interference reduction for touch sensing and fingerprint sensing can be achieved. Further, manufacturing cost can be reduced because specific materials and additional processes utilized for reducing the effect of trace crossing each other can be saved.

[0290] The following further provides various embodiments of a single-chip component based on the architecture of FIG. 6B with pad allocation in terms of FPR CGOUT signals and TDDI CGOUT signals.

[0291] In an operation apparatus employing a single-chip component based on the architecture of FIG. 6C , the panel of the operation apparatus can generally pass data lines selection circuitry, fingerprint sensing lines selection circuitry, or both (e.g., as shown in any of FIG. 6E , FIG. 14 orFIG. 15 The illustrated block B1) is implemented with the boundaries typically adjacent to the single wafer elements. To avoid the possibility of routing for TDDI CGOUT signals across the plurality of routings on the panel, the plurality of routings for TDDI SWR / TDDI SWG / TDDI SWB / TDDI SW_FP signals can be implemented as close to the center of the panel as possible. Referring to FIG. 6B and FIG. 6C , the single wafer elements are coupled to the panel which includes, among other components, a plurality of selection circuits SC (which can each be implemented as shown in FIG. 6E , FIG. 14 , or FIG. 4A the plurality of switches SWR / SWG / SWB / SW_FP).

[0292] As illustrated in FIG. 14 , for example, a single wafer element 30A based on the architecture of the single wafer element 10 or 10A and the pad arrangement as illustrated in FIG. 14 includes a first set of pads, a second set of pads, and a third set of pads.

[0293] The first set of pads can include a plurality of first pads P11A and P12A. For example, the first set of pads and the second set of pads are arranged on both the left and right sites (e.g., on the lower or first side), while the third set of pads is arranged along the upper or second side. As shown in FIG. 6B , the first set of pads including the plurality of first pads P11A and P12A is closer to the axis AX than the second set of pads including the plurality of second pads P21A and P22A and the plurality of third pads P31A and P32A. For example, the first set of pads includes the plurality of first pads P11A for the FPR STV, FPR GCK1, FPR GCK2, FPR GCK3, FPR SEL1, FPR SEL2, FPR SEL3, FPR UD, and / or FPR UDB signals for the left site, and further includes the plurality of first pads P12A for the same respective signals for the right site, as illustrated in Tables 1 and 2.

[0294] The second set of pads can include a plurality of second pads P21A and P22A and a plurality of third pads P31A and P32A. The second set of pads includes the plurality of second pads P21A for the left side TDDI_STV, TDDI_UD, TDDI_UDB, TDDI_GCK1, TDDI_GCK2, TDDI_RST signals and further includes the plurality of second pads P22A for the right side corresponding to the same individual signals as above, as exemplified in Tables 1 and 2. The second set of pads can further include the plurality of third pads P31A for outputting control signals, such as the left side TDDI_SWR, TDDI_SWG, TDDI_SWB, and / or TDDI_SW_FP signals and further includes the plurality of corresponding third pads P32A for the right side same respective signals, as exemplified in Tables 1 and 2. In FIG. 6E some embodiments, the plurality of third pads P31A, P32A (such as ILB pads) are configured to be coupled to the plurality of selection circuits SC of the panel via traces T31A, T32A, respectively.

[0295] The third set of pads includes a plurality of fourth pads (such as P4A). In some embodiments, the third set of pads includes the plurality of fourth pads P4A for driving the plurality of data lines or receiving fingerprint sensing signals from the plurality of fingerprint sensing lines, or coupled to a plurality of touch sensing lines of the panel for receiving touch signals from the plurality of touch sensing lines.

[0296] In embodiments, the plurality of fourth pads P4A includes a first sub-set of pads (such as P41A) for driving the plurality of data lines and receiving fingerprint sensing signals from the plurality of fingerprint sensing lines in a time-division manner and a second sub-set of pads (such as P42A) configured for coupling to the plurality of touch sensing lines of the panel for receiving touch signals from the plurality of touch sensing lines. For example, with reference to FIG. 8 or FIG. 14 and FIG. 8 、 FIG. 8 one of the first sub-set of pads connected to the trace LS is configured to transmit the plurality of TDDI_SWR, TDDI_SWG, TDDI_SWB signals (such as FIG. 8 selectively established at different times during time intervals for display on the left side and the same pad connected to the trace LS is configured to transmit the plurality of related signals (such as FIG. 6CThe selective establishment shown on the right side) during the time period for fingerprint (FP) receives a fingerprint sensing signal from the fingerprint sensing line. Furthermore, during the time period for touchpad (TP) (as shown on the right side), the fingerprint sensing signal is received from the fingerprint sensing line. FIG. 14 As illustrated in the example, the second subgroup of pads (such as P42A) is configured to receive touch signals from the plurality of touch sensing lines of the panel.

[0297] In another example, the first subgroup of pads (such as P41A) is configured to drive the plurality of data lines in a time-division manner, while the second subgroup of pads receives touch signals from the plurality of touch sensing lines. For example, refer to... FIG. 8 , FIG. 14 The first subgroup of pads connecting trace LS uses selective transmission of the multiple TDDI_SWR, TDDI_SWG, and TDDI_SWB signals (e.g., ...) through the selection circuit of block B1 at different times. FIG. 15 The left side is selectively established.

[0298] In some specific embodiments, the first subgroup of solder pads and the second subgroup of solder pads are alternately arranged on the body. For example, such as FIG. 14 or FIG. 5B As shown, the first subgroup pads P41A (or P41B) and the second subgroup pads P42A (or P42B) are alternately arranged on the body of the single-wafer element 30A (or 30B).

[0299] Regarding the third group of solder pads FIGS. 13A-13C The aforementioned examples can be modified to be adapted for use with respect to FIG. 6E , FIG. 6E The plurality of single-wafer elements shown FIG. 15 or FIG. 15 In the case of the modified example, it is implemented in the same way.

[0300] like FIG. 14 As illustrated, for example, a single-chip element 30B (such as based on said single-chip element 10 or 10A) includes a first set of pads, which includes a plurality of first pads P11B and P12B; a second set of pads, which includes a plurality of second pads P21B and P22B and a plurality of third pads P31B and P32B; and a third set of pads, which includes a plurality of fourth pads P4B. FIG. 15 As shown, FIG. 15 The specific embodiments described above are similar to FIG. 15 The difference is FIG. 14In the specific embodiment described above, the plurality of third solder pads P31B and P32B are closer to the axis AX than the plurality of second solder pads P21B and P22B and the plurality of first solder pads P11B and P12B. For example, in FIG. 15 In the specific embodiments described above, the plurality of first solder pads P11B and P12B, the plurality of second solder pads P21B and P22B, the plurality of third solder pads P31B and P32B, and the plurality of fourth solder pads P4B may include pads for use with, for example, FIG. 14 The specific embodiments illustrated above use pads for signals of the same type as their counterparts. In some implementations, the multiple traces of the second group of pads, including the multiple second pads P21B and P22B and the multiple third pads P31B and P32B, may be routed to the display panel from the multiple shorter sides (such as the left and right sides) via thin-film overlay (LOF) lines or glass overlay (LOG) lines. FIG. 15 In this configuration, the multiple traces T31B and T32B coupled to the multiple third pads P31B and P32B are used to control the multiple selection circuits SC. In this way, the panel manufacturer can flexibly choose whether to route the multiple traces from the multiple longer sides of the chip (such as FTDIIC) or the multiple traces from the multiple shorter sides to the display panel.

[0301] exist FIG. 14 and FIG. 15 In the aforementioned embodiments, the SW_FP signal belongs to the TDDICGOUT signal group, and the pads for the SW_FP signal are correspondingly included in the second group of pads. However, the present invention is not limited to these embodiments. In some other embodiments, the SW_FP signal may belong to the FPRCGOUT signal group, and in this case, the pads for the SW_FP signal are included in the first group of pads. Preferably, but not limited to, the pads and traces for the SW_FP signal are located close to the pads and traces for the TDDI_SWR, TDDI_SWG, and TDDI_SWB signals in the TDDI group.

[0302] In some other embodiments, such as the one entitled "A driver chip for fingerprint identification and touch display, a display system and a driving method" (as Attachment 3 of U.S. Provisional Patent Application No. 62 / 912,666, filed on October 9, 2019, and as one of the files of the present application), the SW_FP signal can not be implemented, thus the TDDI_SW_FP is optional and removable as needed.

[0303] In addition, any pads for FPR CGOUT or TDDI CGOUT signal groups, such as the first group of pads or the first group of pads, can be located on the higher longer side, the lower longer side, the shorter side, and the higher / lower longer side and the shorter side of the single-chip element. Even the pads for any TDDI CGOUT and FPR CGOUT can be located on different sides. For example, some pads are located on the higher longer / shorter side, and some pads are located on the shorter side; or some pads are located on the higher longer side or the shorter side and are shorted with the shorter side, some are on the higher / lower longer side; or some pads are on the higher longer / shorter side and are shorted with the shorter side, and some are on the shorter side. The pads for TDDI CGOUT and the pads for FPR CGOUT signals can be configured as two parts of the pads of the ILB pads of the FTDI, respectively located on the positions close to both ends of one side of the body of the single-chip element and between the ends of the side (as illustrated in the related examples), or respectively located on the positions between the ends of the side and close to the ends of the side (as illustrated in the related examples). Various combinations can be configured according to design requirements. However, the pads for TDDI CGOUT and FPR CGOUT signals are not staggered. Other embodiments can be inferred by analogy, and the detailed information is not repeated here for simplicity. FIG. 5A In addition, any pads for FPR CGOUT or TDDI CGOUT signal groups, such as the first group of pads or the first group of pads, can be located on the higher longer side, the lower longer side, the shorter side, and the higher / lower longer side and the shorter side of the single-chip element. Even the pads for any TDDI CGOUT and FPR CGOUT can be located on different sides. For example, some pads are located on the higher longer / shorter side, and some pads are located on the shorter side; or some pads are located on the higher longer side or the shorter side and are shorted with the shorter side, some are on the higher / lower longer side; or some pads are on the higher longer / shorter side and are shorted with the shorter side, and some are on the shorter side. The pads for TDDI CGOUT and the pads for FPR CGOUT signals can be configured as two parts of the pads of the ILB pads of the FTDI, respectively located on the positions close to both ends of one side of the body of the single-chip element and between the ends of the side (as illustrated in the related examples), or respectively located on the positions between the ends of the side and close to the ends of the side (as illustrated in the related examples). Various combinations can be configured according to design requirements. However, the pads for TDDI CGOUT and FPR CGOUT signals are not staggered. Other embodiments can be inferred by analogy, and the detailed information is not repeated here for simplicity. FIGS. 9A-12D In addition, any pads for FPR CGOUT or TDDI CGOUT signal groups, such as the first group of pads or the first group of pads, can be located on the higher longer side, the lower longer side, the shorter side, and the higher / lower longer side and the shorter side of the single-chip element. Even the pads for any TDDI CGOUT and FPR CGOUT can be located on different sides. For example, some pads are located on the higher longer / shorter side, and some pads are located on the shorter side; or some pads are located on the higher longer side or the shorter side and are shorted with the shorter side, some are on the higher / lower longer side; or some pads are on the higher longer / shorter side and are shorted with the shorter side, and some are on the shorter side. The pads for TDDI CGOUT and the pads for FPR CGOUT signals can be configured as two parts of the pads of the ILB pads of the FTDI, respectively located on the positions close to both ends of one side of the body of the single-chip element and between the ends of the side (as illustrated in the related examples), or respectively located on the positions between the ends of the side and close to the ends of the side (as illustrated in the related examples). Various combinations can be configured according to design requirements. However, the pads for TDDI CGOUT and FPR CGOUT signals are not staggered. Other embodiments can be inferred by analogy, and the detailed information is not repeated here for simplicity.

[0304] In some embodiments, the relationship between the plurality of source pads for driving the plurality of data lines of the display panel, the touch RX pads for coupling the reception lines of the touch control sensing data, and the CGOUT pads are provided. In some embodiments, the plurality of two types of pads (e.g., source pads and touch RX pads) can be located on the long side opposite to the CGOUT pads, for example, in each of FIG. 14 , FIG. 15 . Preferably, the plurality of two types of pads can be located closer to the long side of the panel for the FTDI IC, for example, as illustrated in FIG. 6A and FIG. 6B , but the present disclosure is not limited thereto.

[0305] Optionally, the plurality of first pads includes a plurality of fingerprint on-array gate driver selection pads. As mentioned above, the plurality of fingerprint on-array gate driver selection pads are related to the plurality of pads for controlling the single-chip elements of the fingerprint sensing pixels. To illustrate this, refer to FIG. 6C , FIG. 6E , FIG. 7 , FIG. 6B , and FIG. 6C , the panel 9C includes a plurality of display rows, and each display row includes a plurality of display pixels DP, and one display pixel DP includes a plurality of sub-pixels, for example, a red sub-pixel (R), a green sub-pixel (G), and a blue sub-pixel (B) (not limited thereto), wherein on-array gate (GOA) circuits GOA1 and GOA2 are arranged on the left and right borders of the display or panel 9C. In FIG. 6E (or FIG. 6B , FIG. 6C ), the on-array gate (GOA) circuit GOA2 of the panel 9C is coupled to the plurality of scan lines (or gate lines) TGL of the plurality of display pixels DP, and the plurality of scan lines are coupled to the plurality of display pixels DP. The GOA circuit GOA2 is used to control the plurality of display pixels DP via the plurality of scan lines TGL. The GOA circuit GOA2 scans the plurality of scan lines TGL of the plurality of display pixels DP according to the control of the TDDI circuit 21A (e.g., a circuit including a display driver circuit and a touch driver circuit). In an example, each of the plurality of scan lines TGL can be a single wire or include a plurality of wires. For example, each of the plurality of scan lines TGL can include a reset wire and / or a selection wire.

[0306] As illustrated in FIG. 6E , FIG. 7 , or FIG. 7As shown in FIG. 1, each (or more) display pixel DP is associated with a fingerprint sensing pixel FS, as FIG. 7 As exemplified in FIG. 1. The GOA circuit GOA1 of the panel 9C is coupled to the plurality of fingerprint sensing pixels FS via a plurality of scan lines (e.g., FGL). The first set of pads is configured for coupling to the plurality of fingerprint sensing pixels via one or more GOA circuits GOA1. The GOA circuit GOA1 scans the plurality of fingerprint scan lines FGL of the plurality of fingerprint sensing pixels FS in accordance with the control of the fingerprint driver circuit 29A. In an example, each of the plurality of fingerprint scan lines FGL can be a single wire or include a plurality of wires. For example, each of the plurality of fingerprint scan lines FGL can include a reset wire for transmitting a reset signal (e.g., represented by FPR_GCK in FIG. 1) to control a switch (e.g., switch T1); and / or a select wire for transmitting an acquisition signal (e.g., represented by FPR_SEL in FIG. 1) to control another switch (e.g., switch T2). In the above-described embodiments, the first set of pads of the single-chip element includes the plurality of pads (or referred to as fingerprint on-array gate driver selection pads) for outputting a first set (or group) of signals including the reset signal and a second set (or group) of signals including the plurality of acquisition signals to the reset wire and the select wire for controlling the plurality of fingerprint sensing pixels. In an example, the fingerprint on-array gate driver selection pads include the plurality of pads for outputting the FPR_GCK1, FPR_GCK2, FPR_GCK3, FPR_SEL1, FPR_SEL2, FPR_SEL3 signals, as in the embodiments related to FIG. 14 FIG. 15 FIG. 5A or FIGS. 9A-12D In some examples, the GOA circuit GOA2 can be further used for controlling the plurality of touch sensors of the panel. In a practical implementation, if the plurality of touch sensors are self-capacitance touch sensors, the plurality of touch sensors can be implemented as common electrodes of the display panel.

[0307] Regarding the implementation of the fingerprint on-array gate driver selection pads, in an embodiment, any one of the panels (e.g., 9A, 9B, 9C) as exemplified in FIG. 1, or related examples) can be implemented to include two GOA circuits (e.g., represented by GOA1 in any one of FIGS. 1, 2, 3) on the left and right borders of the panel for fingerprint sensing, while the single-chip element (e.g., 29A, 29B, 29C) as exemplified in any one of FIG. 16 , FIG. 6A , FIG. 6B or related examples) can be implemented to include two GOA circuits (e.g., represented by GOA1 in any one of FIGS. 1, 2, 3) on the left and right borders of the panel for fingerprint sensing, while the single-chip element (e.g., 29A, 29B, 29C) as exemplified in any one of FIGS. 6B-6D and FIG. 5A FIGS. 9A-12D FIG. 16 , FIG. 5A ​​​​FIGS. 9A-12D Any of the embodiments illustrated in FIGS. 1A-1C, or related examples, can be implemented to include the first set of pads for the left and right sites each including the first pads for outputting both the first and second sets of signals for controlling at least the two types of switches (e.g., transistors) for the plurality of fingerprint sensing pixels of the panel. In a panel having two GOA circuits GOA1 as described above (e.g., as illustrated in FIG. 1A), the first set of pads for the left site can include the first pads for outputting the first set of signals, and the first set of pads for the right site can include the first pads for outputting the second set of signals. FIG. 16 FIG. 5A FIGS. 9A-12D In another embodiment of any of the embodiments illustrated in FIGS. 1A-1C, or related examples, the single-chip component (e.g., as illustrated in FIG. 1C) can be implemented to include the first set of pads for the left site (or right site) including the pads for outputting the first set of signals, and the first set of pads for the right site (or left site) including the pads for outputting the second set of signals for controlling at least the two types of switches (e.g., transistors) for the plurality of fingerprint sensing pixels of the panel, respectively. FIG. 16 FIG. 6B FIG. 14 In another embodiment of any of the embodiments illustrated in FIGS. 1A-1C, or related examples, the single-chip component (e.g., as illustrated in FIG. 1C) can be implemented to include the first set of pads for the left site (or right site) including the pads for outputting the first set of signals, and the first set of pads for the right site (or left site) including the pads for outputting the second set of signals for controlling at least the two types of switches (e.g., transistors) for the plurality of fingerprint sensing pixels of the panel, respectively.

[0308] Optionally, the second pads include array on gate driver select pads. For example, the array on gate driver select pads are for outputting signals (e.g., represented by TDDI_S1 in FIG. 1D) for driving the display pixels and / or touch sensor. In some examples, the array on gate driver select pads include the pads for outputting the TDDI_GCK1, TDDI_GCK2, TDDI_RST signals, as illustrated in the embodiment related to FIG. 1D. FIG. 15 FIG. 6B FIG. 6B

[0309] Optionally, the panel further includes data lines coupled to the display pixels, fingerprint sensing lines coupled to the fingerprint sensing pixels, and selection circuits each coupled to a set of the data lines and one of the fingerprint sensing lines, and the single-chip component further includes third pads arranged in the body and configured for coupling to the panel and for controlling the selection circuits. In an example, as illustrated in FIG. 1C, the blocks B1 serving as selection circuits can be implemented by using multiplexers, demultiplexers, or switches, and the pads of the single-chip component 20A connected to the TDDI circuit 21A output the control signals (e.g., represented by TDDI_S1 in FIG. 1C). FIG. 14 FIG. 15 ​​​​​​​​​TDDI_S2 in FIG. 1A represents) to control the block B1. For example, the third pads can be implemented to include pads for outputting the TDDI_SWR, TDDI_SWG, TDDI_SWB, TDDI_SW_FP signals as in FIG. 1A. FIG. 6B or FIG. 14 as exemplified in the related embodiments. In FIG. 15 , the number of fingerprint sensing pixels FS is controlled by the switches. Of course, the present disclosure is not limited thereto. In another example, the panel can be implemented such that the fingerprint sensing pixels are controlled by the single-chip element (e.g., FTDI) without using switches. Also, the selection circuit can be implemented in any suitable manner; for example, by time-multiplexing, one of the second pads can be implemented to control three or four (or more) switches so as to achieve signal line reduction.

[0310] Optionally, the third pads are arranged on both the left and right portions (as shown in FIG. 14 or FIG. 15 ).

[0311] Optionally, the body has a rectangular shape with a first side and a second side parallel to and closer to the panel than the first side, and the third pads are arranged along the first side (as shown in FIGS. 10A-10D or FIG. 14 ).

[0312] In some embodiments, the third pads can be arranged along the second side in a similar manner as those pads exemplified in any of FIG. 15 .

[0313] Optionally, the panel further includes data lines coupled to the display pixels, fingerprint sensing lines coupled to the fingerprint sensing pixels, and the single-chip element further includes fourth pads arranged in the body. For example, the fourth pads can be used to drive the data lines, or receive fingerprint sensing signals from the fingerprint sensing lines, or be coupled to touch sensing lines of the panel for receiving touch signals from the touch sensing lines (as shown in FIG. 6A or FIG. 6B ). One or more of the above examples of the fourth pads can be implemented in different scenarios of the panel as appropriate. In an example, refer to FIG. 1 and FIG. 6D , for implementing based on FIG. 1The panel of the architecture for 19; 19A; 29A can be further modified to implement the control for the display pixels with the selection circuitry. In another example, refer to FIG. 6A , the panel of the architecture for 19; 19A; 29A can be further modified to implement the control for the display pixels with the selection circuitry. In another example, refer to FIG. 6C , the panel of the architecture for 19; 19A; 29A can be further modified to implement the control for the display pixels with the selection circuitry. In another example, refer to FIG. 1 and FIG. 6B , the panel of the architecture for 19; 19A; 29A can be further modified to implement the control for the display pixels with the selection circuitry. In another example, refer to FIG. 6B , the panel of the architecture for 19; 19A; 29A can be further modified to implement the control for the display pixels with the selection circuitry. In another example, refer to

[0314] Optionally, the panel further comprises a plurality of selection circuitries, wherein each of the plurality of selection circuitries (e.g., block B1 as exemplified in FIG. 6B ) is coupled to a set of the plurality of data lines (e.g., SLR, SLG, SLB as exemplified in FIG. 14 ) and one of the plurality of fingerprint sensing lines (e.g., SL_FP as exemplified in FIG. 15 ), and wherein the first set of pads is configured for coupling to the plurality of selection circuitries.

[0315] Optionally, the body has a rectangular shape with a first side and a second side parallel to and closer to the panel than the first side, and the plurality of fourth pads are arranged along the second side (e.g., as exemplified in FIG. 14 or FIG. 15 ).

[0316] Optionally, a fingerprint driver circuit (e.g., 19; 19A; 29A) and a touch display driver circuit (e.g., 11 and 12; 11A and 12A; 21A) can be implemented in the body of the monolithic component. The fingerprint driver circuit is arranged in the body and coupled to the first set of pads. The touch display driver circuit is arranged in the body and coupled to the plurality of second pads. In implementations with the plurality of third pads, the touch display driver circuit can be further coupled to the plurality of third pads.

[0317] Optionally, in the right portion, none of the plurality of third pads is arranged between the plurality of first pads and the plurality of second pads, and in the left portion, none of the plurality of third pads is arranged between the plurality of first pads and the plurality of second pads.

[0318] Optionally, the plurality of third pads are arranged beside the plurality of second pads instead of beside the plurality of first pads (e.g., as shown in FIG. 14 or FIG. 15 ).

[0319] Optionally, the plurality of second pads are arranged beside the plurality of first pads and beside the plurality of third pads (as shown in FIG. 5A or FIG. 5B ).

[0320] Optionally, the single-chip component further comprises a fingerprint driver circuit and a touch display driver circuit. The fingerprint driver circuit is arranged in the main body and coupled to the plurality of first pads. The touch display driver circuit is arranged in the main body and coupled to the plurality of second pads.

[0321] Optionally, in the right portion, none of the first pads are arranged between the second pads, and none of the second pads are arranged between the first pads, and in the left portion, none of the first pads are arranged between the second pads, and none of the second pads are arranged between the first pads (as exemplified in FIGS. 9A-12D , FIGS. 13A-13C , FIGS. 14-16 , FIG. 16 , FIG. 16 ).

[0322] In some embodiments, the structure of a single-chip component (e.g., an FTDI IC) is exemplified in FIG. 14 . In FIG. 15 , for example, the single-chip component 40 comprises a fingerprint driver circuit 41 and a touch driver circuit 49. For example, the fingerprint driver circuit 41 comprises a fingerprint receiver multiplexing circuit (FPR RX MUX) 413, a fingerprint analog front end (AFE) circuit 414 (which can comprise an analog front end (e.g., a low noise amplifier) and an analog-to-digital converter), a fingerprint control circuit 415, and a data interface circuit 416. The fingerprint control circuit 415 can be implemented to be connected to one or more GOA drivers 410 and 412 for driving the plurality of fingerprint GOA scan circuits FGOA1 and FGOA2 arranged on the panel 9D. For example, the touch driver circuit 49 comprises a touch panel receiver multiplexing circuit (TP RX MUX) 493, a touch analog front end circuit 494 (which can comprise an analog-to-digital converter), a touch control circuit 495 (e.g., an MCU), and a data interface circuit 496.

[0323] Furthermore, the following are provided in FIG. 6B or FIG. 6CSome specific embodiments of the implementation of the plurality of selection circuits and the configuration of the single-chip component (or electronic module) are shown in FIG. 6E , FIG. 17 , FIG. 18 , or other selection circuit configurations, some or all of which can be utilized in any of the single-chip components as exemplified above.

[0324] FIG. 1 and FIG. 17 are schematic diagrams of the wiring structure between a single-chip component (or electronic module) 30C and a display panel 9E according to specific embodiments of the architecture based on FIG. 18 . Referring to FIG. 14 and FIG. 15 , the single-chip component 30C includes a selection module SM1 (or a first switch circuit). The display panel 9E includes a selection module SM2 (or a second switch circuit). The selection module SM1 can be configured to be coupled to the selection module SM2 via traces (or transmission lines) LS.

[0325] The selection module SM1 includes a plurality of first terminals N1D and N1F and a plurality of second terminals N2, which can be considered or coupled to respective ones of the plurality of fourth pads, such as the first subset of pads (i.e., a sub-group of pads) P41A exemplified in FIG. 19 or FIG. 18 . The number of the plurality of first terminals N1D and N1F is greater than the number of the plurality of second terminals N2. The plurality of first terminals N1D are coupled to the display driver circuit (e.g., 11 or 11A) or touch display driver circuit (e.g., 21A). In this embodiment, the display driver circuit (e.g., 11 or 11A) includes a signal processing circuit including an output buffer OBF and a signal converter DAC, and the display driver circuit outputs display driving signals DS for driving the display panel 9E. The plurality of first terminals N1F are coupled to the fingerprint AFE circuit 414 of the fingerprint driver circuit (e.g., 19, 19A, or 29A). The plurality of second terminals N2 can be configured to be coupled to the selection module SM2 of the display panel 9E via the plurality of traces LS.

[0326] In some embodiments of the present application, the selection module SM1 includes a plurality of selection circuits SC1. Each of the plurality of selection circuits SC1 includes a first switch member 501 and a second switch member 502. The first switch member 501 is coupled between the signal processing circuit and a corresponding one of the plurality of second terminals N2. The first switch member 501 is controlled to transmit the plurality of display driving signals DS from the signal processing circuit in a display driving phase (first time period). The second switch member 502 is coupled between the fingerprint driver circuit (e.g., 19, 19A, or 29A) and the corresponding one of the plurality of second terminals N2. The second switch member 502 is controlled to transmit a fingerprint sensing signal FP_S from the display panel 9E to the fingerprint driver circuit (e.g., 19, 19A, or 29A) in a fingerprint sensing phase (second time period).

[0327] The second switch member 502 can include a first switch element 502_1 and a second switch element 502_2. The first switch element 502_1 is coupled to the corresponding one of the plurality of second terminals N2 and the fingerprint driver circuit (e.g., 19, 19A, or 29A). The first switch element 502_1 is controlled to transmit the plurality of fingerprint sensing signals FP_S to the fingerprint driver circuit (e.g., 19, 19A, or 29A) in the fingerprint sensing phase. The second switch element 502_2 is coupled between the first switch element 502_1 and the fingerprint driver circuit (e.g., 19, 19A, or 29A). The second switch element 502_2 is controlled to transmit the plurality of fingerprint sensing signals FP_S to the fingerprint driver circuit (e.g., 19, 19A, or 29A) in response to a determination of touch information in the fingerprint sensing phase. The first switch element 502_1 and the second switch element 502_2 are respectively controlled by different control signals SW1FP and SW3FP. That is, the control signal SW1FP is asserted in the fingerprint sensing phase, and the control signal SW3FP is asserted in the fingerprint sensing phase in accordance with the touch information.

[0328] The selection module SM2 includes a plurality of third terminals N3D and N3F and a plurality of fourth terminals N4. The number of the plurality of third terminals N3D and N3F is greater than the number of the plurality of fourth terminals N4. The plurality of third terminals N3D is coupled to the plurality of display data lines SLD. The plurality of third terminals N3F is coupled to the plurality of fingerprint sensing lines SL_FP. The plurality of fourth terminals N4 is configurable to be coupled to the selection module SM1 of the single-chip element 30C via the plurality of wirings LS.

[0329] In particular, the selection module SM2 includes a plurality of selection circuits SC2. Each of the plurality of selection circuits SC2 includes a plurality of third switch members 503 and one or more fourth switch members 504. The plurality of third switch members 503 are coupled between the plurality of third terminals N3D (the respective first portions of the plurality of third terminals) and the plurality of fourth terminals N4 (one of the plurality of fourth terminals). The fourth switch members 504 are coupled between the plurality of third terminals N3F (the respective second portions of the plurality of third terminals) and the plurality of fourth terminals N4 (one of the plurality of fourth terminals). The first portions (e.g., N3D) of the plurality of third terminals N3D and N3F are coupled to the plurality of data lines SLD of the display panel 9E, and the second portions (e.g., N3F) of the plurality of third terminals N3D and N3F are coupled to the plurality of fingerprint sensing lines SL FP. In the present embodiment, the plurality of third switch members 503 are switched to receive the plurality of display driving signals DS from the single-chip element 30C in the display driving phase. The fourth switch members 504 are switched to transmit the plurality of fingerprint sensing signals FP S to the single-chip element 30C in the fingerprint sensing phase.

[0330] In the present embodiment, the single-chip element 30C (e.g., the control circuit of the single-chip element, such as 10 or 10A) is configured to generate control signals for controlling the selection modules SM1 and SM2. For example, the single-chip element 30C generates the plurality of control signals SW1 SD, SW1 FP, and SW3 FP to control the corresponding switch members of the selection circuits SC1 of the selection module SM1, and generates the plurality of control signals SW2R, SW2G, SW2B, and SW2FP to control the corresponding switch members of the selection circuits SC2 of the selection module SM2.

[0331] In the display driving phase, the control signal SW1 SD turns on the corresponding switch members of the selection module SM1, and the plurality of control signals SW2R, SW2G, and SW2B turn on the corresponding switch members of the selection module SM2. The selection module SM2 is switched to receive the plurality of display driving signals DS from the single-chip element 30C in the display driving phase. In particular, the plurality of third switch members 503 are switched to receive the plurality of display driving signals DS from the single-chip element 30C in the display driving phase. On the other hand, in the display driving phase, the plurality of control signals SW1 FP and SW3 FP turn off the corresponding switch members of the selection module SM1, and the control signal SW2FP turns off the corresponding switch members of the selection module SM2.

[0332] Accordingly, the plurality of display driving signals DS are outputted from the single-chip element 30C to the display panel 9E via the plurality of wirings LS and the plurality of selection modules SM1 and SM2. That is, the single-chip element 30C generates the plurality of control signals SW1SD, SW2R, SW2G, and SW2B for controlling the plurality of selection modules SM1 and SM2 so as to transmit the plurality of display driving signals DS from the display driver circuit (11 or 11A) or touch display driver circuit (e.g., 21A) to the plurality of data lines SLD via the plurality of selection modules SM1 and SM2 in the display driving stage. In the embodiment of the present application, the display pixel DP includes three sub-pixels, but the present application is not limited thereto. In this case, the plurality of display driving signals DS are multiplexed RGB signals and are delivered to respective data lines SLD on the display panel 9E via the plurality of selection modules SM1 and SM2.

[0333] In the fingerprint sensing stage, the plurality of control signals SW1FP and SW3FP turn on the plurality of corresponding switching members of the selection module SM1, and the control signal SW2FP turns on the plurality of corresponding switching members of the selection module SM2. The selection module SM2 is switched to transmit the plurality of fingerprint sensing signals FP_S from the display panel 9E to the single-chip element 30C in the fingerprint sensing stage. Specifically, the plurality of fourth switching members 504 are switched to transmit the plurality of fingerprint sensing signals FP_S to the single-chip element 30C in the fingerprint sensing stage.

[0334] On the other hand, the control signal SW1SD turns off the corresponding switch members of the selection module SM1, and the control signals SW2R, SW2G, and SW2B turn off the corresponding switch members of the selection module SM2. Therefore, the fingerprint sensing signals FP_S are input from the display panel 9E to the single-chip element 30C via the traces LS and the selection modules SM1 and SM2. That is, the single-chip element 30C generates the control signals SW1FP, SW3FP, and SW2FP for controlling the selection modules SM1 and SM2 so that the fingerprint sensing signals FP_S from the fingerprint sensors 126 are received via the selection modules SM1 and SM2 to the fingerprint AFE circuit 414 of the fingerprint driver circuit (e.g., 19, 19A, or 29A) in the fingerprint sensing phase. In the present embodiment, the traces LS are shared by the display driving signals DS and the fingerprint sensing signals FP_S. The display driving signals DS and the fingerprint sensing signals FP_S are transmitted on the traces LS in different phases.

[0335] In the touch sensing phase (the third period), the control signals for controlling the corresponding switch members of the selection modules SM1 and SM2 can be appropriately established to allow signals to be transmitted to the data lines SLD and / or the fingerprint sensing lines SL_FP of the display panel 9E for facilitating the touch sensing operation. For example, the control signals SW2R, SW2G, SW2B, and SW2FP can turn on the corresponding switch members of the selection module SM2 in the touch sensing phase to allow signals to be transmitted to the data lines SLD and / or the fingerprint sensing lines SL_FP. The signals can be DC voltages such as ground voltages or other AC voltages capable of reducing parasitic noise in the touch sensing operation.

[0336] Alternatively, the control signals for controlling the corresponding switch members of the selection modules SM1 and SM2 can be suitably de-asserted to prohibit signal transmission to the data lines SLD and / or the fingerprint sensing lines SL FP of the display panel 9E. The control signals SW1 SD, SW1 FP, and SW3 FP can turn off the corresponding switch members of the selection module SM1, and / or the control signals SW2R, SW2G, SW2B, and SW2 FP can turn off the corresponding switch members of the selection module SM2 in the touch sensing phase to prohibit signal transmission to the data lines SLD and / or the fingerprint sensing lines SL FP. The prohibition of signal transmission can cause the data lines SLD and / or the fingerprint sensing lines SL FP to be floated to avoid noise from parasitic capacitive coupling in the touch sensing operation. Thus, the single-chip element 30C generates the control signals SW1 SD, SW1 FP, SW3 FP, and SW2R, SW2G, SW2B, SW2 FP for controlling the selection modules SM1 and SM2, respectively, so as to cause the data lines SLD and / or the fingerprint sensing lines SL FP of the display panel 9E to be floated or coupled to a DC voltage in the touch sensing phase. As the data lines SLD and / or the fingerprint sensing lines SL FP of the display panel 9E are floated or coupled to the DC voltage, parasitic capacitance affecting touch sensing signals is reduced.

[0337] FIGS. 17-18 is an example of waveforms of the control signals for controlling the switch members depicted in FIGS. 17-19 Referring to FIG. 16 , the selection module SM2 is configured to perform, for example, 1 :Q demultiplexing (e.g., Q = 4). In the display driving phase TI1, the control signals SW2R, SW2G, and SW2B sequentially turn on the corresponding switch members of the selection module SM2. In the fingerprint sensing phase TI2, the control signal SW2 FP turns on the corresponding switch members of the selection module SM2. It is noted that additional touch sensing phases can be added. For example, the display driving phase TI1 can further include at least one sub-period (not shown) for touch sensing.

[0338] As illustrated in FIG. 6C , each of the specific embodiments can be applied to the specific embodiments shown above (e.g., FIG. 6B , based on ​ or ​any of the above various embodiments, or in combination, so as to achieve the functionality of the FTDI single-chip component or electronic module as exemplified in the above various embodiments, as appropriate.

[0339] In summary, the single-chip component, electronic module, and electronic device including the same according to the embodiments of the present application can achieve the following advantages. The single-chip component can be implemented such that the pads for the fingerprint sensing pixels, display pixels, and touch sensor are arranged in a manner that the electrical connections of the pads and control lines or related lines for the fingerprint sensing pixels, display pixels, and touch sensor can be achieved by using traces that do not cross over each other. In this way, the circuit layout simplification and circuit load balancing of the traces can be facilitated.

[0340] The above descriptions are only some embodiments of the present application, which are not intended to limit the patent scope of the present application.

Claims

1. A single-die element for driving a panel including a plurality of fingerprint sensing pixels, a plurality of display pixels, and a plurality of touch sensors, the panel further comprising a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the selection circuits coupled to a corresponding set of the plurality of data lines, wherein, The single-chip component includes: a body having a left portion and a right portion relative to an axis; a first set of pads disposed in the body and including a plurality of first pads for driving the plurality of fingerprint sensing pixels, wherein the first set of pads is disposed on at least one of the left portion and the right portion and configured for coupling to the plurality of fingerprint sensing pixels; and a second set of pads disposed in the body and including a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is disposed on the other of the left portion and the right portion and configured for coupling to the panel, and the second set of pads further includes a plurality of third pads configured for coupling to the panel and for controlling the plurality of selection circuits, wherein at least one group of the first set of pads and the second set of pads is disposed on only the one of the left portion and the right portion, each of the plurality of fingerprint sensing pixels includes a photodiode, a switch, and a capacitor.

2. The single crystal wafer element of claim 1, wherein The plurality of first pads is disposed on only one of the left portion or the right portion.

3. The single crystal wafer element of claim 2, wherein The plurality of second pads is disposed on only the other of the left portion or the right portion.

4. The single crystal wafer element of claim 2, wherein The plurality of second pads is disposed on both the left portion and the right portion.

5. The single crystal wafer element of claim 4, wherein The plurality of first pads is closer to the axis than the plurality of second pads.

6. The single crystal wafer element of claim 4, wherein The plurality of second pads is closer to the axis than the plurality of first pads.

7. The single crystal wafer element of claim 1, wherein The plurality of second pads is disposed on only the other of the left portion and the right portion.

8. The single crystal wafer element of claim 7, wherein The plurality of first pads is disposed on both the left portion and the right portion.

9. The single crystal wafer element of claim 8, wherein, The plurality of first pads is closer to the axis than the plurality of second pads.

10. The single crystal wafer element of claim 8, wherein, The plurality of second pads is closer to the axis than the plurality of first pads.

11. The single crystal wafer element of claim 1, wherein The body has a rectangular shape having a first side, a second side parallel to and closer to the panel than the first side, a left side on the left portion and perpendicular to the first side and the second side, and a right side on the right portion and parallel to the left side, and the axis intersects the first side and the second side.

12. The single crystal wafer element of claim 11, wherein, All of the first set of pads and all of the second set of pads are disposed along the first side.

13. The single crystal wafer element of claim 12, wherein, The first set of pads is closer to the axis than the second set of pads.

14. The single crystal wafer element of claim 12, wherein, The second set of pads is closer to the axis than the first set of pads.

15. The single crystal wafer element of claim 11, wherein, All of the first set of pads and all of the second set of pads are disposed along the second side.

16. The single crystal wafer element of claim 15, wherein, The first set of pads is closer to the axis than the second set of pads.

17. The single crystal wafer element of claim 15, wherein, The second set of pads is closer to the axis than the first set of pads.

18. The single crystal wafer element of claim 11, wherein, All of the first set of pads are disposed along one of the first side and the second side, and all of the second set of pads are disposed along both the left side and the right side.

19. The single crystal wafer element of claim 11, wherein, All of the first set of pads are disposed along both the left side and the right side, and all of the second set of pads are disposed along one of the first side and the second side.

20. The single crystal wafer element of claim 11, wherein, The first set of pads are arranged along at least one of the left and right sides, and all of the second set of pads are arranged along at least the other of the left and right sides.

21. The single crystal wafer element of claim 20, wherein, The first plurality of pads are arranged along only the one of the left and right sides.

22. The single crystal wafer element of claim 21, wherein, The second plurality of pads are arranged along only the other of the left and right sides.

23. The single crystal wafer element of claim 21, wherein, The second plurality of pads are arranged along both of the left and right sides.

24. The single crystal wafer element of claim 20, wherein, The second plurality of pads are arranged along only the other of the left and right sides.

25. The single crystal wafer element of claim 24, wherein, The first plurality of pads are arranged along both of the left and right sides.

26. The single crystal wafer of claim 1, wherein The first plurality of pads include a plurality of fingerprint array on gate driver select pads.

27. The single crystal wafer element of claim 1, wherein, The second plurality of pads include a plurality of array on gate driver select pads.

28. The single crystal wafer of claim 1, wherein, Each of the plurality of selection circuits is further coupled to at least one of the plurality of fingerprint sensing lines.

29. The single crystal wafer of claim 1, wherein, The third plurality of pads are arranged on both of the left and right locations.

30. The single crystal wafer element of claim 1, wherein: the body has a rectangular shape having a first side and a second side parallel to the first side and closer to the panel than the first side, and the third plurality of pads are arranged along the first side.

31. The single crystal wafer element of claim 1, wherein: the body has a rectangular shape having a first side and a second side parallel to the first side and closer to the panel than the first side, and the third plurality of pads are arranged along the second side.

32. The single crystal wafer of claim 1, wherein The panel further includes a plurality of touch sensing lines coupled to the plurality of touch sensors, and the single crystal wafer element further includes: a third set of pads arranged in the body for driving the plurality of data lines or receiving fingerprint sensing signals from the plurality of fingerprint sensing lines, or coupled to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

33. The single crystal wafer element of claim 32, wherein, The third set of pads includes a first subset of pads for driving the plurality of data lines and receiving fingerprint sensing signals from the plurality of fingerprint sensing lines in a time multiplexed manner, and a second subset of pads configured for coupling to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

34. The single crystal wafer element of claim 33, wherein, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured for coupling to the plurality of selection circuits.

35. The single crystal wafer of claim 33, wherein: The first and second subsets of pads are arranged alternately on the body.

36. The single crystal wafer of claim 33, wherein: The first subset of pads is configured to drive the plurality of data lines in a time multiplexed manner, while the second subset of pads receives touch signals from the plurality of touch sensing lines.

37. The single crystal wafer element of claim 32, wherein: the body has a rectangular shape having a first side and a second side parallel to the first side and closer to the panel than the first side, and the third set of pads are arranged along the second side.

38. The single wafer element of claim 1, further comprising: fingerprint driver circuitry disposed in the body and coupled to the first plurality of pads; and touch display driver circuitry disposed in the body and coupled to the second plurality of pads and the third plurality of pads.

39. The single wafer element of claim 1, wherein: in the right location, none of the third plurality of pads are disposed between the first plurality of pads and the second plurality of pads, and in the left location, none of the third plurality of pads are disposed between the first plurality of pads and the second plurality of pads.

40. The single crystal wafer of claim 1, wherein, the third plurality of pads are disposed alongside the second plurality of pads and not alongside the first plurality of pads.

41. The single crystal wafer of claim 1, wherein, the second plurality of pads are disposed alongside the first plurality of pads and alongside the third plurality of pads.

42. The single crystal wafer of claim 1, wherein, the body is configured to be disposed on a film as a film on wafer structure.

43. The single crystal wafer of claim 1, wherein, the body is configured to be disposed on a glass as a glass on wafer structure.

44. The single wafer element of claim 1, further comprising: fingerprint driver circuitry disposed in the body and coupled to the first set of pads; and touch display driver circuitry disposed in the body and coupled to the second set of pads.

45. The single wafer element of claim 1, wherein: in the right location, none of the first set of pads are disposed between the second set of pads, and none of the second set of pads are disposed between the first set of pads, and in the left location, none of the first set of pads are disposed between the second plurality of pads, and none of the second set of pads are disposed between the first plurality of pads.

46. The single crystal wafer of claim 1, wherein the panel further comprises at least one first array on gate circuit, and the first set of pads is configured to be coupled to the plurality of fingerprint sensing pixels via the at least one first GOA circuit.

47. The single crystal wafer of claim 32, wherein, the panel further comprises at least one second array on gate circuit, and the second set of pads is configured to be coupled to the plurality of display pixels and the plurality of touch sensors via the at least one second GOA circuit.

48. An electronic module for driving a panel comprising a plurality of fingerprint sensing pixels, a plurality of display pixels, and a plurality of touch sensors, the panel including a plurality of data lines coupled to the plurality of display pixels, a plurality of fingerprint sensing lines coupled to the plurality of fingerprint sensing pixels, and a plurality of selection circuits, each of the plurality of selection circuits coupled to a corresponding set of the plurality of data lines, wherein, the electronic module comprises: a film configured to be electrically coupled to the plurality of fingerprint sensing pixels, the plurality of display pixels, and the plurality of touch sensors; and a single wafer element disposed on the film, the single wafer element comprising: a body having a left location and a right location with respect to an axis; a first set of pads disposed in the body and comprising a first plurality of pads for driving the plurality of fingerprint sensing pixels, wherein the first set of pads is disposed on at least one of the left location and the right location and is configured to be electrically coupled to the plurality of fingerprint sensing pixels; and a second set of pads disposed in the body and comprising a second plurality of pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is disposed on at least one of the left location and the right location and is configured to be electrically coupled to the plurality of display pixels and the plurality of touch sensors. a second set of pads disposed in the body and including a plurality of second pads for driving the plurality of display pixels and the plurality of touch sensors, wherein the second set of pads is disposed on at least one other of the left portion and the right portion and configured to be electrically coupled to the plurality of display pixels and the plurality of touch sensors, the second set of pads further including a plurality of third pads configured for coupling to the panel and for controlling the plurality of selection circuits, wherein at least one group of the first set of pads and the second set of pads is disposed on only the one of the left portion and the right portion, each of the plurality of fingerprint sensing pixels includes a photodiode, a switch, and a capacitor.

49. The electronic module of claim 48, wherein, The plurality of first pads is disposed on only the one of the left portion and the right portion.

50. The electronic module of claim 49, wherein, The plurality of second pads is disposed on only the other of the left portion and the right portion.

51. The electronic module of claim 49, wherein, The plurality of second pads is disposed on both the left portion and the right portion.

52. The electronic module of claim 51, wherein, The plurality of first pads is closer to the axis than the plurality of second pads.

53. The electronic module of claim 51, wherein, The plurality of second pads is closer to the axis than the plurality of first pads.

54. The electronic module of claim 48, wherein, The plurality of second pads is disposed on only the other of the left portion and the right portion.

55. The electronic module of claim 54, wherein, The plurality of first pads is disposed on both the left portion and the right portion.

56. The electronic module of claim 55, wherein, The plurality of first pads is closer to the axis than the plurality of second pads.

57. The electronic module of claim 55, wherein, The plurality of second pads is closer to the axis than the plurality of first pads.

58. The electronic module of claim 48, wherein, The body has a rectangular shape with a first side, a second side parallel to and closer to a display than the first side, a left side on the left portion and perpendicular to the first side and the second side, and a right side on the right portion and parallel to the left side, and the axis intersects the first side and the second side.

59. The electronic module of claim 58, wherein, All of the first set of pads and all of the second set of pads are disposed along the first side.

60. The electronic module of claim 59, wherein, The first set of pads is closer to the axis than the second set of pads.

61. The electronic module of claim 59, wherein, The second set of pads is closer to the axis than the first set of pads.

62. The electronic module of claim 58, wherein, All of the first set of pads and all of the second set of pads are disposed along the second side.

63. The electronic module of claim 62, wherein, The first set of pads is closer to the axis than the second set of pads.

64. The electronic module of claim 62, wherein, The second set of pads is closer to the axis than the first set of pads.

65. The electronic module of claim 58, wherein, All of the first set of pads are disposed along one of the first side and the second side, and all of the second set of pads are disposed along both the left side and the right side.

66. The electronic module of claim 58, wherein, All of the first set of pads are disposed along both the left side and the right side, and all of the second set of pads are disposed along one of the first side and the second side.

67. The electronic module of claim 58, wherein, All of the first set of pads are disposed along the left side and the right side, and all of the second set of pads are disposed along the left side and the right side.

68. The electronic module of claim 67, wherein, The plurality of first pads is disposed along only the one of the left side and the right side.

69. The electronic module of claim 68, wherein, The plurality of second pads is disposed along only the other of the left side and the right side.

70. The electronic module of claim 68, wherein, The plurality of second pads is disposed along both the left side and the right side.

71. The electronic module of claim 67, wherein, The plurality of second pads are arranged only along the other of the left side and the right side.

72. The electronic module of claim 71, wherein, The plurality of first pads are arranged along both the left side and the right side.

73. The electronic module of claim 48, wherein, The plurality of first pads include a plurality of fingerprint array gate driver select pads.

74. The electronic module of claim 50, wherein, The plurality of second pads include a plurality of array gate driver select pads.

75. The electronic module of claim 48, wherein, Each of the plurality of selection circuits is further coupled to at least one of the plurality of fingerprint sensing lines.

76. The electronic module of claim 48, wherein, The plurality of third pads are arranged on both the left portion and the right portion.

77. The electronic module of claim 48, wherein: the body has a rectangular shape with a first side and a second side parallel to the first side and closer to the panel than the first side, and the plurality of third pads are arranged along the first side.

78. The electronic module of claim 48, wherein: the body has a rectangular shape with a first side and a second side parallel to the first side and closer to the panel than the first side, and the plurality of third pads are arranged along the second side.

79. The electronic module of claim 48, wherein, The single wafer element further includes: a third set of pads arranged in the body for driving the plurality of data lines or receiving fingerprint sensing signals from the plurality of fingerprint sensing lines, or coupled to a plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

80. The electronic module of claim 79, wherein, The third set of pads includes a first subset of pads for driving the plurality of data lines and receiving fingerprint sensing signals from the plurality of fingerprint sensing lines in a time-division manner, and a second subset of pads configured for coupling to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines.

81. The electronic module of claim 80, wherein, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and a corresponding one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured for coupling to the plurality of selection circuits.

82. The electronic module of claim 80, wherein, The first subset of pads and the second subset of pads are arranged alternately on the body.

83. The electronic module of claim 80, wherein, The first subset of pads is configured to drive the plurality of data lines in a time-division manner, while the second subset of pads receives touch signals from the plurality of touch sensing lines.

84. The electronic module of claim 79, wherein: the body has a rectangular shape with a first side and a second side parallel to the first side and closer to the panel than the first side, and the third set of pads are arranged along the second side.

85. The electronic module of claim 48, further comprising: fingerprint driver circuitry arranged in the body and coupled to the plurality of first pads; and touch display driver circuitry arranged in the body and coupled to the plurality of second pads and the plurality of third pads.

86. The electronic module of claim 48, wherein: in the right portion, none of the plurality of third pads are arranged between the plurality of first pads and the plurality of second pads, and In the left side, none of the third pads are arranged between the first pads and the second pads.

87. The electronic module of claim 48, wherein, The third pads are arranged beside the second pads instead of beside the first pads.

88. The electronic module of claim 48, wherein, The second pads are arranged beside the first pads and beside the third pads.

89. The electronic module of claim 48, further comprising: a fingerprint driver circuit arranged in the body and coupled to the first set of pads; and a touch display driver circuit arranged in the body and coupled to the second set of pads.

90. The electronic module of claim 58, wherein, in the right side, none of the first pads are arranged between the second pads, and none of the second pads are arranged between the first pads, and in the left side, none of the first pads are arranged between the second pads, and none of the second pads are arranged between the first pads.

91. The electronic module of claim 48, wherein, The fingerprint sensing pixels correspond to a fingerprint sensing region, the panel has a display region, the touch sensors correspond to a touch sensing region, and sizes of the fingerprint sensing region, the display region, and the touch sensing region are substantially the same.

92. The electronic module of claim 48, wherein, The panel further comprises at least one first array on gate circuit, and the first set of pads is configured to be coupled to the fingerprint sensing pixels via the at least one first GOA circuit.

93. The electronic module of claim 92, wherein, The panel further comprises at least one second array on gate circuit, and the second set of pads is configured to be coupled to the display pixels and the touch sensors via the at least one second GOA circuit.

94. An electronic device, comprising: The electronic device comprises: a panel including display pixels, touch sensors, fingerprint sensing pixels, data lines coupled to the display pixels, fingerprint sensing lines coupled to the fingerprint sensing pixels, and selection circuits each coupled to a corresponding set of the data lines; and a single-chip element for coupling to the panel, the single-chip element comprising: a body having a left side and a right side with respect to an axis; a first set of pads arranged in the body and including first pads for driving the fingerprint sensing pixels, wherein the first set of pads is arranged on at least one of the left side and the right side and electrically coupled to the fingerprint sensing pixels; and a second set of pads arranged in the body and including second pads for driving the display pixels and the touch sensors, wherein the second set of pads is arranged on the other of the left side and the right side and electrically coupled to the display pixels and the touch sensors, the second set of pads including third pads configured to be coupled to the panel and to control the selection circuits, The first and second groups of pads are disposed on the one of the left and right sites only. 95.The electronic device of claim 94, wherein, The first pads are disposed on the one of the left and right sites only. 96.The electronic device of claim 95, wherein, The second pads are disposed on the other of the left and right sites only. 97.The electronic device of claim 95, wherein, The second pads are disposed on both of the left and right sites. 98.The electronic device of claim 97, wherein, The first pads are closer to the axis than the second pads. 99.The electronic device of claim 97, wherein, The second pads are closer to the axis than the first pads. 100.The electronic device of claim 94, wherein, The second pads are disposed on the other of the left and right sites only. 101.The electronic device of claim 100, wherein, The first pads are disposed on both of the left and right sites. 102.The electronic device of claim 101, wherein, The first pads are closer to the axis than the second pads. 103.The electronic device of claim 101, wherein, The second pads are closer to the axis than the first pads. 104.The electronic device of claim 94, wherein, The body has a rectangular shape with a first side, a second side parallel to and closer to a display than the first side, a left side on the left site and perpendicular to the first and second sides, a right side on the right site and parallel to the left side, and the axis intersects the first and second sides. 105.The electronic device of claim 104, wherein, All of the first and second groups of pads are disposed along the first side. 106.The electronic device of claim 105, wherein, The first groups of pads are closer to the axis than the second groups of pads. 107.The electronic device of claim 105, wherein, The second groups of pads are closer to the axis than the first groups of pads. 108.The electronic device of claim 104, wherein, All of the first and second groups of pads are disposed along the second side. 109.The electronic device of claim 108, wherein, The first groups of pads are closer to the axis than the second groups of pads. 110.The electronic device of claim 108, wherein, The second groups of pads are closer to the axis than the first groups of pads. 111.The electronic device of claim 104, wherein, All of the first groups of pads are disposed along one of the first and second sides, and all of the second groups of pads are disposed along both of the left and right sides. 112.The electronic device of claim 104, wherein, All of the first groups of pads are disposed along both of the left and right sides, and all of the second groups of pads are disposed along one of the first and second sides. 113.The electronic device of claim 104, wherein, All of the first groups of pads are disposed along the left and right sides, and all of the second groups of pads are disposed along the left and right sides. 114.The electronic device of claim 113, wherein, The first pads are disposed along one of the left and right sides only. 115.The electronic device of claim 114, wherein, The second pads are disposed along the other of the left and right sides only. 116.The electronic device of claim 114, wherein, The second pads are disposed along both of the left and right sides. 117.The electronic device of claim 113, wherein, The second pads are disposed along the other of the left and right sides only. 118.The electronic device of claim 117, wherein, The first pads are disposed along both of the left and right sides. 119.The electronic device of claim 94, wherein, The first pads include a plurality of fingerprint array on gate driver select pads. 120.The electronic device of claim 94, wherein, The second pads include a plurality of array on gate driver select pads. 121.The electronic device of claim 94, wherein, Each of the plurality of select circuits is further coupled to at least one of the plurality of fingerprint sense lines. 122.The electronic device of claim 94, wherein, The plurality of third pads are arranged on both the left and right portions.

123. The electronic device of claim 94, wherein: the body has a rectangular shape with a first side and a second side parallel to and closer to the panel than the first side, and the plurality of third pads are arranged along the first side.

124. The electronic device of claim 94, wherein: the body has a rectangular shape with a first side and a second side parallel to and closer to the panel than the first side, and the plurality of third pads are arranged along the second side. 125.The electronic device of claim 94, wherein, The single wafer element further comprises: a third set of pads arranged in the body for driving the plurality of data lines or receiving fingerprint sensing signals from the plurality of fingerprint sensing lines, or coupled to a plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines. 126.The electronic device of claim 125, wherein, The third set of pads includes a first subset of pads for driving the plurality of data lines and receiving fingerprint sensing signals from the plurality of fingerprint sensing lines in a time-division manner, and a second subset of pads configured for coupling to the plurality of touch sensing lines of the panel to receive touch signals from the plurality of touch sensing lines. 127.The electronic device of claim 126, wherein, wherein each of the plurality of selection circuits is coupled to a corresponding set of the plurality of data lines and a corresponding one of the plurality of fingerprint sensing lines, and wherein the first subset of pads is configured for coupling to the plurality of selection circuits. 128.The electronic device of claim 126, wherein, The first subset of pads and the second subset of pads are arranged alternately on the body.

129. The electronic device of claim 126, wherein, The first subset of pads is configured to drive the plurality of data lines in a time-division manner, while the second subset of pads receives touch signals from the plurality of touch sensing lines.

130. The electronic device of claim 125, wherein: the body has a rectangular shape with a first side and a second side parallel to and closer to the panel than the first side, and the third set of pads are arranged along the second side.

131. The electronic device of claim 94, further comprising: a fingerprint driver circuit arranged in the body and coupled to the plurality of first pads; and a touch display driver circuit arranged in the body and coupled to the plurality of second pads and the plurality of third pads.

132. The electronic device of claim 94, wherein: in the right portion, none of the plurality of third pads are arranged between the plurality of first pads and the plurality of second pads, and in the left portion, none of the plurality of third pads are arranged between the plurality of first pads and the plurality of second pads. 133.The electronic device of claim 94, wherein, The plurality of third pads are arranged beside the plurality of second pads instead of beside the plurality of first pads. 134.The electronic device of claim 94, wherein, The plurality of second pads are arranged beside the plurality of first pads and beside the plurality of third pads.

135. The electronic device of claim 94, further comprising: a fingerprint driver circuit disposed in the body and coupled to the first set of pads; and a touch display driver circuit disposed in the body and coupled to the second set of pads.

136. The electronic device of claim 94, wherein: in the right region, none of the first set of pads are disposed between the second set of pads, and none of the second set of pads are disposed between the first set of pads, and in the left region, none of the first set of pads are disposed between the second set of pads, and none of the second set of pads are disposed between the first set of pads. 137.The electronic device of claim 94, wherein, The plurality of fingerprint sensing pixels correspond to a fingerprint sensing region, the panel has a display region, the plurality of touch sensors correspond to a touch sensing region, and sizes of the fingerprint sensing region, the display region, and the touch sensing region are substantially the same.

138. The electronic device of claim 94, further comprising a substrate, and the plurality of display pixels, the plurality of touch sensors, and the plurality of fingerprint sensing pixels are disposed on the substrate. 139.The electronic device of claim 138, wherein, The substrate comprises glass, and the single crystal wafer element is disposed on a portion of the glass as a glass-on-wafer structure.

140. The electronic device of claim 138, wherein, The substrate comprises a thin film, and the single crystal wafer element is disposed on the thin film as a thin film-on-wafer structure. 141.The electronic device of claim 94, wherein, The panel further comprises at least one first array-on-gate circuit, and the first set of pads are configured to be coupled to the plurality of fingerprint sensing pixels via the at least one first GOA circuit. 142.The electronic device of claim 141, wherein, The panel further comprises at least one second array-on-gate circuit, and the second set of pads are configured to be coupled to the plurality of display pixels and the plurality of touch sensors via the at least one second GOA circuit.

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