Silicon carbide semiconductor device and method of manufacturing the same
By forming ohmic electrodes in SiC semiconductor devices using top-hat laser annealing technology, the problem of SiC substrate damage caused by laser heating is solved, and high-strength and high-reliability ohmic contacts are achieved.
Patent Information
- Application Number
- CN202011071147.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-10-11
- Filing Date
- 2020-10-09
- Publication Date
- 2026-01-13
- Estimated Expiration
- 2040-10-09
AI Technical Summary
In existing technologies, when forming the ohmic electrodes of SiC semiconductor devices, localized laser heating causes damage and unevenness to the SiC substrate, resulting in reduced device strength and decreased reliability.
The top-hat type laser annealing technology is adopted. By controlling the laser intensity to avoid being equal to or higher than the SiC sublimation energy, the unevenness height is reduced when forming the ohmic electrode, ensuring the flatness of the SiC surface, and maintaining an irregular height of less than 1.0 μm at the boundary between the SiC surface and the ohmic electrode.
This improved the bending strength of SiC semiconductor devices to over 1000 MPa, suppressed the decrease in device strength, and enhanced device reliability.
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Figure CN112652655B_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to a silicon carbide (hereinafter referred to as SiC) semiconductor device and a method for manufacturing the same, which is capable of reducing the contact resistance of the ohmic electrodes included in a semiconductor element made of SiC. Background Technology
[0002] When using SiC substrates to form semiconductor devices such as vertical power devices, ohmic electrodes with reduced contact resistance are used as electrodes to connect the device to circuits, etc. In particular, ohmic electrodes are used as drain electrodes on the back side of the substrate.
[0003] Ohmic contacts in SiC require the formation of an alloy layer between SiC and a metal (such as a metal silicide or metal carbide). Specifically, high-temperature processing is crucial for their formation. For example, when forming nickel silicide (NiSi), high-temperature processing at 900°C or higher is required.
[0004] In the case of SiC semiconductor devices, the back electrode is formed after the device structure is formed on the front side. When the entire wafer with the device structure formed is processed by high-temperature treatment such as in a high-temperature furnace, the device structure and characteristics on the front side are affected. Therefore, the back electrode is locally heated by a laser. Ohmic electrodes are provided by forming NiSi using this local heating with a laser (for example, see Patent Document 1).
[0005] However, when forming an alloy layer through localized laser heating, the alloy layer is formed locally. Furthermore, the SiC substrate is damaged, and a portion of the SiC substrate is evaporated. Therefore, unevenness is formed on the SiC substrate after laser processing. This unevenness leads to stress concentration, resulting in reduced component strength and reliability.
[0006] [Patent Document 1] Japanese Patent No. 04924690 Summary of the Invention
[0007] In view of the above, the purpose of this disclosure is to provide a SiC semiconductor device with excellent ohmic characteristics and to suppress the degradation of component strength to improve reliability, and to provide a method for manufacturing the SiC semiconductor device.
[0008] To achieve the above objectives, the SiC semiconductor device according to this disclosure includes: a SiC semiconductor substrate having a front side and a back side, and an ohmic electrode on at least one side of the front side and the back side of the SiC semiconductor substrate. The ohmic electrode makes ohmic contact with a portion of a surface of the SiC and is distributed (i.e., dotted) on a surface of the SiC to have unevenness / roughness, and the height of the unevenness caused by the ohmic electrode is less than 1.0 μm.
[0009] Therefore, the irregular height of the ohmic electrode, starting from the boundary between the SiC surface and the ohmic electrode, is less than 1.0 μm. Consequently, a bending strength of over 1000 MPa can suppress the decrease in device strength and provide SiC semiconductor devices with improved reliability.
[0010] The method for manufacturing a SiC semiconductor device according to this disclosure includes: forming a metal thin film for an ohmic contact on SiC, the metal film being made of a metallic material providing at least one of silicide and carbide; and forming an ohmic electrode by irradiating the metal thin film with a laser beam to perform laser annealing, causing the metal thin film to react with Si or C in SiC and form at least one of metal silicide and metal carbide. The laser annealing is performed using a top-hat / high-hat type laser.
[0011] As described above, since laser annealing is performed using a top-hat type laser, the laser intensity during laser annealing is suppressed to ensure it is not equal to or higher than the energy used for sublimation of SiC, and the unevenness of the SiC surface is minimized. Therefore, the surface of SiC becomes substantially flat, and the irregular height of the ohmic electrode, starting from the boundary between the SiC surface and the ohmic electrode, is less than 1.0 μm. Thus, SiC semiconductor devices with a bending strength of 1000 MPa or higher can be manufactured.
[0012] The reference numerals in parentheses attached to components, etc., indicate examples of the correspondence between these components, etc., and specific components, etc., in the embodiments described below. Attached Figure Description
[0013] The above and other objects, features, and advantages of this disclosure will become more apparent from the following detailed description with reference to the accompanying drawings. In the drawings:
[0014] Figure 1 This is a cross-sectional view of the SiC semiconductor device according to the first embodiment;
[0015] Figure 2 It is used in Figure 1 An enlarged view of the interface between the SiC semiconductor device that provides the ohmic electrode and the drain electrode, etc.
[0016] Figure 3 This is a graph showing the relationship between the unevenness height H1 and the bending strength;
[0017] Figure 4A It is shown in Figure 1 A cross-sectional view of the steps involved in forming the drain electrode in the SiC semiconductor device shown.
[0018] Figure 4B It is shown in Figure 4A A cross-sectional view of the subsequent steps in forming the drain electrode;
[0019] Figure 4C It is shown in Figure 4B A cross-sectional view of the subsequent steps in forming the drain electrode;
[0020] Figure 4D It is shown in Figure 4C A cross-sectional view of the subsequent steps in forming the drain electrode;
[0021] Figure 5A This is a graph showing the laser intensity with a Gaussian beam as a reference example;
[0022] Figure 5B This is a graph showing the laser intensity when using the top-hat laser described in this embodiment;
[0023] Figure 6A This is a cross-sectional view showing the interface state between SiC and the drain electrode when a Gaussian beam is used as a reference example;
[0024] Figure 6B This is a cross-sectional view showing the interface state between SiC and the drain electrode when using the top-cap laser described in this embodiment;
[0025] Figure 7A This is a cross-sectional view of a Schottky diode described in another embodiment; and
[0026] Figure 7B yes Figure 7A The top view of the Schottky diode shown. Detailed Implementation
[0027] In the following description, embodiments of the present disclosure will be referenced to the accompanying drawings. In the following embodiments, the same reference numerals are assigned to the same or equivalent parts for description.
[0028] (First Embodiment)
[0029] The first embodiment of this disclosure will be described below. Reference will be made to Figure 1 This embodiment describes a SiC semiconductor device. In this embodiment, a SiC semiconductor device having a planar vertical power MOSFET as a SiC semiconductor element will be described. For example, this SiC semiconductor device can be applied to an inverter.
[0030] Vertical power MOSFETs include n + Type 1 SiC substrate. + The SiC substrate 1 has an upper surface that serves as the main front side 1a and a lower surface that, opposite to the main front side 1a, serves as the back side 1b. + Type 1 SiC substrate is made of single-crystal SiC. For example, n + Type 1 SiC substrate has 1×1018 cm -3 Or higher impurity concentrations.
[0031] In n + Above the main front side 1a of the SiC substrate 1, n are stacked - Type epitaxial layer 2. n - Type epitaxial layer 2 is composed of a ratio of n + The SiC substrate 1 is made of SiC with a lower doping concentration.
[0032] In n - In a predetermined region of the surface layer portion of the epitaxial layer 2, P layers, each having a predetermined thickness, are formed spaced apart from each other. - Type base regions 3a and 3b. Furthermore, p... - The base regions 3a and 3b are provided with deep base layers 30a and 30b, each with a thickness greater than p. - The base regions 3a and 3b are portions of the type. That is, each deep base layer 30a and 30b corresponds to p. - The thicker portions of the base regions 3a and 3b. Deep base layers 30a and 30b are formed in areas not described later, such as n. + In the overlapping portion of source pole regions 4a and 4b. - The thicker portions of the base regions 3a and 3b (where deep base layers 30a and 30b are formed) have a higher impurity concentration than the thinner portions where deep base layers 30a and 30b are not formed. By forming these deep base layers 30a and 30b, n + The electric field strength between the SiC substrate 1 and the deep base layers 30a and 30b increases, and avalanche breakdown may occur in these parts.
[0033] In p - In a predetermined region of the surface layer portion of the base region 3a, a layer with a density greater than p is formed. - Type base region 3a shallow n + Type source pole region 4a. In p - In a predetermined region of the surface layer portion of the base region 3b, a layer with a density greater than p is formed. - Type base region 3b shallow n + Type source polar region 4b.
[0034] In p - Type base regions 3a, 3b and n + Recesses 6a and 6b are formed in the surface portions of the source regions 4a and 4b. Deep base layers 30a and 30b with a high concentration of p-type impurities are exposed from the bottom of the recesses 6a and 6b.
[0035] In addition, p - Type base regions 3a and 3b in n - Type epitaxial layer 2 and n +The surface portion between the source pole regions 4a and in n - Type epitaxial layer 2 and n + The surface portion between the source and source regions 4b serves as a channel region, and a gate insulating film 7, for example made of silicon oxide, is formed at least on the channel region. The gate insulating film 7 is formed on n... - Type epitaxial layer 2 and n + The source regions 4a and 4b are located on the upper surface of the channel region. Furthermore, a gate electrode 8 is formed on the gate insulating film 7, and the gate electrode 8 is covered by an insulating film 9 made of silicon oxide film or the like.
[0036] In n + On the front side 1a of the SiC substrate 1, a source electrode 10 is formed to cover the upper surface of the insulating film 9 and is connected to n + Type source pole regions 4a, 4b and p - Type base regions 3a and 3b.
[0037] In n + A drain electrode 11 is formed on the back side 1b of the SiC substrate 1. The drain electrode 11 is an ohmic electrode, and an alloy layer of at least one of metal silicide and metal carbide is formed on the back side 1b by performing a laser annealing process, which is related to the n + An ohmic contact is formed on the back side 1b of the SiC substrate 1. Therefore, the drain electrode 11 is made of a material that reacts with SiC to form at least one of metal silicide and metal carbide. Furthermore, the surface of the drain electrode 11 is covered by a bonding electrode 12, and a metal plate or circuit board (not shown) can be electrically connected through the bonding electrode 12.
[0038] For example, nickel (Ni), molybdenum (Mo), titanium (Ti), tungsten (W), niobium (Nb), tantalum (Ta), etc., can be used as the metal forming the drain electrode 11. Ni, Mo, and Ti react with Si to form silicides, while Mo and Ti combine with C to form carbides. W and Nb combine with C to form carbides. The metal used to form the drain electrode 11 can be one or more materials, and can be a composite material obtained by combining various materials mentioned herein, such as Mo / Ni. Furthermore, the material used to form the drain electrode 11 may include impurities.
[0039] The metal used to form the bonding electrode 12 can be any material suitable for bonding, such as solder, and for example, Ti / Ni / Au can be used.
[0040] Figure 2The diagram schematically illustrates the state of the interface with SiC when Mo / Ni is used as the drain electrode 11 and Ti / Ni / Au is used as the bonding electrode. As shown in the figure, Ni reacts with Si to form NiSi 11a, and Mo reacts with C internally to form MoC 11b. These are then dispersed, forming a Ti layer 12a to cover the NiSi 11a and MoC 11b providing the dispersed drain electrode 11, and further forming a Ni layer 12b and an Au layer 12c on top of the Ti layer 12a. Although the case described herein is that all Ni and Mo included in the drain electrode 11 react with SiC to provide NiSi 11a and MoC 11b, at least a portion of Ni and Mo may become silicides and carbides.
[0041] Here, as described above, the drain electrode 11 is an ohmic electrode formed by laser annealing to create an alloy layer made of metal silicide or metal carbide. Alternatively, as... Figure 2 As shown, an alloy layer can be formed locally, or n can be damaged. + Type 1 SiC substrate 1, and a portion of it can be removed. As a result, after laser processing, in n + The SiC substrate 1 has unevenness, namely depressions and protrusions, caused by the drain electrode 11. This unevenness causes stress concentration, which may reduce the strength of the device and reduce its reliability.
[0042] Therefore, in this embodiment, from Figure 1 The n shown + The uneven height H1 of the drain electrode 11, starting from the interface between the back surface 1b of the SiC substrate 1 and the drain electrode 11, is less than 1.0 μm.
[0043] When the relationship between the unevenness height H1 and the bending strength is examined experimentally, it can be confirmed that, for example... Figure 3 As shown, the bending strength decreases as the unevenness height H1 increases. By plotting the bending strength of multiple samples for each unevenness height H1 and connecting their average values with a line, we can obtain... Figure 3 The approximate line is shown as a dashed line. A bending strength of 1000 MPa or higher is required to ensure the component's strength, and this is desired for all manufactured products. Based on experiments, to meet the condition of a bending strength equal to or greater than 1000 MPa in all products, it has been confirmed that an irregularity height H1 ≤ 1.0 μm is necessary. Therefore, in this embodiment, the irregularity height H1 is set to 1.0 μm or less.
[0044] In this way, by setting the unevenness height H1≦1.0μm, the bending strength is set to 1000MPa or higher. Therefore, SiC semiconductor devices that can suppress the decrease in component strength and improve reliability can be obtained.
[0045] Next, we will describe Figure 1 The method for manufacturing a vertical power MOSFET is shown. In the following description, the method for forming the drain electrode 11 will be primarily described, as the basic manufacturing method of the vertical power MOSFET according to this embodiment is similar to conceivable methods.
[0046] According to this embodiment, the vertical power MOSFET is... Figures 4A to 4D Each manufacturing process is shown to be used for manufacturing.
[0047] like Figure 4A As shown, n is provided, for example, with a thickness of 350 μm. + Type 1 SiC substrate. For example, n-type impurities are fabricated by slicing and polishing a SiC ingot doped with n-type impurities. + Type 1 SiC substrate. Although not shown, it is performed on n + A device formation step in which at least a portion of a semiconductor element is formed on the front side of a SiC substrate 1. That is, on the n... - After epitaxial growth of the second type epitaxial layer, a p-type epitaxial layer is formed by ion implantation (without a mask shown). - Type base regions 3a and 3b, deep base layers 30a and 30b, n + Type source regions 4a and 4b. In addition, each component of the vertical power MOSFET as a device structure is formed by forming a gate insulating film 7, a gate electrode 8, an insulating film 9, a source electrode 10, etc.
[0048] Subsequently, although not shown, n was removed by grinding and polishing. + A portion of the back side 1b of the SiC substrate 1, so that n + The SiC substrate 1 becomes thinner. For example, n + The back surface 1b of the SiC substrate 1 points upwards, and the opposite surface is attached to the glass substrate. Then, through CMP (chemical mechanical polishing) and other processes, n + A portion of the back side 1b of the SiC substrate 1 is removed. At this time, the surface roughness Ra of the back side 1b after the thinning process is set to below 5 nm. Then, by performing... Figures 4B to 4D The steps shown involve forming a drain electrode 11 on the back side 1b of the thinned n+ type SiC substrate 1.
[0049] Specifically, such as Figure 4B The steps shown, after thinning, are in n + A metal thin film 110 is formed on the back side 1b of a SiC substrate 1. A Ni layer is used as the metal thin film 110. +After the back side 1b of the SiC substrate 1 is processed and activated, a Ni layer is formed by chemical plating. The thickness of the metal thin film 110 is, for example, 50 nm to 250 nm.
[0050] To form carbides with SiC, a Mo layer can be formed on the back side 1b followed by a Ni layer. When forming the Mo layer, the Ni content is preferably greater than the Mo content in terms of molar ratio. For example, the molar ratio of Ni to Mo can be from 1:1 to 2:1. Furthermore, the stacked structure of the Mo and Ni layers is not limited to a single layer; a mixed metal of Ni and Mo can be used.
[0051] Next, as Figure 4C As shown, laser annealing is performed by irradiating the metal thin film 110 with a laser 50. For example, a solid-state laser, such as an LD-pumped solid-state laser, is used to scan the n-th layer on which the metal thin film 110 is formed in the XY plane. + Type SiC substrate 1, and in n + A laser 50 is irradiated on the back side 1b of the SiC substrate 1. More specifically, a top-hat type beamforming element and a focusing lens are arranged at the irradiation port of the solid-state laser, thereby irradiating the metal thin film 110 with the top-hat type laser. For example, a solid-state laser with a fundamental wavelength of 1064 nm is used, and the laser is converted to light with a wavelength of 355 nm (which is the third harmonic) or 266 nm (which is the fourth harmonic) by a wavelength conversion adapter to prepare the laser 50. At this wavelength, the laser 50 does not penetrate the SiC. Furthermore, the energy density of the laser 50 is set to... The spot diameter is 100 μm, and the overlap rate during spot illumination, i.e., the ratio of the overlap length to the diameter of the continuous spot during laser 50 scanning, is 50% to 80%.
[0052] In this way, by performing localized annealing such as laser annealing, the drain electrode 11 can be ohmically connected via a cryogenic process that suppresses temperature rise in areas not irradiated by the laser. Therefore, the formation on the n... + The impact of the device on the front side 1a of the SiC substrate 1. Note that the low-temperature process referred to here is a process performed below the temperature at which thermal damage to the device can be suppressed. Specifically, the temperature at which aluminum (Al), which is commonly used as the device wiring material in this process, does not melt can be considered. More specifically, temperatures equal to or less than 400 degrees Celsius (°C) can be considered.
[0053] By performing such laser annealing, when the metal thin film 110 includes a metal element such as Ni to be siliconized, n +The metal elements and Si included in the SiC substrate 1 react with each other through a silicide reaction to synthesize metal silicides. When the metal thin film 110 includes Ni, nickel silicides are synthesized. When the metal thin film 110 includes a metal element that will be carbonized, such as Mo, the metal element reacts with Ni... + The C in the SiC substrate 1 reacts to form a metal carbide. When the metal thin film 110 includes Mo, a Mo carbide is formed. When the metal thin film 110 is made of Mo / Ni, the drain electrode 11 is configured such that NiSi 11a and MoC 11b are as follows: Figure 2 The material is dispersed as shown. Then, by performing this laser annealing, an unevenness is formed from the dispersed drain electrode 11.
[0054] At this time, since laser annealing is performed by a top-hat type laser, the uneven height H1 of the drain electrode 11 can be reduced, and the uneven height H1≦1.0μm can be achieved.
[0055] For example, a Gaussian beam can be used in conceivable laser annealing. Therefore, as... Figure 5A As shown in Figure 6, the laser intensity should be the same as that originally required for alloying, but this energy becomes equal to or higher than the sublimation energy of SiC, and the SiC surface sublimates, resulting in a large surface roughness. Therefore, due to the effect of the SiC surface roughness, the roughness height H1 of the drain electrode starting from the SiC surface increases, for example, to about 2.1 μm.
[0056] On the other hand, in this embodiment, laser annealing is performed using a top-hat type laser. Therefore, as... Figure 5B As shown, the laser intensity required for alloying can be obtained, and this laser intensity can be made lower than the sublimation energy of SiC by flattening the peak intensity. The result is as follows: Figure 6B As shown, sublimation on the SiC surface is suppressed and unevenness is reduced. Therefore, the SiC surface becomes substantially flat, from n + The uneven height H1 of the drain electrode 11, starting from the interface between the back side 1b of the SiC substrate 1 and the drain electrode 11, can be set to H1≦1.0μm.
[0057] In this way, such as Figure 4D The drain electrode 11 is shown. Subsequently, although not shown, a bonding electrode 12 can be formed by sequentially stacking Ti (as a barrier metal), Ni (as a eutectic material during welding), and Au (as an oxide protectant). Then, a dicing tape is attached to the drain electrode 11 and peeled off from the glass substrate. Afterward, it is diced to divide it into chip cells, thus completing the SiC semiconductor device.
[0058] Therefore, in this embodiment, from n +The unevenness height H1 of the drain electrode 11, starting from the interface between the back surface 1b of the SiC substrate 1 and the drain electrode 11, is less than 1.0 μm. Therefore, the bending strength is above 1000 MPa, which can suppress the decrease in device strength and provide SiC semiconductor devices with improved reliability.
[0059] In this embodiment, since laser annealing is performed using a top-hat type laser, the laser intensity during laser annealing can be suppressed to avoid being equal to or higher than the sublimation energy of SiC, and the unevenness of the SiC surface is minimized. Therefore, the SiC surface becomes substantially flat, from n + The unevenness height H1 of the drain electrode 11, starting from the interface between the back side 1b of the SiC substrate 1 and the drain electrode 11, can be set to H1≦1.0μm. Therefore, SiC semiconductor devices with a bending strength of 1000MPa or higher can be fabricated.
[0060] In particular, as in this embodiment, the surface roughness Ra of the back side 1b after the thinning step is set to less than 5 nm. Therefore, even after laser annealing, the surface roughness of the back side 1b is small, which can suppress the unevenness height H1 of the drain electrode 11 starting from the SiC surface due to the unevenness effect of the back side 1b.
[0061] (Other embodiments)
[0062] Although this disclosure has been made with reference to the above embodiments, it is not limited to such embodiments, but may include various changes and modifications within the equivalent scope. Furthermore, various combinations and forms, and even more so, other combinations and forms including only one element or more or fewer of these elements, are also within the spirit and scope of this disclosure.
[0063] (1) For example, in the first embodiment, an ohmic electrode is described as being formed on the back side of the SiC substrate of the device (the device has components on the front side). Alternatively, the structure described in the first embodiment may not only be disposed on the back side of the SiC substrate of the device (the device has components on the front side). The structure can be disposed on any part as long as an ohmic electrode is formed on SiC. For example, the structure can be applied to the case where an ohmic electrode is formed on the front side of the SiC substrate. In the same case, laser annealing is performed when the ohmic electrode is formed after the components of the device are formed. As a result, local heating can be performed to suppress the effects on the device. In the above embodiments, a case of using Ni as the electrode metal or a case of using Mo in addition to Ni is described; alternatively, other materials may be used.
[0064] (2) In the first embodiment, a solid-state laser is used as an example of laser annealing. Alternatively, laser annealing is not limited to solid-state lasers; for example, an excimer laser or the like can be used.
[0065] (3) Furthermore, when forming ohmic electrodes for SiC via laser annealing as described in the first embodiment, irregularities are formed only on the normal SiC surface due to the laser trace, making it difficult to identify alignment marks. For example, during chip testing during transport, a stereo microscope or camera is used to identify alignment marks to confirm orientation when dicing the chip. In this case, since SiC is used as the substrate material, light travels through SiC and is reflected on the back side, making it difficult to distinguish the laser marks from the alignment marks.
[0066] Therefore, when forming ohmic electrodes by laser annealing, it is preferable to form alignment marks made of metal (hereinafter referred to as metal alignment marks). In particular, in diodes, where it is difficult to determine the orientation of the chip due to the shape of the electrode on the front side, it is preferable to use metal marks in the diode.
[0067] For example, in the case of a Schottky diode, such as Figure 7A As shown, in n + An n-type layer 21 made of SiC is formed on the surface 20a of a SiC substrate 20. Then, a Schottky electrode 22 is formed thereon, and a protective film 23 is formed to cover the periphery of the Schottky electrode 22 and the surface of the n-type layer 21. Furthermore, on the n... + An ohmic electrode 24 is formed on the back side 20b of a SiC substrate 20. In a Schottky electrode having the above structure, such as... Figure 7B As shown, since the Schottky electrode 22 is formed into a square or similar shape, it is difficult to determine the chip orientation by the shape of the Schottky electrode 22.
[0068] In this case, for example, such as Figure 7A and Figure 7B As shown, the metal mark 25 can be configured to be covered by a protective film 23 at a position separate from the Schottky electrode 22. When the metal mark 25 is positioned at this location, it can function as an alignment mark because it is covered by the protective film 23, without creep discharge from the Schottky electrode 22.
[0069] Although the shape of the metal mark 25 can be any shape, such as Figure 7B As shown, it can be a cross-shaped mark 25a, an L-shaped mark 25b, etc. Here, the cross-shaped mark 25a is arranged in one of the four corners, while the L-shaped mark 25b is arranged in two adjacent corners. Alternatively, it is not always necessary; as long as the orientation of the chip can be determined, only one mark can be arranged. For example, in the case of the cross-shaped mark 25a, when the lengths of the intersecting lines are different from each other, the orientation of the chip can be determined by only one mark. Similarly, in the case of the L-shaped mark 25b, when the lengths of each line extending from the curved portion are different from each other, the orientation of the chip can be determined by only one mark.
[0070] (4) In the first embodiment, a SiC semiconductor device including a vertical power MOSFET as a semiconductor element has been described as an example. Alternatively, this structure is merely an example and may include other semiconductor elements such as diodes and IGBTs. That is, any SiC semiconductor device can be used as long as it has ohmic electrodes for forming semiconductor elements on a SiC semiconductor substrate.
[0071] Although this disclosure has been described with reference to embodiments thereof, it should be understood that this disclosure is not limited to the embodiments and structures described above. This disclosure is intended to cover various modifications and equivalent arrangements. In addition, although there are various combinations and configurations, other combinations and configurations including more, fewer, or only a single element are also within the spirit and scope of this disclosure.
Claims
1. A silicon carbide semiconductor device comprising: a silicon carbide semiconductor substrate (1) having a front surface (la) and a back surface (lb); and a plurality of ohmic electrodes (11) ohmically contacting a silicon carbide surface on at least one of the front surface and the back surface of the silicon carbide semiconductor substrate, wherein: the plurality of ohmic electrodes are dispersed on the silicon carbide surface to provide depressions and protrusions; the depressions and protrusions have a height (HI) due to the ohmic electrodes that is less than 1.0 pm, each ohmic electrode, which includes NiSi and MoC disposed inside the NiSi, provides a single grain; a plurality of grains composed of the NiSi and the MoC are dispersed on a surface of the silicon carbide semiconductor substrate; and the plurality of grains provide the depressions and protrusions.
2. A method for fabricating a silicon carbide semiconductor device, the silicon carbide semiconductor device comprising: a silicon carbide semiconductor substrate (1) having a front surface (la) and a back surface (lb); and a plurality of ohmic electrodes (11) ohmically contacting a silicon carbide surface on at least one of the front surface and the back surface of the silicon carbide semiconductor substrate, wherein the plurality of ohmic electrodes are dispersed on the silicon carbide surface to provide depressions and protrusions; the depressions and protrusions have a height (HI) due to the ohmic electrodes that is less than 1.0 pm, each ohmic electrode, which includes NiSi and MoC disposed inside the NiSi, provides a single grain; a plurality of grains composed of the NiSi and the MoC are dispersed on a surface of the silicon carbide semiconductor substrate; and the plurality of grains provide the depressions and protrusions, the method comprising: forming a metal thin film (110) made of a metal material for forming at least one of a silicide and a carbide on the silicon carbide to ohmically contact with the ohmic electrode; and forming the ohmic electrode by performing laser annealing by irradiating a laser beam (50) on the metal thin film to react the metal thin film with Si or C in the silicon carbide and form at least one of a metal silicide and a metal carbide, wherein: the laser annealing is performed by a top-hat type laser.
3. The method for manufacturing a silicon carbide semiconductor device according to claim 2, further comprising: thinning the silicon carbide semiconductor substrate by removing a surface of the silicon carbide semiconductor substrate on which the ohmic electrode is formed before forming the metal thin film, wherein: the surface of the silicon carbide semiconductor substrate after the thinning has a surface roughness equal to or less than 5 nm.
4. The method for manufacturing a silicon carbide semiconductor device according to claim 2, wherein: the metal material used for forming the metal thin film includes at least one of Ni, Mo, Ti, W, Nb, and Ta; and the metal thin film has a thickness in a range between 50 nm and 250 nm when the metal thin film is formed.
5. The method for manufacturing a silicon carbide semiconductor device according to any one of claims 2 to 4, wherein: In performing the laser annealing to form the ohmic electrode, the laser beam has an energy density in a range of 2.5 J / cm 2 to 3.0 J / cm 2 , is irradiated by spot irradiation, and an overlap ratio of an overlap length with respect to a spot diameter is in a range between 50% and 80%.
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