A digital power amplifier

Abstract

The present invention provides a digital power amplifier, including a digital controller, a driving module, a state acquisition module, n power amplifier modules, m power amplifier redundancy modules, a power synthesis module and a filtering module, wherein the digital controller is used to collect and cache input signals, and pulse width modulate the input signals to generate 2n groups of PWM control signals, and is also used to receive the state information collected by the state acquisition module, and after identifying the fault information in the state information, control the power amplifier redundancy module to replace the failed power amplifier module to operate or control the power amplifier redundancy module and the power amplifier module that has not failed to redistribute the operation, and send a bypass control signal to the power synthesis module. In this solution, the state acquisition module collects the operating status of each module in real time, uses the power redundancy module to replace the failed power amplifier module to operate, performs online fault processing, and greatly improves the reliability and service life of the amplifier.

Description

Technical Field

[0001] The present invention relates to the technical field of power electronics, and in particular to a digital power amplifier. Background Art

[0002] Since the beginning of the 21st century, power electronics technology has developed rapidly, and power amplifiers have been widely used in many fields of social life. Traditional analog power amplifiers and class AB power amplifiers are inefficient, large, and bulky, while digital power amplifiers have simple structures, high transmission efficiency, and are easy to integrate. They have obvious advantages in terms of size, weight, efficiency, and reliability.

[0003] Due to the limitation of the process level and technology of power switch devices, the power level and switching frequency of single-module digital power amplifiers are limited, which makes it difficult to meet the needs of some medium, high power and low distortion applications. In order to solve this problem, currently known high-power digital power amplifiers mostly use power tubes with higher power levels in series or parallel connection or power module cascade to meet the high power requirements.

[0004] However, due to the non-ideal switching characteristics of the device, the equivalent input capacitance increases after the series-parallel combination, and the actual switching frequency is further reduced, which causes the digital amplifier distortion to worsen and the filter module to increase in size. In addition, since the characteristics of each device or module cannot be exactly the same, the voltage and current borne by each device or module are unbalanced, resulting in poor system reliability and seriously affecting the service life of the device and system. Summary of the invention

[0005] The present invention aims to solve the above-described problems. One object of the present invention is to provide a digital power amplifier that solves any of the above problems. Specifically, the present invention provides a highly reliable, modular digital power amplifier that can effectively increase output power and reduce distortion.

[0006] To achieve the above object, the present invention provides a digital power amplifier, which includes a digital controller, a driving module, a state acquisition module, n power amplifier modules, m power amplifier redundancy modules, a power synthesis module and a filtering module, wherein n is an integer greater than 0, and m is an integer greater than or equal to 0;

[0007] The digital controller is used to collect and cache input signals, and perform pulse width modulation on the input signals to generate 2n groups of PWM control signals, wherein the frequencies of the 2n groups of PWM control signals are the same, and the phases differ by π / n in sequence, and the duty cycle of the PWM control signals is proportional to the amplitude of the input signal; wherein each group of PWM control signals includes two PWM signals with complementary levels;

[0008] The driving module is located between the digital controller and the n power amplifier modules, and is used to amplify the 2n groups of PWM control signals;

[0009] The power amplifier module is used to amplify the signal output by the driving module, and the power amplifier redundancy module is used to replace the failed power amplifier module;

[0010] The state acquisition module is used to collect state information of the driving module and each of the power amplifier modules, wherein the state information includes normal operation state information and fault information; the digital controller is also used to receive the state information collected by the state acquisition module, and after identifying the fault information in the state information, control the power amplifier redundancy module to replace the failed power amplifier module for operation or control the power amplifier redundancy module and the power amplifier modules that are not failed to be redistributed for operation, and send a bypass control signal to the power synthesis module;

[0011] The power synthesis module is used to receive the bypass control signal output by the digital controller, and synthesize the power signal output by the power amplifier module;

[0012] The filtering module is used to filter the power signal output by the power synthesis module to generate an analog power signal.

[0013] Wherein, the digital controller includes a sampling / caching module, a delay / timer, a fault processing module, 2n digital PWM modulators and an output signal distribution module running in parallel under the same clock beat;

[0014] The sampling / buffering module is used to receive an input signal, digitally quantize and buffer the input signal, and then transmit the input signal to the 2n digital PWM modulators;

[0015] The fault processing module is used to receive the state information collected by the state collection module, identify the fault information in the state information and the power amplifier module with fault corresponding to the fault information, count the number k of the power amplifier modules with fault and send it to the delay / timer, send an enable control signal EN to the output signal distribution module, and send a bypass control signal Ei to the power synthesis module;

[0016] The delay / timer is used to receive the start / stop signal, and send 2n phase trigger signals with time intervals of T / (2n) to the 2n digital PWM modulators, where T is the carrier period of the digital PWM modulator; it is also used to receive the number k of failed power amplifier modules, and compare and determine the size of k and m, and send corresponding phase trigger signals to the 2n digital PWM modulators according to the determination result;

[0017] The 2n digital PWM modulators are used to complete the PWM modulation of the signal output by the sampling / buffering module; and are also used to control the carrier phase of the output PWM control signal according to the phase trigger signal after receiving the phase trigger signal;

[0018] The output signal distribution module is used for sending a PWM control signal to the driving module and the power amplifier module corresponding to the enable control signal EN according to the enable control signal EN after receiving the enable control signal EN.

[0019] Among them, the delay / timer is also used to compare and determine that when the number k of failed power amplifier modules is greater than the number m of redundant power amplifier modules, recalculate the phase trigger time interval of the digital PWM modulator as T / (2×(n+mk)), and send the reset 2×(n+mk) phase trigger signals to the 2×(n+mk) digital PWM modulators.

[0020] Each of the digital PWM modulators includes a counter and a comparator that are arranged in a one-to-one correspondence, wherein the counter is started by the corresponding phase trigger signal output by the delay / timer to generate a periodic digital triangular modulated carrier; the comparator is used to compare the count value of the counter with the digital quantization value of the input signal in real time and output the PWM control signal.

[0021] The step of pulse width modulating the input signal to generate 2n groups of PWM control signals includes: pulse width modulating the input signal with 2n digital triangular modulation carriers with the same frequency and phase differences of π / n to generate the 2n groups of PWM control signals.

[0022] The power amplifier module includes an H-bridge circuit, and two power switch devices in the same group of each H-bridge circuit receive the same group of PWM control signals output by the driving module.

[0023] Among them, the power synthesis module is a combined transformer, including n+m primary windings and n+m secondary windings, each of the primary windings is connected one-to-one with the output end of the power amplifier module or the power amplifier redundancy module, and each of the secondary windings is connected in series in sequence.

[0024] Wherein, a bypass switch is respectively connected in parallel to the output end of each secondary winding. When a power amplifier module fails, the digital controller controls the bypass switch corresponding to the failed power amplifier module to close and the bypass switches corresponding to the same number of power amplifier redundancy modules as the failed power amplifier modules to open.

[0025] Wherein, the filtering module includes an LC passive low-pass filter.

[0026] The digital power amplifier of the present invention adjusts the output power by adjusting the number of power amplifier modules involved in the operation and the number of windings of the power synthesis module to meet the needs of different power application occasions; a digital controller is used to generate PWM control signals with the same frequency and equidistant phases to drive the power amplifier modules to operate, which greatly reduces the harmonic content in the synthesized waveform, can greatly reduce the mention of the filter module, and significantly improves the distortion; at the same time, the state acquisition module collects the operating status of each module in real time, and uses the power redundancy module to replace the power amplifier module that sends the fault to operate, and performs online fault processing, which greatly improves the reliability and service life of the amplifier.

[0027] Other characteristic features and advantages of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] The accompanying drawings, which are incorporated into the specification and constitute a part of the specification, illustrate embodiments of the present invention and are used together with the description to explain the principles of the present invention. In these drawings, similar reference numerals are used to represent similar elements. The drawings described below are some embodiments of the present invention, but not all embodiments. For those of ordinary skill in the art, other drawings can be obtained from these drawings without paying creative work.

[0029] Figure 1 The structure diagram of the digital power amplifier of the present invention is exemplarily shown;

[0030] Figure 2 A structural schematic diagram of a digital controller is exemplarily shown;

[0031] Figure 3 An operating waveform diagram of a digital PWM modulator is shown by way of example;

[0032] Figure 4 A circuit schematic diagram of a power amplifier module is shown exemplarily;

[0033] Figure 5 A structural schematic diagram of a power synthesis module is exemplarily shown. DETAILED DESCRIPTION

[0034] In order to make the purpose, technical scheme and advantages of the embodiments of the present invention clearer, the technical scheme in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. It should be noted that the embodiments in this application and the features in the embodiments can be combined with each other arbitrarily without conflict.

[0035] The inventor has designed a highly reliable modular digital power amplifier, which mainly uses multiple power amplifier modules to amplify the signal, and then synthesizes it through a power synthesis module. In practical applications, the output power can be adjusted by adjusting the number of power amplifier modules used and the number of windings of the power synthesis module, so as to adapt to various applications with different power requirements; and each power amplifier module only needs to amplify a set of PWM control signals, and the circuit structure of each power amplifier module is the same. Therefore, the topological circuit structure of the digital power amplifier is simple, the modularization degree is high, and it is easy to expand and maintain. A digital controller generates multiple sets of PWM control signals with the same frequency and phases staggered in sequence, and the driving module drives the power amplifier module to operate and amplify after preliminary amplification, and then synthesizes it through the power synthesis module. The harmonic content of the synthesized total output waveform is greatly reduced, so the mention of the filter module can be greatly reduced, and the distortion of the signal is also significantly improved, thereby meeting the requirements for low distortion and high power amplification. In addition, a power amplifier redundancy module is provided to replace a power amplifier module when a power amplifier module fails, so as to ensure the normal operation of the digital power amplifier; the status acquisition module is used to collect the operating status of each module in real time and feed it back to the digital controller, which determines the number and position of the failed power amplifier modules and adjusts the PWM control signal to no longer output to the failed power amplifier module, and the failed power amplifier module is replaced by the power amplifier redundancy module. At the same time, the operating winding of the power synthesis module is adjusted accordingly to realize online fault processing of the power amplifier module and ensure the operating stability and reliability of the power amplifier.

[0036] The digital power amplifier according to the present invention is described in detail below with reference to the accompanying drawings.

[0037] Figure 1 A schematic diagram showing a specific embodiment of the digital power amplifier of the present invention is shown. Figure 1As shown, the digital power amplifier of the present invention comprises a digital controller 1, a driving module 2, a state acquisition module 3, n power amplifier modules 4, m power amplifier redundancy modules 40, a power synthesis module 5 and a filtering module 6, wherein n is an integer greater than 0, and m is an integer greater than or equal to 0. The digital controller 1 is used to collect and cache input signals, such as sampling and caching analog signals, and pulse width modulating the input signals to generate 2n groups of PWM control signals, the 2n groups of PWM control signals have the same frequency, and the phases differ by π / n in sequence, and the duty cycle of the PWM control signal is proportional to the amplitude of the input signal.

[0038] The specific process of pulse width modulating the input signal to generate 2n groups of PWM control signals includes: pulse width modulating the input signal with 2n digital triangular modulation carriers with the same frequency and phase difference of π / n to generate 2n groups of PWM control signals.

[0039] For example, n=4, m=1, that is, 4 power amplifier modules 4 and 1 power amplifier redundant module 40 are set. Correspondingly, after the digital controller 1 completes the analog signal sampling, the sampling signal is subjected to PWM pulse width modulation with 8 digital triangular modulation carriers with the same frequency and a phase difference of π / 4, to generate 8 groups of PWM control signals with the same frequency.

[0040] Each group of PWM control signals includes two PWM signals with complementary levels, and the duty cycle thereof is proportional to the amplitude of the collected input signal (ie, the sampling signal, that is, the collected analog signal).

[0041] The driving module 2 is located between the digital controller 1 and the n power amplifier modules 4 and is used to receive and amplify the 2n groups of PWM control signals sent by the digital controller 1 and complete the amplification of the PWM control signals to ensure that the power amplifier module 4 and the power amplifier redundancy module 40 can be driven.

[0042] The power amplifier module 4 is used to amplify the signal output by the driving module 2, and the power amplifier redundancy module 40 is used to replace the failed power amplifier module 4 to ensure that when a power amplifier module 4 fails, the digital power amplifier can still operate continuously and stably, thereby improving the service life, operation stability and reliability of the digital power amplifier.

[0043] The state acquisition module 3 is used to acquire the state information of the driving module 2, each power amplifier module 4, and the power amplifier redundancy module 40, and send the acquired state information to the digital controller 1, and the state information includes normal operation state information and fault information. Accordingly, the digital controller 1 is also used to receive the state information acquired by the state acquisition module 3, and after identifying the fault information in the state information, determine the number and position of the power amplifier modules 4 that have failed, and then control the power amplifier redundancy module 40 to replace the power amplifier module 4 that has failed to operate or control the power amplifier redundancy module 40 and the power amplifier module 4 that has not failed to redistribute the operation.

[0044] Specifically, after the digital controller 1 receives the status information sent by the status acquisition module 3, if it is determined that the number of faulty power amplifier modules 4 is k, the number k of faulty power amplifier modules 4 is compared with the number m of equipped power amplifier redundancy modules 40: if k≤m, k power amplifier redundancy modules 40 are controlled to replace the faulty power amplifier modules 4 one by one to operate; if k>m, 2 (n+mk) groups of PWM control signals are reallocated and operated to the (nk) power amplifier modules 4 and m power amplifier redundancy modules 40 that are not faulty; at the same time, bypass control information for the faulty power amplifier modules 4 is sent to the power synthesis module 5.

[0045] The power synthesis module 5 is used to synthesize the power signals output by several power amplifier modules 4 or the power amplifier module 4 and the power amplifier redundancy module 40 into one signal, that is, the signal after power amplification by the digital power amplifier. At the same time, the power synthesis module 5 is also used to receive the bypass control signal output by the digital controller 1, so as to adjust the winding corresponding to the signal path position of the failed power amplifier module 4 to be disconnected (the bypass switch is closed) according to the bypass control signal when a power amplifier module 4 fails, and adjust the winding corresponding to the signal path position of the power amplifier redundancy module 40 that is replaced to work, or control the redistribution of the winding corresponding to the signal path of the running power amplifier module 4 and the power amplifier redundancy module 40 to work according to the bypass control signal, so as to complete the fault bypass processing of the power amplifier module 4.

[0046] The filter module 6 is used to filter the power signal output by the power synthesis module 5 to generate a high-power analog power signal. This analog power signal is the analog power signal after power amplification by the digital power amplifier of this solution, which is used to drive the end load.

[0047] Figure 2 FIG. 1 shows a schematic diagram of the structure of a digital controller 1 in a specific embodiment. Figure 2As shown, the digital controller 1 includes a sampling / buffering module 11, a delay / timer 12, a fault processing module 13, 2n digital PWM modulators 14 and an output signal distribution module 15 running in parallel under the same clock beat. As shown in the figure, in this embodiment, n=4, that is, 2n=8.

[0048] The sampling / buffering module 11 is used to receive input signals, digitally quantize and buffer the input signals, and then transmit the input signals to the 2n digital PWM modulators 14 .

[0049] The delay / timer 12 is used to receive the input start / stop signal, and send 8 phase trigger signals TRG1-TRG8 with a time interval difference of T / 8 to 8 digital PWM modulators 14, so as to trigger the digital PWM modulators 14 and realize the control of the triangular modulation carrier phase of the digital PWM modulators 14. Among them, T is the carrier period of the digital PWM modulator 14.

[0050] The fault processing module 13 is used to receive the state information collected by the state acquisition module 3, identify the fault information in the state information and the power amplifier module 4 with fault corresponding to the fault information, count the number k of the power amplifier modules 4 with fault and send it to the delay / timer 12, and then send the enable control signal EN (EN1 to ENn as shown in the figure) to the output signal distribution module 15, and send the bypass control signal Ei to the power synthesis module 5. Correspondingly, the delay / timer 12 is also used to receive the number k of the power amplifier modules 4 with fault sent by the fault processing module 13, and compare and judge the fault number k with the number m of the power amplifier redundancy modules 40, and send the corresponding phase trigger signal to the 8 digital PWM modulators 14 according to the judgment result.

[0051] The eight digital PWM modulators 14 are used to complete the PWM modulation of the signal output by the adoption / buffer module 11; they are also used to control the carrier phase of the output PWM control signal according to the phase trigger signal after receiving the phase trigger signal sent by the delay / timer 12.

[0052] The output signal distribution module 15 is used to distribute PWM control signals to the power amplifier modules 4 and the power amplifier redundancy module 40 corresponding to the PWM control signals sent by the 2n digital PWM modulators according to the enable control signal after receiving the enable control signal EN sent by the fault processing module 13, so as to drive the power amplifier modules 4 that are not faulty and the power amplifier redundancy module 40 selected to replace the faulty power amplifier module 4 to run, avoid the faulty power amplifier module 4, and ensure the normal operation of the amplifier and the power amplification effect.

[0053] In an optional embodiment, the delay / timer 12 is also used to determine whether the number k of failed power amplifier modules 4 is greater than the number m of redundant power amplifier modules 40, specifically including: when it is determined that the number k of failed power amplifier modules 4 is greater than the number m of redundant power amplifier modules 40, the phase trigger time interval of 2n digital PWM modulators 14 is recalculated as T / (2×(n+mk)), and the reset 2×(n+mk) phase trigger signals are sent to the 2×(n+mk) digital PWM modulators 14. The reset phase trigger signal here is a restart signal for (nk) non-faulty power amplifier modules 4 and m redundant power amplifier modules 40, and the collected input signal is redistributed according to the signal paths of (n+mk) non-faulty power amplifier modules 4 and redundant power amplifier modules 40 and then sent. In this embodiment, the reset phase trigger signal is sent to the 2×(4+mk) digital PWM modulators 14. 2×(4+mk) digital PWM modulators 14 modulate the PWM carrier according to the reset phase trigger signal and output a PWM control signal corresponding to the reset signal to drive (nk) non-faulty power amplifier modules 4 and m power amplifier redundancy modules 40 to operate according to the reset rule in the reset signal.

[0054] Figure 3 A working waveform diagram of the digital PWM modulator in this embodiment is shown. Figure 2 and Figure 3 As shown, each digital PWM modulator 14 includes a counter 141 and a comparator 142 which are arranged in a one-to-one correspondence. The counter 141 is started by the corresponding phase trigger signal output by the delay / timer 12, and continuously counts up-down-up to generate a periodic digital triangular modulated carrier; the comparator 142 is used to compare the count value of the counter 141 with the digital quantization value of the input signal in real time under the clock beat, so as to output a modulated PWM control signal, which is a PWM signal with two complementary levels and a duty cycle proportional to the amplitude value of the input signal.

[0055] For example, the counter 141 of the first digital PWM modulator 14 is started by the phase trigger signal TRG1 output by the delay / timer 12, and starts to count up from zero under the beat of the clock CLK. When the count reaches the period count value, it starts to count down to zero, and repeats this process to generate a digital triangular modulation carrier with a period of T. The corresponding comparator 142 compares the count value of the counter 141 with the value of the collected input signal in real time. When the value of the collected input signal is greater than or equal to the value of the counter 141, the PWM1 output terminal of the comparator 142 outputs a high level and the / PWM1 output terminal outputs a low level; when the value of the input signal is less than the value of the counter 141, the PWM1 output terminal of the comparator 142 outputs a low level and the / PWM1 output terminal outputs a high level, thereby generating two complementary PWM control signals whose duty cycle is linearly proportional to the amplitude value of the input signal. The PWM control signal is input to the power amplifier module 4 through the driving module 2 for power amplification, and then synthesized by the power synthesis module 5 and filtered by the filtering module 6 to obtain a signal after the input signal is power amplified.

[0056] Figure 3 Medium S a is the waveform of the input signal (i.e., the sampled analog signal); PWM1, PWM2, PWM3, PWM4 to PWM8 are PWM signals outputted by eight comparators 142 in sequence; C c1 , C c2 , C c3 , C c4 The triangular modulated carrier waves generated by the four counters 141 corresponding to the PWM1 to PWM4 signals one by one, and the triangular modulated carrier waves generated by the other four counters 141 are not shown in the figure; S o1 The waveform of the signal output by the power synthesis module 5 after the signal output by the running power amplifier module 4 is synthesized; S o It is the output signal waveform after filtering by the filtering module 6, that is, the signal waveform output to the load after power amplification by the digital power amplifier of this solution.

[0057] In the present solution, the power amplifier redundancy module 40 is provided to replace the failed power amplifier module 4, and therefore the structure of the power amplifier redundancy module 40 is the same as that of the power amplifier module 4, that is, it can be regarded as n+m power amplifier modules 4 being provided in a digital power amplifier, wherein n power amplifier modules 4 are used for normal operation and m are used as backup power amplifier modules.

[0058] It should be pointed out that in actual implementation, adjacent power amplifier modules 4 can be electrically isolated to reduce electrical interference and insulation requirements between the power amplifier modules 4, thereby improving the electrical fault isolation capability of the power amplifier modules 4 and the reliability of the overall power amplifier.

[0059] In an optional embodiment, the power amplifier module 4 includes an H-bridge circuit, and two power switch devices in the same group of each H-bridge circuit receive the same group of PWM control signals output by the driving module 2 .

[0060] Figure 4 The schematic diagram of the structure of a specific embodiment of the power amplifier module 4 is shown. In this embodiment, the power amplifier module 4 is formed by four groups of power switch modules with the same circuit structure connected in an H-bridge manner, and each group of power switch modules includes a power switch device Q with a freewheeling diode. The power switch device Q can be an insulated gate bipolar transistor IGBT or a semiconductor field effect transistor MOSFET or a silicon carbide MOSFET.

[0061] Reference Figure 4 As shown, the gate of the insulated gate bipolar transistor Q1 in the first power switch module is connected to the PWM1 signal preliminarily amplified by the driving module 2, the emitter is respectively connected to the collector of the insulated gate bipolar transistor Q2 in the second power switch module and the output end OUT1+ of the H-bridge power amplifier module, and the collector is connected to the positive electrode of the direct current power supply DC; the gate of the insulated gate bipolar transistor Q2 in the second power switch module is connected to the / PWM1 signal preliminarily amplified by the driving module 2, and the emitter is connected to the negative electrode of the direct current power supply DC; the gate of the insulated gate bipolar transistor Q3 in the third power switch module is connected to the PWMn+1 signal preliminarily amplified by the driving module 2, the emitter is respectively connected to the collector of the insulated gate bipolar transistor Q4 in the fourth power switch module and the output end OUT1- of the H-bridge power amplifier module, and the collector is connected to the positive electrode of the direct current power supply DC; the gate of the insulated gate bipolar transistor Q4 in the fourth power switch module is connected to the / PWMn+1 signal preliminarily amplified by the driving module 2, and the emitter is connected to the negative electrode of the direct current power supply DC.

[0062] Figure 5 A schematic diagram showing a specific embodiment of the power synthesis module 5 is shown. Figure 5 As shown, in this solution, the power synthesis module 5 is a combined transformer, including n+m primary windings and n+m secondary windings, each primary winding is connected to the output end of the power amplifier module 4 or the power amplifier redundancy module 40 in a one-to-one correspondence, and the secondary windings are connected in series end to end in sequence, so as to synthesize the power signals output by each operating power amplifier module 4 or each operating power amplifier module 4 and the power amplifier redundancy module 40 to form a synthesized digital signal.

[0063] Among them, a bypass switch is connected in parallel to the output end of each secondary winding. When a power amplifier module 4 fails, the digital controller 1 controls the bypass switch corresponding to the failed power amplifier module 4 to close and controls the bypass switches corresponding to the power amplifier redundancy modules 40 with the same number as the failed power amplifier modules to open, thereby realizing bypass processing of the failed power amplifier module 4 and ensuring the normal and stable operation of the digital power amplifier.

[0064] The power synthesis module 5 synthesizes the amplified signals output by the operating power amplifier modules 4 and / or the power amplifier redundancy module 40 to form an amplified digital power signal. Its output terminal OUT+ / - transmits the synthesized digital power signal to the filter module 6, which is filtered by the filter module 6 to form a high-power analog power signal for output.

[0065] In an optional embodiment, the filtering module 6 may adopt an LC ladder filtering network composed of an LC passive low-pass filter to filter the power signal output by the power synthesis module 5 to generate a high-power analog power signal.

[0066] The contents described above may be implemented individually or in combination in various ways, and these variations are all within the protection scope of the present invention.

[0067] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the statement "comprise a ..." do not exclude the presence of other identical elements in the process, method, article or device comprising the elements.

[0068] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them. Although the present invention has been described in detail with reference to the above embodiments, a person skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some of the technical features can be replaced by equivalents; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A digital power amplifier, characterized in that: The digital power amplifier comprises a digital controller (1), a driving module (2), a state acquisition module (3), n power amplifier modules (4), m power amplifier redundancy modules (40), a power synthesis module (5) and a filtering module (6), wherein n is an integer greater than 0, and m is an integer greater than or equal to 0; The digital controller (1) is used to collect and cache input signals, and perform pulse width modulation on the input signals to generate 2n groups of PWM control signals, wherein the frequencies of the 2n groups of PWM control signals are the same, and the phases differ by π / n in sequence, and the duty cycle of the PWM control signals is proportional to the amplitude of the input signal; wherein each group of PWM control signals includes two PWM signals with complementary levels; The driving module (2) is located between the digital controller (1) and the n power amplifier modules (4), and is used to amplify the 2n groups of PWM control signals; The power amplifier module (4) is used to amplify the signal output by the driving module (2), and the power amplifier redundancy module (40) is used to replace the power amplifier module (4) that fails; The state acquisition module (3) is used to acquire state information of the driving module (2) and each of the power amplifier modules (4), wherein the state information includes normal operation state information and fault information; the digital controller (1) is also used to receive the state information acquired by the state acquisition module (3), and after identifying the fault information in the state information, control the power amplifier redundancy module (40) to replace the faulty power amplifier module (4) for operation or control the power amplifier redundancy module (40) and the non-faulty power amplifier module (4) to reallocate their operation, and send a bypass control signal to the power synthesis module (5); The power synthesis module (5) is used to receive the bypass control signal output by the digital controller (1), and synthesize the power signal output by the power amplifier module (4); The filtering module (6) is used to filter the power signal output by the power synthesis module (5) to generate an analog power signal; The step of pulse width modulating the input signal to generate 2n groups of PWM control signals comprises: Perform pulse width modulation on the input signal and 2n digital triangular modulation carriers with the same frequency and phase difference of π / n, to generate 2n groups of PWM control signals; The power amplifier module (4) comprises an H-bridge circuit, and two power switch devices in the same group of each H-bridge circuit receive the same group of PWM control signals output by the driving module (2).

2. The digital power amplifier according to claim 1, characterized in that: The digital controller (1) comprises a sampling / buffering module (11), a delay / timer (12), a fault processing module (13), 2n digital PWM modulators (14) and an output signal distribution module (15) which operate in parallel under the same clock beat; The sampling / buffering module (11) is used to receive an input signal, digitally quantize and buffer the input signal, and then transmit the input signal to the 2n digital PWM modulators (14); The fault processing module (13) is used to receive the state information collected by the state collection module (3), identify the fault information in the state information and the power amplifier module (4) with fault corresponding to the fault information, count the number k of the power amplifier modules (4) with fault and send it to the delay / timer (12), send an enable control signal EN to the output signal distribution module (15), and send a bypass control signal Ei to the power synthesis module (5); The delay / timer (12) is used to receive the start / stop signal, and send 2n phase trigger signals with time intervals of T / (2n) to the 2n digital PWM modulators (14), where T is the carrier cycle of the digital PWM modulator (14); it is also used to receive the number k of failed power amplifier modules (4), compare and determine the size of k and m, and send corresponding phase trigger signals to the 2n digital PWM modulators (14) according to the determination result; The 2n digital PWM modulators (14) are used to complete PWM modulation of the signal output by the sampling / buffering module (11); and are also used to control the carrier phase of the output PWM control signal according to the phase trigger signal after receiving the phase trigger signal; The output signal distribution module (15) is used for sending a PWM control signal to a corresponding power amplifier module (4) according to the enable control signal EN after receiving the enable control signal EN.

3. The digital power amplifier according to claim 2, characterized in that: The delay / timer (12) is also used to compare and determine that when the number k of failed power amplifier modules (4) is greater than the number m of redundant power amplifier modules (40), recalculate the phase trigger time interval of the digital PWM modulator (14) as T / (2×(n+mk)), and send reset 2×(n+mk) phase trigger signals to the 2×(n+mk) digital PWM modulators (14).

4. The digital power amplifier according to claim 2, characterized in that: Each of the digital PWM modulators (14) comprises a counter (141) and a comparator (142) arranged in a one-to-one correspondence, wherein the counter (141) is started by a corresponding phase trigger signal output by the delay / timer (12) to generate a periodic digital triangular modulation carrier; and the comparator (142) is used to compare the count value of the counter (141) with the digital quantization value of the input signal in real time to output the PWM control signal.

5. The digital power amplifier according to claim 1, wherein: The power synthesis module (5) is a combined transformer, comprising n+m primary windings and n+m secondary windings, each of the primary windings being connected in one-to-one correspondence to the output end of the power amplifier module (4) or the power amplifier redundancy module (40), and each of the secondary windings being connected in series end to end.

6. The digital power amplifier according to claim 5, characterized in that: A bypass switch is connected in parallel to the output end of each secondary winding. When a power amplifier module (4) fails, the digital controller (1) controls the bypass switch corresponding to the failed power amplifier module (4) to close and the bypass switches corresponding to the same number of power amplifier redundancy modules (40) as the failed power amplifier module (4) to open.

7. The digital power amplifier according to claim 1, wherein: The filtering module (6) comprises an LC passive low-pass filter.

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