Display devices

Abstract

A display device is provided, comprising a display area and a non-display area having pad areas. The display device includes: a substrate; a plurality of dams disposed on the substrate in the non-display area; an organic film disposed on the substrate in both the display and non-display areas and not overlapping with at least some of the dams; an outer planarization layer disposed outside the organic film and overlapping with some of the dams; and sensing lines disposed on the organic film and the outer planarization layer, wherein the plurality of dams includes inner dams, intermediate dams, and outermost dams, the non-display area includes a first non-display area disposed between the pad areas and the display area, and the outer planarization layer disposed in the first non-display area does not overlap with the outermost dam disposed in the first non-display area.

Description

[0001] Cross-references to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2019-0129020, filed on October 17, 2019, which is incorporated herein by reference for all purposes as if fully set forth herein. Technical Field

[0003] Exemplary embodiments of the present invention generally relate to a display device, and more specifically, to a display device that provides an organic film for easy control of the encapsulation film in non-display areas and improves sensing characteristics. Background Technology

[0004] With the development of multimedia, display devices have become increasingly important. Therefore, various display devices are being used, such as liquid crystal displays (LCDs) and organic light-emitting diode (OLED) displays. Among these, OLED displays are considered a next-generation display device due to their wide viewing angle.

[0005] However, because OLED displays are susceptible to degradation due to external moisture and oxygen, the light-emitting elements are sealed to protect them from these factors. Recently, to improve the thinness and flexibility of OLED displays, multiple organic films or multiple thin-film encapsulation (TFE) layers, including organic and inorganic films, are used as components for sealing the light-emitting elements.

[0006] The information disclosed in this background section is only for understanding the background of the inventive concept, and therefore may include information that does not constitute prior art. Summary of the Invention

[0007] One or more exemplary embodiments of the present invention provide an organic film for easy control of the encapsulation film in non-display areas and an improved sensing characteristic of the display device.

[0008] One or more exemplary embodiments of this disclosure also provide a display device that can prevent or reduce short circuits between the sensing line and sensing electrode of the sensing unit.

[0009] Additional features of the inventive concept will be set forth in the description which follows, and will be apparent in part from the description, or may be learned by practice of the inventive concept.

[0010] According to one or more exemplary embodiments of the present invention, a display device includes a display area and a non-display area having a pad area. The display device includes a substrate, a plurality of dams disposed on the substrate in the non-display area, an organic film disposed on the substrate in both the display and non-display areas and not overlapping with at least some of the dams, an outer planarization layer disposed outside the organic film and overlapping with some of the dams, and sensing lines disposed on the organic film and the outer planarization layer, wherein the plurality of dams includes an inner dam, a middle dam, and an outermost dam, the non-display area includes a first non-display area disposed between the pad area and the display area, and the outer planarization layer disposed in the first non-display area does not overlap with the outermost dam disposed in the first non-display area.

[0011] According to one or more exemplary embodiments, the sensing line may include multiple sensing lines.

[0012] According to one or more exemplary embodiments, the sensing lines may be spaced apart from each other on the organic film and the external planarization layer.

[0013] According to one or more exemplary embodiments, the outer planarization layer may overlap with the organic film.

[0014] According to one or more exemplary embodiments, the sensing lines may be spaced apart from each other on an external planarization layer.

[0015] According to one or more exemplary embodiments, the height of the outermost dam may be greater than the height of the inner dam and the intermediate dam.

[0016] According to one or more exemplary embodiments, an organic membrane may include a monomer composition or an organic material.

[0017] According to one or more exemplary embodiments, the non-display area may further include a second non-display area disposed on a side different from the side on which the first non-display area and the pad area are disposed, and the outer planarization layer disposed in the second non-display area may overlap with the inner dam and the intermediate dam.

[0018] According to one or more exemplary embodiments, the outer planarization layer may overlap with at least a portion of the outermost dam.

[0019] According to one or more exemplary embodiments, the inner dam disposed in the first non-display area and the inner dam disposed in the second non-display area may be integrally formed.

[0020] According to one or more exemplary embodiments of the present invention, a display device with excellent reliability can be provided by forming a dam of an organic film for controlling the encapsulation film in a non-display area of ​​the display device and providing an external planarization layer above the dam.

[0021] Furthermore, since the outer planarization layer located in the non-display area adjacent to the pad area can be configured not to overlap with the outermost dam, defects such as open circuits and short circuits caused by the step portion created by the dam located at the outermost position can be prevented or reduced.

[0022] It should be understood that the foregoing general description and the following detailed description are exemplary and illustrative, and are intended to provide further explanation of the invention as claimed. Attached Figure Description

[0023] The accompanying drawings are included to provide a further understanding of the inventive concept and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the inventive concept and, together with the description, serve to explain the principles of the inventive concept.

[0024] Figure 1 This is a perspective view illustrating a display device according to an embodiment of the concept of the present invention.

[0025] Figure 2 This is a plan view illustrating a display device according to an embodiment of the concept of the present invention.

[0026] Figure 3 and Figure 4 It is shown Figure 1 A side view of the display device.

[0027] Figure 5 It is along Figure 2 A cross-sectional view of an example cut by line V-V'.

[0028] Figure 6 This illustrates in detail embodiments based on the concept of the present invention. Figure 5 A plan view of the display unit.

[0029] Figure 7 This illustrates in detail embodiments based on the concept of the present invention. Figure 5 A plan view of the sensing unit.

[0030] Figure 8 It is along Figure 2 A cross-sectional view of an example cut by line VIII-VIII'.

[0031] Figure 9 This is a plan view showing an example of the dam layout for display devices.

[0032] Figure 10 It is shown Figure 9 An enlarged view of an example of region A being magnified.

[0033] Figure 11 It is along Figure 10A cross-sectional view of an example cut by line X-X'.

[0034] Figure 12 It is along Figure 10 Another example of a cross-sectional view taken by the line X-X'.

[0035] Figure 13 It is shown Figure 9 Another example of an enlarged view where region A is magnified.

[0036] Figure 14 It is along Figure 13 A cross-sectional view of an example taken by line XIII-XIII'.

[0037] Figure 15 It is along Figure 13 Another example of a cross-sectional view taken by line XIII-XIII'.

[0038] Figure 16 It is shown Figure 9 A magnified view of region B.

[0039] Figure 17 It is along Figure 16 The example sectional view is taken by the line XVI-XVI'.

[0040] Figure 18 It is along Figure 16 Another example of a cross-sectional view taken by line XVI-XVI'.

[0041] Figure 19 It is along Figure 16 Example of a cross-sectional view taken by the line XIX-XIX'

[0042] Figure 20 This is a plan view showing another example of the dam layout for the display equipment.

[0043] Figure 21 This is a plan view showing yet another example of the dam arrangement for the display device.

[0044] Figure 22 This is a plan view showing yet another example of the dam arrangement for the display equipment. Detailed Implementation

[0045] In the following description, numerous specific details are set forth for purposes of explanation in order to provide a thorough understanding of various exemplary embodiments. However, it will be apparent that various exemplary embodiments may be practiced without these specific details or with one or more equivalent arrangements. In the accompanying drawings, the dimensions and relative dimensions of layers, regions, etc., may be exaggerated for clarity and descriptive purposes. Furthermore, the same reference numerals denote the same elements.

[0046] When an element or layer is referred to as being on, connected to, or coupled to another element or layer, it may be directly on, directly connected to, or directly coupled to that other element or layer, or there may be intermediate elements or layers. However, when an element or layer is referred to as being directly on, directly connected to, or directly coupled to another element or layer, there are no intermediate elements or layers. For the purposes of this disclosure, “at least one of X, Y, and Z” and “at least one selected from the group consisting of X, Y, and Z” can be interpreted as only X, only Y, only Z, or any combination of two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ. The same reference numerals always denote the same element. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0047] Although the terms first, second, etc., may be used herein to describe various elements, components, regions, layers, and / or portions, these elements, components, regions, layers, and / or portions should not be limited by these terms. These terms are used to distinguish one element, component, region, layer, and / or portion from another element, component, region, layer, and / or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, region, layer, and / or portion discussed below may be referred to as the second element, component, region, layer, and / or portion.

[0048] Spatial relative terms, such as “below,” “under,” “lower,” “above,” “upper,” etc., may be used herein for descriptive purposes and thereby describe the relationship of one element or feature relative to another element or feature, as illustrated in the accompanying drawings. In addition to the orientations depicted in the drawings, spatial relative terms are intended to also include different orientations of the device during use, operation, and / or manufacture. For example, if the device in the drawings is flipped, an element described as “below” or “under” another element or feature would then be oriented “above” that element or feature. Thus, the exemplary term “below” can include both above and below orientations. Furthermore, the device may be oriented in other ways (e.g., rotated 90 degrees or in other orientations), and in such cases, the spatially relative descriptive terms used herein should be interpreted accordingly.

[0049] The terminology used herein is for the purpose of describing particular embodiments and is not intended to be limiting. As used herein, the singular forms “a,” “an,” and “described” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, when used in this specification, the terms “comprises,” “comprising,” “includes,” and / or “including” indicate the presence of the stated features, integrals, steps, operations, elements, components, and / or groups thereof, but do not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof.

[0050] This document describes various exemplary embodiments with reference to cross-sectional views and / or exploded views, which are schematic illustrations of idealized exemplary embodiments and / or intermediate structures. Thus, variations in shape relative to the illustrations can be anticipated due to, for example, manufacturing techniques and / or tolerances. Therefore, the exemplary embodiments disclosed herein should not necessarily be construed as limited to the shapes of the specific regions shown, but rather include shape deviations due to, for example, manufacturing processes. In this way, the regions shown in the figures can be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the areas of the device, and are therefore not necessarily intended to be limiting.

[0051] As is customary in the art, exemplary embodiments are described and illustrated in the accompanying drawings according to functional blocks, units, and / or modules. Those skilled in the art will appreciate that these blocks, units, and / or modules are physically implemented by electronic (or optical) circuits that can be formed using semiconductor-based manufacturing techniques or other manufacturing techniques, such as logic circuits, discrete components, microprocessors, hardwired circuits, memory elements, wiring connections, etc. Where blocks, units, and / or modules are implemented by microprocessors or other similar hardware, they can be programmed and controlled using software (e.g., microcode) to perform the various functions discussed herein, and can optionally be driven by firmware and / or software. It is also contemplated that each block, unit, and / or module can be implemented by dedicated hardware, or as a combination of dedicated hardware performing certain functions and processors performing other functions (e.g., one or more programmable microprocessors and associated circuitry). Furthermore, without departing from the scope of the inventive concept, each block, unit, and / or module of some exemplary embodiments may be physically divided into two or more interactive and discrete blocks, units, and / or modules. Furthermore, without departing from the scope of the inventive concept, some exemplary blocks, units and / or modules can be physically combined into more complex blocks, units and / or modules.

[0052] Unless otherwise specified, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains. Terms, such as those defined in commonly used dictionaries, shall be interpreted as having a meaning consistent with their meaning in the context of the relevant field and shall not be interpreted in an idealized or overly formal sense unless expressly so specified herein.

[0053] In the following description, specific exemplary embodiments will be described with reference to the accompanying drawings.

[0054] Figure 1 This is a perspective view illustrating a display device according to an exemplary embodiment. Figure 2 It is shown Figure 1 A floor plan of the display device. Figure 3 and Figure 4 It is shown Figure 1 A side view of the display device.

[0055] In this specification, the terms "above," "upper," "top," and "upper surface" refer to the upward direction, i.e., the Z-axis direction, based on the display panel 100; while the terms "below," "lower," "bottom," and "lower surface" refer to the downward direction, i.e., the direction opposite to the Z-axis direction, based on the display panel 100. Furthermore, the terms "left," "right," "up," and "down" refer to the direction when viewing the display panel 100 in a plan view. For example, the term "left" refers to the direction opposite to the X-axis direction, the term "right" refers to the X-axis direction, the term "up" refers to the Y-axis direction, and the term "down" refers to the direction opposite to the Y-axis direction.

[0056] Reference Figure 1 , Figure 2 , Figure 3 and Figure 4 The display device 10 is a device for displaying still images or moving images. The display device 10 can be used in portable electronic devices such as mobile phones, smartphones, tablet PCs, smartwatches, watch phones, mobile communication terminals, electronic notebooks, e-books, portable multimedia players (PMPs), navigation devices, and ultra-mobile PCs (UMPCs), and can also be used as a display screen for various products such as televisions, laptops, monitors, billboards, and Internet of Things (IoT) devices. The display device 10 can be any of an organic light-emitting display device, a liquid crystal display device, a plasma display device, a field emission display device, an electrophoretic display device, an electrowetting display device, a quantum dot light-emitting display device, and a micro light-emitting diode (LED) display device. Hereinafter, the display device 10 will primarily be described as an organic light-emitting display device, but this disclosure is not limited thereto.

[0057] A display device 10 according to an exemplary embodiment includes a display panel 100, a display driving circuit 200, a circuit board 300, and a touch driving circuit 400.

[0058] The display panel 100 may include a main area MA and a protruding area PA that protrudes from one side of the main area MA.

[0059] The main region MA can be formed into a rectangular shape, having a short side in a first direction (X-axis direction) and a long side in a second direction (Y-axis direction) intersecting the first direction (X-axis direction). The corner where the short side in the first direction (X-axis direction) and the long side in the second direction (Y-axis direction) intersect can be rounded to have a certain curvature, or formed at a right angle. The planar shape of the display device 10 is not limited to a rectangular shape, but can be formed into another polygonal shape, a circular shape, or an elliptical shape. The main region MA can be formed flat, but this disclosure is not limited thereto. The main region MA may include curved portions formed at its left and right ends. In this case, the curved portions may have a constant curvature or a variable curvature.

[0060] The main region MA can include the display region DA and the non-display region NDA. Pixels are formed in the display region DA to display the image, and the non-display region NDA is the surrounding area of ​​the display region DA.

[0061] Not only pixels, but also scan lines, data lines, and power lines connected to the pixels can be set in the display area DA. When the main area MA includes a curved portion, the display area DA can be set on the curved portion. In this case, the image of the display panel 100 can also be displayed on the curved portion.

[0062] The non-display area NDA can be defined as the area from the outside of the display area DA to the edge of the display panel 100. A scan driver configured to apply scan signals to scan lines and a connection line configured to connect data lines and display drive circuit 200 can be provided in the non-display area NDA.

[0063] The protruding region PA can protrude from one side of the main region MA. For example, as shown... Figure 2 As shown, the protruding region PA can protrude from the lower side of the main region MA. The length of the protruding region PA in the first direction (X-axis direction) can be less than the length of the main region MA in the first direction (X-axis direction).

[0064] The protruding region PA may include a curved region BA and a pad region PDA. In this case, the pad region PDA may be located on one side of the curved region BA, and the main region MA may be located on the other side of the curved region BA. For example, the pad region PDA may be located on the lower side of the curved region BA, and the main region MA may be located on the upper side of the curved region BA.

[0065] The display panel 100 can be formed to be flexible, thus bendable, foldable, or rollable. Therefore, the display panel 100 can be bent from the bending region BA in the thickness direction (Z-axis direction). For example... Figure 3 As shown, before the display panel 100 is bent, one surface of the pad area of ​​the display panel 100 PDA faces upwards. Figure 4 As shown, after the display panel 100 is bent, one surface of the pad area PDA of the display panel 100 faces downward. Therefore, the pad area PDA can be disposed on the lower part of the main area MA, and thus can overlap with the main area MA.

[0066] The pads electrically connected to the display driver circuit 200 and the circuit board 300 can be set in the pad area of ​​the display panel 100 PDA.

[0067] The lower panel cover 101 can be disposed below the display panel 100. The lower panel cover 101 can be attached to the lower surface of the display panel 100 by means of an adhesive component. The adhesive component can be a pressure-sensitive adhesive (PSA).

[0068] The lower cover 101 of the panel may include a light-absorbing member configured to absorb light incident from the outside, a buffer member configured to absorb external impacts, and a heat-dissipating member configured to effectively dissipate heat from the display panel 100.

[0069] A light-absorbing component may be disposed below the display panel 100. The light-absorbing component prevents light transmission to prevent components disposed below the light-absorbing component (i.e., circuit board 300, etc.) from being seen from above the display panel 100. The light-absorbing component may include a light-absorbing material, such as black pigment or black dye.

[0070] A buffer member may be disposed below the light-absorbing member. The buffer member absorbs external impacts to prevent or reduce damage to the display panel 100. The buffer member may comprise a single layer or multiple layers. For example, the buffer member may be made of a polymer resin, such as polyurethane, polycarbonate, polypropylene, or polyethylene; or it may be made of an elastic material, such as a sponge formed by molding rubber light emission, a urethane-based material, or an acrylic-based material. The buffer member may be a buffer layer.

[0071] The heat dissipation component may be disposed below the buffer component. The heat dissipation component may include a first heat dissipation layer and a second heat dissipation layer. The first heat dissipation layer includes graphite or carbon nanotubes, and the second heat dissipation layer is formed as a thin film made of metal (e.g., copper, nickel, ferrite, or silver) that is capable of shielding electromagnetic waves and has high thermal conductivity.

[0072] like Figure 3 As shown, to facilitate bending of the display panel 100, the lower panel cover 101 may not be disposed within the bending region BA of the display panel 100. Since the display panel 100 bends within the bending region BA, the pad region PDA can be disposed below the main region MA to overlap with it. Therefore, the lower panel cover 101 disposed in the main region MA of the display panel 100 and the lower panel cover 101 disposed in the pad region PDA of the display panel 100 can be connected by an adhesive member 102. The adhesive member 102 may be a PSA (Power Supplemental Assembly).

[0073] The display driver circuit 200 outputs signals and voltages for driving the display panel 100. For example, the display driver circuit 200 can provide data voltages to data lines. Furthermore, the display driver circuit 200 can provide power supply voltages to power lines and scan control signals to the scan driver. The display driver circuit 200 can be formed as an integrated circuit (IC) and can be mounted on the display panel 100 of the PDA in the pad area using a chip-on-glass (COG) method, a chip-on-plastic (COP) method, or an ultrasonic welding method, but this disclosure is not limited thereto. For example, the display driver circuit 200 can be mounted on a circuit board 300.

[0074] The pads may include display pads electrically connected to the display driver circuit 200 and sensing pads electrically connected to the sensing lines.

[0075] An anisotropic conductive film can be used to attach the circuit board 300 to the pads. As a result, the leads of the circuit board 300 can be electrically connected to the pads. The circuit board 300 can be a flexible film, such as a flexible printed circuit board, a printed circuit board, or a chip on film.

[0076] The touch driving circuit 400 can be connected to the sensing layer TSL of the display panel 100 (see...). Figure 5 The touch driving circuit 400 applies a driving signal to the sensing electrodes of the sensing layer TSL and measures the capacitance value of the sensing electrodes. The driving signal can be a signal with multiple driving pulses. The touch driving circuit 400 can determine whether a user's touch has been input and whether the user is close to the display device 10 based on the capacitance value. A user's touch refers to an object such as a user's finger or a pen directly touching a surface of the display device 10 disposed on the sensing layer TSL. A user's proximity refers to an object such as a user's finger or a pen hovering above said surface of the display device 10.

[0077] The touch driver circuit 400 can be disposed on the circuit board 300. The touch driver circuit 400 can be formed as an IC and mounted on the circuit board 300.

[0078] Figure 5 It is along Figure 2 A sectional view taken by line V-V'.

[0079] Reference Figure 5 The display panel 100 may include a display unit DU and a sensing unit TDU. The display unit DU includes a substrate SUB and a thin film transistor layer TFTL, a light-emitting element layer EML and a thin film encapsulation layer TFEL disposed on the substrate SUB. The sensing unit TDU includes a sensing layer TSL.

[0080] The substrate SUB can be made of an insulating material such as glass, quartz, or polymer resin. Examples of polymer resins may be selected from the following: polyethersulfone (PES), polyacrylate (PA), polyarylate (PAR), polyetherimide (PEI), polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polyphenylene sulfide (PPS), polyimide (PI), polycarbonate (PC), cellulose triacetate (CAT), cellulose acetate propionate (CAP), and combinations thereof. Alternatively, the substrate SUB may comprise a metallic material.

[0081] The substrate SUB can be a rigid substrate or a flexible substrate that is bendable, foldable, or rollable. When the substrate SUB is a flexible substrate, it can be made of PI, but this disclosure is not limited thereto.

[0082] A thin-film transistor layer (TFTL) can be disposed on a substrate (SUB). Within the TFTL, not only can the thin-film transistors for each pixel be formed, but also scan lines, data lines, power lines, scan control lines, and routing lines connecting pads and data lines can be formed. Each thin-film transistor may include a gate electrode, a semiconductor layer, a source electrode, and a drain electrode. When... Figure 6 When the scan driver SD is formed in the non-display area NDA of the display panel 100 as shown, the scan driver SD may include a thin-film transistor.

[0083] A thin-film transistor layer (TFTL) can be disposed in the display area (DA) and the non-display area (NDA). Specifically, the thin-film transistors, scan lines, data lines, and power lines of each pixel in the TFTL can be disposed in the display area (DA). The scan control lines and connection lines of the TFTL can be disposed in the non-display area (NDA). References will follow below. Figure 8 Describe the thin-film transistor layer (TFTL) in detail.

[0084] A light-emitting element layer (EML) can be disposed on a thin-film transistor layer (TFTL). The EML can include pixels and pixel-defining films defining the pixels. Each pixel includes a first electrode, a light-emitting layer, and a second electrode. The light-emitting layer can be an organic light-emitting layer comprising organic materials. In this case, the light-emitting layer can include a hole transport layer, an organic light-emitting layer, and an electron transport layer. When a certain voltage is applied to the first electrode and a cathode voltage is applied to the second electrode through the thin-film transistors of the TFTL, holes and electrons move through the hole transport layer and the electron transport layer to the organic light-emitting layer and combine with each other in the organic light-emitting layer to emit light. The pixels of the EML can be disposed in the display area (DA). The following will refer to... Figure 8 Describe the light-emitting element layer (EML) in detail.

[0085] A thin-film encapsulation layer (TFEL) can be disposed on the light-emitting element layer (EML). The TFEL is used to prevent or reduce the penetration of oxygen or moisture into the EML. For this purpose, the TFEL may include at least one inorganic film. The inorganic film may be a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer, but is not limited thereto. Furthermore, the TFEL protects the EML from impurities such as dust. For this purpose, the TFEL may include at least one organic film. The organic film may be made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc., but this disclosure is not limited thereto.

[0086] The thin-film encapsulation layer TFEL can be disposed in both the display area DA and the non-display area NDA. Specifically, the thin-film encapsulation layer TFEL can be disposed to cover the light-emitting element layer EML of the display area DA and the non-display area NDA, and to cover the thin-film transistor layer TFTL of the non-display area NDA. References will follow below. Figure 8 Describe the thin-film encapsulation layer TFEL in detail.

[0087] The sensing layer TSL can be disposed on the thin-film encapsulation layer TFEL. Since the sensing layer TSL is disposed directly on the thin-film encapsulation layer TFEL, the thickness of the display device 10 can be reduced compared to the case where a separate touch panel including the sensing layer TSL is attached to the thin-film encapsulation layer TFEL.

[0088] The sensing layer TSL may include multiple sensing electrodes for sensing a user's touch using a mutual capacitance method, and sensing lines connecting the pads and the sensing electrodes. For example... Figure 7 As shown, the sensing electrodes of the sensing layer TSL can be disposed in the sensing region TSA, which overlaps with the display region DA. Figure 7As shown, the sensing lines of the sensing layer TSL can be configured to partially overlap with the sensing area TSA. Therefore, the non-display area NDA of the display device 10 can be minimized.

[0089] A polarizing film can be disposed on the sensing layer TSL. The polarizing film may include a linear polarizer and a phase retardation film, such as a quarter-wave plate. In this case, the phase retardation film can be disposed on the sensing layer TSL, and the linear polarizer can be disposed on the phase retardation film. Furthermore, a cover window can be disposed on the polarizing film. The cover window can be attached to the polarizing film using a transparent adhesive such as an optically transparent adhesive (OCA) film.

[0090] Figure 6 It is shown that... Figure 5 A plan view of the components related to the display unit.

[0091] For ease of description, Figure 6 The image only shows the pixel P of the display unit DU, the scan line SL, the data line DL, the scan control line SCL, the fan-out line DLL, the scan driver SD, the display driver circuit 200, and the display pad DP.

[0092] Reference Figure 6 Scan lines SL, data lines DL, and pixels P are disposed in the display area DA. Scan lines SL can be formed parallel to each other in a first direction (X-axis direction), and data lines DL can be formed parallel to each other in a second direction (Y-axis direction) intersecting the first direction (X-axis direction). Fan-out lines DLL can include at least one line formed parallel to the data lines DL in the second direction (Y-axis direction) and multiple lines branching from said at least one line in the first direction (X-axis direction).

[0093] Each pixel P can be connected to at least one scan line SL and one data line DL. Each pixel P can include a thin-film transistor, an organic light-emitting element, and a capacitor, the thin-film transistor including a driving transistor and at least one switching transistor. When a scan signal is applied from the scan line SL, each pixel P can receive a data voltage from the data line DL and can provide a driving current to the organic light-emitting element to emit light in response to the data voltage applied to the gate electrode of the organic light-emitting element. The light-emitting element is primarily described as an organic light-emitting element including an anode, an organic light-emitting layer, and a cathode, but this disclosure is not limited thereto. The light-emitting element can be implemented as a quantum dot light-emitting element including an anode, a quantum dot light-emitting layer, and a cathode; an inorganic light-emitting element including an anode; an inorganic light-emitting layer including an inorganic semiconductor and a cathode; or a micro light-emitting element including a micro light-emitting diode.

[0094] The scan driver SD is connected to the display driver circuit 200 via multiple scan control lines SCL. Therefore, the scan driver SD can receive scan control signals from the display driver circuit 200. The scan driver SD generates scan signals in response to the scan control signals and provides the scan signals to the scan lines SL.

[0095] exist Figure 6 In this illustration, the scan driver SD is shown to be formed in the non-display area NDA outside the left side of the display area DA, but this disclosure is not limited thereto. For example, the scan driver SD may be formed in the non-display area NDA outside the left and right sides of the display area DA.

[0096] The display driver circuit 200 is connected to the display pad DP and receives digital video data and timing signals. The display driver circuit 200 converts the digital video data into analog positive / negative data voltages and provides these analog positive / negative data voltages to the data line DL via the fan-out line DLL. Furthermore, the display driver circuit 200 generates a scan control signal for controlling the scan driver SD and provides this scan control signal via multiple scan control lines SCL. The scan signal from the scan driver SD is used to select the pixel P to which the data voltage is provided, and the data voltage is provided to the selected pixel P. The display driver circuit 200 can be formed as an IC and can be attached to the substrate SUB via a COG method, a COP method, or an ultrasonic bonding method, but this disclosure is not limited thereto. For example, the display driver circuit 200 can be mounted on a circuit board 300.

[0097] like Figure 6 As shown, the display panel 100 may include a display pad DP electrically connected to the display driving circuit 200 and sensing pads TP1 and TP2 electrically connected to sensing lines. The display pad region DPA, where the display pad DP is located, may be positioned between a first sensing pad region TPA1, where a first sensing pad TP1 is located, and a second sensing pad region TPA2, where a second sensing pad TP2 is located. Figure 6 As shown, the display pad area DPA can be set at the center of one end of the protruding area PA, the first sensing pad area TPA1 can be set at the left side of one end of the protruding area PA, and the second sensing pad area TPA2 can be set at the right side of one end of the protruding area PA.

[0098] An anisotropic conductive film can be used to attach the circuit board 300 to the display pad DP and the sensing pads TP1 and TP2. Therefore, the leads of the circuit board 300 can be electrically connected to the display pad DP and the sensing pads TP1 and TP2. The circuit board 300 can be a flexible film, such as a flexible printed circuit board, a printed circuit board, or a chip-on-film device.

[0099] The touch driving circuit 400 can be connected to the sensing electrodes of the sensing unit TDU of the display panel 100. The touch driving circuit 400 applies a driving signal to the sensing electrodes and measures the mutual electrostatic capacitance (hereinafter referred to as "mutual capacitance") of the sensing electrodes. The driving signal can be a signal with multiple driving pulses. The touch driving circuit 400 can calculate the touch coordinates of the input touch based on the mutual capacitance.

[0100] Figure 7 This is a detailed illustration according to an exemplary embodiment. Figure 5 A plan view of the sensing unit.

[0101] For ease of description, Figure 7 Only the sensing electrodes TE and RE, sensing lines TL1, TL2 and RL, and sensing pads TP1 and TP2 are shown.

[0102] Reference Figure 7 The sensing unit TDU includes a sensing area TSA for sensing user touch and a sensing peripheral area TPA disposed around the sensing area TSA. The sensing area TSA may overlap with the display area DA of the display unit DU, and the sensing peripheral area TPA may overlap with the non-display area NDA of the display unit DU.

[0103] Sensing electrodes TE and RE can be disposed within the sensing region TSA. Sensing electrodes RE and TE can include a first sensing electrode TE and a second sensing electrode RE. Figure 7 In the exemplary embodiment shown, the first sensing electrode TE is described as a driving electrode and the second sensing electrode RE is a sensing electrode.

[0104] Multiple first sensing electrodes TE can be arranged in multiple columns in a second direction (Y-axis direction), and multiple second sensing electrodes RE can be arranged in multiple rows in a first direction (X-axis direction). The first sensing electrodes TE in each of the multiple columns arranged in the second direction (Y-axis direction) can be electrically connected. Furthermore, the second sensing electrodes RE in each of the multiple rows arranged in the first direction (X-axis direction) can be electrically connected.

[0105] The first sensing electrode TE and the second sensing electrode RE can be formed into a rhombus or a triangle shape in the planar view. Specifically, the first sensing electrode TE and the second sensing electrode RE located at the edge of the sensing area TSA can be formed into a triangle in the planar view, while the other first sensing electrodes TE and second sensing electrodes RE can be formed into a rhombus shape in the planar view. Figure 7 In the diagram, each of the first sensing electrode TE and the second sensing electrode RE is shown as having a planar shape of rhombus or triangle, but the planar shape of each of the first sensing electrode TE and the second sensing electrode RE is not limited to this.

[0106] The first sensing electrode TE and the second sensing electrode RE can be formed as a mesh electrode. When the sensing layer TSL, including the first sensing electrode TE and the second sensing electrode RE, is directly formed on the thin-film encapsulation layer TFEL, the distance between the second electrode of the light-emitting element layer EML and the first sensing electrode TE or the second sensing electrode RE of the sensing layer TSL may be small. Therefore, a very high parasitic capacitance may form between the second electrode of the light-emitting element layer EML and the first sensing electrode TE or the second sensing electrode RE of the sensing layer TSL. Therefore, in order to reduce the parasitic capacitance, the first sensing electrode TE and the second sensing electrode RE can be formed as a mesh electrode, instead of unpatterned electrodes made of a conductive layer of a transparent oxide such as indium tin oxide (ITO) or indium zinc oxide (IZO).

[0107] The first sensing electrode TE and the second sensing electrode RE can be electrically isolated from each other. The first sensing electrode TE and the second sensing electrode RE can be arranged to be spaced apart from each other.

[0108] To prevent or reduce short circuits between the first sensing electrode TE and the second sensing electrode RE in their intersection region, the first sensing electrodes TE, which are adjacent to each other in the second direction (Y-axis direction), can be electrically connected by a connecting electrode BE. In this case, the first sensing electrode TE and the second sensing electrode RE can be disposed in the same layer, and the connecting electrode BE can be disposed in a layer different from the first sensing electrode TE and the second sensing electrode RE. Furthermore, the second sensing electrode RE electrically connected in the first direction (X-axis direction) and the first sensing electrode TE electrically connected in the second direction (Y-axis direction) are electrically insulated from each other.

[0109] The sensing pads TP1 and TP2, sensing lines TL1, TL2 and RL, guard lines and ground lines can be set in the sensing perimeter area TPA.

[0110] Sensing pads TP1 and TP2 can be disposed on one side of the display device 10. The circuit board 300 can be attached to the sensing pads TP1 and TP2 using an anisotropic conductive film. As a result, the sensing pads TP1 and TP2 can be electrically connected to the circuit board 300. The sensing pads TP1 and TP2 may include a first sensing pad TP1 and a second sensing pad TP2.

[0111] The sensing lines TL1, TL2 and RL may include a first sensing line TL1, a second sensing line TL2 and a third sensing line RL.

[0112] One end of the first sensing line TL1 can be connected to one side of the first sensing electrode TE. That is, one end of the first sensing line TL1 can be connected to the first sensing electrode TE located on the lower side of the sensing region TSA. Among the four sides of the sensing region TSA, the lower side of the sensing region TSA can be the side closest to the sensing pad areas TPA1 and TPA2 where sensing pads TP1 and TP2 are located. The other end of the first sensing line TL1 can be connected to some of the first sensing pads TP1 in the first sensing pad area TPA1. In other words, the first sensing line TL1 can be used to connect one side of the first sensing electrode TE to the first sensing pad TP1.

[0113] One end of the second sensing line TL2 can be connected to the other side of the first sensing electrode TE. That is, one end of the second sensing line TL2 can be connected to the first sensing electrode TE located on the upper side of the sensing region TSA. The upper side of the sensing region TSA can be the side opposite to the lower side of the sensing region TSA. Among the four sides of the sensing region TSA, the upper side of the sensing region TSA can be the side furthest from the sensing pad areas TPA1 and TPA2 where sensing pads TP1 and TP2 are located. The second sensing line TL2 can be connected to the first sensing electrode TE located on the upper side of the sensing region TSA via the lower and left sides of the sensing region TSA. The other end of the second sensing line TL2 can be connected to other first sensing pads TP1 in the first sensing pad area TPA1. That is, the second sensing line TL2 can be used to connect the other side of the first sensing electrode TE to the first sensing pad TP1.

[0114] One end of the third sensing line RL can be connected to one side of the second sensing electrode RE. That is, one end of the third sensing line RL can be connected to the second sensing electrode RE located on the right side of the sensing area TSA. The right side of the sensing area TSA can be the side opposite to the left side, and can be the side located between the upper and lower sides in the second direction (Y-axis direction). The other end of the third sensing line RL can be connected to the second sensing pad TP2 in the second sensing pad area TPA2. In other words, the third sensing line RL can be used to connect the second sensing electrode RE and the second sensing pad TP2.

[0115] The first sensing electrode TE and the second sensing electrode RE can be driven by mutual capacitance or self-capacitance.

[0116] First, when the first sensing electrode TE and the second sensing electrode RE are driven by mutual capacitance, a touch drive signal can be provided to the first sensing electrode TE through the first sensing line TL1 and the second sensing line TL2 to charge the mutual capacitance formed in the cross region between the first sensing electrode TE and the second sensing electrode RE. Then, the amount of charge change of the mutual capacitance is measured through the second sensing electrode RE, and whether a touch is input is determined based on the amount of charge change of the mutual capacitance. The touch drive signal can be a signal with multiple touch drive pulses.

[0117] Second, when the first sensing electrode TE and the second sensing electrode RE are driven by the self-capacitance method, touch drive signals are provided to all the first sensing electrodes TE and the second sensing electrodes RE through the first sensing line TL1, the second sensing line TL2, and the third sensing line RL to charge the self-capacitance of the first sensing electrodes TE and the second sensing electrodes RE. Then, the change in charge of the self-capacitance is measured through the first sensing line TL1, the second sensing line TL2, and the third sensing line RL, and whether a touch input is performed is determined based on the change in charge of the self-capacitance.

[0118] For ease of description, the following text will primarily describe driving the first sensing electrode TE and the second sensing electrode RE using a mutual capacitance method. In this method, multiple touch-driven pulses are applied to the first sensing electrode TE, and the change in charge of the mutual capacitance is measured via a third sensing line RL connected to the second sensing electrode RE. In this case, the first sensing electrode TE can be used as a driving electrode, the second sensing electrode RE can be used as a sensing electrode, the first sensing line TL1 and the second sensing line TL2 can be used as driving lines, and the third sensing line RL can be used as a sensing line.

[0119] Although not shown, the sensing lines and guard lines can also be located outside the sensing lines TL1, TL2, and RL. The guard line can be located outside the outermost sensing lines TL1, TL2, and RL, and the ground line can be located outside the guard line. A ground voltage can be applied to the ground line. Therefore, when static electricity is applied from the outside, the static electricity can be discharged to the ground line. The guard line can be located between the outermost sensing lines TL1, TL2, and RL and the ground line. Because the guard line is located between the outermost sensing lines TL1, TL2, and RL and the ground line, the guard line can be used to minimize the effect of changes in the ground voltage on the sensing lines TL1, TL2, and RL.

[0120] When the sensing electrodes TE and RE are driven using the mutual capacitance method, a ground voltage can be applied to the ground line. Furthermore, when the sensing electrodes TE and RE are driven using the self-capacitance method, the same drive signal applied to the sensing lines TL1, TL2, and RL can be applied to the guard line.

[0121] Figure 8 It is along Figure 2 A cross-sectional view of an example cut by line VIII-VIII'. Figure 8 The cross-sectional structure of the display area DA of the display device 10 is shown below. (Refer to the following...) Figure 11 Describe the cross-sectional structure of the non-display area NDA of the display device 10.

[0122] refer to Figure 8 The thin-film transistor layer (TFTL) is formed on the substrate SUB. The TFTL includes a thin-film transistor 120, a connection electrode 151, a gate insulating film 131, a first interlayer insulating film 132, a protective film 133, a second interlayer insulating film 134, and a planarization film 135.

[0123] A buffer film BF can be formed on one surface of the substrate SUB. The buffer film BF can be formed on one surface of the substrate SUB to protect the thin-film transistor 120 and the light-emitting layer 143 of the light-emitting element layer EML from moisture permeating through the substrate SUB, which is susceptible to moisture propagation. The buffer film BF can comprise multiple inorganic films stacked alternately. For example, the buffer film BF can be formed as a multilayer film, wherein silicon oxide (SiO2) is used. x ) layer, silicon nitride (SiN) x One or more inorganic films, consisting of a ) layer and a silicon oxynitride (SiON) layer, are stacked alternately. The buffer film BF can be omitted.

[0124] A thin-film transistor 120 is formed on a buffer film BF. The thin-film transistor 120 includes an active layer 121, a gate electrode 122, a source electrode 123, and a drain electrode 124. Figure 8 In the diagram, the thin-film transistor 120 is shown as a top-gate type, wherein the gate electrode 122 is disposed above the active layer 121, but this disclosure is not limited thereto. That is, the thin-film transistor 120 can be formed as a bottom-gate type or a dual-gate type. In the bottom-gate type, the gate electrode 122 is disposed below the active layer 121, and in the dual-gate type, the gate electrode 122 is disposed on both the upper and lower portions of the active layer 121.

[0125] An active layer 121 is formed on the buffer film BF. The active layer 121 may comprise polycrystalline silicon, monocrystalline silicon, low-temperature polycrystalline silicon, amorphous silicon, or an oxide semiconductor. For example, the oxide semiconductor may comprise a binary compound (AB) containing indium, zinc, gallium, tin, titanium, aluminum, hafnium (Hf), zirconium (Zr), magnesium (Mg), etc. x ), ternary compounds (AB) x C y ) or quaternary compounds (AB) x C y D zFor example, the active layer 121 may include ITZO (an oxide containing indium, tin, and titanium) or IGZO (an oxide containing indium, gallium, and tin). A light-blocking layer configured to block external light incident on the active layer 121 may be formed between the buffer film BF and the active layer 121.

[0126] The gate insulating film 131 can be formed on the active layer 121. The gate insulating film 131 can be formed as an inorganic film, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0127] The gate electrode 122 and the gate line can be formed on the gate insulating film 131. The gate electrode 122 and the gate line can be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0128] The first interlayer insulating film 132 can be formed on the gate electrode 122 and the gate line. The first interlayer insulating film 132 can be formed as an inorganic film, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0129] Source electrode 123 and drain electrode 124 may be formed on the first interlayer insulating film 132. Each of the source electrode 123 and drain electrode 124 may be connected to the active layer 121 through a contact hole passing through the gate insulating film 131 and the first interlayer insulating film 132. The source electrode 123 and drain electrode 124 may be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0130] A protective film 133 may be formed on the source electrode 123 and the drain electrode 124 to insulate the thin-film transistor 120. The protective film 133 may be formed as an inorganic film, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0131] The second interlayer insulating film 134 can be formed on the protective film 133. The second interlayer insulating film 134 can be formed as an inorganic film, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0132] A connecting electrode 151 may be formed on the second interlayer insulating film 134. The connecting electrode 151 may be electrically connected to the drain electrode 124 through contact holes in the second interlayer insulating film 134. The connecting electrode 151 may be used to electrically connect the drain electrode 124 and the first electrode 141 of the light-emitting element layer EML, which will be described below. The connecting electrode 151 may be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0133] A planarization film 135 can be formed on the connecting electrode 151 and the second interlayer insulating film 134 to planarize the step portion formed by the thin-film transistor 120. The planarization film 135 can be formed as an organic film made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0134] The light-emitting element layer (EML) can be formed on the thin-film transistor layer (TFTL). The light-emitting element layer (EML) includes a light-emitting element 140 and a pixel defining film 147.

[0135] Light-emitting elements 140 and pixel defining films 147 are formed on planarization films 135. Each of the light-emitting elements 140 may include a first electrode 141, a light-emitting layer 143, and a second electrode 145.

[0136] The first electrode 141 may be formed on the planarization film 135. The first electrode 141 is connected to the connection electrode 151 through a contact hole passing through the planarization film 135. The first electrode 141 is electrically connected to the drain electrode 124 of the thin-film transistor 120 through the connection electrode 151.

[0137] In the top-emitting structure that emits light in the direction of the second electrode 145 relative to the light-emitting layer 143, the first electrode 141 may be made of a metallic material with high reflectivity, and may include, for example, a stacked structure comprising aluminum and titanium (Ti / Al / Ti), a stacked structure comprising aluminum and ITO (ITO / Al / ITO), a silver-palladium-copper (APC) alloy, and a stacked structure comprising an ITO and an APC alloy (ITO / APC / ITO). The APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0138] In a bottom-emitting structure that emits light in the direction of the first electrode 141 relative to the light-emitting layer 143, the first electrode 141 can be made of a transparent conductive material (TCO) capable of transmitting light, such as ITO or IZO, or it can be made of a semi-transmissive conductive material, such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). In this case, when the first electrode 141 is made of a semi-transmissive conductive material, the luminous efficiency can be improved due to the microcavity.

[0139] For defining sub-pixels, a pixel defining film 147 may be formed to separate the first electrode 141 on the planarization film 135. The pixel defining film 147 may be formed to cover the edge of the first electrode 141. The pixel defining film 147 may be formed as an organic film made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0140] Each of the sub-pixels refers to a region in which a first electrode 141, a light-emitting layer 143, and a second electrode 145 are stacked sequentially, such that holes generated from the first electrode 141 and electrons generated from the second electrode 145 combine with each other in the light-emitting layer 143 to emit light.

[0141] A light-emitting layer 143 is formed on the first electrode 141 and the pixel defining film 147. The light-emitting layer 143 may include organic materials to emit light of a specific color. The light-emitting layer 143 may be an organic light-emitting layer that includes organic materials to emit light of a specific color. When the light-emitting layer 143 is a white light-emitting layer that emits white light, the light-emitting layer 143 may be a common layer formed in the sub-pixel. In this case, the light-emitting layer 143 may be formed as a tandem structure having two or more stacked layers. Each of the stacked layers may include a hole transport layer, at least one light-emitting layer, and an electron transport layer.

[0142] Furthermore, charge generation layers can be formed between the stacked layers. These charge generation layers may include an N-type charge generation layer positioned adjacent to the lower stack and a P-type charge generation layer formed on the N-type charge generation layer and positioned adjacent to the upper stack. The N-type charge generation layer injects electrons into the lower stack, and the P-type charge generation layer injects holes into the upper stack. The N-type charge generation layer may be an organic layer in which an organic host material with electron transport capability is doped with an alkali metal such as lithium (Li), sodium (Na), potassium (K), or cesium (Cs), or an alkaline earth metal such as magnesium (Mg), strontium (Sr), barium (Ba), or radium (Ra). The P-type charge generation layer may be an organic layer in which an organic host material with hole transport capability is doped with a dopant.

[0143] The second electrode 145 is formed on the light-emitting layer 143. The second electrode 145 may be formed to cover the light-emitting layer 143. The second electrode 145 may be a common layer formed in the pixel P. A capping layer may be formed on the second electrode 145.

[0144] In the top-emitting structure, the second electrode 145 can be made of a transparent conductive material (TCO) capable of transmitting light, such as ITO or IZO, or it can be made of a semi-transmissive conductive material, such as magnesium (Mg), silver (Ag), or an alloy of magnesium (Mg) and silver (Ag). When the second electrode 145 is made of a semi-transmissive conductive material, the luminous efficiency can be improved due to the microcavity.

[0145] In the bottom emission structure, the second electrode 145 can be made of a metallic material with high reflectivity, and may include, for example, a stacked structure comprising aluminum and titanium (Ti / Al / Ti), a stacked structure comprising aluminum and ITO (ITO / Al / ITO), an APC alloy, and a stacked structure comprising ITO and an APC alloy (ITO / APC / ITO). The APC alloy is an alloy of silver (Ag), palladium (Pd), and copper (Cu).

[0146] A thin-film encapsulation layer (TFEL) is formed on the light-emitting element layer (EML). The TFEL includes an encapsulation film 160.

[0147] An encapsulation film 160 is disposed on the second electrode 145. The encapsulation film 160 may include at least one inorganic film and at least one organic film to prevent or reduce the penetration of oxygen or moisture into the light-emitting layer 143 and the second electrode 145.

[0148] The encapsulation film 160 may include a first inorganic film 161, a second inorganic film 163, and an organic film 162 interposed between the first inorganic film 161 and the second inorganic film 163. Each of the first inorganic film 161 and the second inorganic film 163 may be made of silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. The first inorganic film 161 and the second inorganic film 163 may be made of the same material, but this disclosure is not limited thereto, and the first inorganic film 161 and the second inorganic film 163 may be made of different materials.

[0149] The organic film 162 can be formed to have a sufficient thickness, for example, from 7 μm to 8 μm, to prevent particles from penetrating through the encapsulation film 160 and seeping into the light-emitting layer 143 and the second electrode 145. The organic film 162 can be made of monomer compositions including monomers based on diacrylates and monomers based on triacrylates, acrylic resins, epoxy resins, phenolic resins, polyamide resins, polyimide resins, etc., but this disclosure is not limited thereto.

[0150] The sensing layer TSL is formed on the thin-film encapsulation layer TFEL. A first sensing electrode TE, a second sensing electrode RE, a connecting electrode BE, a first sensing line TL1, a second sensing line TL2, a third sensing line RL, a sensor insulating film 170, a guard wire, and a ground wire can be disposed within the sensing layer TSL. For ease of description, in... Figure 8 Only the first sensing electrode TE, the second sensing electrode RE, the connecting electrode BE, and the sensor insulating film 170 of the sensing layer TSL are shown.

[0151] The first sensing electrode TE and the second sensing electrode RE can be disposed on the same layer, while the connecting electrode BE can be disposed on a different layer than the first sensing electrode TE and the second sensing electrode RE. The first sensing electrode TE and the second sensing electrode RE are spaced apart from each other and electrically insulated from each other.

[0152] The connecting electrode BE can be formed on the second inorganic film 163 of the encapsulation film 160. The connecting electrode BE can be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0153] The sensor insulating film 170 can be formed on the connecting electrode BE. The sensor insulating film 170 can be formed as an inorganic film, such as silicon oxide (SiO2). x ) membrane, silicon nitride (SiN) x ) membrane or its multilayer membrane.

[0154] A first sensing electrode TE and a second sensing electrode RE can be formed on the sensor insulating film 170. The first sensing electrode TE can be connected to the connecting electrode BE through a first contact hole CT1 that passes through the sensor insulating film 170 to expose the connecting electrode BE. Therefore, since the first sensing electrode TE is connected to the second sensing electrode RE using the connecting electrode BE in the intersection region, the first sensing electrode TE and the second sensing electrode RE will not short-circuit with each other. Furthermore, the first sensing electrode TE and the second sensing electrode RE can be configured to overlap with the pixel defining film 147 to prevent the opening area of ​​the sub-pixel from being reduced.

[0155] As described above, the first sensing line TL1 and the second sensing line TL2 can extend from the first sensing electrode TE, and the third sensing line RL can extend from the second sensing electrode RE.

[0156] The first sensing electrode TE, the second sensing electrode RE, the first sensing line TL1, the second sensing line TL2, and the third sensing line RL can be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0157] An outer coating can be formed on the first sensing electrode TE and the second sensing electrode RE to flatten the stepped portion formed by the first sensing electrode TE, the second sensing electrode RE and the connecting electrode BE.

[0158] Figure 9 This is a plan view showing an example of the dam layout for display devices. Figure 10 It is shown Figure 9 An enlarged view of an example of region A being magnified. Figure 11 It is along Figure 10 A cross-sectional view of an example cut by line X-X'.

[0159] Reference Figure 9 , Figure 10 and Figure 11 The display panel 100 also includes multiple dams DM1, DM2, and DM3. Dams DM1, DM2, and DM3 can be positioned outside the edge of the display area DA of the display panel 100. That is, the multiple dams DM1, DM2, and DM3 can be positioned within the non-display area NDA.

[0160] Multiple dams DM1, DM2, and DM3 can include an inner dam DM1, a middle dam DM2, and an outermost dam DM3. The middle dam DM2 can be positioned between the inner dam DM1 and the outermost dam DM3. The inner dam DM1 can be positioned between the display area DA and the middle dam DM2, which is located in the non-display area NDA. That is, the inner dam DM1 can be positioned in the non-display area NDA and close to the display area DA, while the outermost dam DM3 can be positioned in the non-display area NDA and at the outermost point from the display area DA, and the middle dam DM2 can be positioned between the inner dam DM1 and the outermost dam DM3. Multiple dams DM1, DM2, and DM3 can be spaced apart from each other.

[0161] Multiple dams DM1, DM2 and DM3 arranged in the non-display area NDA can be arranged on the left, right and bottom sides of the display panel 100 in the plan view.

[0162] In the non-display area NDA, multiple dams DM1, DM2, and DM3 disposed on the left and right sides of the display panel 100 can have a shape extending in one direction in the plan view. Specifically, they are disposed on the first long side adjacent to the display panel 100 ( Figure 9 Multiple dams DM1, DM2, and DM3 in the first non-display area NDA (left side) and the second long side adjacent to the display panel 100 are also provided. Figure 9 The multiple dams DM1, DM2, and DM3 in the second non-display area NDA (located on the right side of the first non-display area NDA) can have a shape extending in the second direction (Y-axis direction). The multiple dams DM1, DM2, and DM3 located in the first and second non-display areas NDA can be arranged to be spaced apart from each other in the first direction (X-axis direction).

[0163] In the non-display area NDA, a plurality of dams DM1, DM2, and DM3 disposed on the lower side of the display panel 100 may have a shape extending in one direction in the plan view. Specifically, they are disposed on the first short side adjacent to the display panel 100. Figure 9 The plurality of dams DM1, DM2, and DM3 in the third non-display area NDA arranged on the lower side of the display panel 100 can have a shape extending in the first direction (X-axis direction). In the third non-display area NDA, the plurality of dams DM1, DM2, and DM3 disposed on the lower side of the display panel 100 can be arranged to be spaced apart from each other in the second direction (Y-axis direction).

[0164] The inner dam DM1 disposed in the first non-display area NDA, the inner dam DM1 disposed in the second non-display area NDA, and the inner dam DM1 disposed in the third non-display area NDA can be spaced apart from each other. However, this disclosure is not limited thereto, and the inner dam DM1 disposed in the first non-display area NDA, the second non-display area NDA, and the third non-display area NDA can also be integrally formed.

[0165] The intermediate dam DM2 disposed in the first non-display area NDA, the intermediate dam DM2 disposed in the second non-display area NDA, and the intermediate dam DM2 disposed in the third non-display area NDA can be formed to be spaced apart from each other. However, this disclosure is not limited thereto, and the intermediate dam DM2 disposed in the first non-display area NDA, the second non-display area NDA, and the third non-display area NDA can also be formed integrally.

[0166] The outermost dam DM3 disposed in the first non-display area NDA, the outermost dam DM3 disposed in the second non-display area NDA, and the outermost dam DM3 disposed in the third non-display area NDA can be formed to be spaced apart from each other. However, this disclosure is not limited thereto, and the outermost dam DM3 disposed in the first non-display area NDA, the second non-display area NDA, and the third non-display area NDA can also be formed integrally.

[0167] Reference Figure 10 The plurality of dams DM1, DM2, and DM3 disposed in the first non-display area NDA, and the second sensing line TL2 disposed in the sensing lines TL1, TL2, and RL disposed in the sensing peripheral area TPA, can have a shape that extends parallel to each other in one direction. Specifically, the plurality of dams DM1, DM2, and DM3 disposed in the first non-display area NDA, and the plurality of second sensing lines TL2 disposed in the first non-display area NDA, can have a shape that extends in a second direction (Y-axis direction).

[0168] The inner dam DM1, located in the first non-display area NDA, can overlap with at least one of the second sensing lines TL2 in the third direction (Z-axis direction). Figure 10 In the diagram, the inner dam DM1 disposed in the first non-display area NDA of the display panel 100 is shown to overlap with one of the second sensing lines TL2 disposed at the outermost position, but this disclosure is not limited thereto. For example, the inner dam DM1 disposed in the first non-display area NDA may also overlap with multiple second sensing lines TL2 in a third direction (Z-axis direction).

[0169] In the following text, reference will be made to Figure 11 Describes the cross-sectional structure of the display panel 100 disposed in the non-display area NDA. In the cross-sectional structure of the non-display area NDA, [the structure is described in conjunction with...] Figure 8 The detailed description of the same layers of the cross-sectional structure of the display panel 100 in the display area DA is partially provided in reference. Figure 8 Replace the given layers.

[0170] Reference Figure 8 and Figure 11 A buffer film BF can be formed on one surface of the substrate SUB in the non-display area NDA of the display device 10. Alternatively, the buffer film BF can be formed on the entire surface of the substrate SUB in both the display area NDA and the non-display area NDA to protect the first electric field line 127 (or ELVDL) and the second electric field line 125 (or ELVSL), which will be described below, and to protect the light-emitting layer 143 of the light-emitting element layer EML from moisture penetrating through the substrate SUB, which is susceptible to moisture propagation. A detailed description of the buffer film BF will be provided below. Figure 8 The description of the buffer membrane BF in the display area DA is replaced. The buffer membrane BF can be omitted.

[0171] The gate insulating film 131 can be formed on the buffer film BF in the non-display area NDA. The gate insulating film 131 can be disposed on the entire surface of the buffer film BF in the display area DA and the non-display area NDA. The gate insulating film 131 can be formed as an inorganic film, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0172] Gate line 122 (SL) can be formed on gate insulating film 131 and / or buffer film BF in the non-display area NDA. Gate line 122 (SL) can be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys. Gate line 122 (SL) can be formed from sensing lines or scan lines.

[0173] The first interlayer insulating film 132 can be formed on the gate line 122(SL) in the non-display area NDA. The first interlayer insulating film 132 in the non-display area NDA can be configured to expose at least a portion of the gate line 122(SL). That is, the first interlayer insulating film 132 in the non-display area NDA can have a top surface and a side surface. The first interlayer insulating film 132 can be formed as an inorganic film, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0174] The first electric field line 127 and the second electric field line 125 can be formed on the first interlayer insulating film 132 in the non-display area NDA. The first electric field line 127 and the second electric field line 125 can be formed on the same layer as the source electrode 123 and the drain electrode 124 in the display area DA. The first electric field line 127 and the second electric field line 125 can be spaced apart from each other. The first electric field line 127 and the second electric field line 125 can be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu) and their alloys.

[0175] A high potential voltage (first power supply voltage) can be provided to the first power line 127, and a low potential voltage (i.e., second power supply voltage) lower than the first power supply voltage of the first power line 127 can be provided to the second power line 125. The second power line 125 can be electrically connected to the second electrode 145 of the light-emitting element 140 via a second power connection electrode 153 (described below). The second power line 125 can provide a second power supply voltage to the second electrode 145 of the light-emitting element 140.

[0176] A protective film 133 may be formed on a first interlayer insulating film 132 in the non-display area NDA. The protective film 133 in the non-display area NDA may have a top surface and a side surface. In the non-display area NDA, the side surface of the protective film 133 may be aligned with the side surface of the first interlayer insulating film 132.

[0177] The second interlayer insulating film 134 can be formed on the protective film 133 in the non-display area NDA. The second interlayer insulating film 134 in the non-display area NDA can have a top surface and a side surface. In the non-display area NDA, the side surface of the second interlayer insulating film 134 can be aligned with the side surfaces of the first interlayer insulating film 132 and the protective film 133. The second interlayer insulating film 134 can be formed as an inorganic film, such as a silicon nitride layer, a silicon oxynitride layer, a silicon oxide layer, a titanium oxide layer, or an aluminum oxide layer.

[0178] The second power connection electrode 153 and the first power connection electrode 155 can be formed on the second interlayer insulating film 134 in the non-display area NDA. The second power connection electrode 153 and the first power connection electrode 155 can be formed on the same layer as the connection electrode 151 in the display area DA. The second power connection electrode 153 and the first power connection electrode 155 can be formed as a single layer or multiple layers made of one selected from molybdenum (Mo), aluminum (Al), chromium (Cr), gold (Au), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and their alloys.

[0179] The first power connection electrode 155 can be disposed on the second interlayer insulating film 134 so as to overlap with the first electric field line 127. The first power connection electrode 155 can be electrically connected to the first electric field line 127 through a contact hole passing through the second interlayer insulating film 134. The first power connection electrode 155 can be connected to the first electric field line 127 to increase its area, thereby reducing resistance.

[0180] The second power connection electrode 153 can be disposed on the second interlayer insulating film 134 to overlap with the second power line 125. The second power connection electrode 153 can be electrically connected to the second power line 125 through contact holes passing through the second interlayer insulating film 134. The second power connection electrode 153 can be exposed in the thickness direction of the display device 10 through a patterned planarization film 135. The second electrode 145 of the light-emitting element 140 can be disposed on the second power connection electrode 153 exposed by the planarization film 135, and thus can be in physical contact with the second power connection electrode 153. The second electrode 145 of the light-emitting element 140 can receive a second power supply voltage supplied to the second power line 125 through the second power connection electrode 153.

[0181] A patterned planarization film 135 can be formed on the second interlayer insulating film 134 in the non-display area NDA. The patterned planarization film 135 disposed on the second interlayer insulating film 134 in the non-display area NDA may include a first to a fourth planarization film 135.

[0182] The first planarization film 135 may overlap with at least a portion of the second power connection electrode 153, expose at least a portion of the second power connection electrode 153, and may be configured to completely cover the side surfaces of the first interlayer insulating film 132 and the second interlayer insulating film 134. The second planarization film 135 may overlap with at least a portion of the second power connection electrode 153, expose at least a portion of the second power connection electrode 153, and may be disposed on the upper surface of the first interlayer insulating film 132 to be spaced apart from the first power connection electrode 155. The third planarization film 135 may be configured to completely cover the first power connection electrode 155. The fourth planarization film 135 may be a planarization film configured to extend from the patterned planarization film 135 in the display area DA.

[0183] The first planarization film 135, the second planarization film 135, and the third planarization film 135 can form the outermost dam DM3, the middle dam DM2, and the inner dam DM1, which will be described below. The planarization film 135 can be formed as an organic film made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0184] A patterned pixel defining film 147 can be formed on the planarization film 135 in the non-display area NDA. The pixel defining film 147 in the non-display area NDA can be disposed on the upper surface of the planarization film 135. The pixel defining film 147 in the non-display area NDA may include first to fourth pixel defining films 147.

[0185] A first pixel defining film 147 can be formed on a first planarization film 135, a second pixel defining film 147 can be formed on a second planarization film 135, a third pixel defining film 147 can be formed on a third planarization film 135, and a fourth pixel defining film 147 can be formed on a fourth planarization film 135. The pixel defining film 147 can be formed as an organic film made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc.

[0186] The second to fourth pixel defining film 147 may be disposed on the second to fourth planarization film 135 and may be configured to expose at least a portion of the upper surface of the planarization film 135. However, this disclosure is not limited thereto, and the second to fourth pixel defining film 147 may extend to both sides to completely cover the upper surface of the second to fourth planarization film 135, and thus may be formed to completely cover the side surfaces of the second to fourth planarization film 135.

[0187] A first pixel defining film 147 can be disposed on a first planarization film 135, and thus can be formed to cover the upper and side surfaces of the first planarization film 135. The first pixel defining film 147 may have a surface step portion having a thickness different from that of the second to fourth pixel defining films 147. For example, the first pixel defining film 147 disposed at the outermost edge of the non-display area NDA may include a second portion having a thickness greater than that of the first portion of the first pixel defining film 147. In the first portion of the first pixel defining film 147, the thickness of the first pixel defining film 147 may be the same as that of the second to fourth pixel defining films 147; and in the second portion of the first pixel defining film 147, the thickness of the first pixel defining film 147 may be greater than that of the second to fourth pixel defining films 147. The first pixel defining film 147 can be formed with such a second portion that its thickness is greater than that of the second to fourth pixel defining films 147, thereby preventing overflow of the organic film 162 of the encapsulation film 160, which will be described below.

[0188] The first planarization film 135 and the first pixel defining film 147 disposed in the non-display area NDA can form the outermost dam DM3. The second planarization film 135 and the second pixel defining film 147 disposed in the non-display area NDA can form the middle dam DM2. The third planarization film 135 and the third pixel defining film 147 disposed in the non-display area NDA can form the inner dam DM1.

[0189] The inner dam DM1, the middle dam DM2, and the outermost dam DM3, which are located in the non-display area NDA, can be spaced apart from each other. A trench structure can be formed in the space between the inner dam DM1, the middle dam DM2, and the outermost dam DM3, thereby preventing the overflow of the organic film 162 of the encapsulation film 160, which will be described below.

[0190] The second electrode 145 of the light-emitting element 140 can be disposed on the pixel defining film 147 in the non-display area NDA. The second electrode 145 of the light-emitting element 140 can be disposed on the entire surface of the pixel defining film 147 in the display area DA. As described above, the second electrode 145 can be configured to extend from the display area DA to the non-display area NDA so as to be disposed on the second power connection electrode 153 in the non-display area NDA.

[0191] The second electrode 145 can be disposed on the inner dam DM1 and the intermediate dam DM2 so as to overlap with the inner dam DM1 and the intermediate dam DM2 in its thickness direction. The second electrode 145 can be disposed so as not to overlap with the outermost dam DM3. Therefore, the second electrode 145 can extend from the display area DA to the non-display area NDA, and can therefore be disposed on the trench formed between the outermost dam DM3 and the intermediate dam DM2 in the non-display area NDA.

[0192] A first inorganic film 161 of the encapsulation film 160 is formed in the non-display area NDA on the second electrode 145 and the pixel defining film 147 exposed by the second electrode 145. The first inorganic film 161 can be disposed throughout the entire display area DA and the non-display area NDA so as to completely cover the light-emitting layer 143.

[0193] Organic membrane 162 may be disposed on the first inorganic membrane 161 in the non-display area NDA. Organic membrane 162 in the non-display area NDA may be disposed such that it overlaps at least a portion of the inner dam DM1. Organic membrane 162 in the non-display area NDA may not overlap with the intermediate dam DM2 and the outermost dam DM3.

[0194] A second inorganic film 163 in the non-display area NDA can be disposed on the organic film 162 and the first inorganic film 161 exposed by the organic film 162. The first inorganic film 161 and the second inorganic film 163 in the non-display area NDA can be spaced apart from each other in their thickness direction in the region where the organic film 162 is inserted between the first inorganic film 161 and the second inorganic film 163. The first inorganic film 161 and the second inorganic film 163 in the non-display area NDA can be in contact with each other in the region where the organic film 162 is not inserted between the first inorganic film 161 and the second inorganic film 163. Specifically, the second inorganic film 163 is disposed on the upper surface of the first inorganic film 161 exposed by the organic film 162 on the inner dam DM1, the intermediate dam DM2, and the outermost dam DM3.

[0195] An outer planarization layer 191 is formed on the second inorganic membrane 163 disposed on the inner dam DM1 and the intermediate dam DM2. The outer planarization layer 191 can be disposed above the inner dam DM1 and the intermediate dam DM2 to completely cover the inner dam DM1 and the intermediate dam DM2. The outer planarization layer 191 may not overlap with the outermost dam DM3.

[0196] In one exemplary embodiment, an outer planarization layer 191 may be formed such that the upper surface of the outer planarization layer 191 is coplanar with the upper surface of the second inorganic film 163 of the encapsulation film 160. The outer planarization layer 191 can prevent the organic film 162 from overflowing to the outermost dam DM3, and the sensing lines TL1, TL2 and RL, which will be described below, can be disposed above the inner dam DM1 or the intermediate dam DM2 on which the organic film 162 is not disposed, thereby preventing mutual interference caused by the connection between the second electrode 145 and the sensing lines TL1, TL2 and RL.

[0197] The outer planarization layer 191 may include an organic insulating material based on acrylic, epoxy, or siloxane with high planarization performance.

[0198] The second sensing line TL2 can be disposed on the outer planarization layer 191 and the upper surface of the second inorganic film 163 on the organic film 162. The second sensing line TL2 can be formed on the same layer as the first sensing electrode TE and the second sensing electrode RE. The second sensing lines TL2 disposed on the outer planarization layer 191 and the organic film 162 can be spaced apart from each other.

[0199] The second sensing line TL2 disposed on the outer planarization layer 191 can be configured to overlap with the inner dam DM1. The second sensing line TL2 disposed on the outer planarization layer 191 can be configured not to overlap with the middle dam DM2 and the outermost dam DM3.

[0200] Figure 12 It is along Figure 10 Another example of a cross-sectional view taken by the line X-X'.

[0201] Figure 12 Exemplary embodiments and Figure 11 The difference in the exemplary embodiment is that the outer planarization layer 191_1 at least partially overlaps with the outermost dam DM3 and is disposed on the organic membrane 162.

[0202] Reference Figure 12 An external planarization layer 191_1 disposed in the first non-display area NDA is disposed on the entire surface of the second inorganic film 163, such that a portion of the upper surface of the second inorganic film 163 disposed on the outermost dam DM3 is exposed in the thickness direction of the display device 10.

[0203] Specifically, the outer planarization layer 191_1 disposed in the first non-display area NDA can be disposed above the entire surface of the inner dam DM1 and the intermediate dam DM2, and can extend outward to even be disposed above the upper surface of the outermost dam DM3. In the figures, the outer planarization layer 191_1 disposed in the first non-display area NDA is configured to expose at least a portion of the upper surface of the second inorganic film 163 disposed on the upper surface of the outermost dam DM3. However, this disclosure is not limited thereto, and the outer planarization layer 191_1 can be configured to completely cover the outermost dam DM3.

[0204] The outer planarization layer 191_1 disposed in the first non-display area NDA can be disposed on the organic film 162. The outer planarization layer 191_1 can be disposed on the entire surface of the second inorganic film 163 disposed on the upper surface of the organic film 162, so as to overlap with the organic film 162 in the thickness direction. Therefore, in this exemplary embodiment, the second sensing line TL2 can be disposed on the upper surface of the outer planarization layer 191_1.

[0205] Figure 13 It is shown Figure 9 Another example of an enlarged view where region A is magnified. Figure 14 It is along Figure 13 A cross-sectional view of an example taken by line XIII-XIII'. Figure 13 and Figure 14 Exemplary embodiments and Figure 10 and Figure 11 The difference in the exemplary embodiment is that the second sensing line TL2, which is disposed in the non-display area NDA, is even disposed above the intermediate dam DM2.

[0206] Reference Figure 13 and Figure 14 The second sensing line TL2 can be further disposed above the intermediate dam DM2 and in the region overlapping the separation space between the intermediate dam DM2 and the inner dam DM1. Therefore, the second sensing line TL2 can be disposed on the upper surface of the outer planarization layer 191 that overlaps with the intermediate dam DM2. Even in this case, the outer planarization layer 191, the first inorganic film 161, and the second inorganic film 163 can be interposed between the second electrode 145 disposed on the intermediate dam DM2 and the second sensing line TL2 disposed above the intermediate dam DM2, and thus, the second electrode 145 and the second sensing line TL2 can be insulated from each other. In this exemplary embodiment, although the organic film 162 of the encapsulation film 160 is not configured to extend to the region overlapping with the second sensing line TL2 disposed in the first non-display area NDA, the outer planarization layer 191 can be disposed to utilize the first non-display area NDA.

[0207] Figure 15 It is along Figure 13 Another example of a cross-sectional view taken by line XIII-XIII'. Figure 15 Exemplary embodiments and Figure 14 The difference in the exemplary embodiment is that multiple inner dams DM1 can be formed.

[0208] Reference Figure 15 Multiple inner dams DM1 can be provided. The inner dams DM1 can be formed by arranging the first power connection electrodes 155 at intervals and patterning the planarization film 135 and the pixel defining film 147 on the first power connection electrodes 155.

[0209] Multiple inner dams DM1 can be configured to be spaced apart from each other. At least one of the multiple inner dams DM1 can completely overlap with the organic film 162 in the thickness direction of the organic film 162. In this exemplary embodiment, multiple inner dams DM1 can be formed in the region overlapping with the organic film 162, thereby preventing the organic film 162 from overflowing to the outside of the display device 10.

[0210] Figure 16 It is shown Figure 9 A magnified view of region B. Figure 17 It is along Figure 16 The example sectional view is taken by the line XVI-XVI'.

[0211] Reference Figure 16 and Figure 17 As described above, the plurality of dams DM1, DM2, and DM3 disposed in the third non-display area NDA can have a shape extending in a first direction (X-axis direction). The sensing lines TL1, TL2, and RL disposed in the third non-display area NDA can be bent in a second direction (Y-axis direction) at one end extending in the first direction (X-axis direction). Therefore, the plurality of dams DM1, DM2, and DM3 can be perpendicular to the sensing lines TL1, TL2, and RL disposed in the third non-display area NDA in their extension direction. Therefore, the other end of the sensing lines TL1, TL2, and RL disposed in the third non-display area NDA can extend to connect to a pad.

[0212] The outer planarization layer 192 disposed in the third non-display area NDA can be disposed above the inner dam DM1 and can be configured to expose the upper surface of the intermediate dam DM2. The outer planarization layer 192 disposed in the third non-display area NDA may not overlap with at least a portion of the outermost dam DM3 and the intermediate dam DM2.

[0213] The third sensing line RL can be disposed above the inner dam DM1, which corresponds to the outer planarization layer 192 disposed in the third non-display area NDA. The third sensing line RL can be disposed on the outer planarization layer 192 so as to overlap with the inner dam DM1, the intermediate dam DM2, and the outermost dam DM3 in the thickness direction of the display device 10. Although not shown, the third sensing line RL can be disposed on the side surface and the top surface of the outermost dam DM3 and can extend to connect to the second sensing pad TP2. When the outer planarization layer 192 is disposed above the outermost dam DM3 disposed in the third non-display area NDA, a high step difference may occur, and therefore, the third sensing line RL may be disconnected. Therefore, in the third non-display area NDA, the outermost dam DM3 disposed in the third non-display area NDA and the outer planarization layer 192 can be formed to not overlap with each other, thereby preventing the sensing lines TL1, TL2, and RL disposed adjacent to the third non-display area NDA from short-circuiting with each other.

[0214] Figure 18 It is along Figure 16 Another example of a cross-sectional view taken by line XVI-XVI'. Figure 18 Exemplary embodiments and Figure 17 The difference in the exemplary embodiment is that the outer planarization layer 192_1 disposed in the third non-display area NDA is disposed above the intermediate dam DM2 and the inner dam DM1, and extends to the organic film 162 to even be disposed on the organic film 162.

[0215] Reference Figure 18 An external planarization layer 192_1 disposed in the third non-display area NDA is disposed on the entire surface of the second inorganic film 163, such that a portion of the second inorganic film 163 disposed on the upper surface of the intermediate dam DM2 and the entire upper surface of the outermost dam DM3 are exposed in the thickness direction of the display device 10.

[0216] Specifically, the outer planarization layer 192_1 disposed in the third non-display area NDA can be disposed above the entire surface of the inner dam DM1, and can be disposed above the intermediate dam DM2 such that at least a portion of the intermediate dam DM2 is exposed. The outer planarization layer 192_1 disposed in the first non-display area NDA can be disposed on the organic film 162. The outer planarization layer 192_1 can be disposed on the entire surface of the second inorganic film 163 disposed on the upper surface of the organic film 162, so as to overlap with the organic film 162 in the thickness direction. Therefore, in this exemplary embodiment, the sensing lines TL1 and RL can be disposed on the upper surface of the outer planarization layer 192_1.

[0217] Figure 19 It is along Figure 16A cross-sectional view of an example cut by the line XIX-XIX'. Figure 19 Exemplary embodiments and Figure 17 The difference in the exemplary embodiment is that the organic film 162_1 disposed in the third non-display area NDA is configured not to overlap with the plurality of dams DM1, DM2 and DM3 disposed in the third non-display area NDA.

[0218] Specifically, the organic film 162_1 disposed in the third non-display area NDA may not overlap with the inner dam DM1, the intermediate dam DM2, and the outermost dam DM3. The end of the organic film 162_1 disposed in the third non-display area NDA may be disposed only on at least a portion of the side surface of the inner dam DM1. The outer planarization layer 192_2 in the third non-display area NDA may be configured to cover the entire upper surface of the inner dam DM1. The upper surface of the outer planarization layer 192_2 in the third non-display area NDA may be aligned with the upper surface of the second inorganic film 163 disposed on the organic film 162_1.

[0219] Figure 20 This is a plan view showing another example of the dam layout for the display equipment. Figure 21 This is a plan view showing yet another example of the dam arrangement for the display device. Figure 22 This is a plan view showing yet another example of the dam arrangement for the display equipment.

[0220] Other exemplary embodiments of this disclosure will be described below. In the exemplary embodiments below, the same components as those described above will be indicated by the same reference numerals, and repeated descriptions will be omitted or simplified.

[0221] Figure 20 Exemplary embodiments and Figure 9 The difference in the exemplary embodiment is that the dams DM1, DM2 and DM3 disposed in the first non-display area NDA, the second non-display area NDA and the third non-display area NDA are integrally formed.

[0222] Specifically, the inner dam DM1 located in the first non-display area NDA, the second non-display area NDA, and the third non-display area NDA can be integrally formed. Furthermore, the intermediate dam DM2 located in the first non-display area NDA, the second non-display area NDA, and the third non-display area NDA can be integrally formed. The outermost dam DM3 located in the first non-display area NDA, the second non-display area NDA, and the third non-display area NDA can be integrally formed.

[0223] Figure 21 Exemplary embodiments and Figure 9The difference in the exemplary embodiment is that a plurality of dams DM1, DM2 and DM3 are also provided on the upper side of the display panel 100 in the non-display area NDA.

[0224] Specifically, multiple dams DM1, DM2, and DM3 can be disposed on the upper side of the display panel 100 in the non-display area NDA. In the non-display area NDA, the multiple dams DM1, DM2, and DM3 disposed on the upper side of the display panel 100 can have a shape extending in one direction in a plan view. Specifically, they are arranged on the second short side adjacent to the display panel 100. Figure 21 The multiple dams DM1, DM2, and DM3 in the fourth non-display area NDA (located on the upper side of the image) can have a shape extending in a first direction (X-axis direction). The multiple dams DM1, DM2, and DM3 arranged in the fourth non-display area NDA can be arranged to be spaced apart from each other in a second direction (Y-axis direction).

[0225] Figure 22 Exemplary embodiments and Figure 21 The difference in the exemplary embodiment is that the dams DM1, DM2 and DM3 disposed in the first non-display area NDA, the second non-display area NDA, the third non-display area NDA and the fourth non-display area NDA are integrally formed.

[0226] Specifically, the inner dam DM1 located in the first, second, third, and fourth non-display areas NDA can be integrally formed. Furthermore, the intermediate dam DM2 located in the first, second, third, and fourth non-display areas NDA can be integrally formed. The outermost dam DM3 located in the first, second, third, and fourth non-display areas NDA can be integrally formed.

[0227] While certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from that description. Therefore, the inventive concept is not limited to such embodiments, but lies in the broader scope of the appended claims, and various obvious modifications and equivalent arrangements as will be apparent to those skilled in the art.

Claims

1. A display device, comprising a display area and a non-display area having pad areas, the display device comprising: Substrate; Multiple dams are disposed on the substrate in the non-display area; An organic film is disposed on the substrate in the display area and the non-display area, and does not overlap with at least some of the plurality of dams; An external planarization layer is disposed on the outside of the organic membrane and overlaps with some of the plurality of dams; as well as Sensing lines are disposed on the organic film and the outer planarization layer; in, The multiple dams include an inner dam, a middle dam, and an outermost dam. The non-display area includes a first non-display area disposed between the pad area and the display area, and The outer planarization layer disposed in the first non-display area does not overlap with the outermost dam disposed in the first non-display area, and is spaced apart from the outermost dam disposed in the first non-display area.

2. The display device as claimed in claim 1, wherein, The sensing line includes multiple sensing lines.

3. The display device as claimed in claim 2, wherein, The sensing lines are spaced apart from each other on the organic film and the outer planarization layer.

4. The display device as claimed in claim 2, wherein, The outer planarization layer overlaps with the organic membrane.

5. The display device as claimed in claim 4, wherein, The sensing lines are spaced apart from each other on the outer planarization layer.

6. The display device as claimed in claim 1, wherein, The height of the outermost dam is greater than the height of the inner dam and the middle dam.

7. The display device as claimed in claim 1, wherein, The organic membrane includes monomer compositions or organic materials.

8. The display device as claimed in claim 1, wherein, The non-display area further includes a second non-display area disposed on a side different from the side where the first non-display area and the pad area are disposed, and The outer planarization layer disposed in the second non-display area overlaps with the inner dam and the intermediate dam disposed in the second non-display area.

9. The display device as claimed in claim 8, wherein, The outer planarization layer disposed in the second non-display area overlaps with at least a portion of the outermost dam disposed in the second non-display area.

10. The display device as claimed in claim 8, wherein, The inner dam disposed in the first non-display area and the inner dam disposed in the second non-display area are integrally formed.

Images