Storage controller, storage device, and method of operating a storage device

Abstract

A storage controller comprising: a host interface to analyze commands received from a host in real time; a programmable logic unit to load an optimal image adaptively selected from a plurality of images in response to at least one of a current operating state of the storage controller and the commands; and a processor to perform an operation on a non-volatile storage device using the programmable logic unit after the optimal image is loaded.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2019-0126908, filed with the Korean Intellectual Property Office on October 14, 2019, the subject of which is incorporated herein by reference. Technical Field

[0003] The present invention generally relates to a storage controller, a storage device, a method for operating the storage controller, and a method for operating the storage device. Background Technology

[0004] Data can be stored and retrieved using various storage devices under the control of a host device. Many different types of host devices exist, such as computers, smartphones, and tablets. Many different types of storage devices also exist, such as hard disk drives (HDDs), solid-state drives (SSDs), and memory cards. However, most modern storage devices use one or more semiconductor memories, particularly including non-volatile memories. Non-volatile memories include read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), flash memory, phase-change random access memory (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM), and ferroelectric RAM (FRAM).

[0005] Advances in semiconductor manufacturing technology have significantly increased the speed at which any host device can communicate with storage devices. This information includes increasingly more content data. The demands for high-speed reception and writing (and / or reading and serving) of such large volumes of information place stringent requirements on storage devices. Therefore, storage devices can be effectively reconfigured to ensure the proper use of hardware resources. Summary of the Invention

[0006] Various aspects of this invention relate to more efficient use of the internal resources of a storage device in response to an optimal image loaded into the programmable logic unit. The programmable logic unit can be adaptively reconfigured in response to commands without interference from the host.

[0007] However, the inventive concept is not limited to the aspects specifically set forth herein. These and other aspects of this disclosure will become more apparent to those skilled in the art upon consideration of the subject matter disclosure and the accompanying drawings.

[0008] In one aspect, the present invention provides a storage controller comprising: a host interface for real-time analysis of commands received from a host; a programmable logic unit for loading an optimal image adaptively selected from a plurality of images in response to at least one of the current operating state of the storage controller and the command; and a processor for performing operations on a non-volatile storage device using the programmable logic unit after loading the optimal image.

[0009] In another aspect, the present invention provides a method for operating a storage device including a storage controller and a non-volatile storage device. The method includes: analyzing commands received from a host in real time; determining whether the current operating state of the storage device is suitable for executing the commands; if the current operating state of the storage device is suitable for executing the commands, operating the storage device using the current operating state; otherwise, changing the operating state of the storage device; and generating a result output and communicating the result output to the host.

[0010] In another aspect, the present invention provides a storage device including: a non-volatile storage device; and a storage controller receiving commands from a host. The storage controller includes: internal memory; a programmable logic unit; a processor configured to control the operation of the storage device and access the internal memory; and a non-volatile storage device (NVM) controller configured to control the operation of the non-volatile storage device, wherein the storage controller is configured to select an optimal image from a plurality of images in response to analysis of a pattern of the command, and load the optimal image into the programmable logic unit, and the processor is further configured to control the operation of the storage device in response to the optimal image. Attached Figure Description

[0011] These and / or other aspects will become apparent and more readily understood from the following description of embodiments taken in conjunction with the accompanying drawings, in which:

[0012] Figure 1 This is a block diagram of a storage system according to an embodiment of the concept of the present invention;

[0013] Figure 2 This is further illustrated in one example. Figure 1 Block diagram of the storage controller 100;

[0014] Figure 3 , Figure 4 and Figure 5 These are corresponding flowcharts illustrating various methods of operating a memory controller according to embodiments of the present invention; and

[0015] Figure 6 , Figure 7 , Figure 8 and Figure 9 Embodiments of the invention are further illustrated in several examples. Figure 1 The corresponding block diagram of the storage controller 100. Detailed Implementation

[0016] The reference includes Figures 1 to 9 Specific embodiments of the storage controller, storage device, and method of operating the storage device according to the present invention are described in some additional details.

[0017] Figure 1 This is a block diagram illustrating a storage system according to an embodiment of the concept of the present invention. Figure 2 This is further illustrated in one example. Figure 1 Block diagram of the storage controller 100.

[0018] Figure 1 and Figure 2 The storage system shown typically includes a host 10 and a storage device 20, which use one or more interfaces to send and / or receive (hereinafter collectively referred to as "communication") various commands (or more), addresses (or more), and / or data. For example, the host 10 can communicate commands and associated data to the storage device 20 to request the storage device 20 to perform data access operations, such as read, write, or erase operations. Alternatively, the host 10 can request the storage device 20 to perform another type of operation among many other possible types of operations, such as a room cleaning operation.

[0019] Here, host 10 can be a central processing unit (CPU), processor, microprocessor, application processor (AP), etc. In some embodiments of the present invention, host 10 can be implemented as a system-on-a-chip (SoC).

[0020] One or more interfaces can be used to communicate information between the host 10 and the storage device, such as Advanced Technology Attachment (ATA), Serial ATA (SATA), External SATA (e-SATA), Small Computer Small Interface (SCSI), Serial Attached SCSI (SAS), Peripheral Component Interconnect (PCI), PCI-express (PCI-E), IEEE 1394, Universal Serial Bus (USB), Secure Digital (SD) card, Multimedia Card (MMC), Embedded Multimedia Card (eMMC), and Compact Flash (CF) card interfaces.

[0021] As examples, storage systems can be solid-state drives (SSDs), eMMC, universal flash memory (UFS), compact flash memory (CF), secure digital storage (SD), micro SD, mini SD, extreme digital storage (xD), Memory Stick, etc.

[0022] With the aforementioned configuration, host 10 can be used to control storage device 20 to perform (or run) various operations through one or more interfaces.

[0023] like Figure 1 As shown, storage device 20 may include storage controller 100 and non-volatile storage device 200. In some embodiments, each non-volatile storage device 200 may include flash memory or resistive memory, such as resistive random access memory (ReRAM), phase-change RAM (PRAM), or magnetic RAM (MRAM). Optionally, each non-volatile storage device 200 may include an integrated circuit that includes a processor and RAM, for example, it may include storage device or processing in memory (PIM).

[0024] In some embodiments, the flash memory included in each non-volatile memory device 200 may be a two-dimensional (2D) or three-dimensional (3D) memory array. In a 3D memory array memory device, active regions are disposed on a silicon substrate, and circuitry relating to the operation of memory cells is formed on or in the substrate, and the 3D memory array is integrally formed at at least one physical level. The term "integral" means that layers at each level of the array are directly stacked on top of each lower level of the array. The 3D memory array includes vertically oriented vertical NAND strings such that at least one memory cell is located above other memory cells. At least one memory cell may include a charge trapping layer.

[0025] The storage controller 100 can be used to control the execution of operations for each non-volatile storage device 200. In some embodiments, the storage controller 100 can be connected to each non-volatile storage device 200 via at least one channel to communicate information (e.g., data) directly. According to embodiments, the storage controller 100 can be a component included in the storage device, such as an SSD or a memory card.

[0026] Reference Figure 2 The storage controller 100 may include a host interface 110, a programmable logic unit 120, a processor 130, a storage controller 140, a RAM 150, and a non-volatile memory (NVM) controller 160.

[0027] The host 10 can provide one or more CMD commands, along with associated addresses (or more) and data, to control the execution of various data access operations and memory management operations.

[0028] The host interface 110 can be configured to provide at least one communication connection between the host 10 and the storage device 20, enabling the communication of various commands (or more), addresses (or more), and / or data to perform desired operations.

[0029] and Figure 2 As illustrated, some embodiments of the present invention can use the host interface 110 of the storage controller 100 to analyze commands received from the host 10 in real time. In this context, the term "real-time analysis" means that the host interface 110 processes the received command as soon as it is received from the host 10, without substantially delaying processing or storing the command before processing.

[0030] Additionally or optionally, the host interface 110 may be used to communicate the operational status of the storage device 20 to the host 10 in real time. Here, the term "real-time communication" means that the host interface 110 communicates the operational status of the storage device without having to store operational status information or wait for a specific request from the host 10.

[0031] Optionally or additionally, host interface 110 can be used to analyze patterns of commands (or more) received from host 10. For example, the analyzed patterns of commands (or more) can represent changes in the use, request, execution, and / or order of one or more commands in response to changes in the operating state of storage device 20.

[0032] In some embodiments, the programmable logic unit 120 may be an embedded field-programmable gate array (eFPGA). Therefore, the programmable logic unit 120 may include configurable logic blocks (CLBs), input / output blocks (IOBs), and configurable connection circuitry connecting the CLBs and IOBs. Here, the programmable logic unit 120 may be used to perform operations in response to a loaded image “I”. In specific embodiments of the inventive concept, the programmable logic unit 120 may be a programmable logic device (PLD), such as those widely used to design digital circuits that perform specific operations based on an image. As used herein, the term “image” refers to a hardware / software image of a specific operation performed by the programmable logic unit 120, and may be referred to as a bitstream, kernel, or lookup table according to various embodiments.

[0033] Storage device 20 can be used to store multiple images. Each image can be a program for each of various scenarios in which storage device 20 operates based on the operating state of storage device 20 or commands received from host 10.

[0034] exist Figure 1In the example shown, processor 130 can be used to control the overall operation of storage controller 100. That is, processor 130 can control data access operations performed by non-volatile storage device 200, communication of information related to the execution of data access operations (e.g., information communicated between storage controller 100 and host 10), and the operation of storage controller 100 itself. For this purpose, processor 130 can control the operation of host interface 110, programmable logic unit 120, storage controller 140, RAM 105, and / or NVM controller 160.

[0035] Therefore, processor 130 can execute control operations associated with the operation of programmable logic unit 120. According to an embodiment, processor 130 can dynamically manage the power applied to memory controller 100 in response to the operation of programmable logic unit 120, so as to effectively and dynamically manage the operation of non-volatile memory device 200 in association with it.

[0036] In specific embodiments of the inventive concept, such as Figure 2 As shown, the storage controller 140 can be connected to the memory 300, and the storage controller 100 can temporarily store data received from the host 10 in the memory 300, provide the stored data to the non-volatile storage device 200, and / or provide data read from the non-volatile storage device 200 to the host 10.

[0037] According to an embodiment, memory 300 may be a buffer memory. According to an embodiment, memory 300 may include a cache, read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), PRAM, flash memory, static random access memory (RAM) (SRAM), or dynamic RAM (DRAM). According to an embodiment, memory 300 may be integrated into memory controller 100 as internal memory, or it may exist externally to memory controller 100. Memory 300 may store preset information, programs, or commands related to the operation or state of memory controller 100.

[0038] RAM 150 can be used as internal working memory and can be implemented as various types of memory. According to embodiments, RAM 150 can be volatile or non-volatile memory. For example, RAM 150 can be implemented as at least one of cache, DRAM, SRAM, PRAM, MRAM, RRAM, and flash memory devices.

[0039] The NVM controller 160 can access each non-volatile storage device 200 and control the operation of each non-volatile storage device 200.

[0040] According to a particular embodiment, the NVM controller 160 may include an Advanced Encryption Standard (AES) module. Each non-volatile storage device 200 may store AES-encoded data as secure data. The processor 130 may compare the AES-decoded data with predetermined data and determine whether AES decoding has been successful based on the comparison result. Each non-volatile storage device 200 may store information about whether secure decoding (AES decoding) has been successfully performed in a register (not shown) as result data of secure decoding.

[0041] Optionally or additionally, the NVM controller 160 may include randomization circuitry (RND) for removing pattern-dependent randomization of data. The randomization circuitry can provide randomized data by performing randomization during a write operation using a seed value corresponding to the target page. Additionally, the randomization circuitry can provide derandomized data by performing derandomization during a read operation using a seed value corresponding to the source page.

[0042] Optionally or additionally, the NVM controller 160 may include an error correction code (ECC) engine. The ECC engine can perform error bit correction and includes an ECC encoder and an ECC decoder. The ECC engine can perform error bit correction in the data units of an ECC sector.

[0043] Each non-volatile memory device 200 may include a memory cell array, row selection circuitry, page buffer circuitry, column selection circuitry, a data processor, input / output interfaces, and control logic. Here, the memory cell array may include multiple memory cells respectively connected to multiple word lines WL and multiple bit lines BL. According to embodiments, the memory cells may be NAND or NOR flash memory cells, and according to embodiments, they may be arranged in a 2D array structure or a 3D vertical array structure. According to embodiments, the memory cells may be various types of resistive memory cells.

[0044] According to an embodiment, each storage cell may be a single-level storage cell (SLC) that stores one data bit or a multi-level storage cell (MLC) that stores multiple data bits.

[0045] Figure 3 This is a flowchart illustrating a method for operating a storage controller according to an embodiment of the present invention.

[0046] Reference Figure 2 and Figure 3 The storage controller 100 receives commands from the host 10 (S10) and analyzes them to identify the commands (S11). The storage controller 100 can be used to monitor the current operating status of the storage device 20 in real time (S12).

[0047] If the current operating state of storage device 20 is suitable for executing the received command (S12 = Yes) – that is, the current operating state is characterized by the resource allocation suitable for executing the received command – then storage controller 100 will maintain the current operating state (S14) (e.g., continue the current operating state (or operate in the current operating state)).

[0048] However, if the current operating state of storage device 20 is not suitable for executing the received command (S12 = No), storage controller 100 will proceed to change the operating state to a more suitable one (e.g., performing method steps S13, S14, and S15 described below, as an example). In some respects, this change in operating state can be understood as a reallocation of internal hardware resources within storage controller 100 and / or non-volatile storage device 200.

[0049] For example, the storage controller 100 can adaptively select the "optimal" (e.g., best-fit) image from a plurality of images stored in the storage device 20. The selection of the optimal image may be based on the current operating state of the storage device 20 and / or commands received from the host 10. According to various embodiments, at least one of the plurality of images may be stored in at least one of the storage controller 100's RAM 150, buffer memory 300, and / or non-volatile storage device 200.

[0050] In a particular embodiment of the inventive concept, the storage controller 100 may select from a plurality of stored images the optimal image corresponding to the most effective (or most appropriate) resource input state for executing the input command. Once selected, the optimal image may be loaded into the programmable logic unit 120. Here, the selection and loading of the optimal image may involve the use of the host interface 110, the programmable logic unit 120, and / or the processor 130.

[0051] return Figure 3 The programmable logic unit 120 can load an optimal image to better control the operating state of the storage controller 100. That is, in some embodiments, the programmable logic unit 120 can be used to dynamically manage power (S15) by reconfiguring the hardware resources of the storage controller 100 based on (or in response to) the optimal image, and in some embodiments, the programmable logic unit 120 can independently and dynamically manage power for each of the multiple hardware modules included in the storage device 20. In this regard, in some embodiments, the term "independently" or "independently" means that the host 10 does not intervene further after the communication command.

[0052] The storage controller 100 can communicate a result output indicating (or characterizing) its operational status after performing an operation based on the optimal image to the host 10 (S16). In response, the host 10 can prepare for the next operation based on the result output.

[0053] Figure 4 This is another flowchart illustrating a method of operating a storage controller according to an embodiment of the concept of the present invention.

[0054] Reference Figure 4 Method steps S20, S21, S22, S24, S25, and S27 are the same as... Figure 3 The steps S10, S11, S12, S14, S15 and S17 are similar (or identical).

[0055] In other words, if the current operating state of the storage device 20 is suitable for executing the received command (S22 = Yes) – that is, the current operating state is characterized by the resource allocation suitable for executing the received command – then the storage controller 100 will maintain the current operating state (S24) (e.g., continue the current operating state (or operate in the current operating state)).

[0056] However, if the current operating state of storage device 20 is not suitable for executing the received command (S22 = No), storage controller 100 will proceed to change the operating state to a more suitable one (e.g., performing method steps S23, S24, and S25 described below, as an example). In some respects, this change in operating state can be understood as a reallocation of internal hardware resources within storage controller 100 and / or non-volatile storage device 200.

[0057] For example, the optimal software-related (SW) image can be uploaded from the processor 130 to the eFPGA 120 (S23), and the storage controller 100 can operate based on the loaded optimal image (S24) to reconfigure the processor 130 (S26) and generate the corresponding result output (S27).

[0058] As previously described, the storage controller 100 can adaptively select the optimal image from a plurality of stored images in response to the current operating state of the storage device 20 and / or commands received from the host 10. That is, the processor 130 can be used to select the optimal image (e.g., the image among the plurality of stored images that corresponds to the resource input state that most effectively executes the received command) and load the selected optimal image into the programmable logic unit 120.

[0059] Once the optimal image is loaded (or updated), the programmable logic unit 120 can be used to control the operation of the storage controller 100 in response to the optimal image (S25). Therefore, in some embodiments of the inventive concept, the programmable logic unit 120 can be used to dynamically manage power by reconfiguring the resources of the processor 130 according to the optimal image (S26). For example, the loaded programmable logic unit 120 can be used to adjust (i.e., increase or decrease) the operating frequency of one or more components (e.g., a clock) within the processor 130 in response to a command received from the host 10.

[0060] Then, the host interface 110 can be used to communicate the output results associated with the operation in response to the optimal image to the host 10 (S27).

[0061] As described above, since the storage controller 100 can be used to control the operation of the processor 130 by adaptively changing the image according to the operating state of the storage device 20 and / or received commands, the processor 130 can operate with optimal use of its constituent resources.

[0062] Figure 5 This is another flowchart illustrating a method of operating a storage controller according to an embodiment of the concept of the present invention.

[0063] Reference Figure 5 Method steps S30, S31, S32, S34, S35, and S37 are the same as... Figure 3 Method steps S10, S11, S12, S14, S15 and S17 or Figure 4 The steps S20, S21, S22, S24, S25 and S27 are similar (or identical).

[0064] However, here, the optimal hardware-dependent (HW) image can be uploaded from one or more non-volatile storage devices 200 to the eFPGA 120 (S33). Furthermore, after the storage controller 100 responds to the image upload operation (S35), the NVM controller 160 can be reconfigured to provide a better allocation (or definition) of resources (S36).

[0065] Therefore, the programmable logic unit 120 can be used to dynamically control at least one of the following operations associated with (or controlled by) the NVM controller 160: power cut-off operation, power supply voltage adjustment operation, operating frequency adjustment operation, randomization operation, error correction operation, and compression operation.

[0066] In this way, the programmable logic unit 120 can use the processor 130 to perform control operations on the NVM controller 160 after the optimal image has been loaded. According to an embodiment, the NVM controller 160 can be responsively controlled to provide or modify error correction operations as errors increase in the data read from the non-volatile storage device 200. According to an embodiment, the NVM controller 160 can be controlled to perform data compression operations when the remaining memory capacity of the non-volatile storage device 200 is insufficient. According to an embodiment, the NVM controller 160 can be controlled to perform high-performance arithmetic operations when the input / output operations per second (IOPS) level of the non-volatile storage device 200 deteriorates. According to an embodiment, when any non-volatile storage device 200 is not used for a predetermined period of time, the operating frequency of the non-volatile storage device 200 can be reduced or it can be turned off (or optionally, turned on). Optionally or additionally, the levels of one or more power supply voltages associated with the non-volatile storage device 200 can be adjusted.

[0067] It is worth noting that the host interface 110 can be used to communicate information after the operation in response to the optimal image and to provide the corresponding result output to the host 10 (S37).

[0068] In this way, since the storage controller 100 can adaptively change the image in response to the current operating state of the storage device 20 and / or commands received from the host 10, the non-volatile storage device 200 can be operated with optimal resource allocation and / or operating state definition (e.g., effective power consumption).

[0069] Figure 6 , Figure 7 , Figure 8 and Figure 9 These are block diagrams illustrating embodiments of a storage controller 100 according to the present invention, respectively. For clarity of description, emphasis will be placed only on these corresponding embodiments and related aspects. Figure 2 Substantial differences between the described embodiments.

[0070] Figure 2 The general description of the non-volatile memory device 200 is as follows: Figure 6 Instead of a more detailed description, here, multiple images that can be loaded into the programmable logic unit 120 may be stored in a specific non-volatile storage device 210 (NVM1) among multiple non-volatile storage devices including non-volatile storage device 220.

[0071] Multiple non-volatile storage devices 210 and 220 can be connected to (and accessed by) the storage controller 100.

[0072] According to an embodiment, non-volatile storage devices 210 and 220 can be accessed by a separate NVM controller 160, or by a single NVM controller 160.

[0073] According to an embodiment, multiple images I can be stored in either non-volatile storage device 210 or 220. The NVM controller 160 can access the optimal image selected from the images I stored in non-volatile storage device 210 via channel CH1 and load it into the programmable logic unit 120. Data requested for reading or writing by the host 10, instead of images, can be accessed in non-volatile storage device 220 via channels CH2 to CHk (where k is a natural number of 3 or greater).

[0074] According to an embodiment, image I can be stored in at least one of the non-volatile storage devices 210 and 220. At least one non-volatile storage device 210 can be used solely for storing image I, and may not store other data. Image I stored in at least one non-volatile storage device 210 can only be read via channel CH1 and cannot be written to or erased by the host 10. In this case, the host 10 can only read, write, and erase data on the non-volatile storage devices 220 connected via channels CH2 to CHk.

[0075] According to an embodiment, the storage controller 100 monitors the status of each non-volatile storage device 200 (210 and 220), and when executing commands received from the host 10, the programmable logic unit 120 controls access operations to the non-volatile storage devices 200 (210 and 220) according to the selected optimal picture.

[0076] exist Figure 7 In this process, one or more images that can be loaded into the programmable logic unit 120 are stored in the internal memory 155 of the storage controller 100. According to an embodiment, the internal memory 155 may include non-volatile memory and volatile memory, and multiple images may be stored in non-volatile memory (NVRAM). According to an embodiment, the internal memory 155 may be a register, MRAM, PRAM, etc.

[0077] exist Figure 8 The images that can be loaded into the programmable logic unit 120 include at least a first type image I1 and a second type image I2. According to an embodiment, the first type image I1 and the second type image I2 can be distinguished based on data size, operation nature (or classification), control operation target, etc.

[0078] The storage controller 100 can store the first type image I1 in the internal memory 155 as a bit stream with a small amount of data. Conversely, the storage controller 100 can store the second type image I2 in the non-volatile storage device 200 as a bit stream with a larger amount of data than a preset amount.

[0079] Optionally, the storage controller 100 can store the first type image I1 in the internal memory 155 to control some hardware modules within the storage controller 100 (e.g., Figure 2 The operation of one or more of the hardware components 110, 120, 130, 140, and 160. Here, the internal memory 155 may be non-volatile RAM, such as registers, MRAM, or PRAM. The second type image I2 may be stored in the non-volatile storage device 200 to control the operation of each non-volatile storage device 200 and / or control the operation of the NVM controller 160.

[0080] exist Figure 9 In this context, images that can be loaded into the programmable logic unit 120 can be stored in an external memory 400 associated with the memory controller 100. Here, the external memory 400 is shown as being directly connected to the programmable logic unit 120, but this is only one possible configuration.

[0081] According to an embodiment, external memory 400 may be non-volatile memory, buffer memory, or register. External memory 400 may store multiple images to be loaded into programmable logic unit 120. Programmable logic unit 120 can operate by loading any one of the images from external memory 400.

[0082] As described above, a storage controller consistent with embodiments of the inventive concept can be used to effectively reallocate and / or redefine hardware resources in response to commands received from the host and the current operating state of the storage controller. The storage controller can analyze received commands in real time and dynamically manage the operating characteristics (e.g., power consumption) of the storage controller and / or associated storage devices without host intervention (i.e., independently).

[0083] Although the concept of the invention has been specifically shown and described with reference to exemplary embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the spirit and scope of the disclosure as defined by the appended claims.

Claims

1. A storage controller comprising: a host interface to analyze a command received from a host in real time; a programmable logic unit to load an optimal image adaptively selected from a plurality of images in response to at least one of a current operating state of the storage controller and the command; and a processor to perform an operation on a non-volatile storage device using the programmable logic unit after the optimal image is loaded, wherein the optimal image is loaded to reconfigure hardware resources of the storage controller and / or the non-volatile storage device.

2. The storage controller of claim 1, wherein, The operation dynamically manages power consumption of at least one of the storage controller and the non-volatile storage device.

3. The storage controller of claim 1, wherein, The programmable logic unit analyzes a pattern of the command and selects the optimal image from the plurality of images in response to the analyzed pattern of the command.

4. The storage controller of claim 1, wherein, At least one of the images is stored in the non-volatile storage device.

5. The storage controller of claim 1, wherein, The storage controller comprises a non-volatile storage controller to control the operation on the non-volatile storage device, and The operation performed by the processor dynamically changes at least one of a power-off operation, a power supply voltage adjustment operation, an operating frequency adjustment operation, a randomization operation, an error correction operation, and a compression operation.

6. The storage controller of claim 1, wherein, The plurality of images comprises a first type of image stored in an internal memory and a second type of image stored in the non-volatile storage device.

7. A method of operating a storage device comprising a storage controller and a non-volatile storage device, the method comprising: analyzing a command received from a host in real time; determining whether a current operating state of the storage device is suitable for executing the command; operating the storage device using the current operating state if the current operating state of the storage device is suitable for executing the command, otherwise changing the current operating state of the storage device; and generating a result output and communicating the result output to the host, wherein changing the current operating state of the storage device comprises: selecting an optimal image from a plurality of images in response to the real-time analysis of the command; loading the optimal image into a programmable logic unit; and operating the storage device using the programmable logic unit after the optimal image is loaded, wherein the optimal image is loaded to reconfigure hardware resources of the storage controller and / or the non-volatile storage device.

8. The method of claim 7, wherein, generating the result output after the operation of the storage device using the programmable logic unit after the optimal image is loaded.

9. The method of claim 8, wherein, analyzing the command in real time is analyzing a pattern of the command, and selecting the optimal image from the plurality of images in response to the analysis of the pattern of the command.

10. The method of claim 8, wherein, At least one of the plurality of images is stored in the non-volatile storage device.

11. The method of claim 8, wherein, The current operating state of the storage device is changed to change at least one of a power-off operation, a power supply voltage adjustment operation, an operating frequency adjustment operation, a randomization operation, an error correction operation, and a compression operation.

12. The method of claim 8, wherein, The storage device comprises a processor to control the operation of the storage device and a non-volatile memory (NVM) controller to control the operation of the non-volatile storage device, and The current operating state of the storage device is changed in response to the optimal image to change at least one of a power consumption of the storage device and a power consumption of the non-volatile storage device.

13. The method of claim 8, wherein, The optimal image is further selected from the plurality of images in response to the current operating state of the storage device.

14. The method of claim 7, wherein, The storage device includes a processor, and changing the current operating state of the storage device includes: selecting an optimal software image from the plurality of images in response to real-time analysis of the command; loading the optimal software image into the programmable logic unit; and operating the processor using the programmable logic unit after loading the optimal software image, wherein an output result is generated after operating the processor using the programmable logic unit after loading the optimal software image.

15. The method of claim 7, wherein, The storage device includes a non-volatile memory (NVM) controller, and changing the current operating state of the storage device includes: selecting an optimal hardware image from the plurality of images in response to real-time analysis of the command; loading the optimal hardware image into the programmable logic unit; and operating the NVM controller using the programmable logic unit after loading the optimal hardware image, wherein a result output is generated after operating the NVM controller using the programmable logic unit after loading the optimal hardware image.

16. A storage device, comprising: a non-volatile memory device; and a storage controller that receives a command from a host and includes: an internal memory; a programmable logic unit; a processor configured to control operation of the storage device and access the internal memory; and a non-volatile memory (NVM) controller configured to control operation of the non-volatile memory device, wherein the storage controller is configured to select an optimal image from a plurality of images in response to analysis of a pattern of the command and load the optimal image into the programmable logic unit, and the processor is further configured to control operation of the storage device in response to the optimal image, wherein the optimal image is loaded to reconfigure hardware resources of the storage controller and / or the non-volatile memory device.

17. The storage device of claim 16, wherein, After loading the optimal image, the operation of the storage device changes at least one of an error correction operation of data read from the non-volatile memory device and a data compression operation of data read from the non-volatile memory device.

18. The storage device of claim 16, further comprising: an external memory directly connected to the programmable logic unit and storing at least one of the plurality of images.

19. The storage device of claim 16, wherein, At least one of the plurality of images is stored in the non-volatile memory device and the internal memory.

20. The storage device of claim 19, wherein, The plurality of images includes a first type of image stored in the internal memory and a second type of image stored in the non-volatile memory device, and a data amount of the first type of image is less than a data amount of the second type of image.

Images