Display devices

Abstract

A display device is disclosed, comprising a display panel having a base surface and an input sensor located on the base surface. The input sensor may include first and second sensing electrodes extending in first and second directions intersecting each other, an insulating layer covering the first and second sensing electrodes, and first and second conductive patterns located on the insulating layer, the first and second conductive patterns respectively overlapping the first and second sensing electrodes and spaced apart from each other. This can suppress noise issues in the input sensor and improve the touch sensitivity of the input sensor.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0126951, filed on October 14, 2019, in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device, and in particular, to a display device having improved touch sensitivity. Background Art

[0004] Various display devices are being developed for multimedia devices such as televisions, mobile phones, tablet computers, navigation systems, and game consoles. A keyboard or mouse is used as an input device for the display device. In some cases, the display device includes a touch panel that serves as an input device for the display device. Summary of the Invention

[0005] Some embodiments of the present disclosure provide a display device having reduced noise characteristics and improved touch sensitivity.

[0006] According to some embodiments of the present disclosure, a display device includes a display panel having a base surface and an input sensor directly located on the base surface. The input sensor may include first and second sensing electrodes extending in first and second directions intersecting each other, an insulating layer covering the first and second sensing electrodes, and first and second conductive patterns located on the insulating layer, the first and second conductive patterns respectively overlapping the first and second sensing electrodes and spaced apart from each other.

[0007] In some embodiments, the first conductive pattern may correspond to a pattern of the first sensing electrode, and the second conductive pattern may correspond to a pattern of the second sensing electrode.

[0008] In some embodiments, each of the first sensing electrode and the second sensing electrode can include a plurality of grid lines.

[0009] In some embodiments, each of the first conductive pattern and the second conductive pattern may include a plurality of grid lines.

[0010] In some embodiments, an area of ​​the first conductive pattern may be substantially equal to an area of ​​the first sensing electrode, and an area of ​​the second conductive pattern may be substantially equal to an area of ​​the second sensing electrode.

[0011] In some embodiments, the first conductive pattern and the second conductive pattern may have a range of to thickness.

[0012] In some embodiments, the first conductive pattern and the second conductive pattern may correspond to floating electrodes.

[0013] In some embodiments, the input sensor may further include a sensing region and an interconnection region located outside the sensing region, wherein the first sensing electrode and the second sensing electrode are located in the sensing region. The first conductive pattern and the second conductive pattern may be located in the sensing region.

[0014] In some embodiments, the first sensing electrode may include a plurality of first sensor units arranged along a first direction and a first connecting portion connecting adjacent ones of the first sensor units, and the second sensing electrode may include a plurality of second sensor units arranged along a second direction and a second connecting portion connecting adjacent ones of the second sensor units.

[0015] In some embodiments, the insulating layer may include a first insulating layer and a second insulating layer. In some embodiments, a group of connection portions selected from the first connection portion and the second connection portion may be located on the base surface. The first insulating layer may be located on the selected group of connection portions. The first sensor unit, the second sensor unit, and another group of connection portions may be located on the first insulating layer, the other group of connection portions being selected from the first connection portion and the second connection portion and different from the first group of connection portions. The second insulating layer may be located on the first sensor unit, the second sensor unit, and the other group of connection portions.

[0016] In some embodiments, the first conductive pattern and the second conductive pattern may be directly on the second insulating layer.

[0017] In some embodiments, the first conductive pattern may include a plurality of first sensing portions respectively overlapping the first sensor units, and the second conductive pattern may include a plurality of second sensing portions respectively overlapping the second sensor units.

[0018] In some embodiments, each of the first sensor unit and the second sensor unit may include an outer pattern having a serrated shape, and each of the first sensing portion and the second sensing portion may include an outer pattern substantially identical to the outer pattern of a corresponding one of the first sensor unit and the second sensor unit.

[0019] In some embodiments, the first conductive pattern may further include a first bridge portion connecting adjacent ones of the first sensing portions.

[0020] In some embodiments, the second conductive pattern may further include a second bridge portion connecting adjacent ones of the second sensing portions.

[0021] In some embodiments, each of the first sensor unit and the second sensor unit may include four first outer sides, all of which have the same length, and each of the first sensing portion and the second sensing portion includes four second outer sides, the length of the second outer sides being the same as that of the first outer sides.

[0022] In some embodiments, the length of the second outer side can be in the range of 3 mm to 4 mm.

[0023] In some embodiments, each of the first sensing portion and the second sensing portion may have an aperture region therein.

[0024] In some embodiments, each of the second sensing portions can have an aperture region therein.

[0025] According to some embodiments of the present disclosure, a display device includes a display panel having a base surface and an input sensor directly located on the base surface. The input sensor may include first and second sensing electrodes extending in first and second directions intersecting each other, respectively, a conductive pattern located on the first and second sensing electrodes and overlapping either of the first and second sensing electrodes, and an insulating layer located between the first and second sensing electrodes and the conductive pattern. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The exemplary embodiments will be more clearly understood from the following brief description taken in conjunction with the accompanying drawings.The accompanying drawings illustrate non-limiting exemplary embodiments as described herein.

[0027] Figures 1A to 1C is a perspective view illustrating a display device according to some embodiments of the present disclosure.

[0028] Figure 2 is a cross-sectional view illustrating a display device according to some embodiments of the present disclosure.

[0029] Figure 3 is a plan view illustrating a display panel according to some embodiments of the present disclosure.

[0030] Figure 4 is an equivalent circuit diagram illustrating a pixel according to some embodiments of the present disclosure.

[0031] Figure 5 is an enlarged cross-sectional view of a display panel according to some embodiments of the present disclosure.

[0032] Figure 6 is a cross-sectional view illustrating an input sensor according to some embodiments of the present disclosure.

[0033] Figure 7A is a plan view illustrating a first conductive layer of an input sensor according to some embodiments of the present disclosure.

[0034] Figure 7B is a plan view illustrating a second conductive layer of an input sensor according to some embodiments of the present disclosure.

[0035] Figure 7C is a plan view illustrating a third conductive layer of an input sensor according to some embodiments of the present disclosure.

[0036] Figure 7D According to some embodiments of the present disclosure 7A to 7C A cross-sectional view taken along line II'.

[0037] Figure 8A According to some embodiments of the present disclosure Figure 7B An enlarged plan view of area AA1.

[0038] Figure 8B According to some embodiments of the present disclosure Figure 7C An enlarged plan view of area AA2.

[0039] Figure 9A According to some embodiments of the present disclosure Figure 7C An enlarged plan view of area AA2.

[0040] Figure 9B According to some embodiments of the present disclosure Figure 7C An enlarged plan view of area AA2.

[0041] Figure 9C According to some embodiments of the present disclosure Figure 9B A cross-sectional view taken along line II-II'.

[0042] Figure 10A According to some embodiments of the present disclosure Figure 7B An enlarged plan view of area AA1.

[0043] Figure 10B According to some embodiments of the present disclosure Figure 7C An enlarged plan view of area AA2.

[0044] Figures 11A to 11C Each of them shows some embodiments according to the present disclosure Figure 7C An enlarged plan view of area AA2.

[0045] It should be noted that these figures are intended to illustrate the general characteristics of the methods, structures and / or materials used in certain exemplary embodiments and to supplement the written description provided below. However, these figures are not drawn to scale and may not accurately reflect the precise structure or performance characteristics of any given embodiment and should not be interpreted as defining or limiting the range of values ​​or characteristics covered by the exemplary embodiments. For example, the relative thickness and position of molecules, layers, regions and / or structural elements may be reduced or exaggerated for clarity. The use of similar or identical reference numerals in the various figures is intended to indicate the presence of similar or identical elements or features. DETAILED DESCRIPTION

[0046] Exemplary embodiments of the present disclosure will now be described more fully with reference to the accompanying drawings, in which exemplary embodiments are shown. However, the exemplary embodiments of the present disclosure may be implemented in a variety of different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete and will fully convey the concepts of the exemplary embodiments to those of ordinary skill in the art. In the accompanying drawings, the thickness of layers and regions is exaggerated for clarity. The same reference numerals in the drawings represent the same elements, and their descriptions will therefore be omitted.

[0047] It should be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to another element, or there can be an intermediate element. On the contrary, when an element is referred to as being "directly connected" or "directly coupled" to another element, there is no intermediate element. The same mark always represents the same element. As used herein, the term "and / or" includes any and all combinations of one or more related listed items. Other words used to describe the relationship between an element or layer should be interpreted in a similar manner (for example, "between..." and "directly between...", "adjacent to..." and "directly adjacent to...", "on..." and "directly on...").

[0048] It should be understood that although the terms "first," "second," etc. may be used herein to describe various elements, components, regions, layers, and / or sections, these elements, components, regions, layers, and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer, or section from another element, component, region, layer, or section. Thus, the first element, first component, first region, first layer, or first section discussed below may be referred to as a second element, second component, second region, second layer, or second section without departing from the teachings of the exemplary embodiments.

[0049] For ease of description, spatially relative terms such as "below," "beneath," "lower," "above," and "upper" may be used herein to describe the relationship of one element or feature to another element or feature as shown in the accompanying drawings. It should be understood that in addition to the orientation shown in the accompanying drawings, the spatially relative terms are intended to also include different orientations of the device in use or operation. For example, if the device in the accompanying drawings is turned over, the elements described as being "below" or "beneath" other elements or features will then be oriented as being "above" the other elements or features. Thus, the exemplary term "below" can include both above and below orientations. The device can be oriented otherwise (rotated 90 degrees or in other orientations), and the spatially relative terms used herein should be interpreted accordingly.

[0050] The terms used herein are for the purpose of describing particular embodiments only and are not intended to limit the exemplary embodiments. As used herein, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that if the terms "comprises," "comprising," "includes," and / or "including" are used herein, the presence of the features, wholes, steps, operations, elements, and / or parts set forth is specified, but the presence or addition of one or more other features, wholes, steps, operations, elements, parts, and / or groups thereof is not excluded.

[0051] Exemplary embodiments of the present disclosure are described herein with reference to cross-sectional illustrations that are schematic illustrations of idealized embodiments (and intermediate structures) of the exemplary embodiments. As such, variations from the illustrated shapes resulting from, for example, manufacturing techniques and / or tolerances are to be expected. Thus, exemplary embodiments of the present disclosure should not be construed as limited to the specific shapes illustrated herein but are to include deviations in shapes that result, for example, from manufacturing.

[0052] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those skilled in the art to which the exemplary embodiments of the present disclosure belong. It should also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology and should not be interpreted in an idealized or overly formal sense unless explicitly defined as such herein.

[0053] As used herein, the terms "substantially," "about," and similar terms are used as approximate terms and not as terms of degree, and are intended to explain the inherent variations in measurements or calculations that one of ordinary skill in the art would recognize. Additionally, when describing embodiments of the present disclosure, the use of "may" refers to "one or more embodiments of the present disclosure." Additionally, when describing embodiments of the present disclosure, the use of alternative language such as "or" refers to "one or more embodiments of the present disclosure" for each corresponding item listed. As used herein, the terms "use," "using," and "used" may be considered synonymous with the terms "utilize," "utilizing," and "utilized," respectively. Additionally, the term "exemplary" is intended to represent an example or illustration.

[0054] In addition, any numerical range disclosed and / or recited herein is intended to include all subranges of the same numerical precision contained within the stated range. For example, a range of "1.0 to 10.0" is intended to include all subranges between the stated minimum value of 1.0 and the stated maximum value of 10.0 (and including 1.0 and 10.0), that is, having a minimum value equal to or greater than 1.0 and a maximum value equal to or less than 10.0, such as 2.4 to 7.6. Any maximum numerical limit stated herein is intended to include all lower numerical limits contained therein, and any minimum numerical limit stated in this specification is intended to include all higher numerical limits contained therein.

[0055] Hereinafter, embodiments of the present disclosure are described with reference to the accompanying drawings.

[0056] Figures 1A to 1C is a perspective view illustrating a display device DD according to some embodiments of the present disclosure.

[0057] like Figures 1A to 1CAs shown in , the display surface FS for displaying the image IM can be parallel to the plane defined by the first directional axis DR1 and the second directional axis DR2 (for example, the display surface FS can extend on the first directional axis DR1 and the second directional axis DR2). Hereinafter, the third directional axis DR3 can be used to refer to the thickness direction of the display device DD (that is, the direction perpendicular to the display surface FS). Based on the third directional axis DR3, the front surface or top surface and the rear surface or bottom surface of each component can be distinguished. However, the directions indicated by the first directional axis DR1, the second directional axis DR2 and the third directional axis DR3 can be relative concepts, and in some embodiments, they can be changed to indicate other directions. Hereinafter, the first direction, the second direction and the third direction can be the directions indicated by the first directional axis DR1, the second directional axis DR2 and the third directional axis DR3, respectively, and will be identified with the same reference numerals as the reference numerals of the first directional axis DR1, the second directional axis DR2 and the third directional axis DR3.

[0058] like Figures 1A to 1C As shown in , the display device DD may include multiple areas defined according to its operating mode. The display device DD may include a bending area BA that can be bent along a bending axis BX and a first non-bending area NBA1 and a second non-bending area NBA2 that are not bent (for example, the first non-bending area NBA1 and the second non-bending area NBA2 may be flat surfaces that may be relatively rigid and non-bending). Figure 1B As shown in FIG, the display device DD may be bent inwardly so that the display surface FS of the first non-bending area NBA1 faces the display surface FS of the second non-bending area NBA2. Figure 1C As shown in FIG, the display device DD may be bent outward so that the display surface FS is exposed to the outside (eg, the display surface FS of the first non-bending area NBA1 and the display surface FS of the second non-bending area NBA2 may be seen from the outside). Figures 1A to 1C In some implementations shown in , the display device repeats a folding operation and an unfolding operation, and such a display device may be defined as a foldable display device.

[0059] In some embodiments, the display device DD may include a plurality of bending areas BA. In some embodiments, the bending areas BA may be defined based on the shape of the display device DD manipulated by the user. For example, Figure 1B and Figure 1C Unlike the one shown in FIG, the bending area BA may be defined as being parallel to the first direction axis DR1 or parallel to the diagonal direction. The area of ​​the bending area BA may not be fixed and may vary according to its curvature radius. In some embodiments, the display device DD may be configured to repeat Figure 1A and Figure 1BThe folding and expanding operations shown in .

[0060] In some embodiments, an example is shown in which the display device DD is foldable, but the present disclosure is not limited to this example. The display device DD can have a curved display surface, or can have a three-dimensional display surface (e.g., a surface shaped like a polygonal column) including multiple display areas, these display areas being oriented in different directions. In addition, in some embodiments, the display device DD can be a rigid display device with a flat display surface FS. In some embodiments, the display device DD can have at least one edge portion that is curved or bent.

[0061] In this disclosure, an example is shown in which the display device DD is used as part of a mobile phone, but the disclosure is not limited to this example. For example, the display device DD can be used in large electronic devices (such as televisions and monitors) or small or medium-sized electronic devices (such as tablets, car navigation systems, game consoles, and smart watches).

[0062] like Figures 1A to 1C As shown in , the display surface FS may include a display area DD-DA for displaying an image IM and a non-display area DD-NDA disposed adjacent to the display area DD-DA (for example, in each of the first non-bending area NBA1 and the second non-bending area NBA2, the non-display area DD-NDA may surround the display area DD-DA along the periphery of the display area DD-DA in the first direction DR1 and the second direction DR2). The non-display area DD-NDA may not be used to display an image. Figure 1A As shown in , the image IM can be displayed in a form including application icons. As an example, the display area DD-DA can have a rectangular shape. The non-display area DD-NDA can surround the display area DD-DA. However, the present disclosure is not limited to this example, and in some embodiments, the shapes of the display area DD-DA and the non-display area DD-NDA can be changed differently in a complementary manner.

[0063] Figure 2 is a cross-sectional view showing a display device DD according to some embodiments of the present disclosure. For example, Figure 2 A cross section (eg, Figure 2 1 and 2 show cross-sectional views of the display device DD taken along the second direction DR2 and the third direction DR3 .

[0064] like Figure 2As shown in FIG, the display device DD may include a display panel DP and an input sensor IS. The display panel DP may generate an image, and the input sensor IS may obtain information about the coordinates of an external input (e.g., a touch event). Although not shown, the display device DD according to some embodiments of the present disclosure may further include a protective member provided on the bottom surface of the display panel DP and an anti-reflection member and / or a window member provided on the top surface of the input sensor IS.

[0065] The display panel DP may be a light-emitting display panel, but the present disclosure is not limited to a specific type of display panel DP. For example, the display panel DP may be an organic light-emitting display panel or a quantum dot light-emitting display panel. An organic light-emitting display panel may include an organic light-emitting material as its light-emitting layer. A quantum dot light-emitting display panel may include quantum dots and quantum rods as its light-emitting layer. For simplicity, the following description will refer to an example in which the display panel DP is an organic light-emitting display panel.

[0066] The display panel DP may include a base layer SUB and a circuit device layer DP-CL, a display element layer DP-OLED, and an encapsulation layer ECL disposed (e.g., sequentially disposed) on the base layer SUB. Although not shown, the display panel DP may further include functional layers such as an anti-reflection layer and a refractive index control layer.

[0067] The base layer SUB may include a flexible film. The base layer SUB may include at least one of a plastic substrate, a glass substrate, a metal substrate, and a substrate made of an organic / inorganic composite material. Figures 1A to 1C The described display area DD-DA and non-display area DD-NDA may be defined in the base layer SUB in the same manner.

[0068] The circuit device layer DP-CL may include at least one intermediate insulating layer and circuit devices. The intermediate insulating layer may include at least one intermediate inorganic layer and at least one intermediate organic layer. The circuit devices may include signal lines, pixel driver circuits, etc. Forming the circuit device layer DP-CL may include forming insulating layers, semiconductor layers, and conductive layers using coating or deposition processes, and patterning the insulating layers, semiconductor layers, and conductive layers using photolithography and / or etching processes.

[0069] The display element layer DP-OLED may include an organic light emitting diode (OLED).The display element layer DP-OLED may further include an organic layer such as a pixel defining layer.

[0070] The encapsulation layer ECL can seal or encapsulate the display element layer DP-OLED. The encapsulation layer ECL may include at least one inorganic layer (hereinafter referred to as the inorganic encapsulation layer). The encapsulation layer ECL may also include at least one organic layer (hereinafter referred to as the organic encapsulation layer). The inorganic encapsulation layer can protect the display element layer DP-OLED from moisture or oxygen, and the organic encapsulation layer can protect the display element layer DP-OLED from polluting materials such as dust particles. The inorganic encapsulation layer may be formed of at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide and aluminum oxide, or include at least one of silicon nitride, silicon oxynitride, silicon oxide, titanium oxide and aluminum oxide. The organic encapsulation layer may be formed of at least one of acrylic-based organic materials, or include at least one of acrylic-based organic materials, but the present disclosure is not limited thereto.

[0071] The input sensor IS can be directly disposed on the base surface defined by the display panel DP. In the present disclosure (specification), the expression "directly disposed on..." is used to indicate that one layer is continuously formed on another layer without an additional adhesive layer between them. The base surface may be the top surface of the encapsulation layer ECL, or may be the top surface of another functional layer disposed on the encapsulation layer ECL. However, the base surface may not be limited to these examples, and in each step of the manufacturing process, the top surface of the topmost layer of the display panel DP may be selected as the base surface. At the same time, the input sensor IS can be directly disposed on the base surface provided by the display panel DP, and in this case, the base substrate of the touch panel can be omitted, and the total thickness of the display device DD can be reduced.

[0072] The input sensor IS may have a multi-layer structure. In some embodiments, the input sensor IS may include one or more conductive layers. The input sensor IS may include at least one insulating layer IL (e.g., Figure 6 ).

[0073] The input sensor IS may sense external input using, for example, a capacitive sensing method. The present disclosure is not limited to a specific sensing method of the input sensor IS, and in some embodiments, the input sensor IS may sense external input using electromagnetic induction or pressure sensing.

[0074] Figure 3 is a plan view illustrating a display panel DP according to some embodiments of the present disclosure. Figure 4 is an equivalent circuit diagram illustrating a pixel PX according to some embodiments of the present disclosure. Figure 5 is an enlarged cross-sectional view of the display panel DP according to some embodiments of the present disclosure.

[0075] like Figure 3As shown in , when viewed in a plan view, the display panel DP may include a display area DA and a non-display area NDA. Figure 3 In an exemplary embodiment, the non-display area NDA may be defined along an edge of the display area DA. The display area DA and the non-display area NDA of the display panel DP may correspond to Figure 1A and Figure 1C In some embodiments, the display area DA and the non-display area NDA of the display device DD are defined as follows: Figure 1A and Figure 1C The display area DD-DA and the non-display area DD-NDA of the display device DD are different.

[0076] The display panel DP may include a driving circuit GDC, a plurality of signal lines SGL, and a plurality of pixels PX. The pixels PX may be arranged in the display area DA. Each of the pixels PX may include an organic light emitting diode OLED and a pixel driving circuit connected to the organic light emitting diode OLED. The driving circuit GDC, the signal lines SGL, and the pixel driving circuit may be included in Figure 2 The circuit device layer DP-CL is shown in FIG.

[0077] The drive circuit GDC may include a scan drive circuit. The scan drive circuit may generate a plurality of scan signals and sequentially output the scan signals to a plurality of scan lines GL, as will be described below. In some embodiments, the drive circuit GDC may also output other control signals to the pixel drive circuit of the pixel PX.

[0078] The driving circuit GDC may include a plurality of thin film transistors (TFTs) formed by the same process as the pixel driving circuit of the pixel PX, for example, by a low temperature polysilicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process.

[0079] The signal lines SGL may include scan lines GL, data lines DL, power lines PL, and control signal lines CSL. Each of the scan lines GL may be connected to a corresponding pixel PX among the pixels PX, and each of the data lines DL may be connected to a corresponding pixel PX among the pixels PX. The power lines PL may be connected to the pixels PX. The control signal lines CSL may provide control signals to the drive circuit GDC.

[0080] The display panel DP may include signal pads DP-PD connected to the ends of the signal lines SGL. The signal pads DP-PD may constitute a circuit device. The area of ​​the non-display area NDA in which the signal pads DP-PD are provided may be defined as a pad area NDA-PD. Pads connected to the touch signal lines SL1-1 to SL1-5 and SL2-1 to SL2-4 (e.g., as shown in FIG. 2 ) may also be provided in the pad area NDA-PD. Figure 7B ) and here, the touch signal lines SL1-1 to SL1-5 and SL2-1 to SL2-4 will be described in more detail below. The signal pads DP-PD and the dummy touch pads IS-DPD may be formed in a layer below the scan lines GL or the data lines DL (for example, see Figure 5 ) on the same layer, which will be described in more detail below.

[0081] Figure 4 An example of a pixel PX connected to one of the scan lines GL, one of the data lines DL, and the power line PL is shown. However, the present disclosure is not limited to this example, and elements constituting the pixel PX may be variously changed.

[0082] The organic light emitting diode OLED may be a top-emitting diode or a bottom-emitting diode. The pixel PX may include a first transistor or switching transistor T1, a second transistor or driving transistor T2, and a capacitor Cst, which serve as a pixel driving circuit for driving the organic light emitting diode OLED. A first power voltage ELVDD may be supplied to the second transistor T2, and a second power voltage ELVSS may be supplied to the organic light emitting diode OLED. The second power voltage ELVSS may be lower than the first power voltage ELVDD.

[0083] If a scan signal is applied to the scan line GL, the first transistor T1 may output a data signal applied to the data line DL in response to the scan signal. The capacitor Cst may be charged to have a voltage corresponding to the data signal supplied from the first transistor T1.

[0084] The second transistor T2 may be connected to the organic light emitting diode OLED and may control a driving current flowing through the organic light emitting diode OLED based on an amount of charge stored in the capacitor Cst.

[0085] Figure 5 The display panel DP according to some embodiments of the present disclosure is shown. Figure 4 The cross section of the equivalent circuit diagram corresponds to the part. Figure 5 In an exemplary embodiment, the circuit device layer DP-CL, the display element layer DP-OLED, and the encapsulation layer ECL may be sequentially stacked on the base layer SUB.

[0086] The circuit device layer DP-CL may include at least one inorganic layer, at least one organic layer, and a circuit device. In this embodiment, the circuit device layer DP-CL may include a buffer layer BFL formed of an inorganic material, a first intermediate inorganic layer 10 and a second intermediate inorganic layer 20, and an intermediate organic layer 30 formed of an organic material.

[0087] The inorganic material may include silicon nitride, silicon oxynitride, silicon oxide, etc. The organic material may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. The circuit device layer DP-CL may include a conductive pattern and / or a semiconductor pattern.

[0088] The buffer layer BFL can enhance the adhesion strength between the base layer SUB and the conductive pattern or semiconductor pattern. Although not shown, a barrier layer can be further provided on the top surface of the base layer SUB to prevent contaminants from entering the circuit device layer DP-CL (e.g., the barrier layer can substantially prevent the circuit device layer DP-CL from being exposed to external contaminants). In some embodiments, at least one of the buffer layer BFL and the barrier layer can be omitted.

[0089] The semiconductor pattern OSP1 of the first transistor T1 (hereinafter, referred to as the first semiconductor pattern) and the semiconductor pattern OSP2 of the second transistor T2 (hereinafter, referred to as the second semiconductor pattern) may be disposed on the buffer layer BFL. The first semiconductor pattern OSP1 and the second semiconductor pattern OSP2 may be formed of or include at least one of amorphous silicon, polycrystalline silicon, and a metal oxide semiconductor material.

[0090] The first intermediate inorganic layer 10 may be provided on the first semiconductor pattern OSP1 and the second semiconductor pattern OSP2. The control electrode GE1 of the first transistor T1 (hereinafter, referred to as the first control electrode) and the control electrode GE2 of the second transistor T2 (hereinafter, referred to as the second control electrode) may be provided on the first intermediate inorganic layer 10. The first control electrode GE1 and the second control electrode GE2 may be manufactured by the same photolithography process as that used for the scan line GL (for example, see Figure 4 ).

[0091] The second intermediate inorganic layer 20 may be provided on the first intermediate inorganic layer 10 to cover the first control electrode GE1 and the second control electrode GE2. The input electrode DE1 and the output electrode SE1 of the first transistor T1 (hereinafter referred to as the first input electrode and the first output electrode) and the input electrode DE2 and the output electrode SE2 of the second transistor T2 (hereinafter referred to as the second input electrode and the second output electrode) may be provided on the second intermediate inorganic layer 20.

[0092] The first input electrode DE1 and the first output electrode SE1 may be connected to the first semiconductor pattern OSP1 through first and second through holes CH1 and CH2, respectively, formed to penetrate the first and second intermediate inorganic layers 10 and 20. The second input electrode DE2 and the second output electrode SE2 may be connected to the second semiconductor pattern OSP2 through third and fourth through holes CH3 and CH4, respectively, formed to penetrate the first and second intermediate inorganic layers 10 and 20. In some embodiments, at least one of the first transistor T1 and the second transistor T2 may be provided with a bottom-gate structure.

[0093] The intermediate organic layer 30 may be disposed on the second intermediate inorganic layer 20 to cover the first input electrode DE1, the second input electrode DE2, the first output electrode SE1, and the second output electrode SE2. The intermediate organic layer 30 may be disposed to have a flat surface (eg, a flat top surface).

[0094] The display element layer DP-OLED may be disposed on the intermediate organic layer 30. The display element layer DP-OLED may include a pixel defining layer PDL and an organic light-emitting diode OLED. The pixel defining layer PDL may be formed of an organic material, or include an organic material, like the intermediate organic layer 30. The first electrode AE ​​of the organic light-emitting diode OLED may be disposed on the intermediate organic layer 30. The first electrode AE ​​may be connected to the second output electrode SE2 via a fifth penetration hole CH5 penetrating the intermediate organic layer 30. An opening OP may be defined in the pixel defining layer PDL. The opening OP of the pixel defining layer PDL may expose at least a portion of the first electrode AE ​​of the organic light-emitting diode OLED.

[0095] When viewed in a plan view, the pixel PX may be disposed in a pixel region. The pixel region may include a light emitting region PXA and a non-light emitting region NPXA adjacent to the light emitting region PXA. The non-light emitting region NPXA may surround the light emitting region PXA. Figure 5 In the exemplary embodiment, the light emitting region PXA may be defined to correspond to a region of the first electrode AE ​​exposed by the opening OP.

[0096] A hole control layer HCL may be provided in both the light emitting region PXA and the non-light emitting region NPXA. In the light emitting region PXA of the pixel PX, the hole control layer HCL may be provided on the first electrode AE ​​of the organic light emitting diode OLED in the region exposed by the opening OP. Although not shown, the pixel PX (e.g., see Figure 3 ) may be commonly provided with a common layer such as a hole control layer HCL.

[0097] A light-emitting layer EML may be provided on the hole control layer HCL. The light-emitting layer EML may be provided on a region corresponding to the opening OP. In other words, the light-emitting layer EML may include a plurality of separate patterns, each of which is provided in a corresponding one of the pixels PX. The light-emitting layer EML may be formed of or include at least one of an organic material and an inorganic material. Figure 5 In the exemplary embodiment of FIG. 1 , the light emitting layer EML is shown to have a patterned structure, but in some embodiments, the light emitting layer EML may be arranged in a plurality of pixels (see FIG. 1 ). Figure 3 In some embodiments, the light emitting layer EML may generate white light. In some embodiments, the light emitting layer EML may have a multi-layer structure.

[0098] An electron control layer TCL may be provided on the light emitting layer EML. Although not shown, the electron control layer TCL may be commonly formed in a plurality of pixels PX (eg, see Figure 3 ).

[0099] The second electrode CE of the organic light emitting diode OLED may be disposed on the electronic control layer TCL. The second electrode CE may be commonly disposed in a plurality of pixels PX. In some embodiments, the second electrode CE may be a common electrode.

[0100] The encapsulation layer ECL may be provided on the second electrode CE of the organic light emitting diode OLED. The encapsulation layer ECL may be provided in common in a plurality of pixels PX. Figure 5 In an exemplary embodiment, the encapsulation layer ECL may directly cover the second electrode CE. In some embodiments, a capping layer may be further provided between the encapsulation layer ECL and the second electrode CE to cover the second electrode CE. Here, the encapsulation layer ECL may directly cover the capping layer.

[0101] Figure 6 is a cross-sectional view illustrating an input sensor IS according to some embodiments of the present disclosure. Figure 7A is a plan view illustrating a first conductive layer IS-CL1 of an input sensor IS according to some embodiments of the present disclosure. Figure 7Bis a plan view illustrating a second conductive layer IS-CL2 of the input sensor IS according to some embodiments of the present disclosure. Figure 7C is a plan view illustrating a third conductive layer IS- CL3 of the input sensor IS according to some embodiments of the present disclosure. Figure 7D According to some embodiments of the present disclosure 7A to 7C A cross-sectional view taken along line II'.

[0102] like Figure 6 As shown in , the input sensor IS may include a first conductive layer IS-CL1, a first insulating layer IS-IL1, a second conductive layer IS-CL2, a second insulating layer IS-IL2, and a third conductive layer IS-CL3.

[0103] exist Figure 6 In an exemplary embodiment, the first conductive layer IS-CL1 may be directly disposed on the encapsulation layer ECL. However, the present disclosure is not limited to this example or specific embodiment, and in some embodiments, another inorganic or organic layer may be further disposed between the first conductive layer IS-CL1 and the encapsulation layer ECL. In some embodiments, the first insulating layer IS-IL1, the second conductive layer IS-CL2, the third insulating layer IS-IL2, and the third conductive layer IS-CL3 may be sequentially disposed on the first conductive layer IS-CL1. In some embodiments, the second insulating layer IS-IL2 may be omitted, and an optical member or an adhesive layer having a protective function may be provided instead of the second insulating layer IS-IL2.

[0104] Each of the first conductive layer IS-CL1, the second conductive layer IS-CL2, and the third conductive layer IS-CL3 may have a single-layer structure or a multi-layer structure including layers stacked on the third directional axis DR3. The single-layer conductive layer may include a metal layer or a transparent conductive layer. The metal layer may be formed of at least one of molybdenum, silver, titanium, copper, aluminum, and alloys thereof, or include at least one of molybdenum, silver, titanium, copper, aluminum, and alloys thereof. The transparent conductive layer may include a transparent conductive oxide such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), or indium tin zinc oxide (ITZO). In some embodiments, the transparent conductive layer may include at least one of PEDOT, metal nanowires, and graphene.

[0105] The multilayer conductive layer may include multiple metal layers. For example, the metal layers constituting the conductive layer may have a three-layer structure including, for example, titanium / aluminum / titanium layers. The multilayer conductive layer may include a single metal layer and a transparent conductive layer. The multilayer conductive layer may include multiple metal layers and at least one transparent conductive layer.

[0106] Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may include a plurality of conductive patterns. The conductive patterns may include sensing electrodes and sensing signal lines. The third conductive layer IS-CL3 may include a conductive pattern overlapping with the sensing electrodes.

[0107] Each of the first insulating layer IS-IL1 and the second insulating layer IS-IL2 may include an inorganic material or an organic material. At least one of the first insulating layer IS-IL1 and the second insulating layer IS-IL2 may include an inorganic layer. The inorganic layer may be formed of or include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon oxynitride, zirconium oxide, and hafnium oxide.

[0108] At least one of the first insulating layer IS-IL1 and the second insulating layer IS-IL2 may include an organic layer. The organic layer may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin. For example, the first insulating layer IS-IL1 may include an inorganic layer, and the second insulating layer IS-IL2 may include an organic layer.

[0109] like 7A to 7B As shown in , the input sensor IS may include first sensing electrodes TE1-1 to TE1-5, second sensing electrodes TE2-1 to TE2-4, first sensing signal lines SL1-1 to SL1-5 connected to the first sensing electrodes TE1-1 to TE1-5, second sensing signal lines SL2-1 to SL2-4 connected to the second sensing electrodes TE2-1 to TE2-4, and sensing pads IS-PD connected to the first sensing signal lines SL1-1 to SL1-5 and the second sensing signal lines SL2-1 to SL2-4. The first sensing electrodes TE1-1 to TE1-5 may be arranged to intersect the second sensing electrodes TE2-1 to TE2-4. The first sensing electrodes TE1-1 to TE1-5 may be arranged in a second direction DR2, and each of the first sensing electrodes TE1-1 to TE1-5 may extend in the first direction DR1. The second sensing electrodes TE2-1 to TE2-4 may be arranged in the first direction DR1, and each of the second sensing electrodes TE2-1 to TE2-4 may extend in the second direction DR2.

[0110] The first sensing signal lines SL1-1 to SL1-5 may be connected to one end of the first sensing electrodes TE1-1 to TE1-5, respectively. The second sensing signal lines SL2-1 to SL2-4 may be connected to both ends of the second sensing electrodes TE2-1 to TE2-4, respectively. In some embodiments, the first sensing signal lines SL1-1 to SL1-5 may be connected to both ends of the first sensing electrodes TE1-1 to TE1-5. In some embodiments, the second sensing signal lines SL2-1 to SL2-4 may be connected to one end of the second sensing electrodes TE2-1 to TE2-4, respectively.

[0111] In some embodiments, the first sensing signal lines SL1-1 to SL1-5, the second sensing signal lines SL2-1 to SL2-4, and the sensing pads IS-PD may be replaced with a separately manufactured circuit substrate, etc. In some embodiments, the sensing pads IS-PD may be omitted, and the first sensing signal lines SL1-1 to SL1-5 and the second sensing signal lines SL2-1 to SL2-4 may be connected to Figure 3 The dummy touch pad IS-DPD shown in FIG.

[0112] In some embodiments, the input sensor IS can sense external inputs using mutual capacitance and / or self-capacitance. The input sensor IS may include at least one insulating layer IL. The insulating layer IL may cover the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4. The insulating layer IL may include a first insulating layer IS-IL1 and a second insulating layer IS-IL2.

[0113] Each of the first sensing electrodes TE1-1 to TE1-5 may include a first sensor cell SP1 and a first connection part CP1. Each of the second sensing electrodes TE2-1 to TE2-4 may include a second sensor cell SP2 and a second connection part CP2.

[0114] The first sensor cells SP1 may be arranged in the first direction DR1, and the second sensor cells SP2 may be arranged in the second direction DR2. Each of the first connection portions CP1 may connect adjacent first sensor cells SP1 among the first sensor cells SP1, and each of the second connection portions CP2 may connect adjacent second sensor cells SP2 among the second sensor cells SP2.

[0115] The second sensing electrodes TE2-1 to TE2-4 may be longer than the first sensing electrodes TE1-1 to TE1-5, and in some embodiments, the number of sensor units (SP1, SP2) and connecting portions (CP1, CP2) may be greater in the second sensing electrodes TE2-1 to TE2-4 than in the first sensing electrodes TE1-1 to TE1-5. Therefore, the second sensing electrodes TE2-1 to TE2-4 may have an area greater than that of the first sensing electrodes TE1-1 to TE1-5. In an exemplary embodiment of the present disclosure, the “area” may be an area defined by an outer line or boundary line of the sensing electrodes. Figure 7B In the exemplary embodiment, the first sensor cell SP1 and the second sensor cell SP2 may have substantially the same area. Therefore, each of the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4 may have an area proportional to the number of sensor cells thereof.

[0116] exist Figure 7B In the exemplary embodiment of FIG, five first sensor cells SP1 are included in the first sensing electrodes TE1-1 to TE1-5, and six second sensor cells SP2 are included in the second sensing electrodes TE2-1 to TE2-4. Among the five first sensor cells SP1, each of the two opposing first sensor cells SP1 may be half the size of each of the other first sensor cells SP1 interposed therebetween. Among the six second sensor cells SP2, each of the two opposing second sensor cells SP2 may be half the size of each of the other second sensor cells SP2 interposed therebetween.

[0117] refer to Figure 7C The third conductive layer IS-CL3 may include a plurality of conductive patterns. The conductive patterns may include first conductive patterns PE1-1 to PE1-5 and second conductive patterns PE2-1 to PE2-4. The third conductive layer IS-CL3 may be disposed on the second insulating layer IS-IL2. The third conductive layer IS-CL3 may have a single-layer structure or a multi-layer structure including layers stacked along the third directional axis DR3.

[0118] Each of the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 of the third conductive layer IS-CL3 may include a transparent electrode. The transparent electrode may be formed of or include at least one of a metal oxide material, such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), Al-doped zinc oxide (AZO), indium gallium zinc oxide (IGZO), and Ga-doped zinc oxide (GZO). The first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 may correspond to floating electrodes. In some embodiments, the third conductive layer IS-CL3 may be directly disposed on the second insulating layer IS-IL2.

[0119] In some embodiments, the first conductive pattern PE1 and the second conductive pattern PE2 may have 10 4 In some embodiments, the first conductive pattern PE1 and the second conductive pattern PE2 may have a resistance in the range of to thickness, or in particular, thickness.

[0120] Table 1

[0121]

[0122] Table 1 shows the change in touch sensing performance of the display device DD caused by the change in the thickness of the third conductive layer IS-CL3. Here, Cm represents the magnitude of the mutual capacitance, and the signal magnitude represents the touch sensing performance. According to Table 1, the signal magnitude increases when the third conductive layer IS-CL3 is provided on the second insulating layer IS-IL2, compared to when the third conductive layer IS-CL3 is not provided. The signal magnitude increases as the thickness of the third conductive layer IS-CL3 increases, but The thickness of the third conductive layer IS-CL3 may have the highest value at a thickness of 1.5°. The thickness of the third conductive layer IS-CL3 may correspond to the thickness of the first conductive pattern PE1 and the second conductive pattern PE2. The third conductive layer IS-CL3 including the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 may improve the touch sensitivity of the display device DD. The first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 may be spaced apart from each other and may overlap with the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4, respectively. For example, the first conductive patterns PE1-1 to PE1-5 may overlap with the first sensing electrodes TE1-1 to TE1-5, respectively, and the second conductive patterns PE2-1 to PE2-4 may overlap with the second sensing electrodes TE2-1 to TE2-4, respectively. The first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 of the third conductive layer IS-CL3 can overlap with the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4, respectively, and can be spaced apart from each other, and in some embodiments, can improve the touch sensitivity of the display device DD and effectively suppress noise problems.

[0123] The patterns of the first conductive patterns PE1-1 to PE1-5 may correspond to the patterns of the first sensing electrodes TE1-1 to TE1-5, and the patterns of the second conductive patterns PE2-1 to PE2-4 may correspond to the patterns of the second sensing electrodes TE2-1 to TE2-4. For example, the first conductive patterns PE1-1 to PE1-5 may have substantially the same pattern shape as the first sensing electrodes TE1-1 to TE1-5, and the second conductive patterns PE2-1 to PE2-4 may have substantially the same pattern shape as the second sensing electrodes TE2-1 to TE2-4.

[0124] In some embodiments, the area of ​​each of the first conductive patterns PE1-1 to PE1-5 may be substantially equal to the area of ​​the corresponding one of the first sensing electrodes TE1-1 to TE1-5, and the area of ​​each of the second conductive patterns PE2-1 to PE2-4 may be substantially equal to the area of ​​the corresponding one of the second sensing electrodes TE2-1 to TE2-4. However, the present disclosure is not limited to this example, and the area of ​​each of the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 may be larger or smaller than the area of ​​the corresponding one of the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4.

[0125] In some embodiments, when an area of ​​each of the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 is greater than an area of ​​a corresponding one of the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4, a distance from the first conductive patterns PE1-1 to PE1-5 to the second conductive patterns PE2-1 to PE2-4 may be reduced, and when an area of ​​each of the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 is less than an area of ​​a corresponding one of the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4, a distance from the first conductive patterns PE1-1 to PE1-5 to the second conductive patterns PE2-1 to PE2-4 may be increased.

[0126] In some embodiments, when the area of ​​each of the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 is equal to (e.g., substantially equal to) the area of ​​a corresponding one of the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4, each of the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 may perfectly (or substantially completely) overlap with the corresponding one of the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4. Here, the area may be the area defined by the outer lines of the sensing electrodes TE1 and TE2 and the conductive patterns PE1 and PE2.

[0127] Reference Figure 7C , the first conductive patterns PE1-1 to PE1-5 may include a plurality of first sensing portions PP1, and the second conductive patterns PE2-1 to PE2-4 may include a plurality of second sensing portions PP2. In some embodiments, the first sensing portions PP1 may overlap with the first sensor units SP1, respectively, and the second sensing portions PP2 may overlap with the second sensor units SP2, respectively. In some embodiments, the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 may be disposed only in the sensing area SA and may not be disposed in the interconnection area NSA. The first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4 may be disposed in the sensing area SA and may be spaced apart from the interconnection area NSA by a specific (e.g., set or predetermined) distance. The sensing area SA may correspond to the display area DA (e.g., see Figure 7B ), and the interconnection area NSA may correspond to the non-display area NDA (eg, see Figure 7B ).

[0128] In some embodiments, although Figure 7B Only the first outer side LSL of the first sensor unit SP1 is shown in the figure, but each of the first and second sensor units SP1 and SP2 may include four first outer side LSLs. The first outer side LSLs may have the same length. In some embodiments, each of the first and second sensing parts PP1 and PP2 may include four second outer side LPLs, and the second outer side LPLs may have the same length as the first outer side LSLs. Here, the first outer side LSL may be the outer line of each sensor unit that defines the shape of each sensor unit (e.g., SP1 and SP2), and the second outer side LPL may be the outer line of each sensing part (e.g., PP1 and PP2) that defines the shape of each sensing part. In some embodiments, the length of the second outer side LPLs may be in the range of 3 mm to 4 mm. For example, the length of each of the four second outer side LPLs may be in the range of 3 mm to 4 mm. In some embodiments, if the length of the second outer side LPLs is in the range of 3 mm to 4 mm, the length of the first outer side LSL may also be in the range of 3 mm to 4 mm; for example, the first outer side LSL and the second outer side LPL may have substantially the same length.

[0129] refer to Figure 7D , the first connection portion CP1 may be provided on the encapsulation layer ECL. The first sensing electrodes TE1-1 to TE1-5 may be provided on the first insulating layer IS-IL1 (for example, the first sensing electrodes TE1-1 to TE1-5 may be formed at the second conductive layer IS-CL2). The first conductive patterns PE1-1 to PE1-5 may be provided on the second insulating layer IS-IL2 (for example, the first conductive patterns PE1-1 to PE1-5 may be formed at the third conductive layer IS-CL3). The second insulating layer IS-IL2 may be provided between the first conductive patterns PE1-1 to PE1-5 and the first sensing electrodes TE1-1 to TE1-5. Figure 7D In the embodiment, the first conductive patterns PE1-1 to PE1-5 may overlap with the first sensing electrodes TE1-1 to TE1-5. The first conductive patterns PE1-1 to PE1-5 may be spaced apart from each other at regions where the first sensing electrodes TE1-1 to TE1-5 are spaced apart from each other.

[0130] refer to 7A to 7D, the first connection portion CP1 can be provided on the encapsulation layer ECL. The first connection portion CP1 can be formed of or include at least one of a transparent conductive oxide and / or a metal material. In some embodiments, the first connection portion CP1 can include multiple metal layers. In some embodiments, instead of the first connection portion CP1, the second connection portion CP2 can be provided on the encapsulation layer ECL.

[0131] The first insulating layer IS-IL1 may be disposed on the encapsulation layer ECL to cover the first connection portion CP1. The first insulating layer IS-IL1 may have a contact hole CH10 defined therein to expose the first connection portion CP1. In other words, the first connection portion CP1 may be disposed on a base surface (e.g., a base surface provided by the display panel DP).

[0132] The first sensor unit SP1 and the second sensor unit SP2 may be provided on the first insulating layer IS-IL1. In some embodiments, the second connection portion CP2 may be provided on the first insulating layer IS-IL1. The second sensor unit SP2 and the second connection portion CP2 may be formed by the same photolithography process, and in this case, the second sensor unit SP2 and the second connection portion CP2 may be connected to form a single object (for example, see Figure 8A ).

[0133] The first sensor unit SP1, the second sensor unit SP2, and the second connection portion CP2 may be formed of or include at least one of a transparent conductive oxide and a metal material. In some embodiments, the first sensor unit SP1, the second sensor unit SP2, and the second connection portion CP2 may include a plurality of metal layers (e.g., Ti / Al / Ti layers).

[0134] The first sensing signal lines SL1-1 to SL1-5 and the second sensing signal lines SL2-1 to SL2-4 may be disposed on the first insulating layer IS-IL1. The first sensing signal lines SL1-1 to SL1-5 and the second sensing signal lines SL2-1 to SL2-4 may be disposed in the non-display area NDA. The first sensing signal lines SL1-1 to SL1-5 and the second sensing signal lines SL2-1 to SL2-4 may be formed by the same process as the first sensor unit SP1 and may have the same stacked structure as the first sensor unit SP1.

[0135] In some embodiments, the second conductive layer IS-CL2 may include the first sensor cell SP1 and the second sensor cell SP2, and in some embodiments, the distance between the first sensor cell SP1 and the second sensor cell SP2 and the second electrode CE of the display panel DP may be increased. When compared to an input sensor in which the first conductive layer IS-CL1 includes the first sensor cell SP1 and the second sensor cell SP2, in the input sensor IS according to the exemplary embodiment of the present disclosure, the parasitic capacitance between the second electrode CE and the first sensor cell SP1 and the second sensor cell SP2 may be reduced.

[0136] The distance between the second electrode CE and the first sensor unit SP1 and the second sensor unit SP2 may be in the range of 0.5 μm to 30 μm. The insulating layer (eg, Figure 6 The sum of the thicknesses of the encapsulation layer ECL and the first insulating layer IS-IL1 can be in the range of 0.5 μm to 30 μm. Figure 3 The flexibility of the "DP" in the second electrode CE) is provided between the second sensor unit SP1 and the second sensor unit SP2. Figure 6 The total thickness of the encapsulation layer ECL and the first insulating layer IS-IL1 may be in the range of 0.5 to 10 micrometers (particularly, 0.5 to 5 micrometers).

[0137] As reference Figures 1A to 1C As described above, when the foldable display device has a small thickness, it is relatively easy to prevent or suppress the internal components from breaking during the folding operation. In the exemplary embodiment of the present disclosure, since the second conductive layer IS-CL2 includes the first sensor unit SP1 and the second sensor unit SP2, even when the encapsulation layer ECL and the first insulating layer IS-IL1 are thin, the parasitic capacitance problem can be suppressed (or significantly reduced).

[0138] However, the present disclosure is not limited to this example or specific embodiment, and in some embodiments, the elements constituting the first conductive layer IS-CL1 may be interchanged with the elements constituting the second conductive layer IS-CL2. For example, the second connection portion CP2 may be provided on the first insulating layer IS-IL1, and the first sensor cell SP1, the second sensor cell SP2, and the first connection portion CP1 may be provided below the first insulating layer IS-IL1.

[0139] Figure 8A According to some embodiments of the present disclosure Figure 7B An enlarged plan view of area AA1. Figure 8BAccording to some embodiments of the present disclosure Figure 7C An enlarged plan view of area AA2. Figure 8A In FIG, when viewed in a plan view, the first sensor unit SP1 may be spaced apart from the second sensor unit SP2 by a certain (eg, set or predetermined) distance. Figure 8B , the first sensing portion PP1 and the second sensing portion PP2 may be arranged to overlap with the first sensor unit SP1 and the second sensor unit SP2, respectively. Similar to the first sensor unit SP1 and the second sensor unit SP2, the first sensing portion PP1 may be spaced apart from the second sensing portion PP2 by a specific (e.g., set or predetermined) distance. For example, the distance from the first sensor unit SP1 to the second sensor unit SP2 may be substantially equal to the distance from the first sensing portion PP1 to the second sensing portion PP2. Figure 8A As shown in FIG, each of the first sensing electrodes TE1-1 to TE1-5 and the second sensing electrodes TE2-1 to TE2-4 may include a plurality of mesh lines MSH. Figure 8B Although not shown in the drawings, the first and second sensing parts PP1 and PP2 may include a plurality of mesh lines MSH.

[0140] Figure 9A According to some embodiments of the present disclosure Figure 7C An enlarged plan view of area AA2. Figure 9B According to some embodiments of the present disclosure Figure 7C In some embodiments, the input sensor IS may include a bridge portion connecting adjacent sensing portions among the sensing portions PP1 or PP2 included in any one of the first conductive patterns PE1-1 to PE1-5 or the second conductive patterns PE2-1 to PE2-4. Figure 9A , the first conductive patterns PE1-1 to PE1-5 may include first bridges BP1, each of the first bridges BP1 being disposed to connect a corresponding pair of first sensing portions PP1. Figure 9B , the second conductive patterns PE2 - 1 to PE2 - 4 may include second bridges BP2 , each of which is disposed to connect a corresponding pair of the second sensing parts PP2 . Figure 9C It is along Figure 9B A cross-sectional view taken along line II-II'. Figure 9C, the first conductive patterns PE1-1 to PE1-5 may overlap with the first sensing electrodes TE1-1 to TE1-5. The first conductive patterns PE1-1 to PE1-5 may be spaced apart from each other in the region where the first sensing electrodes TE1-1 to TE1-5 are spaced apart from each other. In some embodiments, the second bridge portion BP2 disposed between the first conductive patterns PE1-1 to PE1-5 may overlap with the second connection portion CP2 disposed between the first sensing electrodes TE1-1 to TE1-5 (for example, in the third direction DR3).

[0141] Figure 10A According to some embodiments of the present disclosure Figure 7B An enlarged plan view of area AA1. Figure 10B According to some embodiments of the present disclosure Figure 7C An enlarged plan view of area AA2. Figure 10A , each of the first sensor unit SP1 and the second sensor unit SP2 may have an outer pattern OL having a zigzag shape. Figure 10B Each of the first sensing part PP1 and the second sensing part PP2 may have an outer pattern OL having the same shape as the outer pattern OL of the first sensor unit SP1 and the second sensor unit SP2. In the case where the outer pattern OL of the first sensor unit SP1 and the second sensor unit SP2 has a zigzag shape, the outer patterns OL of the first sensing part PP1 and the second sensing part PP2 may also have the same shape (i.e., a zigzag shape). The outer patterns OL of the first sensing part PP1 and the second sensing part PP2 may overlap with the outer patterns OL of the first sensor unit SP1 and the second sensor unit SP2, respectively.

[0142] Figures 11A to 11C Each of them shows some embodiments according to the present disclosure Figure 7C An enlarged plan view of area AA2.

[0143] The first sensing part PP1 and the second sensing part PP2 may have a hole area HH disposed therein. As an example, the hole area HH may be disposed in the second sensing part PP2. In some embodiments, the hole area HH may be disposed only in the first sensing part PP1, only in the second sensing part PP2, or in both the first sensing part PP1 and the second sensing part PP2. When the hole area HH is disposed in the first sensing part PP1 and / or the second sensing part PP2, noise issues between sensors (e.g., the first sensor unit SP1 and the second sensor unit SP2) can be effectively reduced. For example, when reducing noise is more important than improving touch sensitivity, the hole area HH may be disposed in at least one of the first sensing part PP1 and the second sensing part PP2.

[0144] In some embodiments, the input sensor IS may include a conductive pattern disposed on the first sensing electrode TE1 and the second sensing electrode TE2 and overlapping either of the first sensing electrode TE1 and the second sensing electrode TE2. The conductive pattern may be disposed on the insulating layer IL. In some embodiments, to suppress noise issues, the input sensor IS may include only one of the first conductive patterns PE1-1 to PE1-5 and the second conductive patterns PE2-1 to PE2-4. For example, the input sensor IS may include only the first conductive patterns PE1-1 to PE1-5.

[0145] According to some embodiments of the present disclosure, first and second conductive patterns may be disposed on first and second sensing electrodes directly disposed on a display panel, and thus, conductivity of the sensing electrodes may be increased, thereby improving touch sensitivity of the input sensor.

[0146] The first and second conductive patterns can be configured to have the same pattern shape as the first and second sensing electrodes. This prevents noise issues from occurring in the input sensor and improves the touch sensitivity of the input sensor. In other words, by making the pattern shapes of the first and second conductive patterns the same as the pattern shapes of the first and second sensing electrodes, noise can be suppressed or reduced.

[0147] While exemplary embodiments of the present disclosure have been particularly shown and described, it will be understood by those skilled in the art that changes in form and details may be made therein without departing from the spirit and scope of the appended claims and their equivalents.

Claims

1. Display devices, including: a display panel having a base surface; as well as an input sensor, located on the base surface, Wherein, the input sensor includes: The first sensing electrode and the second sensing electrode extend in a first direction and a second direction respectively intersecting each other; an insulating layer, covering the first sensing electrode and the second sensing electrode; and a first conductive pattern and a second conductive pattern, located on the insulating layer, wherein the first conductive pattern and the second conductive pattern overlap with the first sensing electrode and the second sensing electrode respectively and are spaced apart from each other; The second sensing electrode includes a plurality of second sensor units arranged along the second direction, and The second conductive pattern corresponds to a floating electrode and includes a plurality of second floating portions respectively overlapping the plurality of second sensor units and a second bridge connecting adjacent second floating portions of the plurality of second floating portions.

2. The display device according to claim 1, wherein The first conductive pattern corresponds to a pattern of the first sensing electrode, and the second conductive pattern corresponds to a pattern of the second sensing electrode.

3. The display device according to claim 1, wherein Each of the first sensing electrode and the second sensing electrode includes a plurality of grid lines.

4. The display device according to claim 3, wherein Each of the first conductive pattern and the second conductive pattern includes a plurality of grid lines.

5. The display device according to claim 1, wherein The area of ​​the first conductive pattern is equal to the area of ​​the first sensing electrode, and The area of ​​the second conductive pattern is equal to the area of ​​the second sensing electrode. The display device according to claim 1 , wherein: The first conductive pattern and the second conductive pattern have a range of to thickness.

7. The display device according to claim 1, wherein The first conductive pattern corresponds to a floating electrode.

8. The display device according to claim 1, wherein The input sensor further includes a sensing region and an interconnection region located outside the sensing region, the first sensing electrode and the second sensing electrode being located in the sensing region, and Wherein, the first conductive pattern and the second conductive pattern are located in the sensing area.

9. The display device according to claim 1, wherein The first sensing electrode includes a plurality of first sensor units arranged along the first direction and a first connecting portion connecting adjacent first sensor units among the plurality of first sensor units, and The second sensing electrode further includes a second connecting portion connecting adjacent second sensor units among the plurality of second sensor units.

10. The display device according to claim 9, wherein The insulating layer includes a first insulating layer and a second insulating layer, wherein a set of connection portions selected from the first connection portion and the second connection portion are located on the base surface, wherein the first insulating layer is located on a selected group of connection portions, wherein the first sensor unit, the second sensor unit, and another set of connection parts are located on the first insulating layer, the another set of connection parts being selected from the first connection parts and the second connection parts and being different from the one set of connection parts, and The second insulating layer is located on the first sensor unit, the second sensor unit and the other group of connecting parts.

11. The display device according to claim 10, wherein The first conductive pattern and the second conductive pattern are directly located on the second insulating layer.

12. The display device according to claim 9, wherein The first conductive pattern includes a plurality of first floating portions respectively overlapping the plurality of first sensor units.

13. The display device according to claim 12, wherein Each of the plurality of first sensor units and the plurality of second sensor units includes an outer pattern having a zigzag shape, and Each of the plurality of first floating parts and the plurality of second floating parts includes an outer pattern that is the same as an outer pattern of a corresponding one of the plurality of first sensor units and the plurality of second sensor units.

14. The display device according to claim 12, wherein The first conductive pattern further includes a first bridge portion connecting adjacent first floating portions among the plurality of first floating portions.

15. The display device according to claim 12, wherein Each of the plurality of first sensor units and the plurality of second sensor units includes four first outer sides, all of the four first outer sides having the same length, and Each of the plurality of first floating portions and the plurality of second floating portions includes four second outer sides, and a length of the second outer sides is the same as a length of the first outer sides.

16. The display device according to claim 15, wherein The length of the second outer side is in the range of 3 mm to 4 mm.

17. The display device according to claim 12, wherein: Each of the plurality of first floating parts and the plurality of second floating parts has a hole region therein.

18. The display device according to claim 12, wherein Each of the plurality of second floating parts has a hole region therein.

19. Display devices, including: a display panel having a base surface; as well as an input sensor, located on the base surface, Wherein, the input sensor includes: The first sensing electrode and the second sensing electrode extend in a first direction and a second direction respectively intersecting each other; a conductive pattern located on the first sensing electrode and the second sensing electrode and overlapping with any one of the first sensing electrode and the second sensing electrode; and an insulating layer, located between the first sensing electrode, the second sensing electrode and the conductive pattern, wherein the conductive pattern includes a plurality of floating portions arranged along at least one of the first direction and the second direction, and each of the plurality of floating portions includes an outer side having a zigzag shape; wherein at least one of the first sensing electrode and the second sensing electrode includes a sensing portion, the sensing portion overlapping the floating portion and including an outer side having a sawtooth shape; and The sawtooth-shaped protrusion of the floating portion and the sawtooth-shaped protrusion of the sensing portion completely overlap in a plan view and are staggered in a third direction intersecting the first direction and the second direction.

Images