Affine constraints for worst-case bandwidth reduction in video decoding

Abstract

An example method includes obtaining values ​​of luma motion vectors for a plurality of luma subblocks of a current block of video data selected for decoding using affine motion compensation; determining values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks based on the values ​​of the luma motion vectors for a subset of the plurality of luma subblocks; predicting corresponding samples of each luma subblock in the plurality of luma subblocks based on the corresponding values ​​of the luma motion vectors using affine motion compensation; and predicting samples of the chroma subblocks based on the values ​​of the chroma motion vectors using affine motion compensation.

Description

[0001] This application claims priority to U.S. Patent Application No. 16 / 590,509, filed on October 2, 2019, which claims priority to U.S. Provisional Application No. 62 / 741,461, filed on October 4, 2018, U.S. Provisional Application No. 62 / 754,463, filed on November 1, 2018, U.S. Provisional Application No. 62 / 786,023, filed on December 28, 2018, and U.S. Provisional Application No. 62 / 797,723, filed on January 28, 2019, the entire contents of each of the above applications are incorporated herein by reference. Technical Field

[0002] The present disclosure relates to video encoding and video decoding. Background Art

[0003] Digital video capabilities can be integrated into a wide range of devices, including digital televisions, digital direct broadcast systems, wireless broadcast systems, personal digital assistants (PDAs), portable or desktop computers, tablet computers, e-book readers, digital cameras, digital recording devices, digital media players, video game devices, video game consoles, cellular or satellite radio telephones, so-called "smart phones", video teleconferencing devices, video streaming devices, etc. Digital video devices implement video coding techniques, such as those described in the standards defined by MPEG-2, MPEG-4, ITU-T H.263, ITU-T H.264 / MPEG-4 Part 10, Advanced Video Coding (AVC), ITU-T H.265 / High Efficiency Video Coding (HEVC), and extensions of such standards. By implementing such video coding techniques, video devices can more efficiently send, receive, encode, decode and / or store digital video information.

[0004] Video coding techniques include spatial (intra-picture) prediction and / or temporal (inter-picture) prediction to reduce or eliminate redundancy inherent in video sequences. For block-based video coding, a video slice (e.g., a video picture or a portion of a video picture) may be partitioned into video blocks, which may also be referred to as coding tree units (CTUs), coding units (CUs), and / or coding nodes. For video blocks in an intra-coded (I) slice of a picture, spatial prediction relative to reference samples in neighboring blocks in the same picture may be used for encoding. For video blocks in an inter-coded (P or B) slice of a picture, spatial prediction relative to reference samples in neighboring blocks in the same picture or temporal prediction relative to reference samples in other reference pictures may be used. A picture may be referred to as a frame, and a reference picture may be referred to as a reference frame. Summary of the invention

[0005] The present disclosure generally relates to techniques for reducing the amount of memory bandwidth used to predict samples of video data. A video coder (e.g., a video encoder or a video decoder) may predict samples of a current block of video data based on samples of one or more reference blocks of video data (referred to as reference samples). In order to predict the samples of the current block from the reference samples, the video coder may retrieve the reference samples from a memory. The amount of memory bandwidth used by the video coder to predict the samples of the current block of video data may be a function of the number of reference samples retrieved. Retrieving reference samples from memory may consume power and increase processing time. Thus, in some examples, it may be desirable to minimize the memory bandwidth used by the video coder.

[0006] According to one or more techniques of the present disclosure, a video decoder may impose one or more constraints to reduce the amount of memory bandwidth used to predict samples of a current block of video data. For example, the video decoder may determine the memory bandwidth required for the current block, and may selectively modify the motion compensation method used to predict samples of the current block based on whether the determined memory bandwidth for the current block satisfies a bandwidth threshold. In this way, the video decoder may reduce the amount of power consumed and / or the processing time required to predict samples of the current block.

[0007] In one example, a method includes obtaining values ​​of luma motion vectors for a plurality of luma subblocks of a current block of video data selected for decoding using affine motion compensation; determining values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks based on the values ​​of the luma motion vectors for a subset of the plurality of luma subblocks; predicting corresponding samples of each luma subblock in the plurality of luma subblocks based on the corresponding values ​​of the luma motion vectors using affine motion compensation; and predicting samples of the chroma subblocks based on the values ​​of the chroma motion vectors using affine motion compensation.

[0008] In another example, a device for decoding video data includes: a memory configured to store video data; and one or more processors implemented in circuits and configured to: obtain values ​​of luma motion vectors for multiple luma subblocks of a current block of video data selected for decoding using affine motion compensation; determine values ​​of chroma motion vectors for chroma subblocks corresponding to the multiple luma subblocks based on the values ​​of the luma motion vectors for a subset of the multiple luma subblocks; predict corresponding samples of each luma subblock in the multiple luma subblocks based on the corresponding values ​​of the luma motion vectors using affine motion compensation; and predict samples of the chroma subblocks based on the values ​​of the chroma motion vectors using affine motion compensation.

[0009] In another example, a computer-readable storage medium stores instructions that, when executed, cause one or more processors of a video decoder to perform the following steps: using affine motion compensation to obtain values ​​of luma motion vectors for a plurality of luma subblocks of a current block of video data selected for decoding; determining values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks based on the values ​​of the luma motion vectors for a subset of the plurality of luma subblocks; using affine motion compensation to predict corresponding samples of each luma subblock in the plurality of luma subblocks based on the corresponding values ​​of the luma motion vectors; and using affine motion compensation to predict samples of the chroma subblocks based on the values ​​of the chroma motion vectors.

[0010] In another example, an apparatus for decoding video data includes: means for obtaining values ​​of luma motion vectors for a plurality of luma subblocks of a current block of video data selected for decoding using affine motion compensation; means for determining values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks based on values ​​of luma motion vectors for a subset of the plurality of luma subblocks; means for predicting corresponding samples of each of the plurality of luma subblocks based on corresponding values ​​of the luma motion vectors using affine motion compensation; and means for predicting samples of the chroma subblocks based on values ​​of the chroma motion vectors using affine motion compensation.

[0011] The details of one or more examples of the disclosure are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of various aspects of the technology will be apparent from the description and drawings, and from the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 is a block diagram illustrating an example video encoding and decoding system that may perform the techniques of this disclosure.

[0013] Figure 2A and 2B is a conceptual diagram illustrating an example quadtree plus binary tree (QTBT) structure and a corresponding coding tree unit (CTU).

[0014] Figures 3A-3E is a conceptual diagram illustrating an example segmentation of video data.

[0015] Figure 4 is a block diagram illustrating an example video encoder that may perform the techniques of this disclosure.

[0016] Figure 5 is a block diagram illustrating an example video decoder that may perform the techniques of this disclosure.

[0017] Fig. 6A and 6B is a conceptual diagram showing control points in the affine mode.

[0018] Figure 7 is a conceptual diagram illustrating a non-overlapping reference area for reconstructing a current block according to one or more aspects of the present disclosure.

[0019] Figure 8 is a conceptual diagram illustrating an overlapping reference area for reconstructing a current block according to one or more aspects of the present disclosure.

[0020] Fig. 9 is a conceptual diagram illustrating determination of a chroma motion vector from a luma motion vector in accordance with one or more techniques of this disclosure.

[0021] Fig.10 is a flow chart illustrating an example process for encoding a current block.

[0022] Fig.11 is a flow chart illustrating an example process for decoding a current block.

[0023] Fig.12 is a flow chart illustrating an example process for managing memory bandwidth for predictive video data, in accordance with one or more techniques of this disclosure.

[0024] Fig.13 is a conceptual diagram illustrating a simplified memory bandwidth test according to one or more aspects of the present disclosure.

[0025] Fig.14 is a flow chart illustrating an example method for managing memory bandwidth for predictive video data, in accordance with one or more techniques of this disclosure. DETAILED DESCRIPTION

[0026] Figure 1 1 is a block diagram illustrating an example video encoding and decoding system 100 that may perform the techniques of the present disclosure. The techniques of the present disclosure are generally directed to decoding (encoding and / or decoding) video data. Generally, video data includes any data used to process video. Thus, video data may include original unencoded video, encoded video, decoded (e.g., reconstructed) video, and video metadata (such as signaling data).

[0027] like Figure 1As shown, in this example, system 100 includes a source device 102 that provides encoded video data to be decoded and displayed by a target device 116. In particular, source device 102 provides the video data to target device 116 via computer-readable medium 110. Source device 102 and target device 116 may include any of a variety of devices, including desktop computers, notebooks (i.e., laptop computers), tablet computers, set-top boxes, handheld phones (such as smartphones), televisions, cameras, display devices, digital media players, video game consoles, video streaming devices, etc. In some cases, source device 102 and target device 116 may be equipped for wireless communication and, therefore, may be referred to as wireless communication devices.

[0028] exist Figure 1 In the example of, source device 102 comprises video source 104, memory 106, video encoder 200 and output interface 108. Target device 116 comprises input interface 122, video decoder 300, memory 120 and display device 118. According to the present disclosure, the video encoder 200 of source device 102 and the video decoder 300 of target device 116 can be configured to apply the technology of reducing the memory bandwidth for affine decoding video data. Thus, source device 102 represents an example of video encoding device, and target device 116 represents an example of video decoding device. In other examples, source device and target device can include other components or arrangements. For example, source device 102 can receive video data from an external video source such as an external camera. Similarly, target device 116 can be connected to an external display device through an interface without including an integrated display device.

[0029] like Figure 1 The system 100 shown is only an example. Generally, any digital video encoding and / or decoding device can perform the technology of reducing the memory bandwidth for affine decoding video data. Source device 102 and target device 116 are only examples of such decoding devices, wherein source device 102 generates decoded video data for transmission to target device 116. The present disclosure represents the "decoding" device as a device for performing data decoding (encoding and / or decoding). Thus, video encoder 200 and video decoder 300 represent examples of decoding devices, specifically, video encoder and video decoder, respectively. In some examples, devices 102, 116 can operate in a substantially symmetrical manner so that each of devices 102, 116 includes video encoding and decoding components. Thus, system 100 can support one-way or two-way video transmission between video devices 102, 116, such as for video streaming, video playback, video broadcasting or video telephony.

[0030] Generally, the video source 104 represents a source of video data (i.e., raw, unencoded video data) and provides a sequence of continuous pictures (also referred to as "frames") of the video data to the video encoder 200, which encodes the data of the pictures. The video source 104 of the source device 102 may include a video capture device, such as a camera, a video archive including previously captured raw video, and / or a video feed interface for receiving video from a video content provider. As a further alternative, the video source 104 may generate computer graphics-based data as a source video, or a combination of live video, archived video, and computer-generated video. In each case, the video encoder 200 encodes the captured, pre-captured, or computer-generated video data. The video encoder 200 may rearrange the pictures from the receiving order (sometimes referred to as the "display order") to the decoding order for decoding. The video encoder 200 may generate a bitstream including the encoded video data. Then, the source device 102 may output the encoded video data to a computer-readable medium 110 via the output interface 108, and receive and / or retrieve through, for example, the input interface 122 of the target device 116.

[0031] The memory 106 of the source device 102 and the memory 120 of the target device 116 represent general purpose memory. In some examples, the memories 106, 120 can store original video data, such as original video from the video source 104 and original decoded video data from the video decoder 300. Additionally or alternatively, the memories 106, 120 can store software instructions that can be executed by, for example, the video encoder 200 and the video decoder 300, respectively. Although shown separately from the video encoder 200 and the video decoder 300 in this example, it should be understood that the video encoder 200 and the video decoder 300 can also include internal memory that achieves functionally similar or equivalent purposes. Further, the memories 106, 120 can store, for example, encoded video data output from the video encoder 200 and input to the video decoder 300. In some examples, portions of the memories 106, 120 can be allocated as one or more video buffers, for example, to store original decoded and / or encoded video data.

[0032] The computer-readable medium 110 may represent any type of medium or device capable of transmitting encoded video data from the source device 102 to the target device 116. In one example, the computer-readable medium 110 represents a communication medium to enable the source device 102 to directly send the encoded video data to the target device 116 in real time, for example, via a radio frequency network or a computer-based network. According to a communication standard such as a wireless communication protocol, the output interface 108 may modulate the transmission signaling including the encoded video data, and the input interface 122 may demodulate the received transmission signaling. The communication medium may include any wireless or wired communication medium, such as a radio frequency (RF) spectrum or one or more physical transmission lines. The communication medium may form a portion of a packet-based network such as a local area network, a wide area network, or a global network such as the Internet. The communication medium may include a router, a switch, a base station, or any other equipment that facilitates communication from the source device 102 to the target device 116.

[0033] In some examples, source device 102 may output the encoded data from output interface 108 to storage device 112. Similarly, target device 116 may access the encoded data from storage device 112 via input interface 122. Storage device 112 may include any of a variety of distributed or locally accessed data storage media, such as a hard disk, Blu-ray disc, DVD, CD-ROM, flash memory, volatile or non-volatile memory, or any other suitable digital storage medium for storing encoded video data.

[0034] In some examples, source device 102 may output the encoded video data to file server 114 or another intermediate storage device that may store the encoded video data generated by source device 102. Target device 116 may access the stored video data from file server 114 via streaming or downloading. File server 114 may be any type of server device capable of storing encoded video data and sending the encoded video data to target device 116. File server 114 may represent a network server (e.g., for a website), a file transfer protocol (FTP) server, a content delivery network device, or a network attached storage (NAS) device. Target device 116 may access the encoded video data from file server 114 through any standard data connection including an Internet connection. This may include a wireless channel (e.g., a Wi-Fi connection), a wired connection (e.g., a digital subscriber line (DSL), a cable modem, etc.), or a combination of the two suitable for accessing encoded video data and stored on file server 114. File server 114 and input interface 122 may be configured to operate according to a streaming protocol, a downloading transmission protocol, or a combination thereof.

[0035] Output interface 108 and input interface 122 may represent wireless transmitters / receivers, modems, wired networking components (e.g., Ethernet cards), wireless communication components that operate according to any of the various IEEE 802.11 standards, or other physical components. In examples where output interface 108 and input interface 122 include wireless components, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to a cellular communication standard such as 4G, 4G-LTE (Long Term Evolution), LTE Advanced, 5G, or the like. In certain examples where output interface 108 includes a wireless transmitter, output interface 108 and input interface 122 may be configured to transmit data, such as encoded video data, according to other wireless standards, such as the IEEE 802.11 specification, the IEEE 802.15 specification (e.g., ZigBee TM ), Bluetooth TM Standards, etc., to transmit data such as encoded video data. In some examples, source device 102 and / or target device 116 may include corresponding system-on-a-chip (SoC) devices. For example, source device 102 may include a SoC device to perform functions attributed to video encoder 200 and / or output interface 108, and target device 116 may include a SoC device to perform functions attributed to video decoder 300 and / or input interface 122.

[0036] The techniques disclosed herein can be applied to video decoding to support any of a variety of multimedia applications, such as over-the-air television broadcasting, cable television transmission, satellite television transmission, Internet streaming video transmission such as Dynamic Adaptive Streaming over HTTP (DASH), digital video encoded onto a data storage medium, decoding of digital video stored on a data storage medium, or other applications.

[0037] The input interface 122 of the target device 116 receives an encoded video bitstream from the computer-readable medium 110 (e.g., the storage device 112, the file server 114, etc.). The encoded video bitstream may include signaling information defined by the video encoder 200 and also used by the video decoder 300, such as syntax elements having values ​​describing characteristics and / or processing of video blocks or other decoding units (e.g., slices, pictures, groups of pictures, sequences, etc.). The display device 118 displays decoded pictures of the decoded video data to a user. The display device 118 may represent any of a variety of display devices such as a cathode ray tube (CRT), a liquid crystal display (LCD), a plasma display, an organic light emitting diode (OLED) display, or another type of display device.

[0038] Although not in Figure 1, but in some examples, each of the video encoder 200 and the video decoder 300 may be integrated with an audio encoder and / or an audio decoder and may include appropriate MUX-DEMUX units or other hardware and / or software to process multiplexed streams including audio and video in a common data stream. If applicable, the MUX-DEMUX units may conform to the ITU H.223 multiplexer protocol or other protocols such as the User Datagram Protocol (UDP).

[0039] Each of the video encoder 200 and the video decoder 300 can be implemented as any of a variety of suitable encoder and / or decoder circuits, such as one or more microprocessors, digital signal processors (DSPs), application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), discrete logic, software, hardware, firmware, or any combination thereof. When the technology is partially implemented in software, the device can store instructions for the software in a suitable non-temporary computer-readable medium and use one or more processors to execute the instructions in hardware to perform the technology of the present disclosure. Each of the video encoder 200 and the video decoder 300 can be included in one or more encoders or decoders, both of which can be integrated as part of a combined encoder / decoder (CODEC) in the corresponding device. The device including the video encoder 200 and / or the video decoder 300 may include an integrated circuit, a microprocessor, and / or a wireless communication device such as a cellular phone.

[0040] The video encoder 200 and the video decoder 300 may operate according to a video code standard such as ITU-T H.265, also known as High Efficiency Video Coding (HEVC) or an extension thereof such as a multi-view and / or scalable video coding extension. Alternatively, the video encoder 200 and the video decoder 300 may operate according to other proprietary or industrial standards such as the Joint Exploration Test Model (JEM) or ITU-T H.266 (also known as Versatile Video Coding (VVC)). The latest draft of the VVC standard is described in "Versatile Video Coding (Draft 2)" (hereinafter referred to as "VVC Draft 2") by JVET-12001-vE, Bross et al., ITU-T SG 16WP3 Joint Video Experts Group (JVET) and ISO / IEC JTC 1 / SC 29 / WG 11, 11th Meeting: Ljubljana, SI, July 10-18, 2018, Bross et al. However, the technology of the present disclosure is not limited to any particular coding standard.

[0041] Generally, the video encoder 200 and the video decoder 300 can perform block-based decoding of the picture. The term "block" generally refers to a structure that includes data to be processed (e.g., encoded, decoded, or otherwise used in the encoding and / or decoding process). For example, a block may include a two-dimensional matrix of samples of luminance and / or chrominance data. Generally, the video encoder 200 and the video decoder 300 can decode video data represented in a YUV (e.g., Y, Cb, Cr) format. That is, the video encoder 200 and the video decoder 300 can decode luminance and chrominance components, where the chrominance components may include red and blue chrominance components, instead of decoding red, green, and blue (RGB) data of samples of the picture. In some examples, the video encoder 200 converts the received RGB format data into a YUV representation before encoding, and the video decoder 300 converts the YUV representation into an RGB format. Alternatively, a pre-processing and post-processing unit (not shown) can perform these conversions.

[0042] The present disclosure generally refers to the decoding (e.g., encoding and decoding) of a picture, including the process of encoding or decoding the picture data. Similarly, the present disclosure may refer to the decoding of a block of a picture to include the process of encoding or decoding the data of the block, such as prediction and / or residual decoding. The encoded video bitstream generally includes syntax elements for representing decoding decisions (e.g., decoding modes) and a series of values ​​for partitioning the picture into blocks. Thus, references to decoding a picture or a block should generally be understood as decoding the values ​​of the syntax elements that form the picture or block.

[0043] HEVC defines various blocks, including coding units (CUs), prediction units (PUs), and transform units (TUs). According to HEVC, a video decoder (such as video encoder 200) partitions a coding tree unit (CTU) into CUs according to a quadtree structure. That is, the video decoder partitions the CTU and CU into four equal non-overlapping squares, and each node of the quadtree has zero or four child nodes. A node without a child node may be referred to as a "leaf node", and the CU of such a leaf node may include one or more PUs and / or one or more TUs. The video decoder may further partition the PU and TU. For example, in HEVC, a residual quadtree (RQT) represents the partitioning of a TU. In HEVC, a PU represents inter-prediction data, and a TU represents residual data. An intra-predicted CU includes intra-prediction information, such as an intra-mode indication.

[0044] As another example, the video encoder 200 and the video decoder 300 may be configured to operate according to JEM or VVC. According to some examples of JEM or VVC, a video decoder (such as the video encoder 200) partitions a picture into a plurality of coding tree units (CTUs). The video encoder 200 may partition the CTU according to a tree structure such as a quadtree-binary tree (QTBT) structure or a multi-type tree (MTT) structure. The QTBT structure eliminates the concept of multiple partition types, such as the distinction between CU, PU, ​​and TU of HEVC. The QTBT structure includes two levels: a first level partitioned according to quadtree partitioning, and a second level partitioned according to binary tree partitioning. The root node of the QTBT structure corresponds to the CTU. The leaf nodes of the binary tree correspond to the coding units (CUs).

[0045] In the MTT partitioning structure, blocks can be partitioned using quadtree (QT) partitioning, binary tree (BT) partitioning, and one or more types of triple tree (TT) (also called ternary tree (TT)) partitioning. Triple tree or ternary tree partitioning is a partitioning that splits a block into three sub-blocks. In some examples, the triple tree or ternary tree partitioning does not divide the original block by the center but divides a block into three sub-blocks. The partitioning types in MTT (such as QT, BT, and TT) can be symmetric or asymmetric.

[0046] In some examples, the video encoder 200 and the video decoder 300 may use a single QTBT or MTT structure to represent each of the luma component and the chroma components, while in other examples, the video encoder 200 and the video decoder 300 may use two or more QTBT or MTT structures, such as one QTBT / MTT structure for the luma component and another QTBT / MTT structure for the two chroma components (or two QTBT / MTT structures for the corresponding chroma components).

[0047] The video encoder 200 and the video decoder 300 can be configured to use quadtree segmentation, QTBT segmentation, MTT segmentation or other segmentation structures according to HEVC. For illustrative purposes, a description of the technology of the present disclosure is given for QTBT segmentation. However, it should be understood that the technology of the present disclosure can also be applied to a video decoder configured to use quadtree segmentation or other types of segmentation.

[0048] Blocks (e.g., CTUs or CUs) may be grouped in a picture in various ways. As an example, a brick may refer to a rectangular area of ​​a CTU row in a particular slice in a picture. A slice may be a rectangular area of ​​a CTU in a particular slice column and a particular slice row in a picture. A slice column refers to a rectangular area of ​​a CTU having a height equal to the picture height and a width specified by a syntax element (e.g., such as in a picture parameter set). A slice row refers to a rectangular area of ​​a CTU having a height specified by a syntax element (e.g., such as in a picture parameter set) and a width equal to the picture width.

[0049] In some examples, a slice may be partitioned into multiple bricks, each of which may include one or more CTU rows in the slice. A slice that is not partitioned into multiple bricks may also be referred to as a brick. However, a brick that is a true subset of a slice cannot be referred to as a slice.

[0050] The tiles in a slice can also be arranged in slices. A slice can be an integer number of tiles of a picture that can be uniquely contained in a single network abstraction layer (NAL) unit. In some examples, a slice includes several complete tiles or only a contiguous sequence of complete tiles of a slice.

[0051] The present disclosure may use "N×N" and "N times N" interchangeably to represent the sample dimensions of a block (such as a CU or other video block) in terms of vertical and horizontal dimensions, for example, 16×16 samples or 16 times 16 samples. Generally, a 16×16 CU will have 16 samples in the vertical direction (y=16) and 16 samples in the horizontal direction (x=16). Similarly, an N×N CU generally has N samples in the vertical direction and N samples in the horizontal direction, where N represents a non-negative integer value. The samples in a CU may be arranged in rows and columns. In addition, a CU does not necessarily have the same number of samples in the horizontal direction as in the vertical direction. For example, a CU may include N×M samples, where M is not necessarily equal to N.

[0052] The video encoder 200 encodes the video data of the CU representing the prediction and / or residual information and other information. The prediction information indicates how the CU will be predicted in order to form a prediction block for the CU. The residual information generally represents the sample-by-sample difference between the samples of the CU before encoding and the prediction block.

[0053] In order to predict a CU, the video encoder 200 can generally form a prediction block for the CU by inter-frame prediction or intra-frame prediction. Inter-frame prediction generally refers to predicting a CU from data of a previously decoded picture, while intra-frame prediction generally refers to predicting a CU from previously decoded data of the same picture. In order to perform inter-frame prediction, the video encoder 200 can use one or more motion vectors to generate a prediction block. The video encoder 200 can generally perform a motion search to identify a reference block that closely matches the CU, for example, in terms of the difference between the CU and the reference block. The video encoder 200 can use the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean square difference (MSD), or other such difference calculations to calculate a difference metric to determine whether the reference block closely matches the current CU. In some examples, the video encoder 200 can use unidirectional prediction or bidirectional prediction to predict the current CU.

[0054] Some examples of JEM and VVC may also provide an affine motion compensation mode, which may be considered an inter-prediction mode. In the affine motion compensation mode, the video encoder 200 may determine two or more motion vectors representing non-translational motion, such as zooming in or out, rotation, perspective motion, or other irregular motion types.

[0055] To perform intra prediction, the video encoder 200 can select an intra prediction mode to generate a prediction block. Some examples of JEM and VVC provide sixty-seven intra prediction modes, including modes of various directions as well as plane modes and DC modes. Generally, the video encoder 200 selects an intra prediction mode that describes the neighboring samples of the current block (e.g., a block of a CU) to predict the prediction samples of the current block from it. Assuming that the video encoder 200 decodes the CTU and CU in a raster scan order (from left to right, from top to bottom), such samples can typically be above, on the left, or on the left of the current block in the same picture as the current block.

[0056] The video encoder 200 encodes data representing the prediction mode of the current block. For example, for inter-frame prediction mode, the video encoder 200 can encode data representing which of the various available inter-frame prediction modes is used and the motion information of the corresponding mode. For unidirectional or bidirectional inter-frame prediction, for example, the video encoder 200 can encode the motion vector using advanced motion vector prediction (AMVP) or merge mode. The video encoder 200 can use a similar mode to encode the motion vector of the affine motion compensation mode.

[0057] After prediction (such as intra-frame prediction or inter-frame prediction of a block), the video encoder 200 can calculate residual data for the block. The residual data (such as a residual block) represents the sample-by-sample difference between the block and a prediction block for the block, which is formed using a corresponding prediction mode. The video encoder 200 can apply one or more transforms to the residual block to generate transform data in a transform domain rather than a sample domain. For example, the video encoder 200 can apply a discrete cosine transform (DCT), an integer transform, a wavelet transform, or a conceptually similar transform to the residual video data. In addition, the video encoder 200 can apply a secondary transform after a primary transform, such as a mode-dependent non-separable secondary transform (MDNSST), a signaling-dependent transform, a Karhunen-Loeve transform (KLT), etc. The video encoder 200 generates transform coefficients after applying one or more transforms.

[0058] As described above, after performing any transforms to produce transform coefficients, the video encoder 200 can perform quantization on the transform coefficients. Quantization generally refers to the process of quantizing the transform coefficients to possibly reduce the amount of data used to represent the coefficients, thereby providing further compression. By performing the quantization process, the video encoder 200 can reduce the bit depth associated with some or all of the coefficients. For example, the video encoder 200 can round an n-bit value to an m-bit value during quantization, where n is greater than m. In some examples, to perform quantization, the video encoder 200 can perform a bitwise right shift on the value to be quantized.

[0059] After quantization, the video encoder 200 can scan the transform coefficients to generate a one-dimensional vector from a two-dimensional matrix including the quantized transform coefficients. The scan can be designed to place coefficients with higher energy (and therefore lower frequency) in front of the vector and transform coefficients with lower energy (and therefore higher frequency) in the back of the vector. In some examples, the video encoder 200 can scan the quantized transform coefficients using a predefined scan order to generate a serialized vector, and then entropy encode the quantized transform coefficients of the vector. In other examples, the video encoder 200 can perform adaptive scanning. After scanning the quantized transform coefficients to form a one-dimensional vector, the video encoder 200 can entropy encode the one-dimensional vector, for example, according to context adaptive binary arithmetic coding (CABAC). The video encoder 200 can also entropy encode values ​​for syntax elements that describe metadata associated with the encoded video data used by the video decoder 300 in decoding the video data.

[0060] To perform CABAC, the video encoder 200 may assign context within a context model to a symbol to be transmitted. For example, the context may relate to whether the neighboring values ​​of the symbol are zero values. The probability determination may be based on the context assigned to the symbol.

[0061] The video encoder 200 may further generate syntax data, such as block-based syntax data, picture-based syntax data, and sequence-based syntax data, to the video decoder 300, for example, in a picture header, a block header, a slice header, or generate other syntax data, such as a sequence parameter set (SPS), a picture parameter set (PPS), or a video parameter set (VPS). The video decoder 300 may similarly decode such syntax data to determine how to decode the corresponding video data.

[0062] In this way, the video encoder 200 can generate a bitstream including encoded video data, such as syntax elements describing the partitioning of a picture into blocks (eg, CUs) and prediction and / or residual information for the blocks. Finally, the video decoder 300 can receive the bitstream and decode the encoded video data.

[0063] In general, the video decoder 300 performs the reverse process performed by the video encoder 200 to decode the encoded video data of the bitstream. For example, the video decoder 300 may use CABAC to decode the values ​​of the syntax elements of the bitstream in a manner substantially similar to (although reversed from) the CABAC encoding process of the video encoder 200. The syntax elements may define partitioning information regarding partitioning of a picture into CTUs and partitioning each CTU according to a corresponding partitioning structure such as a QTBT structure to define CUs of the CTU. The syntax elements may further define prediction and residual information for a block (e.g., a CU) of video data.

[0064] For example, the residual information may be represented by a quantized transform coefficient. The video decoder 300 may inverse quantize and inverse transform the quantized transform coefficients of the block to reproduce a residual block for the block. The video decoder 300 uses the signaled prediction mode (intra-frame or inter-frame prediction) and related prediction information (e.g., motion information for inter-frame prediction) to form a prediction block for the block. The video decoder 300 may then combine the prediction block and the residual block (on a sample-by-sample basis) to reproduce the original block. The video decoder 300 may perform additional processes (such as performing a deblocking process) to reduce visual artifacts along block boundaries.

[0065] In general, the present disclosure may refer to "signaling" certain information, such as syntax elements. The term "signaling" may generally refer to the communication of values ​​for syntax elements and / or other data used to decode encoded video data. That is, the video encoder 200 may signal the values ​​of syntax elements in the bitstream. In general, signaling refers to generating values ​​in the bitstream. As described above, the source device 102 may transmit the bitstream to the target device 116 in substantially real time (or non-real time, such as may occur when storing syntax elements to the storage device 112 for later retrieval by the target device 116).

[0066] Figure 2A and 2B is a conceptual diagram showing an example quadtree binary tree (QTBT) structure 130 and a corresponding coding tree unit (CTU) 132. Solid lines represent quadtree partitions and dashed lines indicate binary tree partitions. In each partition (i.e., non-leaf) node of the binary tree, a flag is signaled to indicate which partition type (i.e., horizontal or vertical) is used, where in this example, 0 indicates horizontal partitioning and 1 indicates vertical partitioning. For quadtree partitioning, since the quadtree node divides the block horizontally and vertically into 4 sub-blocks of equal size, there is no need to indicate the partition type. Accordingly, the video encoder 200 and the video decoder 300 can encode and decode syntax elements (e.g., partition information) for the region tree level (i.e., solid line) of the QTBT structure 130 and syntax elements (e.g., partition information) for the prediction tree level (i.e., dashed line) of the QTBT structure 130, respectively. The video encoder 200 and the video decoder 300 may respectively encode and decode video data (such as prediction and transform data) for a CU represented by a terminal leaf node of the QTBT structure 130 .

[0067] Generally, Figure 2B The CTU 132 may be associated with parameters that define the size of blocks corresponding to nodes of the first and second level QTBT structures 130. These parameters may include a CTU size (representing the size of the CTU 132 in samples), a minimum quadtree size (MinQTSize, representing the minimum allowed quadtree leaf node size), a maximum binary tree size (MaxBTSize, representing the maximum allowed binary tree root node size), a maximum binary tree depth (MaxBTDepth, representing the maximum allowed binary tree depth), and a minimum binary tree size (MinBTSize, representing the minimum allowed binary tree leaf node size).

[0068] The root node of the QTBT structure corresponding to the CTU can have four child nodes at the first level of the QTBT structure, and each child node can be segmented according to the quadtree segmentation. That is, the node of the first level is a leaf node (no child node) or has four child nodes. The example of the QTBT structure 130 represents such a node, which includes a parent node and a child node with a solid line branch. If the node of the first level is not larger than the maximum allowed binary tree root node size (MaxBTSize), the node can be further segmented by the corresponding binary tree. The binary tree partitioning of a node can be iterated until the node generated by the partition reaches the minimum allowed binary tree leaf node size (MinBTSize) or the maximum allowed binary tree depth (MaxBTDepth). The example of the QTBT structure 130 represents such a node as having a dotted branch. The binary tree leaf node is represented as a decoding unit (CU), which is used for prediction (e.g., intra-picture or inter-picture prediction) and transformation without any further segmentation. As described above, a CU can also be represented as a "video block" or "block".

[0069] In one example of a QTBT partitioning structure, the CTU size is set to 128×128 (luminance sample and two corresponding 64×64 chrominance samples), MinQTSize is set to 16×16, MaxBTSize is set to 64×64, MinBTSize (for width and height) is set to 4, and MaxBTDepth is set to 4. First, quadtree partitioning is applied to the CTU to generate quadtree leaf nodes. Quadtree leaf nodes can have sizes from 16×16 (i.e., MinQTSize) to 128×128 (i.e., CTU size). If the leaf quadtree node is 128×128, since its size exceeds MaxBTSize (64×64 in this example), the leaf quadtree node will not be further divided by the binary tree. Otherwise, the leaf quadtree node will be further divided by the binary tree. Therefore, the quadtree leaf node is also the root node of the binary tree and has a binary tree depth of 0. When the binary tree depth reaches MaxBTDepth (4 in this example), further division is not allowed. When a binary tree node has a width equal to MinBTSize (4 in this example), the binary tree node means that no further horizontal partitioning is allowed. Similarly, a binary tree node with a height equal to MinBTSize indicates that no further vertical partitioning is allowed for the binary tree node. As described above, the leaf nodes of the binary tree are called CUs and are further processed according to prediction and transformation without further segmentation.

[0070] Figures 3A-3Eis a conceptual diagram showing an example partitioning of a video data block. As described above, the tree structure used in VVC is a generalization of QT-BTT (quadtree plus binary and ternary trees). The basic features of the structure may include two types of tree nodes: region tree (RT) and prediction tree (PT), which supports five types of partitioning, such as Figure 3A – Figure 3E shown. Specifically, Figure 3A shows the quadtree partitioning, Figure 3B shows a vertical binary tree partition, Figure 3C shows a horizontal binary tree partition, Figure 3D shows a vertical ternary tree partition, while Figure 3E Horizontal ternary tree partitioning is shown. The region tree can recursively split the CTU into square blocks until the region tree leaf node of size 4×4. At each node in the region tree, a prediction tree can be formed by one of three tree types to form a decoding unit (CU): binary tree, ternary tree. In PT partitioning, it is forbidden to have quadtree partitions in the branches of the prediction tree.

[0071] A CTU can include one luma coding tree block (CTB) and two chroma coding tree blocks. At the CU level, a CU can be associated with one luma coding block (CB) and two chroma coding blocks. As in JEM (reference software for VVC), the luma tree and chroma tree can be separated into intra-frame slices, while the luma tree and chroma tree are shared in inter-frame slices. The size of a CTU can be 128×128 (luminance component), while the size of a decoding unit can range from 4×4 to the size of a CTU. In this scenario, the size of the chroma block can be 2×2 in a 4:2:0 color format.

[0072] Like HEVC, VVC supports a transform skip mode. When a video decoder applies a transform skip mode to the residual of a CU, the video decoder may not perform a transform and may quantize the residual. In order to select the best transform mode for a TU of a CU, the video encoder may test both the transform mode and the transform skip mode. The video encoder may encode (e.g., signal in a bitstream) a syntax element (e.g., transform_skip_flag) to the decoder to indicate the transform mode of the TU. At the picture level, the video encoder may signal a syntax element (e.g., a flag) in a picture parameter set (PPS) to indicate the use of a transform skip mode.

[0073] In VVC, a video encoder can encode a block into an inter-frame slice using an inter-frame prediction mode, in which a block matching algorithm is used to obtain a prediction value for the block. The video encoder can search the reference frame within a window centered on the motion vector predictor (derived by the AMVP process) to find the best match for the block. For example, the video encoder can evaluate multiple motion vectors at an integer precision level as part of the motion estimation process. Once the best match in the integer level is obtained, the video encoder can further refine the best match through an interpolation process (e.g., half-pixel and quarter-pixel).

[0074] In JEM, Local Adaptive Motion Vector Resolution (LAMVR) is introduced. LAMVR allows for the motion vector difference (MVD) to be decoded in units of quarter luma samples, integer luma samples, or four luma samples. The MVD resolution can be controlled at the CU level, and the MVD resolution flag can be conditionally signaled for each CU with at least one non-zero MVD component.

[0075] For a CU having at least one non-zero MVD component (e.g., the x component or the y component is non-zero), the video coder may signal a first flag to indicate whether quarter luma sample MV precision is used in the CU. When the first flag indicates that quarter luma sample MV precision is not used (e.g., the first flag is equal to 1), the video coder may signal another flag to indicate whether integer luma sample MV precision or four luma sample MV precision is used.

[0076] When the first MVD resolution flag of a CU is zero or is not coded for the CU (meaning that all MVDs in the CU are zero), the video coder may use a quarter luma sample MV resolution for the CU. When the CU uses integer luma sample MV precision or four luma sample MV precision, the video coder may round the MVP in the AMVP candidate list to the corresponding precision for the CU.

[0077] The video decoder may perform sub-block motion compensation (e.g., in VVC) for the Advanced Temporal Motion Vector Prediction (ATMVP) mode. In ATMVP mode, the video decoder may split the CU into several sub-blocks, referred to as prediction units (PUs). The video decoder may independently evaluate these PUs using the motion vectors of temporally collocated blocks in previously coded frames. The motion vectors of these PUs may or may not be different. In some examples, the block size of the PU may be fixed to 4×4. In such an example, in order to reconstruct each PU on the decoder side, the video decoder may access a block of size 11×11 [(4+4+3)×(4+4+3)] in a memory (e.g., memory 120).

[0078] The video decoder can decode the CU using an affine decoding mode (e.g., in VVC). An affine CU (e.g., a CU encoded using an affine mode) can be split into independently evaluated sub-PUs. Compared to ATMVP, which uses the motion vector of a temporally collocated block to obtain the motion vector of a PU, the video decoder can derive the motion vector of each affine PU using the motion vector of the CU's spatial neighboring CUs.

[0079] The affine motion model can be described as:

[0080]

[0081] (v x , v y ) is the motion vector at coordinate (x, y), and a, b, c, d, e, and f are six parameters. The affine motion model for a block can also be as follows Fig. 6A The three affine vectors of the three corners of block 600 are shown in and These three motion vectors can be called control point motion vectors (CPMV). Then, the motion field is described as:

[0082]

[0083] Wherein, w and h are the width and height of the block. This disclosure refers to this affine motion model as a 6-parameter affine motion model.

[0084] The simplified 4-parameter affine model is described as:

[0085]

[0086] Similarly, a simplified 4-parameter affine model for a block can be obtained by two and Description. The playing field is then described as:

[0087]

[0088] Now, VVC allows affine type prediction. In some examples, affine type prediction in VVC can utilize one or both of the 6-parameter affine model or the simplified 4-parameter affine model.

[0089] To reduce complexity, a video decoder (e.g., video encoder 200 and / or video decoder 300) may perform sub-block-based motion compensation to perform affine motion compensation. The video decoder may divide the current block into non-overlapping sub-blocks. For each sub-block, the video decoder may derive a motion vector (MV) through the determined affine motion model. The video decoder may then use the derived MV to perform block-based motion compensation (block matching).

[0090] Typically, the size of the sub-block is fixed. However, if the difference between the MVs of two adjacent sub-blocks is large, using a small sub-block size (e.g., 4×4) may significantly increase the memory bandwidth. On the other hand, using a large sub-block size may reduce the motion compensation prediction accuracy. To address this problem, the video decoder can utilize an adaptive sub-block size. For example, the video decoder can apply one or more constraints to the affine motion model. If the affine motion model satisfies one or more constraints, the video decoder can use a small sub-block size. Otherwise, if the affine motion model does not satisfy one or more constraints, the video decoder can use a relatively large sub-block size. Examples of such constraints are described in U.S. Provisional Application No. 62 / 754,463 filed on November 1, 2018, U.S. Provisional Application No. 62 / 786,023 filed on December 28, 2018, and U.S. Provisional Application No. 62 / 797,723 filed on January 28, 2019. When a large sub-block size is used (eg, 8×8), the video coder may derive the MV for motion compensation that needs to be derived from the MVs of the four 4×4 sub-blocks.

[0091] In some color formats, the affine block size of the chroma component may be different from the affine block size of the luma component. For example, for a 4:2:2 or 4:2:0 color format, the affine block size of the chroma component may be half the size of the luma block. In this way, one 4×4 chroma sub-block may correspond to four 4×4 luma sub-blocks. The video decoder may derive the MV of the chroma sub-block based on the MV of the luma sub-block. For example, the video decoder may derive the MV for the 4×4 chroma sub-block as the average of the MVs of all four 4×4 luma sub-blocks. However, calculating the MV of the chroma sub-block based on the MVs of all corresponding luma sub-blocks may be complex and requires the video decoder to access all luma sub-block MVs from memory, which may be undesirable.

[0092] According to one or more techniques of the present disclosure, a video decoder (e.g., video encoder 200 and / or video decoder 300) may determine the value of a chroma MV of a chroma subblock based on the value of a luma MV of a subset of multiple luma subblocks corresponding to the chroma subblock. The subset of the luma subblock is a strict subset that includes fewer luma subblocks than all luma subblocks corresponding to the chroma subblock. By determining the value of the chroma MV based on the subset of the luma MV, the video decoder may simplify the chroma MV determination process and avoid accessing the values ​​of all luma MVs. In this way, the techniques of the present disclosure may reduce the complexity and memory bandwidth requirements of affine motion compensation.

[0093] For the purpose of the following discussion, memory bandwidth is calculated as the number of reference pixels (eg, reference samples) necessary for interpolation. In actual hardware implementations, the actual bandwidth may also depend on the hardware architecture and may be greater than a certain number of accessed pixels.

[0094] For memory bandwidth purposes, the worst case encoding scenario for inter-frame modes (e.g., merge and AMVP modes) can be a 4×4 bidirectional predicted block with fractional pixel motion vMV from both directions. For this case, two 11×11 (121 pixel) luma blocks may need to be accessed from memory to perform interpolation, and two corresponding chroma blocks of size 5×5 for U and V color components must be retrieved. In this calculation, it is assumed that an 8-tap filter is used for luma component interpolation and a 6-tap filter is used for chroma component interpolation. The number of pixels required for 2D interpolation depending on the block size is summarized in Table 1 below. Another case that contributes to worsening bandwidth is in ATMVP and affine modes, where the motion vectors of the sub-PUs associated with the CU may result in non-overlapping areas being fetched from memory.

[0095]

[0096] Table 1 - Number of pixels used for 2D interpolation in JEM

[0097] Figure 7 is a conceptual diagram illustrating a non-overlapping reference area for reconstructing a current block according to one or more aspects of the present disclosure. Figure 7 As shown in FIG. 1 , to reconstruct the current CU 706 of the current frame 702, the video decoder may access several regions of the reference frame 704 (eg, stored in a reference picture buffer such as Figure 4 The decoded picture buffer 218 or Figure 5 In particular, the current CU 706 may be divided into sub-blocks 708A-708D (collectively referred to as “sub-blocks 708”), each of which is associated with a sub-block motion vector mv A -mv DEach of the sub-blocks 708 may be a prediction unit PU (eg, of size 4×4). Figure 7 As shown in A -mv D Each of the reference regions 710A-710D (collectively referred to as "reference regions 710") in the reference frame 704 is identified. It is worth noting that each reference region 710 includes a block directly identified by a sub-block motion vector and an area around the block, which includes samples accessed by the filter tap. In order to reconstruct the current CU 706, the video decoder may need to retrieve, access, or otherwise obtain samples of each reference region 710 from a memory. Figure 7 As shown in the example of , the reference regions 710 may be completely non-overlapping (e.g., meaning that any sample from a particular reference region of the reference regions 710 is not included in any other reference region of the reference regions 710). For these worst-case bandwidth cases mentioned above, the number of pixels to be acquired for each pixel used for 2D interpolation is summarized in Table 2 below:

[0098]

[0099] Table 2 - Number of pixels used for 2D interpolation in JEM

[0100] As described above, in some examples, the reference areas accessed to reconstruct the decoding unit may be non-overlapping. In other examples, the reference areas accessed to reconstruct the decoding unit may be overlapping. Overlapping reference areas can provide some efficiency for the video decoder. For example, the video decoder may only need to access the sample of the overlapping reference area once, thereby resulting in memory bandwidth savings.

[0101] Figure 8 is a conceptual diagram illustrating an overlapping reference area for reconstructing a current block according to one or more aspects of the present disclosure. Figure 8 As shown in FIG. 8 , to reconstruct a current block 806 (eg, a current CU) of a current frame 802, a video decoder may access several regions (eg, stored in a reference picture buffer (eg, Figure 4 The decoded picture buffer 218 or Figure 5 Specifically, the current block 806 may be divided into sub-blocks 708A-708D, each of which is associated with a sub-block motion vector mv A -mv D A sub-block motion vector is associated with Figure 8 As shown in A -mv DEach of the reference regions 810A-810D (collectively referred to as "reference regions 810") in the reference frame 804 is identified as a corresponding reference region. It should be noted that each reference region 810 includes a block directly identified by a sub-block motion vector (dashed line) and an area around the block, which includes samples accessed by the filter taps (solid line). In order to reconstruct the current block 806, the video decoder may need to retrieve, access, or otherwise obtain samples of each reference region 810 from memory. As shown in Figure 8 As shown in the example of , the reference regions 810 may be partially overlapping (eg, meaning that some samples from a first reference region of the reference regions 810 are also located in a second reference region of the reference regions 810 ).

[0102] The larger overlap area can save higher bandwidth compared to separate acquisition for each 4×4 PU. The bandwidth saving BS can be calculated as:

[0103]

[0104] Where K, N and F are the number of acquisition points for a 4×4 PU, the number of PUs associated with a CU, and the number of acquisition points required to encode a CU in affine mode, respectively.

[0105] This disclosure describes a number of techniques to address the above issues, including simplification of transforms for 2x2 blocks and reduction of bandwidth for memory accesses. The techniques of this disclosure may be used independently or in combination.

[0106] According to a first technique, a video decoder (e.g., video encoder 200 and / or video decoder 300) may transform a 2×2 block. As an example, a video decoder may force a 2×2 chroma block to be decoded in a transform skip mode. In this way, the residual of the 2×2 chroma block may be quantized directly in the pixel domain. Transform skipping is always applied to 2×2 chroma blocks, and therefore, the transform skip flag is no longer signaled in the bitstream of these blocks. Using this technique, processing time may be reduced because the transform is not applied and the transform skipping may be simply performed by a shift operation. In addition, the removal of the transform_skip_flag syntax may improve compression efficiency. For example, in response to determining that the video data is segmented into at least one 2×2 chroma block, the video decoder may decode the 2×2 chroma block using a transform skip mode.

[0107] As another example, for 2×2 chroma blocks, the residual may always be forced to zero, in which case the transform may also be bypassed, and a coded block pattern (CBP) flag indicating whether the residual is zero may be omitted for signaling of such chroma blocks to reduce overhead. In one example, in inter mode, (e.g., whether the residual is zero) may be indicated by using a skip mode that always has a zero residual. For example, in response to determining that the video data is partitioned into at least one 2×2 chroma block, the video decoder may decode the 2×2 chroma block to have a zero residual value (e.g., selecting a predictor block that completely matches the 2×2 chroma block at least after quantization).

[0108] If separate tree coding is applied, meaning that luma and chroma components can have different partitioning structures, the partitioning into 2×2 chroma blocks can be prohibited, in which case there will be no 2×2 chroma blocks. Whether to prohibit 3×3 chroma blocks may depend on the prediction mode. For example, 3×3 chroma blocks may be prohibited for intra mode but allowed for inter mode. Intra mode has additional dependencies because the prediction is done using neighboring samples, which adds additional burden compared to inter mode.

[0109] The described techniques may be applied to either intra 2x2 chroma blocks in an I slice, or to chroma 2x2 blocks coded in intra mode, or to 2x2 chroma blocks coded in inter mode, or in any combination thereof.

[0110] As described above, and in accordance with one or more techniques of the present disclosure, a video decoder (e.g., video encoder 200 and / or video decoder 300) can impose one or more constraints to reduce the amount of memory bandwidth used to predict video data samples. For example, the video decoder can determine the memory bandwidth required for a current block, and can selectively modify the motion compensation method used to predict samples of the current block based on whether the determined memory bandwidth for the current block meets a bandwidth threshold. In this way, the video decoder can reduce the amount of power consumed and / or the processing time required to predict samples of the current block.

[0111] As described above, in some examples, the video coder may determine the memory bandwidth required for the current block. The video coder may determine the memory bandwidth required for the block using an affine mode based on values ​​of affine motion model parameters for the block (e.g., based on control point motion vectors (CPMVs) for the block). As discussed above with reference to equations (1) and (2), the affine motion model may include four or six parameters. The four parameter affine motion model may be implicitly represented as two CPMVs (e.g., and ), and the six-parameter affine motion model can be implicitly expressed as three CPMVs ( and ). In this way, the determination based on CPMV can be considered as the determination based on affine model parameters, and vice versa.

[0112] The affine model parameters a, b, c, d determine how far the sub-block motion vectors can be from each other in a PU. In the worst case, the sub-block vectors can be so far apart that there is zero overlap between the reference regions used for motion compensation (e.g., Figure 7 As shown in the example of ). As described above, the reduced overlap between reference regions results in increased memory bandwidth requirements. The scenario where there is zero overlap between reference regions can be referred to as a "worst case" scenario for memory bandwidth because a maximum number of reference samples may need to be accessed from a memory (e.g., memory 106, memory 120). Thus, the present disclosure proposes a technique in which a video decoder selectively adjusts a motion compensation method used to predict samples of a current block based on the memory bandwidth required to access reference samples of the current block decoded using an affine mode.

[0113] In some examples, the video coder may determine the memory bandwidth required for the current block based on the area of ​​the smallest region that includes all reference blocks from which samples of the current block will be predicted. An example of such a smallest region is shown as Figure 8 The area 820 of the reference block is the smallest area including all samples of the reference area 810. In order to determine the area of ​​the smallest area, the video decoder can determine the size of the smallest area. For example, the video decoder can derive the position of the reference block from the CPMV of the current block. Figure 8 In the example of FIG. 8 , the video decoder may obtain the value of the CPMV of the current block 806 and may derive the sub-block motion vector mv based on the value of the CPMV. A -mv D As mentioned above, Figure 8 The sub-block motion vector mv in A -mv D Each of the identified reference regions 810 corresponds to a reference region, and each reference region includes a reference block.

[0114] The video decoder may determine the boundaries of the minimum area based on the location of the reference block. For example, the video decoder may determine the top boundary, bottom boundary, left boundary, and right boundary of the minimum area 820 based on the identified reference block. In order to determine the boundaries of the minimum area, the video decoder may determine the boundaries of each reference area. For example, the video decoder may determine the top boundary, bottom boundary, left boundary, and right boundary of each reference area of ​​the reference area 810. As described above, each reference area may include a reference block (e.g., shown as a dotted line with an upper left corner identified by a sub-block motion vector) and additional samples around the reference block for interpolation (e.g., shown as a solid line around the dotted line). The left and top boundaries of the reference area 810A of the sub-block 808A may be calculated as:

[0115] LeftR 810A =x+mv AX –interpolationX / 2 (6)

[0116] TopR 810A =y+mv AY –interpolationY / 2 (7)

[0117] The width (wR) and height (hR) of the reference region 810 may be calculated as:

[0118] wxya 810A =interpolationX+w–1 (8)

[0119] HkD 810A =interpolationY+w–1 (9)

[0120] The right and bottom boundaries of the reference area can be calculated as:

[0121] RightR 810A =LeftR 810A +wR 810A –1 (10)

[0122] BottomR 810A =TopR 810A +hR 810A –1 (11)

[0123] Where (x, y) is the position of sub-block 808A, MV A =(mv AX ,mv AY) is the integer-precision motion vector of sub-block 808A, interpolationX and interpolationY are the lengths of the filters used in the horizontal and vertical directions, respectively, w is the width of sub-block 808A, and h is the height of sub-block 808A.

[0124] The video decoder may determine the size of the minimum region based on the determined borders of the reference region. For example, the video decoder may determine the borders of the minimum region as the minimum borders of each of the top, bottom, left, and right borders of the reference region. The video decoder may determine the borders of the minimum region 820 as follows:

[0125] Top 820 =min(TopR 810A , TopR 810B , TopR 810C , TopR 810D ) (12)

[0126] Left 820 = min(LeftR 810A ,LeftR 810B ,LeftR 810C ,LeftR 810D ) (13)

[0127] Right 820 =max(RightR 810A ,RightR 810B ,RightR 810C ,RightR 810D )(14)

[0128] Bottom 820 =max(BottomR 810A , BottomR 810B , BottomR 810C , BottomR 810D )(15)

[0129] In this way, the video decoder can determine the size of the minimum area including multiple reference blocks based on the value of CPMV. As described above, the video decoder can determine the memory bandwidth required for the current block based on the area of ​​the minimum area, which includes all reference blocks from which samples of the current block will be predicted. For example, the video decoder can determine the memory bandwidth required for the current block 806 based on the area of ​​the minimum area 820. The video decoder can determine the area of ​​the minimum area by multiplying the height of the minimum area by the width of the minimum area. The video decoder can determine the width of the minimum area by subtracting the left boundary from the right boundary, and can determine the height of the minimum area by subtracting the top boundary from the bottom boundary. For example, the video decoder can determine the area of ​​the minimum area 820 as follows:

[0130] Area 820 =(Right 820 -Left 820 +1)*(Bottom 820 - Top 820 +1) (16)

[0131] In other examples, the video coder may determine the area of ​​minimum region 820 as follows:

[0132] Area 820 =(max(LeftR 810A ,LeftR 810B ,LeftR 810C ,LeftR 810D )-Left 810 +wR)*(max(TopR 810A , TopR 810B , TopR 810C , TopR 810D )-Top 810 +hR) (17)

[0133] The video decoder may determine the memory bandwidth required for the current block based on the area of ​​the minimum area. In some examples, the video decoder may directly use the determined area of ​​the minimum area as the memory bandwidth required for the current block. For example, the video decoder may determine that the bandwidth required for block 806 is equal to Area 820 In other examples, the video coder may scale or otherwise modify the area of ​​the minimum region to determine the memory bandwidth required for the current block. In this way, the video coder may determine the memory bandwidth required to access samples of multiple reference blocks derived based on the value of the CPMV of the current block.

[0134] As described above, the video decoder can selectively modify the motion compensation method used to predict samples of the current block based on whether the determined memory bandwidth for the current block meets the bandwidth threshold. The video decoder can compare the determined memory bandwidth with a predetermined bandwidth threshold. The bandwidth threshold can be predefined in a configuration file or can be passed to the video decoder as a parameter.

[0135] To selectively modify the motion compensation method, the video decoder may modify (e.g., change, alter, or otherwise adjust) the motion compensation method in response to determining that the memory bandwidth does not meet the bandwidth threshold. Similarly, the video decoder may not modify the motion compensation method in response to determining that the memory bandwidth does not meet the bandwidth threshold. In some examples, the video decoder may determine that the memory bandwidth meets the bandwidth threshold when the determined memory bandwidth is less than or equal to (e.g., < or =) the bandwidth threshold. In some examples, the video decoder may determine that the memory bandwidth meets the bandwidth threshold when the determined memory bandwidth is less than (e.g., <) the bandwidth threshold. In some examples, the video decoder may determine that the memory bandwidth does not meet the bandwidth threshold when the determined memory bandwidth is greater than (e.g., >) the bandwidth threshold. In some examples, the video decoder may determine that the memory bandwidth does not meet the bandwidth threshold when the determined memory bandwidth is greater than or equal to (e.g., > or =) the bandwidth threshold.

[0136] The video decoder can modify the motion compensation method in a variety of ways. For example, the video decoder can modify the motion compensation method used to predict the samples of the current block in a manner that will reduce the memory bandwidth required to predict the samples of the current block (e.g., relative to an unmodified motion compensation method). Some example modifications to the motion compensation method include, but are not limited to, modifying the sub-block size, modifying the number of filter taps used for interpolation, decoding the current block using a simple mode, or any other modification that reduces the memory bandwidth required to predict the samples of the current block. In this way, the video decoder can selectively modify the motion compensation method used to predict the samples of the current block of video data based on whether the determined memory bandwidth meets a bandwidth threshold.

[0137] In order to modify the sub-block size, the video decoder may group one or more sub-blocks together to reduce the number of sub-blocks of the current block. For example, the video decoder may change from using 4×4 sub-blocks to using 8×8 sub-blocks. The video decoder may predict the grouped block using a motion vector derived using a motion vector of a corresponding sub-block (e.g., included in the grouped block). In some examples, the video decoder may derive the motion vector by averaging the motion vectors of the corresponding sub-blocks. As an example, if the grouped block is a square (same width and height), the video decoder may use the average motion vector of all corresponding sub-blocks as the motion vector of the grouped block. As another example, the video decoder may use the average of a subset of the motion vectors of the corresponding sub-blocks as the motion vector of the grouped block. For example, the video decoder may use the average of the motion vectors of a diagonal set of sub-blocks (e.g., upper left and lower right, or upper right and lower left) as the motion vector of the grouped block. In some examples, the video decoder may use the motion vector of a specific sub-block of the corresponding sub-block as the derived motion vector. Modifying the sub-block size may reduce memory bandwidth because fewer reference areas may be required.

[0138] To modify the number of filter taps, the video decoder can reduce the number of filter taps used for interpolation. In one example, a 4-tap chroma interpolation filter can be used instead of the original 8-tap luma interpolation filter to interpolate the luma component. By reducing the number of filter taps, the video decoder can reduce the size of the reference region (e.g., because interpolationX in equations (6) and (8) and / or interpolationY in equations (7) and (9) will be reduced).

[0139] The video decoder may use a selectively modified motion compensation method to predict samples of a current block of video data from samples of multiple reference blocks. For example, the video decoder may obtain (e.g., from a memory) samples of multiple reference blocks and add the obtained samples to the residual data to reconstruct samples of the current block.

[0140] Fig. 9 is a conceptual diagram illustrating determination of a chroma motion vector from a luma motion vector according to one or more techniques of the present disclosure. As described above, a current block of video data may include a luma block and a corresponding chroma block. In the case of a 4:2:2 or 4:2:0 color format, the size of the chroma block may be half the size of the luma block. Fig. 9As shown in , chroma sub-block 904 may correspond to luma block 900, and luma block 900 may be divided into luma sub-blocks 902A-902D (collectively referred to as "luma sub-blocks 902"). Luma sub-blocks 902 may be referenced based on their relative positions within luma block 900. For example, luma sub-block 902A may be referred to as a top left (TL) sub-block, luma sub-block 902B may be referred to as a top right (TR) sub-block, luma sub-block 902C may be referred to as a bottom left (BL) sub-block, and luma sub-block 902D may be referred to as a bottom right (BR) sub-block. Fig. 9 In the example of FIG. 8 , the luma block 900 may be 8×8 samples, and the chroma sub-block 904 and each luma sub-block 902 may be 4×4 samples.

[0141] A video coder (e.g., video encoder 200 and / or video decoder 300) may obtain a corresponding luma motion vector for each luma sub-block 902. For example, the video coder may obtain a first luma MV for luma sub-block 902A, a second luma MV for luma sub-block 902B, a third luma MV for luma sub-block 902C, and a fourth luma MV for luma sub-block 902D. In some examples, the video coder may obtain the luma MV based on an affine motion model of luma block 900.

[0142] The video decoder may determine the chroma MV for the chroma sub-block 904 based on the luma MV. According to one or more techniques of the present disclosure, instead of determining the chroma MV based on the MV of each and each luma sub-block, the video decoder may determine the chroma MV based on the MV of a subset of luma sub-blocks. In some examples, the subset of luma sub-blocks may include two diagonally positioned luma sub-blocks. As an example, the video decoder may determine the chroma MV based on the MV of luma sub-block 902A and the MV of luma sub-block 902D (e.g., the upper left and lower right sub-blocks). As another example, the video decoder may determine the chroma MV based on the MV of luma sub-block 902B and the MV of luma sub-block 902C (e.g., the upper right and lower left sub-blocks).

[0143] As described above, the video decoder may determine the chrominance MV based on the MV of a subset of the luma sub-blocks. For example, the video decoder may determine the chrominance MV as the average of the MVs of the subset of the luma sub-blocks. For illustration, (vx0, vy0) and (vx1, vy1) are represented as two MVs from the selected sub-block for averaging. In one example, the video decoder may perform the averaging as ((vx0+vx1)>>1, (vy0+vy1)>>1). In another example, the video decoder may perform the averaging as ((vx0+vx1+1)>>1, (vy0+vy1+1)>>1). In another example, the video decoder may perform the averaging as ((vx0+vx1) / 2, (vy0+vy1) / 2). In another example, the video decoder may perform the averaging as ((vx0+vx1+1) / 2, (vy0+vy1+1) / 2).

[0144] In some examples, the video coder may derive the MV of the chroma sub-block (e.g., at a high level of precision) by averaging the high-precision motion vectors of the corresponding luma blocks. The video coder may perform the averaging using a motion vector rounding process. Where (vxHi, vhHi) is the high-precision motion vector of the i-th luma block, the video coder may calculate the sum of the motion vectors using four luma blocks as follows:

[0145] (sumX, sumY) = (vxH0+vxH1+vxH2+vxH3, vhH0+vhH1+vhH2+vhH3)

[0146] As described above, the video decoder may determine the sum of motion vectors using two diagonal blocks. As an example, in the case where the two diagonal blocks include an upper left sub-block and a lower right sub-block, the video decoder may calculate the sum motion vector as follows:

[0147] (sumX, sumY) = (vxH0+vxH3, vhH0+vhH3)

[0148] As another example, in the case where two diagonal blocks include an upper right sub-block and a lower left sub-block, the video coder may calculate the sum motion vector as follows:

[0149] (sumX,sumY)=(vxH1+vxH2,vhH1+vhH2)

[0150] The video coder may round the sum of the motion vectors to form a scaled high-precision motion vector for the chroma block (mvScX, mvScY). As an example, the video coder may round the sum motion vector as follows:

[0151] mvScX=sumX>=0? (sumX+offset)>>nShift:-((-(sumX)+offset)>>nShift)mvScY=sumY>=0? (sumY+offset)>>nShift:-((-(sumY)+offset)>>nShift)where nShift and offset are integers that can be determined based on the number of luma motion vectors involved in the summation of the motion vectors (sumX, sumY). For example, if the sum motion vector is calculated using four luma motion vectors, nShift can be set to two and offset can be zero or two. In another example, if (sumX, sumY) is the sum of two luma motion vectors, nShift can be set to one and offset can be set to zero or one.

[0152] The video coder can derive the motion vector of the chroma block by downscaling (mvScX, mvScY). For example, if the luma motion vector is 1 / 16 pixel precision and the chroma motion vector is 1 / 32 pixel precision, the video coder can derive the integer motion vector (imvCX, imvCY) of the chroma block as follows:

[0153] (imvCX,imvCY)=(mvScX>>5,mvScY>>5)

[0154] In some examples, the aforementioned techniques can be used to derive the MV for motion compensation of a large sub-block generally from the MVs of its multiple small sub-blocks. For example, the video decoder can derive the MV for motion compensation of a large sub-block by averaging the MVs of two small sub-blocks at the diagonal of the large sub-block.

[0155] In some examples, the size of the small sub-block may be M×N, and the size of the large sub-block may be 2M×2N. M and N may be 4, but other values ​​of M and N may be used (in some cases M may be equal to N, and in other cases M may be different from N). As described above, in the case where the large sub-block includes four small sub-blocks, the four small sub-blocks may be referred to as an upper left sub-block, an upper right sub-block, a lower left sub-block, and a lower right sub-block. In one example, the video decoder may derive the MV for motion compensation of the 2M×2N sub-block by averaging the MVs of the upper left and lower right M×N sub-blocks. In another example, the video decoder may derive the MV for motion compensation of the 2N×2N sub-block by averaging the MVs of the upper right and lower left M×N sub-blocks.

[0156] It should be noted that the size of the large sub-block does not have to be 2M×2N. If the large sub-block size is s1*M×s2*N, where s1 and s2 are the number of small sub-blocks in the large sub-block in rows and columns, respectively, the above technique can also be applied. For example, representing (vx0, vy0) and (vx1, vy1) as two MVs from the small sub-block selected for averaging, the video decoder can derive the MV for motion compensation of the large sub-block as ((vx0+vx1)>>1, (vy0+vy1)>>1). By comparing the aforementioned technique with using all small sub-blocks, it can be seen that the technique of the present disclosure can significantly reduce the computational complexity.

[0157] Figure 4 is a block diagram illustrating an example video encoder 200 that may perform the techniques of this disclosure. Figure 4 For purposes of explanation and should not be considered a constraint on the techniques extensively exemplified and described in this disclosure. For purposes of illustration, this disclosure describes the video encoder 200 in the context of video coding standards such as the HEVC video coding standard under development and the H.266 video coding standard. However, the techniques of this disclosure are not limited to these video coding standards and are generally applicable to video encoding and decoding.

[0158] exist Figure 4 In the example of , the video encoder 200 includes a video data memory 230, a mode selection unit 202, a residual generation unit 204, a transform processing unit 206, a quantization unit 208, an inverse quantization unit 210, an inverse transform processing unit 212, a reconstruction unit 214, a filter unit 216, a decoded picture buffer (DPB) 218, and an entropy coding unit 220. Any or all of the video data memory 230, the mode selection unit 202, the residual generation unit 204, the transform processing unit 206, the quantization unit 208, the inverse quantization unit 210, the inverse transform processing unit 212, the reconstruction unit 214, the filter unit 216, the DPB 218, and the entropy coding unit 220 may be implemented in one or more processors or in processing circuits. In addition, the video encoder 200 may include additional or alternative processors or processing circuits to perform these or other functions.

[0159] The video data memory 230 may store video data to be encoded by the components of the video encoder 200. The video encoder 200 may receive video data from, for example, the video source 104 ( Figure 1) receives video data stored in video data memory 230. DPB 218 can be used as a reference picture memory, which stores reference video data for use by video encoder 200 when predicting subsequent video data. Video data memory 230 and DPB 218 can be formed by any of a variety of storage devices, such as dynamic random access memory (DRAM), including synchronous DRAM (SDRAM), magnetoresistive RAM (MRAM), resistive RAM (RRAM) or other types of storage devices. Video data memory 230 and DPB 218 can be provided by the same storage device or a separate storage device. In various examples, video data memory 230 can be placed on-chip with other components of video encoder 200, as shown, or placed off-chip relative to those components.

[0160] In the present disclosure, references to the video data memory 230 should not be interpreted as limited to a memory inside the video encoder 200 (unless otherwise specified) or a memory outside the video encoder 200 (unless otherwise specified). Of course, references to the video data memory 230 should be understood as a reference memory that stores video data received by the video encoder 200 for encoding (e.g., video data to be encoded of a current block). Figure 1 The memory 106 can also provide temporary storage for the outputs of various units of the video encoder 200 .

[0161] Show Figure 4 The various units of the video encoder 200 are described to help understand the operations performed by the video encoder 200. These units can be implemented as fixed-function circuits, programmable circuits, or a combination thereof. Fixed-function circuits refer to circuits that provide specific functions and preset the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (for example, to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more units may be different circuit blocks (fixed function or programmable), and in some examples, one or more units may be integrated circuits.

[0162] The video encoder 200 may include an arithmetic logic unit (ALU), an elementary function unit (EFU), a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video encoder 200 is performed using software executed by a programmable circuit, the memory 106 ( Figure 1) may store object code for software received and executed by the video encoder 200, or another memory within the video encoder 200 (not shown) may store such instructions.

[0163] The video data memory 230 is configured to store received video data. The video encoder 200 may retrieve a picture of video data from the video data memory 230 and provide the video data to the residual generation unit 204 and the mode selection unit 202. The video data in the video data memory 230 may be original video data to be encoded.

[0164] The mode selection unit 202 includes a motion estimation unit 222, a motion compensation unit 224, and an intra prediction unit 226. The mode selection unit 202 may include additional functional units for performing video prediction according to other prediction modes. As an example, the mode selection unit 202 may include a palette unit, an intra block copy unit (which may be part of the motion estimation unit 222 and / or the motion compensation unit 224), an affine unit, a linear model (LM) unit, etc.

[0165] Generally, the mode selection unit 202 coordinates multiple encoding times to test a combination of encoding parameters and derive a rate-distortion value for such a combination. The encoding parameters may include a partition of a CTU to a CU, a prediction mode of a CU, a transform type of residual data of a CU, a quantization parameter of residual data of a CU, etc. The mode selection unit 202 may ultimately select a combination of encoding parameters that has a better rate-distortion value than other tested combinations.

[0166] The video encoder 200 may partition a picture retrieved from the video data memory 230 into a series of CTUs and encapsulate one or more CTUs in a slice. The mode selection unit 202 may partition the CTUs of the picture according to a tree structure (such as the QTBT structure or quadtree structure of HEVC described above). As described above, the video encoder 200 may form one or more CUs by partitioning the CTUs according to the tree structure. Such CUs may also be generally referred to as "video blocks" or "blocks".

[0167] In general, the mode selection unit 202 also controls its components (e.g., the motion estimation unit 222, the motion compensation unit 224, and the intra prediction unit 226) to generate a prediction block for the current block (e.g., the overlapping portion of the current CU or PU and TU in HEVC). In order to inter-predict the current block, the motion estimation unit 222 can perform a motion search to identify one or more closely matching reference blocks in one or more reference pictures (e.g., one or more previously decoded pictures stored in the DPB 218). In particular, the motion estimation unit 222 can calculate values ​​representing how similar the potential reference blocks are to the current block based on, for example, the sum of absolute differences (SAD), the sum of squared differences (SSD), the mean absolute difference (MAD), the mean squared difference (MSD), etc. The motion estimation unit 222 can generally perform these calculations using the sample-by-sample differences between the current block and the reference block under consideration. The motion estimation unit 222 can identify the reference block with the lowest value generated by these calculations, indicating the reference block that most closely matches the current block.

[0168] The motion estimation unit 222 may form one or more motion vectors (MVs) that define the position of a reference block in a reference picture relative to a current block in a current picture. The motion estimation unit 222 may then provide the motion vectors to the motion compensation unit 224. For example, for unidirectional inter prediction, the motion estimation unit 222 may provide a single motion vector, while for bidirectional inter prediction, the motion estimation unit 222 may provide two motion vectors. The motion compensation unit 224 may then use the motion vectors to generate a prediction block. For example, the motion compensation unit 224 may use the motion vectors to retrieve data for the reference block. As another example, if the motion vectors have fractional sample precision, the motion compensation unit 224 may interpolate the prediction block according to one or more interpolation filters. In addition, for bidirectional inter prediction, the motion compensation unit 224 may retrieve data for two reference blocks identified by the respective motion vectors and combine the retrieved data (e.g., by sample-by-sample averaging or weighted averaging).

[0169] As another example, for intra prediction or intra prediction decoding, the intra prediction unit 226 can generate a prediction block based on samples adjacent to the current block. For example, for directional mode, the intra prediction unit 226 can generally mathematically combine adjacent sample values ​​and fill these calculated values ​​along a defined direction on the current block to generate a prediction block. As another example, for DC mode, the intra prediction unit 226 can calculate the average value of adjacent samples of the current block and generate a prediction block to include the average value obtained for each sample of the prediction block.

[0170] The mode selection unit 202 provides the prediction block to the residual generation unit 204. The residual generation unit 204 receives the original uncoded version of the current block from the video data memory 230 and receives the prediction block from the mode selection unit 202. The residual generation unit 204 calculates the sample-by-sample difference between the current block and the prediction block. The resulting sample-by-sample difference defines a residual block for the current block. In some examples, the residual generation unit 204 may also use residual differential pulse code modulation (RDPCM) to determine the difference between sample values ​​in the residual block to generate the residual block. In some examples, the residual generation unit 204 may be formed using one or more subtractor circuits that perform binary subtraction.

[0171] In the example where the mode selection unit 202 partitions the CU into PUs, each PU may be associated with a luma prediction unit and a corresponding chroma prediction unit. The video encoder 200 and the video decoder 300 may support PUs of various sizes. As described above, the size of the CU may refer to the size of the luma coding block of the CU, and the size of the PU may refer to the size of the luma prediction unit of the PU. Assuming that the size of a particular CU is 2N×2N, the video encoder 200 may support PU sizes of 2N×2N or N×N for intra-frame prediction, and symmetric PU sizes of 2N×2N, 2N×N, N×2N, N×N or similar for inter-frame prediction. The video encoder 200 and the video decoder 300 may also support asymmetric partitioning of PU sizes of 2N×nU, 2N×nD, nL×2N, and nR×2N for inter-frame prediction.

[0172] In an example where the mode selection unit does not further split the CU into PUs, each CU may be associated with a luma coding block and a corresponding chroma coding block. As described above, the size of a CU may refer to the size of the luma coding block of the CU. The video encoder 200 and the video decoder 300 may support a CU size of 2N×2N, 2N×N, or N×2N.

[0173] For other video coding techniques, such as intra block copy mode coding, affine mode coding, and linear model (LM) mode coding as some examples, the mode selection unit 202 generates a prediction block for the current block being encoded via a corresponding unit associated with the coding technique. In some examples, such as palette mode coding, the mode selection unit 202 may not generate a prediction block, but instead generate syntax elements indicating how to reconstruct the block based on the selected palette. In such a mode, the mode selection unit 202 may provide these syntax elements to the entropy coding unit 220 for encoding.

[0174] As described above, the residual generation unit 204 receives video data of a current block and a corresponding prediction block. Then, the residual generation unit 204 generates a residual block for the current block. To generate the residual block, the residual generation unit 204 calculates the sample-by-sample difference between the prediction block and the current block.

[0175] The transform processing unit 206 applies one or more transforms to the residual block to generate a block of transform coefficients (referred to herein as a "transform coefficient block"). The transform processing unit 206 may apply various transforms to the residual block to form a transform coefficient block. For example, the transform processing unit 206 may apply a discrete cosine transform (DCT), a directional transform, a Karhunen-Loeve transform (KLT), or a conceptually similar transform to the residual block. In some examples, the transform processing unit 206 may perform multiple transforms on the residual block, for example, a primary transform and a secondary transform such as a rotation transform. In some examples, the transform processing unit 206 does not apply a transform to the residual block.

[0176] The quantization unit 208 may quantize the transform coefficients in the transform coefficient block to produce a quantized transform coefficient block. The quantization unit 208 may quantize the transform coefficients of the transform coefficient block according to a quantization parameter (QP) value associated with the current block. The video encoder 200 (e.g., via the mode selection unit 202) may adjust the degree of quantization applied to the transform coefficient block associated with the current block by adjusting the QP value associated with the CU. Quantization may introduce information loss, and thus, the quantized transform coefficients may have lower precision than the original transform coefficients produced by the transform processing unit 206.

[0177] The inverse quantization unit 210 and the inverse transform processing unit 212 may apply inverse quantization and inverse transform, respectively, to the quantized transform coefficient block to reconstruct a residual block from the transform coefficient block. The reconstruction unit 214 may generate a reconstructed block corresponding to the current block (although potentially with some degree of distortion) based on the reconstructed residual block and the prediction block generated by the mode selection unit 202. For example, the reconstruction unit 214 may add samples of the reconstructed residual block to corresponding samples of the prediction block generated by the mode selection unit 202 to generate a reconstructed block.

[0178] Filter unit 216 may perform one or more filter operations on the reconstructed block. For example, filter unit 216 may perform a deblocking operation to reduce blocking artifacts along the edge of the CU. In some examples, the operations of filter unit 216 may be skipped.

[0179] The video encoder 200 stores the reconstructed blocks in the DPB 218. For example, in an example where the operation of the filter unit 216 is not required, the reconstruction unit 214 can store the reconstructed blocks to the DPB 218. In an example where the operation of the filter unit 216 is required, the filter unit 216 can store the filtered reconstructed blocks to the DPB 218. The motion estimation unit 222 and the motion compensation unit 224 can retrieve a reference picture from the DPB 218, which is formed by the reconstructed (and potentially filtered) blocks, to perform inter-frame prediction on blocks of subsequently encoded pictures. In addition, the intra-frame prediction unit 226 can use the reconstructed blocks in the DPB 218 of the current picture to perform intra-frame prediction on other blocks in the current picture.

[0180] In general, the entropy coding unit 220 may entropy encode syntax elements received from other functional components of the video encoder 200. For example, the entropy coding unit 220 may entropy encode a block of quantized transform coefficients from the quantization unit 208. As another example, the entropy coding unit 220 may entropy encode a prediction syntax element (e.g., motion information for inter-frame prediction or intra-frame mode information for intra-frame prediction) from the mode selection unit 202. The entropy coding unit 220 may perform one or more entropy coding operations on syntax elements of another example of video data to generate entropy-encoded data. For example, the entropy coding unit 220 may perform a context-adaptive variable length coding (CAVLC) operation, a CABAC operation, a variable to variable (V2V) length coding operation, a syntax-based context-adaptive binary arithmetic coding (SBAC) operation, a probability interval partitioning entropy (PIPE) coding operation, an exponential-Grund coding operation, or another type of entropy coding operation on the data. In some examples, the entropy coding unit 220 may operate in a bypass mode when the syntax element is not entropy-encoded.

[0181] The video encoder 200 may output a bitstream including entropy coding syntax elements required to reconstruct blocks of a slice or picture. In particular, the entropy coding unit 220 may output a bitstream.

[0182] The above operations are described for blocks. Such descriptions should be understood as operations for luma coding blocks and / or chroma coding blocks. As described above, in some examples, the luma coding block and the chroma coding block are the luma and chroma components of the CU. In some examples, the luma coding block and the chroma coding block are the luma and chroma components of the PU.

[0183] In some examples, the operations performed for the luma coding block do not need to be repeated for the chroma coding block. As an example, the operations for identifying the motion vector (MV) and reference picture of the luma coding block do not need to be repeated to identify the MV and reference picture for the chroma block. Instead, the MV of the luma coding block may be scaled to determine the MV of the chroma block, and the reference picture may be the same. As another example, the intra prediction process may be the same for the luma coding block and the chroma coding block.

[0184] As described above, and in accordance with one or more techniques of the present disclosure, a video coder (e.g., video encoder 200 and / or video decoder 300) can reduce the amount of memory bandwidth used to predict samples of video data. In some embodiments, bandwidth reduction can be achieved by limiting the number of pixels accessed for interpolation.

[0185] As an exemplary bandwidth reduction technique, the video decoder may round motion vectors (MVs) for merge and AMVP modes of 4×4 CUs. The video decoder may round MV candidates in the merge candidate list and the AMVP motion vector candidate list. In some examples, the video decoder may not signal (e.g., in the bitstream) the first motion vector difference (MVD) resolution flag, which indicates whether it is quarter luma sample MV precision. Extending the rounding, the MVD may be made integer for the corresponding rounded MV components, so the video decoder may signal MVD>>2. A video decoder (such as the video decoder 300) may reconstruct the motion vector according to the following formula:

[0186] MV=[MVP]+(MVD<<2) (18)

[0187] Where the brackets indicate rounding operations, MV is the value of the motion vector, MVP is the value of the motion vector prediction, and MVD is the value of the motion vector difference. MVD parsing is not affected by this shift, and the MV can be adjusted during the reconstruction phase. The number of reference pixels accessed and the reduction in bandwidth in the worst case are summarized in Table 2 below.

[0188] As an exemplary bandwidth reduction technique, the video decoder may fix the sub-PU size in the ATMVP mode to 8×8. When the size is set to 4×4, the video decoder may access (e.g., from a memory) an 11×11 block (121 pixels) to perform motion compensation. The 8×8 region contains four 4×4 PUs. Therefore, the memory will be accessed four times, and the total number of access points is 484 (4×121). However, when the PU size is set to 8×8, the video decoder may only need to access (from the memory) a block of (7+8)×(7+8)=225 points of the luminance component and two 7×7 chrominance blocks. This memory access may only need to be performed once. The number of reference pixels accessed and the reduction in bandwidth in this worst case are summarized in Table 2 below. As shown in Table 2, by fixing the sub-PU size of ATMVP to 8×8, the bandwidth can be reduced by 53.3% compared to the number of points accessed when the PU size is set to 4×4.

[0189]

[0190]

[0191] Table 2 - Recommended Worst Case Bandwidth Reduction

[0192] In some examples, the video decoder may impose one or more constraints to reduce the amount of memory bandwidth used to predict samples of video data in an affine mode. As an example, the video decoder may reduce the memory bandwidth used for the affine mode by limiting the motion vector difference (also referred to as the control point difference) between the affine control points. For example, the video decoder may determine the memory bandwidth required for the current block (e.g., based on the control points of the current block). The video decoder may compare the determined memory bandwidth with a predetermined bandwidth threshold (e.g., to ensure that the memory bandwidth savings should not be less than a predetermined memory bandwidth savings amount). The bandwidth threshold may be predefined in a configuration file or may be passed to the video decoder as a parameter. The video decoder may selectively modify the motion compensation method used to predict the samples of the current block based on whether the determined memory bandwidth for the current block meets the bandwidth threshold.

[0193] The video decoder can modify the motion compensation method in a variety of ways. As an example, if the determined bandwidth (e.g., control point difference) is less than the bandwidth threshold, the video decoder can modify the motion compensation by using 4×4 sub-blocks (i.e., 4×4 affine mode) to perform affine testing on the CU. Otherwise, the video decoder can perform affine testing on the CU using 8×8 sub-blocks (8×8 affine mode) or using SBWidth×SBHeight sub-blocks (where SBWidth or SBHeight is greater than 4) instead of 4×4 affine mode, or simply not allow 4×4 affine mode to meet the target bandwidth reduction.

[0194] The video coder may apply constraints to the L0 or L1 motion direction separately. In this way, it is possible to have 4×4 sub-blocks in either motion direction or SBWidth×SBHeight in the other motion direction. In some examples, the video coder may apply constraints to both motion lists to determine the sub-block size, meaning that both L0 and L1 should have the same sub-block size depending on whether both directions satisfy the constraints.

[0195] The video coder may perform normalization of the motion vector differences. For example, since the motion vector of each affine sub-block is calculated based on the size of the CU, the video coder may normalize the motion vector differences based on the size of the CU. In some examples, normalization may simplify prediction because the restriction on each size may maximize the utilization of 4×4 sub-blocks in affine motion.

[0196] The following are examples of normalized, restricted conditions for a 6-parameter affine model and a 4-parameter affine model (e.g., as used in VTM):

[0197] Normalization of motion vector differences

[0198] An example of the paradigm for motion vector differences based on the size of the CU (wxh) can be given as follows:

[0199] Norm(v 1x -v 0x )=(v 1x -v 0x )*S / w

[0200] Norm(v 1y -v 0y )=(v 1y -v 0y )*S / w

[0201] Norm(v 2x -v 0x )=(v 2x -v 0x )*S / h

[0202] Norm(v 2y -v 0y )=(v 2y -v 0y )*S / h (19)

[0203] Where S is the scaling factor with fixed point implementation and Norm(.) is at full pixel scale. Other pixel resolutions may also be applied.

[0204] Limitations of the 6-parameter model:

[0205] The 4×4 affine mode is tested for the 6-parameter model if the following conditions are met:

[0206] |Norm(v 1x -v 0x )+Norm(v 2x -v 0x )+X|+|Norm(v 1y -v 0y )+Norm(v 2y -v 0y )+Y|+|Norm(v 1x -v 0x )-Norm(v 2x -v 0x )|+|Norm(v 1y -v 0y )-Norm(v 2y -v 0y )| <N (20)

[0207] The bandwidth savings can be symmetric. However, the bandwidth savings should be shifted by the values ​​of X and Y in (20). Also in (20), N represents the boundary of the limit. The value can be adjusted to minimize the bandwidth savings. For example, if the operation is applied to the full pixel scale, then in order to ensure that the bandwidth savings should not be less than 50%, X, Y and N are set to S, S and S*7 / 2 respectively. For fractional pixel scale, the values ​​of X, Y and N should be adjusted accordingly. N can also depend on the block size. The larger the block size, the larger N can be used (for example, since larger block sizes have more 4×4 sub-blocks, larger overlap areas can be achieved).

[0208] Restrictions for the 4-parameter model:

[0209] The 4-parameter affine model is a special case of the 6-parameter model, in which only two control points are considered to obtain the motion vector of the sub-affine block. In this model, (v 2x -v 0x ) and (v 2y-v 0y ) is set as follows:

[0210] (v 2x -v 0x )=-(v 1y -v 0y )

[0211] (v 2y -v 0y )=(v 1x -v 0x ) (twenty one)

[0212] In this case, (v 2x -v 0x ) and (v 2y -v 0y ) is given as follows:

[0213] Norm(v 2x -v 0x )=-Norm(v 1y -v 0y )

[0214] Norm(v 2y -v 0y )=Norm(v 1x -v 0x ) (twenty two)

[0215] By applying (22) or (19), the restrictions of the 4-parameter affine model can be given as follows:

[0216] |Norm(v 1x -v 0x )+Norm(v 1y -v 0y )+X|+|Norm(v 1y -v 0y )+Norm(v1x-v0x)+Y|+|Norm(v 1x -v 0x )-Norm(v 1y -v 0y )|+|Norm(v 1y -v 0y )-Norm(v 1x -v 0x )|<N (23)

[0217] In some examples, the video coder may apply other restrictions (e.g., constraints) to the 4-parameter affine mode. As an example, the video coder may apply the following restrictions:

[0218] |(v 1x-v 0x )+w|+|(v 1y -v 0y )|≤(N+log 2(h / 8))(w / 8) (24)

[0219] Where (+w) on the left side of the condition indicates that the bandwidth reduction is symmetric but shifted by a factor of w. The term log 2(h / 8) is a biased normalization factor representing the effect of h on the bandwidth savings. w / 8 is the normalization for the block size. N represents the bandwidth savings level. Condition (24) can be confirmed by examples of bandwidth savings (%) calculated for blocks with w = 8 and various h.

[0220] Additional or alternative restrictions for the 4-parameter affine model can be given as follows:

[0221] |Norm(v 1x -v 0x )+X|+|Norm(v 1y -v 0y )+Y|<N (25)

[0222] Where X, Y, and N correspond to bandwidth savings levels.

[0223] Additional or alternative restrictions for the 4-parameter affine model can be defined as follows:

[0224] c1=|(v 1x -v 0x )+4*log 2(w / 8)+2|+|(v 1y -v 0y )+8*log 2(w / 8)+2*2 / 8|<N+4+w(26)

[0225] c2=|(v 1x -v 0x )+w-4*log 2(w / 8)-2|+|(v 1y -v 0y )-8*log 2(w / 8)-2*w / 8|<N+4+w(27)

[0226] If both c1 and c2 are satisfied, then the 4×4 affine pattern can be tested. Otherwise (eg, if one or both of c1 and c2 are not satisfied), then the affine pattern will be larger.

[0227] In yet another additional or alternative restriction method: the variable blkW specifies the width of the block, and the variable blkH specifies the height of the block. The variable subBlkW specifies the default width of the sub-block used for affine motion compensation. The variable subBlkH specifies the default height of the sub-block used for affine motion compensation. In this example, if the restriction condition is met, the sub-block used for affine motion compensation has a size of (subBlkW, subBlkH); otherwise, the sub-block used for affine motion compensation has a size of (subBlkW*2, subBlkH*2). Typically, subBlkW=4 and subBlkH=4, but they can have other integer values.

[0228] Some example restrictions for the 6-parameter affine model include:

[0229] In one example,

[0230]

[0231]

[0232]

[0233]

[0234]

[0235]

[0236] When normalization is applied, the limits become:

[0237] -subBlkW×S≤Norm(v 1x -v 0x )*subBlkW<S (34)

[0238] -S<Norm(v 1y -v 0y )*subBlkW<S (35)

[0239] -S<Norm(v 2x -v 0x )*subBlkH<S (36)

[0240] -S≤Norm(v 2x -v 0x )*subBlkH<S (37)

[0241] -blkW*S≤Norm(v 1x -v 0x )*subBlkW+Norm(v 2x-v 0x )*

[0242] subBlkH<S (38)

[0243] -blkH*S≤Norm(v 1y -v 0y )*subBlkW+Norm(v 2y -v 0y )*

[0244] subBlkH<S (39)

[0245] In another example, the "less than or equal to" operation "≤" can be replaced by the "less than" operation "<". For example:

[0246] Equation (28) can be replaced by

[0247]

[0248] Equations (31) to (33) can be replaced by

[0249]

[0250]

[0251]

[0252] The video decoder can similarly apply the above normalization technique. ix 、v iy is in sub-pixel units, the video coder may scale the corresponding equation accordingly. For example, if normalization is applied, the video coder may scale S.

[0253] In the 4-parameter affine model, the video decoder can be set as follows (v 2x -v 0x ) and (v 2y -v 0y ):

[0254] (v 2x -v 0x )=-(v 1y -v 0y )

[0255] (v 2y -v 0y )=(v 1x -v 0x )

[0256] In this case, (v 2x-v 0x ) and (v 2y -v 0y ) can be given as follows:

[0257] Norm(v 2x -v 0x )=-Norm(v 1y -v 0y )

[0258] Norm(v 2y -v 0y )=Norm(v 1x -v 0x )

[0259] The restrictions of the 4-parameter affine model can then be established accordingly.

[0260] The following describes additional or alternative restrictions for unidirectional prediction. The restrictions for unidirectional prediction can be the same as those described above. The restrictions can also be other alternative restrictions.

[0261] In one example, the constraints include equations (28) and (29). If the constraints are met, the sub-block used for affine motion compensation has a size of (subBlkW, subBlkH). Otherwise, the sub-block used for affine motion compensation has a size of (subBlkW*2, subBlkH).

[0262] In yet another example, the constraint includes equations (40) and (29). If the constraint is satisfied, the sub-block used for affine motion compensation has a size of (subBlkW, subBlkH). Otherwise, the sub-block used for affine motion compensation has a size of (subBlkW*2, subBlkH).

[0263] In yet another example, the restriction includes equations (30) and (31). If the restriction is satisfied, the sub-block used for affine motion compensation has a size of (subBlkW, subBlkH). Otherwise, the sub-block used for affine motion compensation has a size of (subBlkW, subBlkH*2).

[0264] In yet another example, the restriction includes equations (30) and (41). If the restriction is satisfied, the sub-block used for affine motion compensation has a size of (subBlkW, subBlkH). Otherwise, the sub-block used for affine motion compensation has a size of (subBlkW, subBlkH*2). In addition, normalization may be applied for the above example.

[0265] Video encoder 200 represents an example of a device configured to encode video data, the device including a memory configured to store the video data, and one or more processing units embodied in a circuit and configured to obtain a CPMV value for a current block of video data; determine whether a memory bandwidth required to access samples of a plurality of reference blocks derived based on the CPMV value satisfies a bandwidth threshold; selectively modify a motion compensation method for predicting samples of the current block of video data based on whether the determined memory bandwidth satisfies the bandwidth threshold; and predict samples of the current block of video data from samples of the plurality of reference blocks using the selectively modified motion compensation method.

[0266] Figure 5 is a block diagram illustrating an example video decoder 300 that may perform the techniques of this disclosure. Figure 5 The techniques widely exemplified and described in this disclosure are for purposes of explanation and not limitation. For purposes of illustration, this disclosure describes a video decoder 300 according to the technical descriptions of JEM, VCC, and HEVC. However, the techniques of this disclosure may be performed by a video decoding device configured to operate according to other video decoding standards.

[0267] exist Figure 5 In the example of , the video decoder 300 includes a coded picture buffer (CPB) memory 320, an entropy decoding unit 302, a prediction processing unit 304, an inverse quantization unit 306, an inverse transform processing unit 308, a reconstruction unit 310, a filter unit 312, and a decoded picture buffer (DPB) 314. Any or all of the CPB memory 320, the entropy decoding unit 302, the prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, the filter unit 312, and the DPB 314 may be implemented in one or more processors or in processing circuits. In addition, the video decoder 300 may include additional or alternative processors or processing circuits to perform these and other functions.

[0268] The prediction processing unit 304 includes a motion compensation unit 316 and an intra prediction unit 318. The prediction processing unit 304 may include additional units to perform predictions according to other prediction modes. As an example, the prediction processing unit 304 may include a palette unit, an intra block copy unit (which may form part of the motion compensation unit 316), an affine unit, a linear model (LM) unit, etc. In other examples, the video decoder 300 may include more, fewer, or different functional components.

[0269] CPB memory 320 may store video data, such as an encoded video bitstream, to be decoded by components of video decoder 300. For example, the video bitstream may be obtained from computer readable medium 110 ( Figure 1) obtains video data stored in CPB memory 320. CPB memory 320 may include a CPB that stores coded video data (e.g., syntax elements) from a coded video bitstream. Moreover, CPB memory 320 may store video data other than syntax elements of decoded pictures, such as temporary data representing outputs from various units of video decoder 300. Generally, DPB 314 stores decoded pictures, and video decoder 300 may output decoded pictures and / or use them as reference video data when decoding subsequent data or pictures of the coded video bitstream. CPB memory 320 and DPB 314 may be formed by any of a variety of storage devices, such as DRAM, including SDRAM, MRAM, RRAM, or other types of storage devices. CPB memory 320 and DPB 314 may be provided by the same storage device or an independent storage device. In various examples, CPB memory 320 may be placed on-chip with other components of video decoder 300, or placed off-chip relative to those components.

[0270] Additionally or alternatively, in some examples, video decoder 300 may retrieve the video from memory 120 ( Figure 1 ) to retrieve the decoded video data. That is, memory 120 may store data together with CPB memory 320 as discussed above. Similarly, when some or all of the functions of video decoder 300 are implemented in software to be executed by the processing circuitry of video decoder 300, memory 120 may store instructions to be executed by video decoder 300.

[0271] Show Figure 5 Various units are shown to aid in understanding the operations performed by the video decoder 300. These units may be implemented as fixed function circuits, programmable circuits, or a combination thereof. Figure 4 , fixed-function circuits refer to circuits that provide specific functions and are preset in the operations that can be performed. Programmable circuits refer to circuits that can be programmed to perform various tasks and provide flexible functions in the operations that can be performed. For example, a programmable circuit can execute software or firmware that causes the programmable circuit to operate in a manner defined by the instructions of the software or firmware. Fixed-function circuits can execute software instructions (for example, to receive parameters or output parameters), but the type of operation performed by the fixed-function circuit is generally immutable. In some examples, one or more of the units may be different circuit blocks (fixed function or programmable), and in some examples, one or more units may be integrated circuits.

[0272] The video decoder 300 may include an ALU, an EFU, a digital circuit, an analog circuit, and / or a programmable core formed by a programmable circuit. In an example where the operation of the video decoder 300 is performed by software executed on a programmable circuit, an on-chip or off-chip memory may store instructions (e.g., object code) of the software received and executed by the video decoder 300.

[0273] The entropy decoding unit 302 may receive the encoded video data from the CPB and entropy decode the video data to reproduce the syntax elements. The prediction processing unit 304, the inverse quantization unit 306, the inverse transform processing unit 308, the reconstruction unit 310, and the filter unit 312 may generate decoded video data based on the syntax elements extracted from the bitstream.

[0274] Generally, the video decoder 300 reconstructs a picture on a block-by-block basis. The video decoder 300 may perform a reconstruction operation on each block individually (where the block currently being reconstructed (ie, decoded) may be referred to as a "current block").

[0275] The entropy decoding unit 302 may entropy decode syntax elements defining quantized transform coefficients of the quantized transform coefficient block and transform information such as a quantization parameter (QP) and / or a transform mode indication. The inverse quantization unit 306 may use the QP associated with the quantized transform coefficient block to determine a degree of quantization, and likewise, determine a degree of inverse quantization for the inverse quantization unit 306 to apply. The inverse quantization unit 306 may inverse quantize the quantized transform coefficients (e.g., by performing a bitwise left shift operation). The inverse quantization unit 306 may thereby form a transform coefficient block including the transform coefficients.

[0276] After the inverse quantization unit 306 forms the transform coefficient block, the inverse transform processing unit 308 may apply one or more inverse transforms to the transform coefficient block to generate a residual block associated with the current block. For example, the inverse transform processing unit 308 may apply an inverse DCT, an inverse integer transform, an inverse Karhunen-Loeve transform (KLT), an inverse rotational transform, an inverse directional transform, or another inverse transform to the coefficient block.

[0277] Further, prediction processing unit 304 generates a prediction block based on the prediction information syntax element entropy decoded by entropy decoding unit 302. For example, if the prediction information syntax element indicates that the current block is inter-predicted, motion compensation unit 316 may generate the prediction block. In this case, the prediction information syntax element may indicate a reference picture in DPB 314 from which to retrieve the reference block, and a motion vector that identifies the position of the reference block in the reference picture relative to the current block in the current picture. Motion compensation unit 316 may generally generate a prediction block in the same manner as for motion compensation unit 224 ( Figure 4 ) is performed in a manner substantially similar to that described herein.

[0278] As another example, if the prediction information syntax element indicates that the current block is intra-predicted, the intra-prediction unit 318 may generate a prediction block according to the intra-prediction mode indicated by the prediction information syntax element. Again, the intra-prediction unit 318 may generally generate a prediction block in the same manner as for the intra-prediction unit 226 ( Figure 4 The intra prediction process is performed in a manner substantially similar to that described in the description of FIG. 314. The intra prediction unit 318 may retrieve data of neighboring samples of the current block from the DPB 314.

[0279] The reconstruction unit 310 may reconstruct the current block using the prediction block and the residual block. For example, the reconstruction unit 310 may add samples of the residual block to corresponding samples of the prediction block to reconstruct the current block.

[0280] The filter unit 312 may perform one or more filter operations on the reconstructed block. For example, the filter unit 312 may perform a deblocking operation to reduce blocking artifacts along the edges of the reconstructed block. The operations of the filter unit 312 may not necessarily be performed in all examples.

[0281] The video decoder 300 may store the reconstructed blocks in the DPB 314. As described above, the DPB 314 may provide reference information to the prediction processing unit 304, such as samples of the current picture for intra prediction and previously decoded pictures for subsequent motion compensation. In addition, the video decoder 300 may output decoded pictures from the DPB 314 for subsequent presentation on a video such as a Figure 1 on a display device 118 of the display device.

[0282] In this way, the video decoder 300 represents an example of a video decoding device that includes a memory configured to store video data, and one or more processing units that are embodied in a circuit and configured to obtain a CPMV value for a current block of video data; determine whether a memory bandwidth required to access samples of multiple reference blocks derived based on the CPMV value satisfies a bandwidth threshold; selectively modify a motion compensation method for predicting samples of the current block of video data based on whether the determined memory bandwidth satisfies the bandwidth threshold; and predict samples of the current block of video data from samples of multiple reference blocks using the selectively modified motion compensation method.

[0283] Fig.10 2 is a flowchart illustrating an example method for encoding a current block. The current block may include a current CU. Although the video encoder 200 ( Figure 1 and Figure 4 ), but it should be understood that other devices may be configured to perform similar Fig.10 method.

[0284] In this example, video encoder 200 initially predicts a current block (1050). For example, video encoder 200 may form a prediction block for the current block. As described above, in some examples, video encoder 200 may predict the current block using a mode. In accordance with one or more techniques of the present disclosure, video encoder 200 may perform various techniques to manage memory bandwidth for predicting the current block of video data. Fig.11 An example of such a memory bandwidth management technique is discussed.

[0285] The video encoder 200 may then calculate a residual block for the current block (1052). To calculate the residual block, the video encoder 200 may calculate the difference between the original unencoded block and the predicted block for the current block. The video encoder 200 may then transform and quantize the coefficients of the residual block (1054). Next, the video encoder 200 may scan the quantized transform coefficients of the residual block (1056). During or after the scan, the video encoder 200 may entropy encode the coefficients (1058). For example, the video encoder 200 may encode the coefficients using CAVLC or CABAC. The video encoder 200 may then output entropy encoded data for the coefficients of the block (1060).

[0286] Fig.11 1 is a flowchart illustrating an example method for decoding a current video data block. The current block may include a current CU. Although the video decoder 300 ( Figure 1 and Figure 5 ), but it should be understood that other devices may be configured to perform similar Fig.11 method.

[0287] The video decoder 300 may receive entropy encoded data for a current block, such as entropy encoded prediction information and entropy encoded data of coefficients of a residual block corresponding to the current block (1170). The video decoder 300 may decode the entropy encoded data to determine prediction information for the current block and reproduce the coefficients of the residual block (1172). The video decoder 300 may predict the current block (1174), for example, using an intra-frame or inter-frame prediction mode indicated by the prediction information for the current block to calculate a prediction block for the current block. As described above, in some examples, the video decoder 300 may predict the current block using an affine mode. In accordance with one or more techniques of the present disclosure, the video decoder 300 may perform various techniques to manage memory bandwidth for predicting a current block of video data. Reference is made below to Fig.12 An example of such a memory bandwidth management technique is discussed.

[0288] The video decoder 300 may then inverse scan the reproduced coefficients (1176) to create a block of quantized transform coefficients. The video decoder 300 may then inverse quantize and inverse transform the coefficients to produce a residual block (1178). The video decoder 300 may ultimately decode the current block (1180) by combining the prediction block and the residual block.

[0289] Fig.12 is a flow chart illustrating an example method for managing memory bandwidth for predictive video data in accordance with one or more techniques of this disclosure. Fig.12 The technique can be used by video decoders (such as Figure 1 and Figure 4 The video encoder 200 and / or Figure 1 and Figure 5 For the sake of simplicity of explanation, Fig.12 The technology is described by Figure 1 and Figure 5 The video decoder 300 executes.

[0290] The video decoder 300 may obtain a value of a control point motion vector (CPMV) of a current block of video data (1202). For example, the video decoder 300 may obtain a value of a control point motion vector (CPMV) of the current block of video data (1202). and The video decoder 300 may obtain the value of CPMV based on the value of the motion vector (which may or may not be CPMV) of the spatial neighboring block of the current block.

[0291] The video decoder 300 may determine the memory bandwidth required to access samples of a reference block derived based on the value of CPMV (1204). Figure 8 In the case of block 806, the video decoder 300 can determine the memory bandwidth required to access samples of the reference area 810 (including the reference block and additional samples used for interpolation). As described above, the reference area 810 is represented by the sub-block motion vector mv A -mv D It is identified that these sub-vectors are derived from the CPMV of block 806 .

[0292] In some examples, the video decoder 300 may determine the memory bandwidth by determining the size of the smallest region including the plurality of reference blocks based on the value of CPMV. Figure 8The size of region 820 (which is the smallest region that includes reference region 810) is determined. As described above, in some examples, the video decoder 300 may use equations (6)-(15) to determine the size of region 820. Based on the size of the smallest region, the video decoder 300 may determine the area of ​​the smallest region as the memory bandwidth required to access samples of the reference block. For example, the video decoder 300 may determine the area of ​​region 820 as the memory bandwidth required to access samples of the reference block derived based on the value of CPMV. As described above, in some examples, the video decoder 300 may use equation (16) or equation (17) to determine the area of ​​region 820.

[0293] The video decoder 300 may determine whether the determined memory bandwidth satisfies a bandwidth threshold (1206). As described above, the bandwidth threshold may be a predetermined bandwidth threshold. In some examples, the video decoder 300 may determine that the memory bandwidth satisfies the bandwidth threshold when the determined memory bandwidth is less than or equal to (e.g., < or =) the bandwidth threshold. In some examples, the video decoder 300 may determine that the memory bandwidth satisfies the bandwidth threshold when the determined memory bandwidth is less than (e.g., <) the bandwidth threshold. In some examples, the video decoder 300 may determine that the memory bandwidth does not satisfy the bandwidth threshold when the determined memory bandwidth is greater than (e.g., >) the bandwidth threshold. In some examples, the video decoder 300 may determine that the memory bandwidth does not satisfy the bandwidth threshold when the determined memory bandwidth is greater than or equal to (e.g., > or =) the bandwidth threshold.

[0294] The video decoder 300 may selectively modify the motion compensation method used to predict samples of a current block of video data based on whether the determined memory bandwidth satisfies the bandwidth threshold. As an example, the video decoder 300 may modify the motion compensation method in response to determining that the memory bandwidth does not satisfy the bandwidth threshold (the "no" branch of 1206, 1208). As another example, the video decoder 300 may maintain (e.g., not modify) the motion compensation method in response to determining that the memory bandwidth does satisfy the bandwidth threshold (the "yes" branch of 1206, 1210). In the event that the video decoder 300 determines that the motion compensation method is to be modified, the video decoder 300 may modify the motion compensation method in any manner. Typically, by modifying the motion compensation method, the video decoder 300 will reduce the memory bandwidth required to predict samples of the current block (i.e., the memory bandwidth required to access samples of the predictor block of the current block).

[0295] The video decoder 300 may use a selectively modified motion compensation method to predict samples of a current block of video data (1212). For example, the prediction processing unit 304 of the video decoder 300 may access samples of a plurality of reference blocks derived based on the value of CPMV from a memory (e.g., a decoded picture buffer 314 of the video decoder 300). The video decoder 300 may determine the values ​​of the samples of the current block based on the samples of the reference blocks and the residual data.

[0296] As described above, in some examples, the video decoder 300 may apply bandwidth reduction techniques separately for each prediction direction (e.g., separately for L0 or L1 motion). For example, when the current block is bidirectionally predicted, the video decoder 300 may obtain a CPMV value for the current block for a first prediction direction (e.g., L0), and obtain a CPMV value for the current block for a second prediction direction (e.g., L1). The video decoder 300 may independently test the bandwidth requirements for each prediction direction. For example, the video decoder 300 may determine whether the memory bandwidth required to access samples of multiple reference blocks derived based on the value of the CPMV for the first prediction direction meets a bandwidth threshold; and determine whether the memory bandwidth required to access samples of multiple reference blocks derived based on the value of the CPMV for the second prediction direction meets a bandwidth threshold. Based on the test, the video decoder 300 may independently and selectively modify the motion compensation method for each prediction direction. For example, the video decoder 300 may selectively modify a motion compensation method for predicting samples of a current block of video data in the first prediction direction based on whether the determined memory bandwidth for the first prediction direction satisfies a bandwidth threshold, and selectively modify a motion compensation method for predicting samples of the current block of video data in the second prediction direction based on whether the determined memory bandwidth for the first prediction direction satisfies a bandwidth threshold. As a result, the video decoder 300 may modify the motion compensation methods for the two prediction directions separately and independently (e.g., change one without changing the other, change both at the same time, or change neither).

[0297] In some examples, the video decoder 300 selectively adjusts the motion compensation method used to predict each corresponding block independently based on the memory bandwidth requirements of the corresponding blocks. For example, in the case where a coding unit (CU) includes multiple 8×8 sub-blocks, the video decoder 300 can determine for each of the multiple sub-blocks whether the corresponding memory bandwidth required to access the samples of the corresponding multiple reference blocks of the corresponding sub-block meets the bandwidth threshold. The video decoder 300 can selectively modify the motion compensation method used to predict the samples of the corresponding sub-block based on whether the corresponding memory bandwidth for a particular sub-block meets the bandwidth threshold. In other words, the video decoder 300 can selectively adjust the motion compensation method for each sub-block independently of other sub-blocks. In this way, depending on the memory bandwidth requirements of each sub-block, the video decoder 300 can adjust the motion compensation method for some sub-blocks of the CU while not adjusting the motion compensation method for other sub-blocks of the same CU.

[0298] However, in some examples, it may not be desirable for the video decoder 300 to selectively adjust the motion compensation method used to predict each respective block independently based on the memory bandwidth requirements of the respective blocks. For example, evaluating and testing the memory bandwidth of each sub-block may be computationally intensive, which may slow down the decoding process.

[0299] According to one or more techniques of the present disclosure, the video decoder 300 can selectively adjust the motion compensation method for predicting multiple sub-blocks based on the memory bandwidth requirements of a specific sub-block among the multiple sub-blocks. For example, in the case where a CU includes multiple 8×8 sub-blocks, the video decoder 300 can determine whether the corresponding memory bandwidth required to predict the specific sub-block meets the bandwidth threshold for the specific sub-block of the multiple sub-blocks. Based on whether the memory bandwidth for the specific sub-block meets the bandwidth threshold, the video decoder 300 can modify the motion compensation method for predicting all samples of the multiple sub-blocks. In other words, the video decoder 300 can selectively adjust the motion compensation method for each sub-block based on the evaluation of a single sub-block. In this way, the video decoder 300 can avoid having to determine the memory bandwidth requirements of each sub-block separately.

[0300] Fig.13 is a conceptual diagram illustrating a simplified memory bandwidth test according to one or more aspects of the present disclosure. Fig.13 As shown in FIG. 1 , a coding unit (CU) 1304 includes four sub-blocks 1306A-1306D (collectively referred to as “sub-blocks”). For example, CU 1304 may be a 16×16 CU, and each sub-block 1306 may be an 8×8 coding block. Fig.13 As shown in , each sub-block 1306 may include its own sub-block. For example, sub-block 1306 may be divided into four sub-blocks, which may be similar to Figure 8 Sub-block 808.

[0301] As described above, a video decoder (e.g., video encoder 200 and / or video decoder 300) may selectively adjust motion compensation of sub-blocks of a CU independently or dependently. In order to selectively adjust motion compensation independently, the video decoder may determine the memory bandwidth requirements of each sub-block 1306 respectively. For example, the video decoder may determine a first memory bandwidth for sub-block 1306A, a second memory bandwidth for sub-block 1306B, a third memory bandwidth for sub-block 1306C, and a fourth memory bandwidth for sub-block 1306D. The video decoder may determine whether to adjust the motion compensation method for each corresponding sub-block of sub-block 1306 respectively based on the memory bandwidth of the corresponding sub-block. For example, the video decoder may determine whether to adjust the motion compensation method for sub-block 1306A based on the first memory bandwidth, determine whether to adjust the motion compensation method for sub-block 1306B based on the second memory bandwidth, determine whether to adjust the motion compensation method for sub-block 1306C based on the third memory bandwidth, and determine whether to adjust the motion compensation method for sub-block 1306D based on the fourth memory bandwidth.

[0302] To dependently adjust motion compensation, the video decoder may determine the memory bandwidth requirements of a single sub-block of sub-blocks 1306, and selectively adjust the motion compensation methods for all sub-blocks 1306 based on the memory bandwidth requirements of the single sub-block. For example, the video decoder may determine the memory bandwidth of sub-block 1306A, and selectively adjust the motion compensation methods for all sub-blocks 1306 based on the memory bandwidth requirements of sub-block 1306A. In some examples, the video decoder may select which sub-block to test based on position. For example, the video decoder may select the top left sub-block to test (e.g., Fig.13 In this way, the video coder can avoid having to determine the memory bandwidth requirements of sub-blocks 1306B, 1306C, and 1306D.

[0303] Fig.14 is a flow chart illustrating an example method for managing memory bandwidth for predictive video data in accordance with one or more techniques of this disclosure. Fig.14 The technique can be used by video decoders (such as Figure 1 and Figure 4 The video encoder 200 and / or Figure 1 and Figure 5 For the sake of simplicity of explanation, Fig.14 The technology is described by Figure 1 and Figure 5 The video decoder 300 executes.

[0304] The video decoder 300 may obtain values ​​of luma motion vectors for a plurality of luma sub-blocks of a current block of video data selected for decoding using affine motion compensation (1402). For example, the video decoder 300 may obtain values ​​of luma motion vectors for Fig. 9 The value of the corresponding motion vector for each of the luminance sub-blocks 902.

[0305] The video decoder 300 may determine a value of a chroma motion vector for a chroma subblock corresponding to the plurality of luma subblocks based on the value of the luma motion vector for the subset of the plurality of luma subblocks (1404). As described above, the subset of the plurality of luma subblocks may include two diagonally positioned luma subblocks (e.g., excluding all other luma subblocks in the plurality of subblocks). For example, the video decoder 300 may determine a value of a chroma motion vector for the chroma subblock 904 based on the value of the luma motion vector for the luma subblock 902A and the value of the luma motion vector for the luma subblock 902D.

[0306] As described above, in some examples, the video decoder 300 may determine the value of the chroma motion vector as an average of the values ​​of the luma motion vectors for a subset of the plurality of luma subblocks. For example, the video decoder 300 may determine the sum of the values ​​of the luma motion vectors for a subset of the plurality of luma subblocks and round the determined sum to calculate the value of the chroma motion vector. In some examples, the video decoder 300 may perform the rounding symmetrically. For example, the video decoder 300 may determine the average of the values ​​of the luma motion vectors for a subset of the plurality of luma subblocks as follows:

[0307] sMV=MV A +MV D

[0308] MV Chrom .hor=sMV.hor>=0? (sMV.hor+offset)

[0309] >>shift:-((-sMV.hor+offset)>>shift)

[0310] MV Chrom .ver=sMV.ver>=0? (sMV.ver+offset)

[0311] >>shift:-((-sMV.ver+offset)>>shift)

[0312] Among them, MV A is the value of the first luma sub-block MV (eg, the value of the MV of the luma sub-block 902A), MV Dis the value of the second luma sub-block MV (eg, the value of the MV of luma sub-block 902D), X.hor is the horizontal component of motion vector X, X.ver is the vertical component of motion vector X, offset is one, and shift is one.

[0313] The video decoder 300 may use the determined motion vector to predict the values ​​of samples of the luma sub-block and the chroma sub-block. As an example, the video decoder 300 may use affine motion compensation to predict the corresponding samples of each luma sub-block in the plurality of luma sub-blocks based on the corresponding value of the luma motion vector (1406). For example, the video decoder 300 may predict the values ​​of the samples of the luma sub-block 902 based on the determined luma motion vector of the luma sub-block 902. As another example, the video decoder 300 may use affine motion compensation to predict the samples of the chroma sub-block based on the value of the chroma motion vector (1408). For example, the video decoder 300 may predict the values ​​of the samples of the chroma sub-block 904 based on the determined chroma motion vector of the chroma sub-block 904.

[0314] It should be appreciated that, according to examples, certain actions or events of any technology described herein may be performed in a different sequence, may be added, merged, or omitted together (e.g., not all described actions or events are necessary for the practice of the technology). In addition, in some examples, actions or events may be processed concurrently rather than sequentially, such as by multithreading, interrupt processing, or multiple processors.

[0315] In one or more examples, the described functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted through a computer-readable medium as one or more instructions or codes and executed by a hardware-based processing unit. Computer-readable media may include computer-readable storage media, which corresponds to tangible media such as data storage media, or communication media, including, for example, any media that facilitates the transfer of a computer program from one place to another according to a communication protocol. In this manner, computer-readable media may generally correspond to (1) non-temporary tangible computer-readable storage media, or (2) communication media such as signaling or carrier waves. Data storage media may be any available media that can be accessed by one or more computers or one or more processors to retrieve instructions, codes, and / or data structures to implement the techniques described in the present disclosure. A computer program product may include a computer-readable medium.

[0316] As an example and not limitation, such computer-readable storage media may include RAM, ROM, EEPROM, CD-ROM or other optical disk storage, disk storage or other magnetic storage devices, flash memory or any other medium that can be used to store the required program code in the form of instructions or data structures and can be accessed by a computer. Moreover, any connection is appropriately referred to as a computer-readable medium. For example, if instructions are sent from a website, server or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL) or wireless technology (such as infrared, radio and microwave), the definition of the medium includes coaxial cable, fiber optic cable, twisted pair, DSL or wireless technology such as infrared, radio and microwave. However, it should be understood that computer-readable storage media and data storage media do not include connections, carriers, signaling or other temporary media, but are directed to non-temporary tangible storage media. Disks and optical disks as used in this application include compact discs (CDs), laser optical discs, optical optical discs, digital versatile discs (DVDs), floppy disks and blue-ray discs, wherein disks typically reproduce data magnetically, while optical discs reproduce data optically with lasers. The above combination should also be included in the scope of computer-readable media.

[0317] Instructions may be executed by one or more processors, such as one or more digital signal processors (DSPs), general-purpose microprocessors, application specific integrated circuits (ASICs), field programmable gate arrays (FPGAs), or other equivalent integrated or discrete logic circuits. Therefore, the term "processor" as used in this application may refer to any of the aforementioned structures or any other structure suitable for implementing the technology described in this application. In addition, in some aspects, the functions described in this application may be provided within dedicated hardware and / or software modules configured for encoding and decoding, or incorporated in a combined codec. Similarly, the technology may be fully implemented in one or more circuits or logic elements.

[0318] The techniques of the present disclosure may be implemented in a variety of devices or apparatuses including a wireless handset, an integrated circuit (IC), or a set of ICs (e.g., a chipset). Various components, modules, or units are described in the present disclosure to emphasize functional aspects of devices configured to perform the disclosed techniques, but do not necessarily need to be implemented by different hardware units. Rather, as described above, the various units may be combined in a codec hardware unit, or provided by a collection of interoperable hardware units, including one or more processors as described above in combination with appropriate software and / or firmware.

[0319] Various examples have been described. These and other examples are within the scope of the following claims.

Claims

1. A method for decoding video data, the method comprising: obtaining values ​​of luma motion vectors for a plurality of luma sub-blocks of a current block of the video data selected for decoding using affine inter-frame motion compensation; determining, based on the values ​​of luma motion vectors for a subset of the plurality of luma subblocks, values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks, wherein the values ​​of the chroma motion vectors are determined based on two diagonally located luma subblocks of the plurality of luma subblocks selected for decoding using affine inter-frame motion compensation; predicting corresponding samples of each luma subblock of the plurality of luma subblocks based on corresponding values ​​of the luma motion vector using affine motion compensation; as well as Using affine motion compensation, samples of the chroma sub-block are predicted based on the value of the chroma motion vector.

2. The method according to claim 1, wherein: The plurality of luma subblocks include an upper left luma subblock, an upper right luma subblock, a lower left luma subblock, and a lower right luma subblock.

3. The method according to claim 2, wherein: The two diagonally located luma sub-blocks include the upper left luma sub-block and the lower right luma sub-block.

4. The method according to claim 3, wherein: The value of the chroma motion vector is determined based on any of the following: the value of the luma motion vector of the upper right luma subblock and the value of the luma motion vector of the lower left luma subblock; or The value of the luma motion vector of the upper left luma sub-block and the value of the luma motion vector of the lower right luma sub-block.

5. The method according to claim 1, wherein: The luma sub-blocks are each 4x4 samples, and wherein the chroma sub-blocks are 4x4 samples.

6. The method according to claim 1, wherein: Determining the value of the chroma motion vector comprises: The value of the chroma motion vector is determined to be an average of the values ​​of the luma motion vectors of the subset of the plurality of luma subblocks. 7 . The method according to claim 1 , wherein a chroma format of the chroma sub-block is 4:2:0 or 4:2:

2.

8. The method according to claim 6, wherein: Determining that the average is a value of the luma motion vector for the subset of the plurality of luma subblocks comprises: determining a sum of values ​​of the luma motion vectors for the subset of the plurality of luma subblocks; and The determined sum is right shifted to calculate the value of the chroma motion vector.

9. The method of claim 8, wherein determining the sum comprises rounding the sum of the values ​​of the luma motion vectors for the subset of the plurality of luma subblocks.

10. A device for decoding video data, the device comprising: A memory configured to store the video data; as well as One or more processors implemented in circuitry and configured to: obtaining, using affine inter-frame motion compensation, values ​​of luma motion vectors for a plurality of luma subblocks of a current block of the video data selected for decoding, wherein the values ​​of the chroma motion vectors are determined based on two diagonally located luma subblocks of the plurality of luma subblocks selected for decoding using affine inter-frame motion compensation; determining, based on the values ​​of the luma motion vectors for the subset of the plurality of luma subblocks, values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks; predicting corresponding samples of each luma subblock of the plurality of luma subblocks based on corresponding values ​​of the luma motion vector using affine motion compensation; as well as Using affine motion compensation, samples of the chroma sub-block are predicted based on the value of the chroma motion vector.

11. The device according to claim 10, wherein: The plurality of luma subblocks include an upper left luma subblock, an upper right luma subblock, a lower left luma subblock, and a lower right luma subblock.

12. The device according to claim 11, wherein The two diagonally located luma sub-blocks include the upper left luma sub-block and the lower right luma sub-block.

13. The device according to claim 12, wherein: The one or more processors determine the value of the chroma motion vector based on any of: the value of the luma motion vector of the upper right luma subblock and the value of the luma motion vector of the lower left luma subblock; or The value of the luma motion vector of the upper left luma sub-block and the value of the luma motion vector of the lower right luma sub-block.

14. The apparatus according to claim 10, wherein: The luma sub-blocks are each 4x4 samples, and wherein the chroma sub-blocks are 4x4 samples.

15. The apparatus according to claim 10, wherein: To determine the value of the chroma motion vector, the one or more processors are configured to: The value of the chroma motion vector is determined to be an average of the values ​​of the luma motion vectors of the subset of the plurality of luma subblocks.

16. The apparatus according to claim 10, wherein a chroma format of the chroma sub-block is 4:2:0 or 4:2:

2.

17. The apparatus according to claim 15, wherein: To determine that the average is a value of the luma motion vector for the subset of the plurality of luma subblocks, the one or more processors are configured to: determining a sum of values ​​of the luma motion vectors for the subset of the plurality of luma subblocks; as well as The determined sum is right shifted to calculate the value of the chroma motion vector.

18. The apparatus of claim 17, wherein to determine the sum, the one or more processors are configured to round the sum of the values ​​of the luma motion vectors for the subset of the plurality of luma subblocks.

19. A non-transitory computer-readable storage medium having stored thereon instructions, which, when executed, cause one or more processors of a video decoder to perform the following steps: obtaining values ​​of luma motion vectors for a plurality of luma sub-blocks of a current block of video data selected for decoding using affine inter-frame motion compensation; determining, based on the values ​​of luma motion vectors for a subset of the plurality of luma subblocks, values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks, wherein the values ​​of the chroma motion vectors are determined based on two diagonally located luma subblocks of the plurality of luma subblocks selected for decoding using affine inter-frame motion compensation; predicting corresponding samples of each luma subblock of the plurality of luma subblocks based on corresponding values ​​of the luma motion vector using affine motion compensation; as well as Using affine motion compensation, samples of the chroma sub-block are predicted based on the value of the chroma motion vector.

20. The non-transitory computer-readable storage medium of claim 19, wherein: The multiple luminance sub-blocks include an upper left sub-block, an upper right sub-block, a lower left sub-block and a lower right sub-block; The subset of the plurality of luma subblocks comprises two diagonally positioned luma subblocks; and The two diagonally located luma sub-blocks include the upper left sub-block and the lower right sub-block.

21. The non-transitory computer-readable storage medium of claim 19, wherein a chroma format of the chroma sub-block is 4:2:0 or 4:2:

2.

22. The non-transitory computer-readable storage medium of claim 20, wherein: The instructions causing the one or more processors to determine the value of the chroma motion vector include instructions causing the one or more processors to: The value of the chroma motion vector is determined to be an average of the values ​​of the luma motion vectors of the subset of the plurality of luma subblocks.

23. The non-transitory computer-readable storage medium of claim 22, wherein the instructions causing the one or more processors to determine the value of the chrominance motion vector as an average of the values ​​of the luma motion vector include instructions causing the one or more processors to round the sum of the values ​​of the luma motion vectors for the subset of the plurality of luma subblocks.

24. A device for decoding video data, the device comprising: means for obtaining values ​​of luma motion vectors for a plurality of luma sub-blocks of a current block of said video data selected for decoding using affine inter-frame motion compensation; means for determining, based on the values ​​of luma motion vectors for a subset of the plurality of luma subblocks, values ​​of chroma motion vectors for chroma subblocks corresponding to the plurality of luma subblocks, wherein the values ​​of the chroma motion vectors are determined based on two diagonally located luma subblocks of the plurality of luma subblocks selected for decoding using affine inter-frame motion compensation; means for predicting corresponding samples of each of the plurality of luma subblocks based on corresponding values ​​of the luma motion vector using affine motion compensation; as well as Means for predicting samples of the chroma sub-block based on the value of the chroma motion vector using affine motion compensation.

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