Calibration device

Abstract

The present case discloses a calibration device for calibrating a memory. The calibration device includes an input end, a first pull-up circuit and a first comparator. The input end is used to couple an external resistor. The first pull-up circuit is coupled to the input end and is used to receive a power supply voltage. The first pull-up circuit includes a plurality of first pull-up units, which are connected in parallel with each other. The first comparator is coupled to the input end. The first comparator is used to receive a proportional voltage corresponding to the power supply voltage and output a first control signal to the first pull-up units so that the resistance value of each of the first pull-up units is equal to the resistance value of the external resistor. An embodiment of the present case provides a calibration device, which calibrates the memory through the calibration device so that the impedance of the memory matches that of the external device, thereby improving the reflection condition of the high-frequency signal output by the memory.

Description

Technical Field

[0001] The present invention relates to a calibration device, and more particularly to a calibration device for calibrating a memory. Background Art

[0002] With the advancement of technology, Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM) is widely used in electronic products. Since DDR uses high-frequency signals, if DDR is not calibrated to match the impedance of DDR and external devices, the high-frequency signal output by DDR may be reflected. Summary of the invention

[0003] A technical aspect of the present case is about a calibration device for calibrating a memory. The calibration device includes an input terminal, a first pull-up circuit and a first comparator. The input terminal is used to couple an external resistor. The first pull-up circuit is coupled to the input terminal and is used to receive a power supply voltage. The first pull-up circuit includes a plurality of first pull-up units, which are connected in parallel with each other. The first comparator is coupled to the input terminal. The first comparator is used to receive a proportional voltage corresponding to the power supply voltage and output a first control signal to the first pull-up units so that the resistance value of each of the first pull-up units is equal to the resistance value of the external resistor.

[0004] In one embodiment, the first comparator negatively feeds back the proportional voltage to the input terminal, and the first pull-up circuit is adjusted according to the proportional voltage and the first control signal so that the resistance value of each of the first pull-up units is equal to the resistance value of the external resistor.

[0005] In one embodiment, the calibration device further includes a second pull-up circuit, a first pull-down circuit, and a second comparator. The second pull-up circuit is used to receive the first control signal and the power supply voltage, and the second pull-up circuit includes a plurality of second pull-up units, which are connected in parallel with each other. The first pull-down circuit and the second pull-up circuit are coupled to the first node, and the first pull-down circuit includes at least one first pull-down unit. The second comparator is used to receive a proportional voltage corresponding to the power supply voltage, provide the proportional voltage to the first node, and output a second control signal to at least the first pull-down unit, so that the resistance value of each of the second pull-up units is equal to the resistance value of the external resistor, and the resistance value of the first pull-down circuit is equal to the resistance value of the external resistor.

[0006] In one embodiment, the second comparator negatively feeds back the proportional voltage to the first node, and the second pull-up circuit is adjusted according to the proportional voltage and the first control signal so that the resistance value of each of the second pull-up units is equal to the resistance value of the external resistor.

[0007] In one embodiment, the second comparator negatively feeds back the proportional voltage to the first node, and the first pull-down circuit is adjusted according to the proportional voltage and the second control signal so that the resistance value of the first pull-down circuit is equal to the resistance value of the external resistor.

[0008] In one embodiment, there are multiple at least one first pull-down units, which are connected in parallel, and the second comparator outputs a second control signal to the first pull-down units so that the equivalent resistance value of the first pull-down units connected in parallel is equal to the resistance value of the external resistor.

[0009] In one embodiment, the calibration device further includes a third pull-up circuit and a second pull-down circuit. The third pull-up circuit is used to receive a power supply voltage. The second pull-down circuit and the third pull-up circuit are coupled to a second node. The first comparator outputs a first control signal to the third pull-up circuit so that the resistance value of the third pull-up circuit is equal to the resistance value of the external resistor, wherein the second comparator outputs a second control signal to the second pull-down circuit so that the resistance value of the second pull-down circuit is equal to the resistance value of the external resistor.

[0010] In one embodiment, the voltage of the second node is a proportional voltage corresponding to the power supply voltage.

[0011] In one embodiment, the second pull-down circuit includes a plurality of second pull-down units connected in parallel, wherein the second comparator outputs a second control signal to the second pull-down units so that the equivalent resistance value of the second pull-down units connected in parallel is equal to the resistance value of the external resistor.

[0012] In one embodiment, the proportional voltage is 10% to 90% of the power supply voltage.

[0013] Therefore, according to the technical content of the present case, the embodiment of the present case provides a calibration device, which calibrates the memory through the calibration device to match the impedance of the memory with that of the external device, thereby improving the reflection of the high-frequency signal output by the memory. In addition, compared with the general digital control circuit, which needs a period of time to output the calibration signal (for example, outputting the calibration signal once every few seconds) to calibrate the memory, the present case uses an analog circuit to calibrate the resistance of the pull-up unit and the pull-down unit, so that the present case can be calibrated continuously and in real time. Furthermore, compared with the general digital control circuit with quantization error, the present case uses an analog circuit for calibration without the problem of quantization error. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to make the above and other objects, features, advantages and embodiments of the present disclosure more clearly understood, the accompanying drawings are described as follows:

[0015] Figure 1 is a schematic diagram illustrating a calibration device according to an embodiment of the present disclosure;

[0016] Figure 2 According to an embodiment of the present disclosure, a method Figure 1 The pull-up circuit diagram of the calibration device shown;

[0017] Figure 3 According to an embodiment of the present disclosure, a method Figure 1 The pull-down circuit schematic of the calibration device is shown.

[0018] According to conventional operation, various features and components in the figures are not drawn to scale, and the drawing method is to present the specific features and components related to the present disclosure in the best way. In addition, the same or similar element symbols are used to refer to similar elements / components between different figures. DETAILED DESCRIPTION

[0019] In order to make the description of the disclosed content more detailed and complete, the following is an illustrative description of the implementation and specific embodiments of the present case; however, this is not the only form of implementing or using the specific embodiments of the present case. The implementation covers the features of multiple specific embodiments and the method steps and sequences used to construct and operate these specific embodiments. However, other specific embodiments can also be used to achieve the same or equal functions and step sequences.

[0020] Unless otherwise defined in this specification, the scientific and technical terms used herein have the same meanings as those understood and used by persons of ordinary skill in the art to which this invention belongs. In addition, singular nouns used in this specification include plural forms of the nouns, and plural nouns used in this specification also include singular forms of the nouns, unless otherwise conflicting with the context.

[0021] Figure 1 FIG. 1 is a schematic diagram of a calibration device 100 according to an embodiment of the present disclosure. The calibration device 100 is used to calibrate a memory (not shown). The calibration device 100 includes an input terminal IN, a first pull-up circuit 110 and a first comparator 120 .

[0022] As shown in the figure, the input terminal IN is used to couple the external resistor Ro. The first pull-up circuit 110 is coupled to the input terminal IN and is used to receive the power supply voltage VDDQ. The first pull-up circuit 110 includes a plurality of first pull-up units 111, 113, 115, 117, and the first pull-up units 111, 113, 115, 117 are connected in parallel. In one embodiment, the structure of the first pull-up units 111, 113, 115, 117 connected in parallel can be referred to. Figure 2 .

[0023] Please continue reading Figure 1 One input terminal of the first comparator 120 is coupled to the input terminal IN, and the other input terminal of the first comparator 120 is used to receive a proportional voltage N*VDDQ corresponding to the power supply voltage VDDQ, and the output terminal of the first comparator 120 provides a first control signal Sp to the first pull-up units 111, 113, 115, 117 of the first pull-up circuit 110, so that the resistance value of each of the first pull-up units 111, 113, 115, 117 is equal to the resistance value of the external resistor Ro.

[0024] For example, the calibration device 100 can be set in a memory (on chip), and the external resistor Ro can be a precise calibration resistor. When performing memory calibration, the external resistor Ro is coupled to the input terminal IN of the calibration device 100. At this time, due to the virtual short circuit characteristics of the negative feedback connection of the first comparator 120, the proportional voltage N*VDDQ received by the first comparator 120 is transmitted to the input terminal IN, so that the voltage value of the input terminal IN is N*VDDQ. In addition, the first comparator 120 outputs the first control signal Sp to the first pull-up circuit 110, and the first pull-up circuit 110 is adjusted according to the proportional voltage N*VDDQ and the first control signal Sp, so that the resistance value of each of the first pull-up units 111, 113, 115, and 117 of the first pull-up circuit 110 is equal to the resistance value of the external resistor Ro.

[0025] Assuming that the value of the external resistor Ro is 240 ohms (Ω) and the proportional voltage is 0.8VDDQ, when the external resistor Ro is coupled to the input terminal IN, the first comparator 120 negatively feeds back the proportional voltage 0.8VDDQ to the input terminal IN, so that the voltage value of the input terminal IN is at 0.8VDDQ. At this time, the first pull-up circuit 110 is adjusted according to the power supply voltage VDDQ, the proportional voltage 0.8VDDQ and the first control signal Sp, so that the resistance values ​​of the first pull-up unit 111, the first pull-up unit 113, the first pull-up unit 115 and the first pull-up unit 117 of the first pull-up circuit 110 are all 240 ohms. Therefore, the resistance value of each of the first pull-up units 111, 113, 115, 117 is equal to the resistance value of the external resistor 240 ohms. However, the present case does not use Figure 1 The embodiment shown is limited to one exemplary implementation of the present invention. Without departing from the spirit of the present invention, other suitable external resistors and suitable proportional voltages can be used to implement the present invention. For example, the proportional voltage can be 10% to 90% of the power supply voltage, depending on actual needs.

[0026] In one embodiment, the first pull-up unit 111 can be implemented by the circuit 111 in the lower left corner of the figure. The first pull-up unit 111 can include transistors T11, T12 and a resistor R11, the transistors T11 and T12 are connected in series, and the resistor R11 is connected in parallel to the transistor T11. The transistor T11 is used to receive the first control signal Sp to adjust the resistance value of the first pull-up unit 111.

[0027] Please continue reading Figure 1 The calibration device 100 further includes a second pull-up circuit 130, a first pull-down circuit 140, and a second comparator 150. The second pull-up circuit 130 is used to receive the first control signal Sp and the power supply voltage VDDQ, and the second pull-up circuit 130 includes a plurality of second pull-up units 131, 133, 135, 137, and the second pull-up units 131, 133, 135, 137 are connected in parallel. The second pull-up circuit 130 and the first pull-down circuit 140 are coupled to the first node N1, and the first pull-down circuit 140 includes at least a first pull-down unit 141. The first end of the second comparator 150 is used to receive a proportional voltage N*VDDQ corresponding to the power supply voltage VDDQ. The second comparator 150 adopts a negative feedback connection so that its second end provides the proportional voltage N*VDDQ to the first node N1, and the second comparator 150 outputs a second control signal Sn to at least the first pull-down unit 141, so that the resistance value of each of the second pull-up units 131, 133, 135, and 137 is equal to the resistance value of at least the first pull-down unit 141. In one embodiment, the resistance value of at least the first pull-down unit 141 is equal to the resistance value of the external resistor Ro.

[0028] For example, when the memory calibration is performed and the external resistor Ro is coupled to the input terminal IN of the calibration device 100, as described above, the first comparator 120 generates the first control signal Sp and transmits it to the second pull-up circuit 130. In addition, due to the virtual short circuit characteristic of the second comparator 150, the proportional voltage N*VDDQ received by the second comparator 150 is transmitted to the first node N1, so that the voltage value of the first node N1 is N*VDDQ, and the second pull-up circuit 130 is adjusted according to the proportional voltage N*VDDQ and the first control signal Sp, so that the resistance value of each of the second pull-up units 131, 133, 135, and 137 is equal to the resistance value of the external resistor Ro. In addition, the second comparator 150 outputs the second control signal Sn to the first pull-down circuit 140, and the first pull-down circuit 140 is adjusted according to the proportional voltage N*VDDQ and the second control signal Sn, so that the resistance value of at least the first pull-down unit 141 of the first pull-down circuit 140 is equal to the resistance value of the external resistor Ro.

[0029] Assuming that the value of the external resistor Ro is 250 ohms (Ω) and the proportional voltage is 0.8VDDQ, when the external resistor Ro is coupled to the input terminal IN, the second comparator 150 negatively feeds back the proportional voltage 0.8VDDQ to the first node N1, so that the voltage value of the first node N1 is 0.8VDDQ. At this time, the second pull-up circuit 130 is adjusted according to the power supply voltage VDDQ, the proportional voltage 0.8VDDQ and the first control signal Sp, so that the resistance values ​​of the second pull-up unit 131, the second pull-up unit 133, the second pull-up unit 135 and the second pull-up unit 137 of the second pull-up circuit 130 are all 240 ohms. Therefore, the resistance value of each of the second pull-up units 131, 133, 135, 137 is equal to the resistance value of the external resistor 240 ohms. In addition, the first pull-down circuit 140 is adjusted according to the proportional voltage 0.8VDDQ and the second control signal Sn, so that the resistance value of at least one first pull-down unit 141 of the first pull-down circuit 140 is 240 ohms, which is equal to the resistance value of the external resistor 240 ohms.

[0030] In one embodiment, the first pull-down unit 141 can be implemented by the circuit 141 in the lower right corner of the figure. The first pull-down unit 141 can include transistors T41, T42 and a resistor R41, the transistors T41 and T42 are connected in series, and the resistor R41 is connected in parallel to the transistor T41. The transistor T41 is used to receive the second control signal Sn to adjust the resistance value of the first pull-down unit 141.

[0031] Figure 3 According to an embodiment of the present disclosure, a method Figure 1 Schematic diagram of the pull-down circuit 140 of the calibration device 100 is shown. As shown in the figure, the number of the first pull-down units 141 can be multiple, and these first pull-down units 141, 143, 145, 147 are connected in parallel. The second comparator 150 outputs a second control signal Sn to the first pull-down units 141, 143, 145, 147, so that the equivalent resistance of the first pull-down units 141, 143, 145, 147 connected in parallel is equal to the resistance value of the external resistor Ro.

[0032] See also Figure 1 In one embodiment, the calibration device 100 further includes a third pull-up circuit 160 and a second pull-down circuit 170. The third pull-up circuit 160 is used to receive the power supply voltage VDDQ. The second pull-down circuit 170 and the third pull-up circuit 160 are coupled to the second node N2. The first comparator 120 outputs a first control signal Sp to the third pull-up circuit 160, so that the resistance value of the third pull-up circuit 160 is equal to the resistance value of the second pull-up circuit 130. The second comparator 150 outputs a second control signal Sn to the second pull-down circuit 170, so that the resistance value of the second pull-down circuit 170 is equal to the resistance value of the external resistor Ro.

[0033] In one embodiment, since the third pull-up circuit 160 and the second pull-down circuit 170 are both in the same bias state as the aforementioned pull-up circuits 110, 130 and the pull-down circuit 140, the voltage of the second node N2 is a proportional voltage N*VDDQ corresponding to the power supply voltage VDDQ. In one embodiment, the proportional voltage is 0.8VDDQ.

[0034] Please also read Figure 1 and Figure 3 The second pull-down circuit 170 may also be Figure 3 The second comparator 150 outputs a second control signal Sn to the second pull-down unit of the second pull-down circuit 170, so that the equivalent resistance of the second pull-down units of the second pull-down circuit 170 connected in parallel is equal to the resistance value of the external resistor Ro.

[0035] It can be seen from the above implementation methods of the present case that the application of the present case has the following advantages. The present embodiment provides a calibration device, through which the memory is calibrated to match the impedance of the memory with that of the external device, thereby improving the reflection of the high-frequency signal output by the memory. In addition, compared to the general digital control circuit, which requires a period of time to output a calibration signal (for example, outputting a calibration signal every few seconds) to calibrate the memory, the present case uses an analog circuit to calibrate the resistance of the pull-up unit and the pull-down unit. Therefore, the present case can be calibrated continuously and in real time. Furthermore, compared to the general digital control circuit with quantization error, the present case uses an analog circuit for calibration and there will be no quantization error problem.

[0036] Although the above implementation method discloses a specific embodiment of the present invention, it is not intended to limit the present invention. A person having ordinary knowledge in the technical field to which the present invention belongs may make various changes and modifications without departing from the principle and spirit of the present invention. Therefore, the scope of protection of the present invention shall be based on the scope defined in the attached claims.

Claims

1. A calibration device for calibrating a memory, characterized in that: Include: An input terminal, for coupling an external resistor; A first pull-up circuit, coupled to the input terminal and used to receive a power supply voltage, comprises: A plurality of first pull-up units, the first pull-up units are connected in parallel with each other; a first comparator coupled to the input terminal, wherein the first comparator is used to receive a proportional voltage corresponding to the power supply voltage and output a first control signal to the first pull-up units so that the resistance value of each of the first pull-up units is equal to the resistance value of the external resistor; A second pull-up circuit, for receiving the first control signal and the power supply voltage, comprises: A plurality of second pull-up units, the second pull-up units are connected in parallel with each other; A first pull-down circuit is coupled to the second pull-up circuit at a first node, comprising: at least one first pull-down unit; a second comparator, configured to receive the proportional voltage corresponding to the power supply voltage, provide the proportional voltage to the first node, and output a second control signal to the at least one first pull-down unit, so that the resistance value of each of the second pull-up units is equal to the resistance value of the external resistor, and the resistance value of the first pull-down circuit is equal to the resistance value of the external resistor; a third pull-up circuit for receiving the power supply voltage; a second pull-down circuit coupled to the third pull-up circuit at a second node; wherein the first comparator outputs the first control signal to the third pull-up circuit so that the resistance value of the third pull-up circuit is equal to the resistance value of the external resistor, wherein the second comparator outputs the second control signal to the second pull-down circuit so that the resistance value of the second pull-down circuit is equal to the resistance value of the external resistor; The proportional voltage is 10% to 90% of the power supply voltage.

2. The calibration device according to claim 1, characterized in that The first comparator negatively feeds back the proportional voltage to the input terminal, and the first pull-up circuit is adjusted according to the proportional voltage and the first control signal so that the resistance value of each of the first pull-up units is equal to the resistance value of the external resistor.

3. The calibration device according to claim 1, characterized in that The second comparator negatively feeds back the proportional voltage to the first node. The second pull-up circuit is adjusted according to the proportional voltage and the first control signal so that the resistance value of each of the second pull-up units is equal to the resistance value of the external resistor.

4. The calibration device according to claim 1, characterized in that: The second comparator negatively feeds back the proportional voltage to the first node, and the first pull-down circuit is adjusted according to the proportional voltage and the second control signal so that the resistance value of the first pull-down circuit is equal to the resistance value of the external resistor.

5. The calibration device according to claim 1, characterized in that: The number of the at least one first pull-down unit is multiple, and the first pull-down units are connected in parallel. The second comparator outputs the second control signal to the first pull-down units, so that the equivalent resistance value of the first pull-down units after being connected in parallel is equal to the resistance value of the external resistor.

6. The calibration device according to claim 1, characterized in that: The voltage of the second node is the proportional voltage corresponding to the power supply voltage.

7. The calibration device according to claim 1, characterized in that: The second pull-down circuit includes a plurality of second pull-down units connected in parallel, wherein the second comparator outputs the second control signal to the second pull-down units so that the equivalent resistance value of the second pull-down units connected in parallel is equal to the resistance value of the external resistor.

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