Semiconductor device, method for manufacturing the same, and structure used in the manufacturing of the semiconductor device

Abstract

A method of manufacturing a semiconductor device according to the present application includes: (A) a step of preparing a structure body including a substrate, a first chip disposed on the substrate, and a plurality of spacers disposed on the substrate and around the first chip; (B) a step of preparing a chip with an adhesive sheet including a second chip having a size larger than the first chip, and an adhesive sheet provided on one face of the second chip; (C) a step of disposing the second chip above the first chip so that the adhesive sheet contacts upper faces of the plurality of spacers; and (D) a step of sealing the first chip, the spacers, and the second chip, wherein a height of the upper faces of the spacers is identical to a height of an upper face of the first chip before the step (D) is performed.

Description

TECHNICAL FIELD

[0001] The present application relates to a semiconductor device, a manufacturing method thereof, and a structure used in the manufacturing of the semiconductor device. BACKGROUND

[0002] Conventionally, when connecting a semiconductor chip and a substrate, wire bonding has been widely used. Wire bonding is a method of connecting a semiconductor chip and a substrate using a metal fine wire such as gold wire. In order to cope with the requirements for high functionality, high integration, and high speed of semiconductor devices (hereinafter, referred to as "semiconductor packages"), a method called flip chip connection is being popularized. Flip chip connection is a method of directly connecting a semiconductor chip and a substrate by forming a conductive protrusion called a bump on the semiconductor chip or the substrate.

[0003] As described above, semiconductor packages are required to be thin and small in addition to high functionality. As semiconductor packages that are required to be further small, thin, and high-functional, chip stack type packages, Package On Package (POP), Through Silicon Via (TSV), and the like are also beginning to be popularized. Since chips are arranged in a three-dimensional shape rather than a planar shape, these semiconductor packages can reduce the size. For example, Patent Literature 1 discloses a semiconductor device of a method in which a first semiconductor element (for example, a controller) is buried in an adhesive film for adhering a second semiconductor element.

[0004] PRIOR ART DOCUMENTS

[0005] PATENT LITERATURE

[0006] Patent Literature 1: Japanese Patent Application Publication No. 2015-120836 SUMMARY

[0007] PROBLEMS TO BE SOLVED BY THE INVENTION

[0008] According to the research by the present inventors and the like, the semiconductor device as described in Patent Literature 1 has a problem that a void is easily generated when a first chip on a substrate is buried in an adhesive film. Also, in order to suppress the generation of a void, if a relatively soft adhesive film having excellent fluidity is used, the position of a second chip adhered via the adhesive film is shifted or strained, and it becomes difficult to further stack a plurality of chips on this basis. In addition to this, it is necessary to use an adhesive film having a sufficient thickness that can bury a first chip, and thus it is possible that the semiconductor package becomes thick.

[0009] The present inventors have studied a structure in which, instead of embedding the first chip in the adhesive film, a space is formed by arranging spacers around the position where the first chip is arranged, and after the first chip is arranged in the space, the space is filled with a sealing material. As a result, it has been found that, when filling the space with the sealing material, if there is a difference between the height of the upper surface of the spacer and the height of the upper surface of the first chip, filling with the sealing material becomes difficult.

[0010] The present application provides a manufacturing method of a semiconductor device having a structure in which a first chip is mounted on a substrate and a second chip is arranged above the first chip, which can suppress the semiconductor device from becoming too thick, while easily performing the manufacturing method of the work of sealing the first chip and the second chip with a sealing material. Also, the present application provides a semiconductor device that is not too thick and has excellent filling properties of a sealing material, and a structure used in the manufacturing of the semiconductor device.

[0011] Means for solving the technical problem

[0012] The manufacturing method of a semiconductor device according to the present application includes: (A) a step of preparing a structure having a substrate, a first chip arranged on the substrate, and a plurality of spacers arranged around the first chip on the substrate; (B) a step of preparing a chip with an adhesive sheet having a second chip having a size larger than the first chip, and an adhesive sheet provided on one face of the second chip; (C) a step of arranging the second chip above the first chip in such a manner that the adhesive sheet of the chip with an adhesive sheet contacts the upper surfaces of the plurality of spacers; and (D) a step of sealing the first chip, the spacers, and the second chip, wherein, before the step (D) is performed, the height of the upper surfaces of the spacers is identical to the height of the upper surface of the first chip. Note that, in this context, "identical" means that the difference between the height of the upper surfaces of the spacers and the height of the upper surface of the first chip is less than 10 μm.

[0013] The fact that the height of the upper surfaces of the spacers is identical to the height of the upper surface of the first chip before the step (D) is performed means that the adhesive sheet of the chip with an adhesive sheet arranged in the step (C) also contacts the upper surface of the first chip. If the upper surface of the first chip does not contact the adhesive sheet, but there is a gap between the two, it is difficult to fill the sealing material in the gap, and voids are likely to occur. On the other hand, if the gap between the upper surface of the first chip and the adhesive sheet is sufficiently enlarged, although the filling properties of the sealing material improve, the semiconductor device is likely to become thick. In contrast, according to the manufacturing method of the present application, both excellent filling properties of the sealing material and thinness of the semiconductor device can be achieved.

[0014] In the manufacturing method of the present application, it is only necessary that the height of the upper surface of the spacer be made to coincide with the height of the upper surface of the first chip before the (D) step is performed. For example, in the structure prepared in the (A) step, the height of the upper surface of the spacer can be made to coincide with the height of the upper surface of the first chip, or, in the structure prepared in the (A) step, the upper surface of the spacer can be made to be higher than the upper surface of the first chip, and in the subsequent (C) step, the height of the upper surface of the spacer can be adjusted by flattening the spacer with the chip with the adhesive sheet.

[0015] One embodiment of the above-described spacer is a dummy chip provided with a chip and an adhesive sheet provided on one face of the chip. As described above, in the case where the height of the spacer is adjusted by flattening the spacer with the chip with the adhesive sheet in the (C) step, it is preferable that the adhesive sheet provided in the dummy chip be softer than the adhesive sheet provided in the chip with the adhesive sheet. Further, it is preferable that the adhesive sheet provided in the dummy chip be thicker than the adhesive sheet provided in the chip with the adhesive sheet.

[0016] From the viewpoint of the high speed of the semiconductor device, it is preferable that the first chip be mounted on the substrate by flip-chip connection. In the case where the first chip is mounted on the substrate by flip-chip connection, the height of the connection portion is likely to be deviated, and as a result, the height position of the upper surface of the first chip is likely to be deviated, as compared with the case where the first chip is adhered to the substrate using an adhesive film. Therefore, in the case where the first chip is mounted by flip-chip connection, it is preferable that a structure in which the upper surface of the spacer is higher than the upper surface of the first chip be prepared in the (A) step, so that the height of the spacer can be adjusted by flattening the spacer with the chip with the adhesive sheet in the (C) step.

[0017] The semiconductor device according to the present application is provided with: a substrate; a first chip disposed on the substrate; a plurality of spacers disposed on the substrate and disposed around the first chip; a second chip disposed above the first chip and having a size larger than that of the first chip; an adhesive sheet adhering the plurality of spacers and the second chip; and a sealing material sealing the first chip, the spacers, and the second chip, the adhesive sheet being in contact with the upper surface of the first chip. The first chip is, for example, a controller chip.

[0018] The above-described semiconductor device can be manufactured by the manufacturing method according to the present application. In the semiconductor device according to the present application, since the adhesive sheet is in contact with the upper surface of the first chip, the sealing material is not excessively thick and has excellent filling properties.

[0019] The present application provides a structure used in the production of the above semiconductor device. The structure of the first aspect includes a substrate, a first chip disposed on the substrate, and a plurality of spacers disposed on the substrate and around the first chip, the upper surface of the spacers being at the same height as the upper surface of the first chip. The structure of the second aspect includes a substrate, a first chip disposed on the substrate, and a plurality of spacers disposed on the substrate and around the first chip, the upper surface of the spacers being higher than the upper surface of the first chip, the spacers including a material that is flattened so that the upper surface of the spacers is at the same height as the upper surface of the first chip.

[0020] The structure of the present application can also be of an aspect that further includes a second chip. The structure of this aspect includes a substrate, a first chip disposed on the substrate, a plurality of spacers disposed on the substrate and around the first chip, a second chip disposed above the first chip and having a larger size than the first chip, and an adhesive sheet that bonds the plurality of spacers to the second chip, the adhesive sheet being in contact with the upper surface of the first chip.

[0021] Effects of the Invention

[0022] According to the present application, there is provided a production method of a semiconductor device of a structure in which a first chip is mounted on a substrate and a second chip is disposed above the first chip, which can suppress the semiconductor device from becoming too thick, while enabling easy implementation of a production method of a work of sealing the first chip and the second chip with a sealing material. Also, according to the present application, there is provided a semiconductor device that is not too thick and has excellent filling properties of a sealing material, and a structure used in the production of the semiconductor device. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 FIG. 1 is a cross-sectional view schematically showing a first embodiment of a semiconductor device according to the present application.

[0024] Figure 2 (a) and Figure 2 (b) are plan views schematically showing examples of the positional relationship of a first chip and a plurality of dummy chips.

[0025] Figure 3 (a) to Figure 3 (e) are cross-sectional views schematically showing an example of the process of producing a dummy chip.

[0026] Figure 4 FIG. 6 is a cross-sectional view schematically showing a first embodiment of a structure used in the production of a semiconductor device according to the present application.

[0027] Figure 5 FIG. 7 is a cross-sectional view schematically showing an example of a chip with an adhesive sheet.

[0028] Figure 6 is a cross-sectional view schematically showing a state of a chip with an adhesive sheet Figure 4 is a cross-sectional view schematically showing a state of a chip with an adhesive sheet Figure 5 is a cross-sectional view schematically showing a state of a chip with an adhesive sheet.

[0029] Figure 7 is a cross-sectional view schematically showing another embodiment of a structure used in the production of a semiconductor device to which the present application is applied.

[0030] Figure 8 is a cross-sectional view schematically showing a state of a chip with an adhesive sheet Figure 7 is a cross-sectional view schematically showing a state of a chip with an adhesive sheet Figure 5 is a cross-sectional view schematically showing a state of a chip with an adhesive sheet. DETAILED DESCRIPTION

[0031] Hereinafter, embodiments of the present application will be described with appropriate reference to the drawings. In the following description, the same or corresponding portions are designated by the same symbols, and overlapping description will be omitted. Also, the positional relationship of up, down, left, right, and the like is based on the positional relationship shown in the drawings unless otherwise specified. Furthermore, the dimensional ratios of the drawings are not limited to the ratios shown in the drawings. In addition, "(meth)acrylic acid" in the present specification means "acrylic acid" or "methacrylic acid" corresponding thereto.

[0032] <First Embodiment>

[0033] (Semiconductor device)

[0034] Figure 1 is a cross-sectional view schematically showing a semiconductor device to which the present embodiment is applied. The semiconductor device 100 shown in the figure is provided with a substrate 10, a chip S1 (first chip) disposed on the surface of the substrate 10, two dummy chips D (spacers) disposed on the surface of the substrate 10 and around the chip S1, a chip S2 (second chip) disposed above the chip S1, a chip S3 laminated on the chip S2, a chip S4, wires w electrically connecting electrodes (not shown) on the surface of the substrate 10 and the chip S2, the chip S3, and the chip S4, respectively, and a sealing material 50 sealing the chip S1, the chip S2, the chip S3, the chip S4, the dummy chips D, and the wires w. A cured product Sc of an adhesive sheet is disposed between the upper surface of the chip S1 and the upper surfaces of the plurality of dummy chips D and the chip S2. In the semiconductor device 100, the height of the upper surface of the chip S1 coincides with the height of the upper surfaces of the dummy chips D. That is, the cured product Sc is in contact with the upper surface of the chip S1 and the upper surfaces of the dummy chips D.

[0035] The substrate 10 can be an organic substrate or a metal substrate such as a lead frame. The thickness of the substrate 10 is, for example, 90 μm to 300 μm, or 90 μm to 210 μm, from the viewpoint of suppressing warping of the semiconductor device 100.

[0036] The chip S1 is, for example, a controller chip and is mounted on the substrate 10 by flip-chip connection. The shape of the chip S1 in plan view is, for example, rectangular (square or oblong). The length of one side of the chip S1 is, for example, 5 mm or less, or 2 mm to 5 mm or 1 mm to 5 mm. The thickness of the chip S1 is, for example, 10 μm to 150 μm, or 20 μm to 100 μm.

[0037] The chip S2 is, for example, a memory chip and is bonded to the chip S1 and the dummy chip D via the cured product Sc of the adhesive sheet. The chip S2 has a larger size than the chip S1 when viewed in plan view. The shape of the chip S2 in plan view is, for example, rectangular (square or oblong). The length of one side of the chip S2 is, for example, 20 mm or less, or 4 mm to 20 mm or 4 mm to 12 mm. The thickness of the chip S2 is, for example, 10 μm to 170 μm, or 20 μm to 120 μm. In addition, the chips S3 and S4 are also, for example, memory chips and are bonded to the chip S2 via the cured product Sc of the adhesive sheet. The length of one side of the chips S3 and S4 can be the same as that of the chip S2, and the thickness of the chips S3 and S4 can also be the same as that of the chip S2.

[0038] The dummy chip D functions as a spacer that forms a space around the chip S1. The dummy chip D is composed of a chip D1 and an adhesive sheet Da provided on one face of the chip D1. As shown in Figure 2 (a), two dummy chips D (shape: oblong) can be disposed at positions away from both sides of the chip S1, or as shown in Figure 2 (b), one dummy chip D (shape: square, total four) can be disposed at a position corresponding to each corner of the chip S1. The length of one side of the chip D1 in plan view is, for example, 20 mm or less, or 1 mm to 20 mm or 1 mm to 12 mm. The thickness of the chip D1 is, for example, 30 μm to 150 μm, or 80 μm to 120 μm.

[0039] As described above, the height of the upper face of the dummy chip D coincides with the height of the upper face of the chip S1. For example, by adjusting the thickness of the adhesive sheet Da, the position of the upper face of the chip S1 in flip-chip connection can be made to coincide with the position of the upper face of the dummy chip D.

[0040] Reference Figure 3 (a) to Figure 3(e), which illustrates an example of a method for manufacturing dummy chips D as chips with adhesive sheets. First, a dicing die bonding integrated film 8 (hereinafter referred to as "film 8") is prepared and disposed in a prescribed device (not shown). The film 8 successively has a base film 1, a pressure sensitive adhesive layer 2, and an adhesive layer 3A. The base film 1 is, for example, a polyethylene terephthalate film (PET film). The pressure sensitive adhesive layer 2 has a property of reducing adhesiveness by ultraviolet irradiation. The adhesive layer 3A contains a thermosetting resin composition.

[0041] As shown in Figure 3 (a) and Figure 3 (b), the film 8 is attached so as to contact the adhesive layer 3A with one face of a wafer W. The wafer W can be single-crystal silicon, or a compound semiconductor such as polycrystal silicon, various ceramics, gallium arsenide, or the like. In addition, the wafer W need not be a semiconductor when manufacturing the dummy chips D, and can be, for example, a glass substrate.

[0042] The wafer W and the adhesive layer 3A are cut by a dicing blade (refer to Figure 3 (c)). The wafer W is singulated by the cutting to become chips D1. The adhesive layer 3A is singulated by the cutting to become adhesive sheets Da. Thereafter, as shown in Figure 3 (d), the pressure sensitive adhesive layer 2 is irradiated with ultraviolet rays, whereby the adhesion between the pressure sensitive adhesive layer 2 and the adhesive layer 3A is reduced. After the ultraviolet irradiation, as shown in Figure 3 (e), the dummy chips D are separated from each other by expanding the base film 1. The dummy chips D are peeled from the pressure sensitive adhesive layer 2 by pushing the dummy chips D upward with a needle 42, and are picked up by suction with a suction gripper 44.

[0043] (Method for manufacturing semiconductor device)

[0044] A method for manufacturing a semiconductor device 100 will be described with reference to Figure 4 to Figure 6 . The method for manufacturing the semiconductor device 100 includes the following (A) to (D) processes.

[0045] (A) is a process of preparing a structure body 30A that has a substrate 10, chips S1 disposed on the substrate 10, and a plurality of dummy chips D disposed on the substrate 10 and around the chips S1 (refer to Figure 4 ).

[0046] (B) is a process of preparing chips S2a with adhesive sheets that have chips S2 and adhesive sheets Sa provided on one face of the chips S2 (refer to Figure 5 ).

[0047] (C) The process of placing chip S2 on top of chip S1 by means of adhesive sheet Sa contacting the upper surfaces of multiple dummy chips D and the upper surface of chip S1 (refer to) Figure 6 ).

[0048] (D) The process of sealing chips S1, S2, S3, S4 and dummy chip D, etc.

[0049] [(A) Process]

[0050] (A) The process is preparation Figure 4 The process of the structure 30A shown is as follows. The structure 30A includes a substrate 10, a chip S1 disposed on the surface of the substrate 10, and a plurality of dummy chips D. The height of the upper surface of the chip S1 is the same as the height of the upper surface of the dummy chips D. For example, the chip S1 is first mounted on a predetermined position on the substrate 10 by flip-chip bonding, and then the dummy chips D are pressed into the predetermined position. This pressing process is preferably performed for 0.5 seconds to 3.0 seconds at 80°C to 180°C and 0.01MPa to 0.50MPa. The height of the upper surface of the dummy chip D can be adjusted by adjusting the pressing pressure applied to the dummy chip D. The adhesive sheet Da of the dummy chip D can be fully cured during process (A), or it can be partially cured at this time and fully cured during process (C).

[0051] [(B) Process]

[0052] (B) The process is preparation. Figure 5 The process of the chip S2a with adhesive sheet shown is illustrated. The chip S2a with adhesive sheet includes a chip S2 and an adhesive sheet Sa disposed on one surface of the chip S2. The chip S2a with adhesive sheet can be obtained, for example, using a dicing / die-bonding monolithic film via a dicing process (see reference). Figure 3 (a)~ Figure 3 (e)).

[0053] [(C) Process]

[0054] (C) Step is a step of disposing the chip S2a with the adhesive sheet in the upper side of the chip S1 in a manner that the adhesive sheet Sa contacts the upper surface of the dummy chip D and the upper surface of the chip S1. Specifically, the chip S2 is pressure-bonded to the upper surface of the dummy chip D and the upper surface of the chip S1 via the adhesive sheet Sa. This pressure-bonding process is preferably performed at 80°C to 180°C, 0.01 MPa to 0.50 MPa for 0.5 seconds to 3.0 seconds, for example. Subsequently, the adhesive sheet Sa is cured by heating. This curing process is preferably performed at 60°C to 175°C, 0.01 MPa to 1.0 MPa for 5 minutes or more, for example. Thus, the adhesive sheet Sa becomes the cured product Sc.

[0055] In the structure 30A according to the present embodiment, as described above, the height of the upper surface of the chip S1 coincides with the height of the upper surface of the dummy chip D. Therefore, the adhesive sheet Sa contacts both the upper surface of the dummy chip D and the upper surface of the chip S1. Figure 6 is a schematic cross-sectional view of a structure obtained via the (C) step. The structure 40 shown in the drawing can achieve excellent filling of the sealing material in the (D) step because there is no gap between the cured product Sc and the chip S1.

[0056] After the (C) step and before the (D) step, the chip S3 is disposed on the chip S2 via an adhesive sheet, and further, the chip S4 is disposed on the chip S3 via an adhesive sheet. The adhesive sheet is a thermosetting resin composition identical to the adhesive sheet Sa described above, and becomes a cured product Sc (see FIG. 1) by curing with heating. Figure 1 Thereafter, the chip S2, the chip S3, and the chip S4 are electrically connected to the substrate 10 by wires w, respectively. The number of chips stacked in the upper side of the chip S1 is not limited to three in the present embodiment, but can be appropriately set.

[0057] [(D) Step]

[0058] The (D) step is a step of sealing the chip S1, the chip S2, the chip S3, the chip S4, the dummy chip D, and the wires w with the sealing material 50. Through this step, Figure 1 the semiconductor device 100 shown in FIG. 1 is completed.

[0059] (Thermosetting Resin Composition)

[0060] The thermosetting resin composition constituting the adhesive sheet Da and the adhesive sheet Sa is described. The thermosetting resin composition according to the present embodiment passes through a semi-cured (B-stage) state, and can become a fully cured product (C-stage) state by a subsequent curing process. The thermosetting resin composition contains an epoxy resin, a curing agent, and an elastomer, and can include an inorganic filler and a curing accelerator, as needed.

[0061] [epoxy resin]

[0062] As the epoxy resin, there is no particular limitation as long as it is a resin having a curing action for curing. A difunctional epoxy resin such as a bisphenol A type epoxy resin, a bisphenol F type epoxy resin, a bisphenol S type epoxy resin, a novolak type epoxy resin such as a phenol novolak type epoxy resin, a cresol novolak type epoxy resin, and the like can be used. Also, a generally known resin such as a multifunctional epoxy resin, a glycidyl amine type epoxy resin, a heterocycle-containing epoxy resin, or an alicyclic epoxy resin can be used. These can be used singly or two or more kinds can be used at the same time.

[0063] [curing agent]

[0064] As the curing agent, for example, a phenol resin, an ester compound, an aromatic amine, an aliphatic amine, and an acid anhydride can be listed. Among these, from the viewpoints of reactivity and stability over time, a phenol resin is preferred. As commercially available products of the phenol resin, for example, Phenolite KA and TD series manufactured by DIC Corporation, Milex XLC-series and XL series (for example, Milex XLC-LL) manufactured by Mitsui Chemicals, Inc., HE series (for example, HE100C-30) manufactured by AIR WATER INC., and MEHC-7800 series (for example, MEHC-7800-4S) manufactured by MEIWA PLASTIC INDUSTRIES, LTD. can be listed. These can be used singly or two or more kinds can be used at the same time.

[0065] As the mixing amount of the epoxy resin and the phenol resin, from the viewpoint of curability, the equivalent ratio of the epoxy equivalent and the hydroxyl equivalent is preferably 0.30 / 0.70 to 0.70 / 0.30, more preferably 0.35 / 0.65 to 0.65 / 0.35, further preferably 0.40 / 0.60 to 0.60 / 0.40, and particularly preferably 0.45 / 0.55 to 0.55 / 0.45. By making the mixing ratio within the above range, it is easy to achieve both curability and fluidity at a sufficiently high level.

[0066] [elastomer]

[0067] As the elastomer, for example, an acrylic resin, a polyester resin, a polyamide resin, a polyimide resin, a silicone resin, polybutadiene, acrylonitrile, an epoxy-modified polybutadiene, a maleic anhydride-modified polybutadiene, a phenol-modified polybutadiene, and a carboxyl-modified acrylonitrile can be listed.

[0068] From the viewpoints of solubility in a solvent and fluidity, the elastomer is preferably an acrylic resin, and further, more preferably an epoxy group-containing (meth)acrylic copolymer or the like obtained by polymerizing a functional monomer having an epoxy group or a glycidyl group as a crosslinkable functional group such as glycidyl acrylate or glycidyl methacrylate. Among the acrylic resins, an epoxy group-containing (meth)acrylic ester copolymer and an epoxy group-containing acrylic rubber are preferred, and an epoxy group-containing acrylic rubber is more preferred. The epoxy group-containing acrylic rubber is a rubber having an epoxy group, which is mainly composed of a copolymer of butyl acrylate and acrylonitrile or the like, a copolymer of ethyl acrylate and acrylonitrile or the like, with an acrylic ester as a main component. In addition, the acrylic resin can have not only an epoxy group but also an alcoholic or phenolic hydroxyl group, a carboxyl group, or the like as a crosslinkable functional group.

[0069] As commercially available products of the acrylic resin, SG-70L, SG-708-6, WS-023EK30, SG-280EK23, SG-P3 solvent-modified product (trade name, acrylic rubber, weight average molecular weight: 800,000, Tg: 12°C, solvent: cyclohexanone), and the like manufactured by Nagase Chemtex Corporation. can be given.

[0070] The glass transition temperature (Tg) of the acrylic resin is preferably -50°C to 50°C, and more preferably -30°C to 30°C. The weight average molecular weight (Mw) of the acrylic resin is preferably 1,000,000 to 30,000,000, and more preferably 5,000,000 to 20,000,000. By blending the acrylic resin having the Mw in the range in the thermosetting resin composition, it is easy to form the thermosetting resin composition into a film shape, and it is easy to appropriately control the strength, flexibility, and adhesiveness under the film shape. In addition to this, both the reflow property and the burying property can be improved. Here, the Mw refers to a value obtained by measuring by gel permeation chromatography (GPC) and converting using a standard curve based on a standard polystyrene. In addition, by using an acrylic resin having a narrow molecular weight distribution, it is possible to form an adhesive sheet having an excellent burying property and high elasticity.

[0071] The amount of the acrylic resin contained in the thermosetting resin composition is preferably 20 parts by mass to 200 parts by mass, and more preferably 30 parts by mass to 100 parts by mass, relative to 100 parts by mass of the total of the epoxy resin and the epoxy resin curing agent. If it is in this range, the fluidity control at the time of molding, the handling property at high temperature, and the burying property can be made better.

[0072] [Inorganic Filler]

[0073] As the inorganic filler, for example, aluminum hydroxide, magnesium hydroxide, calcium carbonate, magnesium carbonate, calcium silicate, magnesium silicate, calcium oxide, magnesium oxide, aluminum oxide, aluminum nitride, aluminum borate whisker, boron nitride, and crystalline silica, amorphous silica can be exemplified. These can be used singly or two or more kinds can be used simultaneously.

[0074] From the viewpoint of improving adhesion, the average particle diameter of the inorganic filler is preferably 0.005 μm to 1.0 μm, more preferably 0.05 μm to 0.5 μm. From the viewpoint of the compatibility of the solvent and the resin component and the adhesion strength, the surface of the inorganic filler is preferably chemically modified. As a material suitable for chemically modifying the surface, a silane coupling agent can be exemplified. As the kind of functional group of the silane coupling agent, for example, vinyl group, acryloyl group, epoxy group, mercapto group, amino group, diamino group, alkoxy group, ethoxy group can be exemplified.

[0075] From the viewpoint of controlling the flowability and the breaking property of the thermosetting resin composition, and the tensile elastic modulus and the adhesion force after curing, the content of the inorganic filler is preferably 20 parts by mass to 200 parts by mass, more preferably 30 parts by mass to 100 parts by mass, relative to 100 parts by mass of the resin component of the thermosetting resin composition.

[0076] [Curing Accelerator]

[0077] As the curing accelerator, for example, imidazole and its derivatives, organophosphorus compounds, secondary amines, tertiary amines, quaternary ammonium salts, and the like can be exemplified. From the viewpoint of moderate reactivity, an imidazole compound is preferred. As the imidazole, 2-methylimidazole, 1-benzyl-2-methylimidazole, 1-cyanoethyl-2-phenylimidazole, 1-cyanoethyl-2-methylimidazole, and the like can be exemplified. These can be used singly or two or more kinds can be used simultaneously.

[0078] The content of the curing accelerator of the thermosetting resin composition is preferably 0.04 parts by mass to 3 parts by mass, more preferably 0.04 parts by mass to 0.2 parts by mass, relative to 100 parts by mass of the total of the epoxy resin and the epoxy resin curing agent. If the addition amount of the curing accelerator is within this range, both the curability and the reliability can be taken into account.

[0079] <Second Embodiment>

[0080] In the above-described first embodiment, a mode in which the structure 30A in which the height of the upper surface of the dummy chip D is made to coincide with the height of the upper surface of the chip S1 is prepared in the (A) process is exemplified, but a structure in which the upper surface of the dummy chip D is higher than the upper surface of the chip S1 can also be prepared in the (A) process. Figure 7The structure 30B shown has the substrate 10, the chip S1 disposed on the substrate 10, and a plurality of dummy chips D disposed on the substrate 10 and around the chip S1, the upper surface of the dummy chips D being higher than the upper surface of the chip S1.

[0081] In the (D) process (the process of sealing with the sealing material 50) of the first embodiment, it is sufficient to make the height of the upper surface of the dummy chip D coincide with the height of the upper surface of the chip S1, and it is also possible to make the height of the dummy chip D coincide with the height of the upper surface of the chip S1 in the (C) process by crushing the adhesive sheet Da of the dummy chip D with the adhesive sheet-equipped chip S2a (refer to FIG. 6). Figure 8 When the chip S1 is mounted on the substrate 10 by flip-chip connection, the height of the connection portion of the flip-chip tends to deviate by about 5 μm, and as a result, the height position of the upper surface of the chip S1 deviates by about 5 μm. The position of the upper surface of the dummy chip D is set to be about 8 μm to 12 μm higher than the set position of the upper surface of the chip S1 after connection, taking this deviation into account, and thus it is not necessary to strictly make the height of the upper surface of the dummy chip D coincide with the height of the upper surface of the chip S1 in the (A) process.

[0082] In the present embodiment, the adhesive sheet Da of the dummy chip D contains a material that is crushed by the adhesive sheet-equipped chip Sa2. Specifically, it is preferable that the adhesive sheet Da of the dummy chip D be softer than the adhesive sheet Sa of the adhesive sheet-equipped chip S2a. As a method of making the adhesive sheet Da softer than the adhesive sheet Sa, for example, it is possible to cite making the content of thermosetting resin of the adhesive sheet Da larger than that of the adhesive sheet Sa, or making the content of elastomer or inorganic filler of the adhesive sheet Da smaller than that of the adhesive sheet Sa.

[0083] It is preferable that the adhesive sheet Da of the dummy chip D be thicker than the adhesive sheet Sa of the adhesive sheet-equipped chip S2a. In the present embodiment, for example, the thickness of the adhesive sheet Da is 1.1 to 8 times, or 1.2 to 6 times the thickness of the adhesive sheet Sa.

[0084] The above describes the embodiments of the present application in detail, but the present application is not limited to the above-described embodiments. For example, in the above-described embodiments, a case where the chip S1 is mounted by flip-chip connection is exemplified, but it is also possible to perform electrical connection by wire bonding after the chip S1 is fixed to the substrate 10 with an adhesive.

[0085] The present application is described in detail below through examples, but the present application is not limited to these examples.

[0086] <Manufacture of Adhesive Sheet>

[0087] Using the components shown in Table 1, clear varnish A and clear varnish B of the adhesive composition were prepared in the following order. First, after the [epoxy resin], [curing agent], and [filler] described below were mixed, cyclohexanone was added and stirred. Thereafter, the [elastomer], [curing accelerator], and [coupling agent] were added, and stirring was performed until the components became uniform, thereby obtaining the clear varnish of the adhesive composition.

[0088] [elastomer]

[0089] Acrylic rubber: Nagase Chemtex Corporation. manufactured product, trade name "HTR-860P-3", weight average molecular weight 800,000, glass transition point: 12°C

[0090] [epoxy resin]

[0091] Cresol novolak type epoxy resin: Tohto Kasei Co., Ltd. manufactured, trade name "YDCN-700-10", epoxy equivalent: 210

[0092] Bisphenol F type epoxy resin: DIC Corporation, trade name "EXA-830CRP", epoxy equivalent: 159

[0093] [curing agent]

[0094] Phenol resin: Mitsui Chemicals, Inc. manufactured, trade name "Milex XLC-LL", softening point: 75°C, hydroxyl equivalent 175

[0095] [filler]

[0096] Silica filler: NIPPON AEROSIL CO., LTD. manufactured, trade name "R972", average particle diameter 0.500 μm

[0097] Silica filler: Admatechs Company Limited manufactured, trade name "SC 2050-HLG", specific surface area 110 m / g

[0098] [curing accelerator]

[0099] 1-cyanoethyl-2-phenylimidazole Curezol: Shikoku Chemicals Corporation manufactured, trade name "2PZ-CN"

[0100] [coupling agent]

[0101] γ-mercaptopropyltrimethoxysilane: Nippon Unicar Company Limited manufactured, trade name "NUCA-189"

[0102] γ-ureidopropyltriethoxysilane: manufactured by Nippon Unicar Company Limited, trade name "NUCA-1160"

[0103] [Table 1]

[0104]

[0105] A varnish A was coated on a base film (a release-treated polyethylene terephthalate film, thickness: 38 μm). The base film was heated and dried at 140°C for 5 minutes on a hot plate, to produce an adhesive sheet Al (thickness: 20 μm) and an adhesive sheet A2 (thickness: 40 μm). An adhesive sheet B (thickness: 40 μm) was produced in the same manner as described above, except that a varnish B was used instead of the varnish A.

[0106] Measurement of melt viscosity of adhesive sheet

[0107] The melt viscosity of the adhesive sheet was measured using a rotational viscoelastometer (manufactured by TA Instruments Japan Inc., ARES-RDA) in the following order. First, after peeling the base film from the adhesive sheet, a plurality of adhesive layers were laminated at 70°C to obtain a laminated film having a thickness of 160 μm or more. The laminated film was punched into a circular shape having a diameter of 8 mm, and the sample for measurement was obtained by sandwiching it with two grips (diameter: 8 mm). The measurement was performed under the following conditions, and the value at 80°C was taken as the melt viscosity of the adhesive sheet. The melt viscosity of the adhesive sheet Al and the adhesive sheet A2 was 24,000 Pa-S, and the melt viscosity of the pressure sensitive adhesive sheet B was 2,000 Pa-S.

[0108] • Frequency: 1 Hz

[0109] • Measurement start temperature: 35°C

[0110] • Measurement end temperature: 150°C

[0111] • Temperature increase rate: 5°C / min

[0112] (Example 1)

[0113] The adhesive sheet A1 (thickness: 20 μm) was attached to a semiconductor wafer (thickness: 90 μm). The semiconductor wafer was singulated into 5.0 mm x 5.0 mm semiconductor chips using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The semiconductor chips were thermocompression-bonded to the organic substrates dried at 150°C for 1 hour using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.1 MPa / 1 second to obtain a substrate with semiconductor chips.

[0114] Next, the adhesive sheet B (thickness: 40 μm) was attached to a semiconductor wafer (thickness: 80 μm). The semiconductor wafer was singulated into 1.5 mm x 6.0 mm chips using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The chips were thermocompression-bonded to the organic substrates on both sides of the semiconductor chips at a space of 2 mm using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.1 MPa / 1 second as dummy chips.

[0115] Next, HR-900T-20-N50 (manufactured by Showa Denko Materials co., Ltd., thickness of adhesive layer: 20 μm) was attached to a semiconductor wafer (thickness: 50 μm) using a wafer mounter (DFM-2800 manufactured by DISCO CORPORATION) at 70°C / (10 mm / sec). Thereafter, the semiconductor wafer was singulated into 6.0 mm x 12.0 mm chips using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The chips were thermocompression-bonded to the semiconductor chips and two dummy chips using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 100°C to 120°C / 0.05 MPa to 0.20 MPa / 0.5 second to 2.0 second. Thereafter, the adhesive was cured by heating at 150°C for 1 hour under a 7 kg pressurized atmosphere. Thus, a structure having a substrate, two dummy chips, and two semiconductor chips was obtained.

[0116] (Comparative Example 1)

[0117] The adhesive sheet A1 (thickness: 20 μm) was attached to a semiconductor wafer (thickness: 90 μm). The semiconductor wafer was singulated into a 5.0 mm x 5.0 mm semiconductor wafer using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The semiconductor wafer was thermocompression-bonded to the organic substrate dried at 150°C for 1 hour using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.1 MPa / 1 second to obtain a substrate with a semiconductor chip.

[0118] Next, the adhesive sheet A2 (thickness: 40 μm) was attached to a semiconductor wafer (thickness: 90 μm). The semiconductor wafer was singulated into a 1.5 mm x 6.0 mm chip using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The chip was thermocompression-bonded to the organic substrates on both sides of the semiconductor chip spaced apart by 2 mm using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.1 MPa / 1 second as a dummy chip.

[0119] Next, HR-900T-20-N50 (manufactured by Showa Denko Materials co., Ltd., thickness of adhesive layer: 20 μm) was attached to a semiconductor wafer (thickness: 50 μm) at 70°C at a rate of 10 mm / second using a wafer mounter (DFM-2800 manufactured by DISCO CORPORATION). Thereafter, the semiconductor wafer was singulated into a 6.0 mm x 12.0 mm chip using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The semiconductor chip and two dummy chips were thermocompression-bonded using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.1 MPa / 1.0 second. Thereafter, the adhesive was cured by heating at 150°C for 1 hour under a 7 kg pressurized atmosphere. Thus, a structure having a substrate, two dummy chips, and two semiconductor chips was obtained.

[0120] (Comparative Example 2)

[0121] The adhesive sheet A1 (thickness: 20 μm) was attached to a semiconductor wafer (thickness: 90 μm). The semiconductor wafer was singulated into 5.0 mm x 5.0 mm semiconductor chips using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The semiconductor chips were thermocompression-bonded to the organic substrates dried at 150°C for 1 hour using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.1 MPa / 1 second to obtain a substrate with semiconductor chips.

[0122] Next, the adhesive sheet A1 (thickness: 20 μm) was attached to a semiconductor wafer (thickness: 110 μm). The semiconductor wafer was singulated into 1.5 mm x 6.0 mm chips using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The chips were thermocompression-bonded to the organic substrates on both sides of the semiconductor chips at a space of 2 mm using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.1 MPa / 1 second as dummy chips.

[0123] Next, HR-900T-20-N50 (manufactured by Showa Denko Materials co., Ltd., thickness of adhesive layer: 20 μm) was attached to a semiconductor wafer (thickness: 50 μm) at 70°C / (10 mm / sec) using a wafer mounter (DFM-2800 manufactured by DISCO CORPORATION). The semiconductor wafer was singulated into 6.0 mm x 12.0 mm chips using a dicer (DFD-6361 manufactured by DISCO CORPORATION). The semiconductor chips and two dummy chips were thermocompression-bonded using a flexible die bonder (DB-830HSD manufactured by Hitachi High Tech Corporation.) under the conditions of 120°C / 0.10 MPa / 1.0 second. Thereafter, the adhesive was cured by heating at 150°C for 1 hour under a 7 kg pressurized atmosphere. Thus, a structure having a substrate, two dummy chips, and two semiconductor chips was obtained.

[0124] (Production and evaluation of semiconductor packages)

[0125] A sealing material (trade name: CEL-9750ZHF) manufactured by Showa Denko Materials co., Ltd. was molded on the above structure of the examples and comparative examples under the conditions of 175°C / 6.75 MPa / 120 seconds, and a curing treatment was performed at 175°C for 5 hours to obtain semiconductor packages. The inside of the semiconductor packages was observed for peeling and voids by an ultrasonic diagnostic imaging system (Insigh-300, Scanning Acoustic Microscope (SAM), manufactured by INSIGHT inc.). Furthermore, the obtained semiconductor packages were subjected to cross-sectional observation, and the heights of the semiconductor chips and dummy chips were confirmed.

[0126] The semiconductor packages had no peeling and voids inside, and were determined to be "A". The semiconductor packages having peeling and voids were determined to be "B". Furthermore, the semiconductor packages in which the difference between the height of the upper surface of the semiconductor chip and the height of the upper surface of the dummy chip was less than 10 μm were determined to be "A", and the semiconductor packages in which the difference was 10 μm or more were determined to be "B". The results are shown in Table 2.

[0127] [Table 2]

[0128] Example 1 Comparative Example 2 Comparative Example 3 Presence or absence of peeling and voids inside semiconductor package A B B Difference in height between top surface of semiconductor chip and top surface of dummy chip A B B

[0129] Industrial Applicability

[0130] According to the present application, there is provided a manufacturing method of a semiconductor device having a structure in which a first chip is mounted on a substrate and a second chip is disposed above the first chip, which can suppress the semiconductor device from becoming excessively thick, and can easily perform a manufacturing method of a work of sealing the first chip and the second chip with a sealing material. Furthermore, according to the present application, there is provided a semiconductor device which is not excessively thick and has excellent filling properties of a sealing material, and a structure used in the manufacturing of the semiconductor device.

[0131] Explanation of Symbols

[0132] 10 - substrate film, 30A, 30B, 40 - structure, 50 - sealing material, 100 - semiconductor device, D - dummy chip (spacer), D1 - chip, Da - adhesive sheet, S1 - first chip, S2 - second chip, S2a - chip with adhesive sheet, Sa - adhesive sheet, Sc - cured product (adhesive sheet).

Claims

1. A method for manufacturing a semiconductor device, comprising: (A) a step of preparing a structure body including a substrate, a first chip disposed on the substrate, and a plurality of spacers disposed on the substrate and around the first chip; (B) a step of preparing an adhesive sheet-equipped chip including a second chip having a size larger than the first chip, and an adhesive sheet provided on one face of the second chip; (C) a step of disposing the second chip above the first chip in a manner that the adhesive sheet contacts upper surfaces of the plurality of spacers; and (D) a step of sealing the first chip, the spacers, and the second chip, the height of the upper surfaces of the spacers coincides with the height of the upper surface of the first chip before the step (D) is performed, in the structure body prepared in the step (A), the upper surfaces of the spacers are higher than the upper surface of the first chip, in the step (C), the height of the spacers is made to coincide with the height of the upper surface of the first chip by flattening the spacers with the adhesive sheet-equipped chip, the spacers are dummy chips including a chip, and an adhesive sheet provided on one face of the chip, the adhesive sheet included in the dummy chip is softer than the adhesive sheet included in the adhesive sheet-equipped chip.

2. The method for manufacturing a semiconductor device according to claim 1, wherein the adhesive sheet included in the dummy chip is thicker than the adhesive sheet included in the adhesive sheet-equipped chip.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the first chip is mounted on the substrate by flip-chip connection.

4. A semiconductor device manufactured by the method for manufacturing a semiconductor device according to any one of claims 1 to 3.

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