Electronic device comprising a light source and a ToF sensor, and a LIDAR system

Abstract

Electronic devices including a light source and a time-of-flight sensor, and light detection and ranging systems are provided. The electronic devices include a time-of-flight (ToF) sensor including a pixel array, a light source that emits a light signal, and an optical device that projects the light signal to regions of an object that respectively correspond to a plurality of pixel blocks of pixels including the pixel array. Each pixel includes a plurality of taps, each tap including a phototransistor, a first transfer transistor connected to the phototransistor, a storage element connected to the first transfer transistor, a second transfer transistor connected to the storage element, a floating diffusion region connected to the second transfer transistor, and a readout circuit connected to the floating diffusion region. An overflow transistor is disposed adjacent to the phototransistor and connected to a power supply voltage.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of priority to Korean Patent Application No. 10-2019-0176379, filed on December 27, 2019, with the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] The present invention relates to electronic devices including a light source and a time-of-flight (ToF) sensor, and to a LIDAR system. Background Technology

[0004] Currently, light detection and ranging (LIDAR) (also known as Lidar, LiDAR, or LADAR) is used in various fields, such as autonomous driving, security, sensors, and surveillance. The electronics implementing a LIDAR system may include a time-of-flight (ToF) sensor, whereby a light source emits a light signal towards an object, and the light signal is reflected from the object. The ToF sensor calculates the distance between the depth sensor and the object by measuring the arrival time of the light signal emitted from the light source and then reflected from the object. Because the electronics, including both the light source and the ToF sensor, have limited power, the distance that a LIDAR system can sense may be limited. Summary of the Invention

[0005] The present invention relates to electronic devices including light sources and ToF sensors, as well as LIDAR systems.

[0006] An embodiment of the present invention provides an electronic device comprising: a time-of-flight (ToF) sensor including a pixel array; a light source configured to emit an optical signal; and an optical device configured to project the optical signal onto a region of an object, the region corresponding to a plurality of pixel blocks including pixels of the pixel array. Each pixel includes: a plurality of taps, each tap including a phototransistor, a first transmission transistor connected to the phototransistor, a storage element connected to the first transmission transistor, a second transmission transistor connected to the storage element, a floating diffusion region connected to the second transmission transistor, and a readout circuit connected to the floating diffusion region; and an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage, the overflow transistor being configured to remove charge from the phototransistor.

[0007] Embodiments of the inventive concept also provide an electronic device comprising: a time-of-flight (ToF) sensor comprising a pixel array; a light source configured to emit a first light signal and a second light signal; and an optical arrangement configured to project the first light signal to a first region of an object corresponding to a first block of pixels of the pixel array and to project the second light signal to a second region of the object corresponding to a second block of pixels of the pixel array. Pixels of the first block of pixels are arranged along a first direction, pixels of the second block of pixels are arranged along the first direction, and the first block of pixels and the second block of pixels are arranged along a second direction. Each pixel comprises: a plurality of taps, each tap comprising a phototransistor, a first transfer transistor connected to the phototransistor, a storage element connected to the first transfer transistor, a second transfer transistor connected to the storage element, a floating diffusion connected to the second transistor, and a readout circuit connected to the floating diffusion; and an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage, the overflow transistor configured to remove charge from the phototransistor.

[0008] Embodiments of the inventive concept also provide a light detection and ranging (LIDAR) system comprising: a light source configured to emit a light signal; an optical arrangement configured to control a projection direction of the light signal and to scan an object with the light signal having a controlled projection direction; a time-of-flight (ToF) sensor comprising a pixel array comprising a plurality of blocks of pixels, the plurality of blocks of pixels demodulating the light signal reflected from the object based on a direction of the scanning. Each of the pixels of the plurality of blocks of pixels comprises: a plurality of taps, each tap comprising a phototransistor, a first transfer transistor connected to the phototransistor, a storage element connected to the first transfer transistor, a second transfer transistor connected to the storage element, a floating diffusion connected to the second transfer transistor, and a readout circuit connected to the floating diffusion; and an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage, the overflow transistor configured to remove charge from the phototransistor.

[0009] Embodiments of the inventive concept also provide an electronic device including a time-of-flight (ToF) sensor including a pixel array, a light source configured to emit a light signal, and an optical device configured to project the light signal to a region of an object, the region corresponding to a plurality of pixel blocks including pixels of the pixel array, respectively. Each of the pixels includes a plurality of taps each including a phototransistor, a floating diffusion region, and a readout circuit connected to the floating diffusion region, and an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage, the overflow transistor configured to remove charge from the phototransistor. The ToF sensor includes a first driver disposed from the pixel array in a first direction and configured to control the overflow transistor, and a second driver disposed from the pixel array in a second direction and configured to control a readout operation of the readout circuit.

[0010] Embodiments of the inventive concept also provide an electronic device including a light source configured to emit a light signal, and a semiconductor package module including a first semiconductor chip and a second semiconductor chip mounted below the first semiconductor chip. The first semiconductor chip includes a time-of-flight (ToF) sensor including a pixel array. Each pixel of the pixel array includes a plurality of taps each including a phototransistor, a first transfer transistor connected to the phototransistor, a storage element connected to the first transfer transistor, a second transfer transistor connected to the storage element, a floating diffusion region connected to the second transfer transistor, a readout circuit connected to the floating diffusion region, and an overflow transistor disposed adjacent to the phototransistor and connected to a power supply voltage. The second semiconductor chip includes a first driver configured to control the overflow transistor to remove charge from the phototransistor, and a second driver configured to control a readout operation of the readout circuit. The electronic device also includes an optical device configured to project the light signal to a region of an object, the region corresponding to a plurality of pixel blocks of the pixel array, respectively. BRIEF DESCRIPTION OF DRAWINGS

[0011] The above and other objects and features of the inventive concept will become apparent from the following detailed description of exemplary embodiments with reference to the accompanying drawings.

[0012] Figure 1 A light detection and ranging (LIDAR) system according to embodiments of the inventive concept is shown.

[0013] Figure 2A 、 Figure 2B and Figure 2C An example of a light source and an optical device of an electronic device of Figure 1 is shown.

[0014] Figure 3A and Figure 3B shows Figure 1 a circuit diagram of a pixel.

[0015] Figure 4A , Figure 4B , Figure 4C and Figure 4D shows Figure 1 a block diagram of a ToF sensor.

[0016] Figure 5A and Figure 5B shows a timing chart of a light signal and control signals applied to a pixel of Figure 3A .

[0017] Figure 6A and Figure 6B shows a timing chart of a light signal and control signals applied to a pixel of Figure 3B .

[0018] Figure 7A , Figure 7B , Figure 7C , Figure 7D , Figure 7E , Figure 7F , Figure 7G , Figure 7H and Figure 7I shows an example of one-dimensional light scanning in a column direction and pixel array scanning performed by the electronic device of Figure 1 .

[0019] Figure 8A , Figure 8B and Figure 8C shows an example of one-dimensional light scanning in a row direction and pixel array scanning performed by the electronic device of Figure 1 .

[0020] Figure 9A , Figure 9B , Figure 9C , Figure 9D , Figure 9E and Figure 9F shows an example of two-dimensional light scanning in a row direction and a column direction and pixel array scanning performed by the electronic device of Figure 1 .

[0021] Figure 10A , Figure 10B , Figure 10C , Figure 10D , Figure 10E and Figure 10F shows an example of two-dimensional light scanning in a row direction and a column direction and pixel array scanning performed by the electronic device of Figure 1 .

[0022] Figure 11A 、 Figure 11B 、 Figure 11C 、 Figure 11D 、 Figure 11E and Figure 11F shows an example of two-dimensional light scanning and pixel array scanning in the row direction and the column direction performed by the electronic device of Figure 1 .

[0023] Figure 12A 、 Figure 12B 、 Figure 12C 、 Figure 12D 、 Figure 12E and Figure 12F shows an example of two-dimensional light scanning and pixel array scanning in the row direction and the column direction performed by the electronic device of Figure 1 .

[0024] Figure 13 shows a cross-sectional view of a semiconductor package module according to an embodiment of the inventive concept.

[0025] Figure 14 shows an application example of the electronic device of Figure 1 . DETAILED DESCRIPTION

[0026] As is conventional in the art of the inventive concept, embodiments can be described and shown in terms of blocks that perform one or more functions described. These blocks, which can be referred to herein as units or modules, are implemented by analog and / or digital circuits (for example, logical gates, integrated circuits, microprocessors, microcontrollers, memory circuits, passive electronic components, active electronic components, optical components, hardwired circuits, etc.), and can optionally be driven by firmware and / or software. The circuits can be implemented, for example, in one or more semiconductor chips, or on a substrate support such as a printed circuit board. The circuits constituting the blocks can be implemented by special hardware, or by a processor (for example, one or more programmed microprocessors and associated circuitry), or by a combination of special hardware and a processor that performs some of the functions of the blocks. Each block of an embodiment can be physically separated into two or more interacting and discrete blocks without departing from the scope of the inventive concept. Likewise, blocks of an embodiment can be physically combined into more complex blocks without departing from the scope of the inventive concept.

[0027] Figure 1A light detection and ranging (LIDAR) system according to an embodiment of the inventive concept is shown. The LIDAR system 10 can include an object 11 (or referred to as a "subject" or a "target") and an electronic device 100. For example, the LIDAR system 10 can be implemented at the electronic device 100, and the electronic device 100 can be referred to as a "LIDAR device". The electronic device 100 can emit a light signal EL to the object 11 based on a time-of-flight (ToF) technique, can sense a light signal RL reflected from the object 11, and can sense a distance between the electronic device 100 and the object 11. The electronic device 100 can include a light source 110, an optical device 120, a lens part 130, a ToF sensor 140, and a controller 150.

[0028] The light source 110 can emit a light signal EL. The light source 110 can emit the light signal EL (ON) or can not emit the light signal EL (OFF) under the control of the controller 150. For example, the light signal EL can be in the form of a square wave (pulse) or in the form of a sine wave. The light signal EL can be a signal in a frequency band that a user cannot perceive, and can be, but is not limited to, a laser, a laser pulse, infrared light, a microwave, an optical wave, an ultrasonic wave, etc. For example, the light source 110 can be a laser light source, or can include a light emitting diode (LED), a laser diode (LD), an organic LED (OLED), an edge emitting laser, a vertical cavity surface emitting laser (VCSEL), a distributed feedback laser, etc. The optical device 120 can control or adjust the projection direction of the (emitted) light signal EL under the control of the controller 150. For example, the optical device 120 can support a one-dimensional or two-dimensional scanning function with respect to the object 11. The light signal EL generated from the light source 110 can be emitted to the object 11 through the optical device 120, or can be reflected by the optical device 120 to be emitted to the object 11. The lens member 130 can collect the light signal RL reflected from the object 11. The light signal RL can be incident on the lens member 130, and can be provided to the pixels PX of the ToF sensor 140 through the lens member 130. For example, the lens member 130 is illustrated as a single lens, but the lens member 130 can be an optical system including a plurality of lenses. The ToF sensor 140 can be referred to as a "ToF sensor (chip)", an "image sensor (chip)", or a "depth sensor (chip)". The ToF sensor 140 can include a pixel array 141 having pixels PX. The pixels PX can be referred to as "ToF pixels", and can convert the light signal RL reflected from the object 11 into an electrical signal. The light signal RL incident on the pixel array 141 can be delayed with respect to the light signal EL due to the distance between the electronic device 100 and the object 11. For example, there can be a time difference or a phase difference between the light signal EL and the light signal RL, and the electrical signal converted by the pixels PX can indicate the time difference or the phase difference. The controller 150 can control the light source 110, the optical device 120, and the ToF sensor 140. The controller 150 can synchronize the light source 110, the optical device 120, and the ToF sensor 140, and can provide the light source 110, the optical device 120, and the ToF sensor 140 with control signals for controlling the light source 110, the optical device 120, and the ToF sensor 140. The controller 150 can include a clock generator that generates a clock signal. With Figure 1 Similar to the example of the electronic device 100, the controller 150 can be provided or implemented within the electronic device 100 to be independent of the ToF sensor 140. With Figure 1The examples of the electronic device 100a and 100b are different, in other embodiments, the controller 150 can be included or embedded in the ToF sensor 140. In yet other embodiments, the controller 150 can not be included in the electronic device 100 (i.e., can be external to the electronic device 100), and can communicate with the electronic device 100. The components 110 to 150 of the electronic device 100 can be implemented individually, or at least part of the components 110 to 150 of the electronic device 100 can be implemented integrally.

[0029] According to embodiments of the inventive concept, the controller 150 can control the light source 110 and the optical device 120 to modulate the light signal EL or control the frequency, phase, intensity, on / off, projection direction, etc. of the light signal EL. For example, the object 11 can be divided into a plurality of regions, each region corresponding to some of the pixels PX. Under the control of the controller 150, the light source 110 and the optical device 120 can sequentially (in a regular order) project the light signal EL to the plurality of regions of the object 11 corresponding to some of the pixels PX to scan the object 11. Some of the pixels PX of the pixel array 141 of the ToF sensor 140 can demodulate the light signal RL reflected from the object 11 based on the scanning direction. As the scanning proceeds, some of the pixels PX of the pixels corresponding to any other region of the object 11 can also demodulate the light signal RL. By the operation of the light source 110 and the optical device 120 to scan the object 11 and the demodulation operation of the ToF sensor 140 based on the scanning direction, the electronic device 100 can sense a relatively distant object 11 using limited power, compared to the case where a flash-type light source is used. The electronic device 100 can perform a scanning operation on the object 11 based on some of the pixels PX, compared to the case where a flash-type light source is used, thereby reducing a leakage current of the pixels PX and eliminating a shadow phenomenon according to the location of the pixels PX.

[0030] Figure 1 、 Figure 2A and Figure 2B shows Figure 2C Examples of the light source and the optical device of the electronic device. Referring to Figure 1 In the electronic device 100a, the light source 110a can be one of a VCSEL, an edge emitting laser, and an LED, for example, and the optical device 120a can be a micro electro mechanical system (MEMS) mirror. Referring to Figure 2A In the electronic device 100b, the light source 110b can be one of a VCSEL, an edge emitting laser, and an LED, for example, and the optical device 120b can be a rotating prism. Referring to Figure 2BIn the electronic device 100c, the light source 110c can be, for example, a VCSEL array comprising multiple VCSELs, and the optical device 120c can be a projection optical device. Under the control of the controller 150, some VCSELs in the VCSEL array can be turned on, while the remaining VCSELs in the VCSEL array can be turned off; and by repeating this operation, the object 11 can be scanned. For example, the electronic device 100c may also include a vibration actuator. The vibration actuator can cause the VCSEL array or projection optical device to vibrate under the control of the controller 150; and by repeating this operation, the object 11 can be scanned.

[0031] Figure 2C and Figure 3A It shows Figure 3B The circuit diagram of a pixel. A pixel PX may include two or more taps. Each of pixels PXa and PXb can be an example of each pixel PX. Figure 1 Pixel PXa may include a photoelectric conversion element PCE, taps TAP1 to TAP2, and an overflow transistor OF. A photodiode, phototransistor, photogate, pinned photodiode, or a combination thereof may be used as the photoelectric conversion element PCE. The following describes the photoelectric conversion element PCE as a photodiode. The photoelectric conversion element PCE can generate and accumulate charge corresponding to the optical signal RL. The charge generated by the photoelectric conversion element PCE can be distributed to phototransistors PA and PB. The amount of charge distributed and stored by phototransistors PA and PB can be determined based on the phase difference between photogate signals PGA and PGB and the optical signal EL. For example, the photoelectric conversion element PCE may be implemented in a substrate in which pixel PXa is implemented, thereby overlapping with phototransistors PA and PB in a planar view. The photoelectric conversion element PCE may be connected between the first terminals of phototransistors PA and PB and ground voltage GND. The photoelectric conversion element PCE may consist of multiple taps of a pixel PXa (e.g., ...). Figure 3A (The two taps in the middle) are shared.

[0032] The tap TAP1 can include a phototransistor PA, a transfer transistor TA, a storage transistor S1, a transfer transistor T1, a floating diffusion region FD1, and a readout circuit RO1. The readout circuit RO1 can include a reset transistor R1, a source follower transistor SF1, and a selection transistor SE1. A first terminal (e.g., a drain or a source) of the phototransistor PA can be connected with a photoelectric conversion element PCE and a first terminal of an overflow transistor OF. The phototransistor PA can accumulate charges based on a photo-gate signal PGA. The charges can be generated by a light signal RL incident on the pixel PXa. The photo-gate signal PGA can be a modulated signal whose phase is the same as or different from that of the light signal EL. The photo-gate signal PGA can be activated (or enabled) during an exposure (or accumulation) interval (or period) in which the light signal EL is emitted and the light signal RL is incident on the pixel PXa, and can be deactivated (or disabled) for a remaining time other than the exposure interval.

[0033] The transfer transistor TA can be connected between a second terminal of the phototransistor PA and a first terminal of the storage transistor S1. The transfer transistor TA can electrically connect the second terminal of the phototransistor PA and the first terminal of the storage transistor S1 during the exposure interval based on a transfer-gate signal TXA, so that the charges accumulated by the phototransistor PA are transferred to the storage transistor S1, and can prevent the charges accumulated by the phototransistor PA from being transferred to the storage transistor S1 for the remaining time other than the exposure interval based on the transfer-gate signal TXA.

[0034] The storage transistor S1 can be connected between the transfer transistors TA and T1, and can store the charges accumulated by the phototransistor PA based on a storage-gate signal SG. The charges accumulated by the phototransistor PA can not be immediately transferred to the floating diffusion region FD1. For example, the tap TAP1 can include a storage diode instead of the storage transistor S1. A first terminal of the storage diode can be connected with the second terminal of the phototransistor PA and a first terminal of the transfer transistor T1, and a second terminal of the storage diode can be connected with one of a power supply voltage VDD and a ground voltage GND. As another example, the tap TAP1 can include both the storage transistor S1 and the storage diode. Each of the storage transistor S1, the storage diode, and the combination of the storage transistor S1 and the storage diode can be referred to as a "storage element."

[0035] The transfer transistor T1 can be connected between a second terminal of the storage transistor S1 and the floating diffusion region FD1. The transfer transistor T1 can transfer the charges stored in the storage transistor S1 to the floating diffusion region FD1 based on a transfer-gate signal TG.

[0036] In the example shown, the tap TAP1 includes all of the transistors TA, S1, and T1. With the tap TAP1, the photo-gate signal PGA can be activated (or enabled) during the exposure interval, and the transfer-gate signal TXA can be activated (or enabled) during the exposure interval. The storage-gate signal SG can be activated (or enabled) during the exposure interval and deactivated (or disabled) for the remaining time other than the exposure interval. The transfer-gate signal TG can be activated (or enabled) for the remaining time other than the exposure interval. Figure 3A In the example shown, the tap TAP1 includes all of the transistors TA, S1, and T1. With the tap TAP1, the photo-gate signal PGA can be activated (or enabled) during the exposure interval, and the transfer-gate signal TXA can be activated (or enabled) during the exposure interval. The storage-gate signal SG can be activated (or enabled) during the exposure interval and deactivated (or disabled) for the remaining time other than the exposure interval. The transfer-gate signal TG can be activated (or enabled) for the remaining time other than the exposure interval. Figure 3AThe illustrated example differs in that, in other embodiments, the tap TAP1 can include only the transistors TA and T1 and a portion of the storage element S1, or can not include all of the transistors TA and T1 and the storage element S1.

[0037] The reset transistor R1 can be connected between the floating diffusion FD1 and the supply voltage VDD. The reset transistor R1 can electrically connect the floating diffusion FD1 and the supply voltage VDD based on the reset gate signal RG, and can drive the voltage level of the floating diffusion FD1 with the supply voltage VDD. In this way, the reset transistor R1 can reset the floating diffusion FD1 such that the charge stored in the floating diffusion FD1 is removed or released. The source follower transistor SF1 can be connected between the supply voltage VDD and the select transistor SE1. The gate of the source follower transistor SF1 can be connected with the floating diffusion FD1. The source follower transistor SF1 can output the output signal OUT1 based on the voltage level of the floating diffusion FD1. The select transistor SE1 can be connected between the source follower transistor SF1 and the output line. The select transistor SE1 can output the output signal OUT1 to the output line based on the select signal SEL.

[0038] The tap TAP2 can include the phototransistor PB, the transfer transistor TB, the storage transistor S2, the transfer transistor T2, the floating diffusion FD2, and the readout circuit RO2. The readout circuit RO2 can include the reset transistor R2, the source follower transistor SF2, and the select transistor SE2. The configuration and operation of the tap TAP2 can be substantially the same as that of the tap TAP1, except that the phototransistor PB of the tap TAP2 receives the photogate signal PGB. The photogate signals PGA and PGB can be activated during the exposure interval, and can be deactivated for the remaining time except for the exposure interval. The photogate signals PGA / PGB can be modulated signals whose phases are the same as or different from the phase of the light signal EL. The phases of the photogate signals PGA and PGB can be different. The taps TAP1 and TAP2 can output the output signals OUT1 and OUT2 based on the photogate signals PGA and PGB. For example, the output signals OUT1 and OUT2 can indicate the distance between the electronic device 100 and the object 11. For example, the reset gate signal RG, the transfer gate signal TG, and the select signal SEL can be commonly applied to the taps TAP1 and TAP2. As Figure 3A As illustrated, the transfer gate signals TXA and TXB can be applied to the transfer transistors TA and TB of the taps TAP1 and TAP2, respectively. Unlike Figure 3A As illustrated, the transfer gate signals TXA and TXB can be applied to the transfer transistors TA and TB of the taps TAP1 and TAP2, respectively. Unlike

[0039] The overflow transistor OF can be connected with the power supply voltage VDD, and can be disposed adjacent to the phototransistors PA and PB. The photoelectric conversion element PCE or the phototransistors PA and PB can accumulate electric charges due to external light during a remaining time other than the exposure interval. Based on the overflow gate signal OG, the overflow transistor OF can remove the electric charges accumulated by the photoelectric conversion element PCE or the phototransistors PA and PB during the remaining time other than the exposure interval, or can discharge the electric charges to the power supply voltage VDD. For example, the overflow transistor OF can be divided into as many transistors as the number of the taps TAP1 and TAP2.

[0040] Figure 3A The pixel PXb in FIG. 10 can include the photoelectric conversion element PCE, the taps TAP1 to TAP4, and the overflow transistor OF. The following description will focus on the difference between the pixel PXb and the pixel PXa. The electric charges generated by the photoelectric conversion element PCE can be distributed into the phototransistors PA to PD. The amount of electric charges distributed and stored by the phototransistors PA to PD can be determined according to the phase difference between the photoelectric gate signals PGA to PGD and the light signal EL.

[0041] The taps TAP1 and TAP2 of the pixel PXb can be substantially the same as the taps TAP1 and TAP2 of the pixel PXa. The tap TAP3 can include the phototransistor PC, the transfer transistor TC, the storage transistor S3, the transfer transistor T3, the floating diffusion FD3, and the readout circuit RO3. The readout circuit RO3 can include the reset transistor R3, the source follower transistor SF3, and the selection transistor SE3. The tap TAP4 can include the phototransistor PD, the transfer transistor TD, the storage transistor S4, the transfer transistor T4, the floating diffusion FD4, and the readout circuit RO4. The readout circuit RO4 can include the reset transistor R4, the source follower transistor SF4, and the selection transistor SE4. The taps TAP3 and TAP4 can be implemented to be substantially the same as, and can operate to be substantially the same as, the taps TAP1 and TAP2.

[0042] The photoelectric gate signals PGA to PGD can be activated during the exposure interval, and can be deactivated during a remaining time other than the exposure interval. The phases of the photoelectric gate signals PGA to PGD can be different. The taps TAP1 to TAP4 can output the output signals OUT1 to OUT4 based on the photoelectric gate signals PGA to PGD. For example, the output signals OUT1 to OUT4 can indicate the distance between the electronic device 100 and the object 11. As described above, the output signals OUT1 to OUT4 can be output to the display 120, and the display 120 can display the distance between the electronic device 100 and the object 11. Figure 3BAs shown, the reset gate signal RG1, the pass gate signal TG1, and the selection signal SEL1 can be commonly applied to the taps TAP1 and TAP2, and the reset gate signal RG2, the pass gate signal TG2, and the selection signal SEL2 can be commonly applied to the taps TAP3 and TAP4. With this configuration, the taps TAP1 and TAP2 can output the output signals OUT1 and OUT2, respectively, when the selection signal SEL1 is activated. Next, the taps TAP3 and TAP4 can output the output signals OUT3 and OUT4, respectively, through the respective output lines that pass the output signals OUT1 and OUT2, respectively, when the selection signal SEL2 is activated. Figure 3B Unlike the example shown, in other embodiments, the reset gate signal RG, the pass gate signal TG, and the selection signal SEL can be commonly applied to the taps TAP1 to TAP4. As with the example shown, the taps TAP1 and TAP2 can output the output signals OUT1 and OUT2, respectively, when the selection signal SEL is activated. Next, the taps TAP3 and TAP4 can output the output signals OUT3 and OUT4, respectively, through the respective output lines that pass the output signals OUT1 and OUT2, respectively, when the selection signal SEL is activated. Figure 3B As shown, the pass gate signals TXA and TXB can be applied to the pass transistors TA and TB of the taps TAP1 and TAP2, respectively, and the pass gate signals TXC and TXD can be applied to the pass transistors TC and TD of the taps TAP3 and TAP4, respectively. With this configuration, the taps TAP1 and TAP2 can output the output signals OUT1 and OUT2, respectively, when the pass gate signals TXA and TXB are activated. Next, the taps TAP3 and TAP4 can output the output signals OUT3 and OUT4, respectively, through the respective output lines that pass the output signals OUT1 and OUT2, respectively, when the pass gate signals TXC and TXD are activated. Figure 3B Unlike the example shown, in other embodiments, the pass gate signals TX can be commonly applied to the pass transistors TA to TD of the taps TAP1 to TAP4.

[0043] For example, although not shown, the taps TAP1 and TAP3 can output the output signals OUT1 and OUT3 through one output line, and the taps TAP2 and TAP4 can output the output signals OUT2 and OUT4 through another output line. When the selection signal SEL1 is activated, the taps TAP1 and TAP2 can output the output signals OUT1 and OUT2, respectively. Next, when the selection signal SEL2 is activated, the taps TAP3 and TAP4 can output the output signals OUT3 and OUT4, respectively, through the respective output lines that pass the output signals OUT1 and OUT2, respectively. As another example, the taps TAP1 and TAP3 can output the output signals OUT1 and OUT3 through two output lines, respectively, and the taps TAP2 and TAP4 can output the output signals OUT2 and OUT4 through two other output lines, respectively.

[0044] The description is given that all the transistors of the pixels PXa / PXb are implemented by NMOS transistors, but in other embodiments, the transistors of the pixels PXa / PXb can be implemented by PMOS transistors, or by a combination of NMOS transistors and PMOS transistors. The kind of the transistors of the pixels PXa / PXb is not limited to Figure 3B and Figure 3A the example shown.

[0045] Figure 3B and Figure 4A is shown Figure 4BA block diagram of a ToF sensor. Each of ToF sensors 140a and 140b may be an example of ToF sensor 140. Each of ToF sensors 140a and 140b may include a pixel array 141, a row driver 142, a photoelectric gate (PG) driver 143, an analog processing circuit 144 (CDS / ADC), a data buffer 145, and a timing controller 146.

[0046] The pixel array 141 may include rows arranged along a row direction D1 (or a first direction) and a column direction D2 (or a second direction) that are perpendicular to each other. Figure 1 The pixel array 141 can be implemented on a silicon (or semiconductor) substrate. The pixel PX can accumulate, store, transfer, or remove charge based on control signals OG, RG, TX, SG, TG, SEL, and PG provided from the row driver 142 and the photoelectric gate driver 143.

[0047] The row driver 142 can control the pixel array 141 under the control of the timing controller 146. The row driver 142 can transmit control signals OG, RG, TX, SG, TG, and SEL to the pixel PX along the row direction D1. The control signals OG, RG, TX, SG, TG, and SEL, connected to the pixel PX, are formed along the row direction D1 through their transmission wiring and can be positioned on / above the pixel array 141. The control signals OG, RG, TX, SG, TG, and SEL can be... Figure 1 and Figure 3A The control signals shown are OG, RG, TX, SG, TG, and SEL (where the numbers are omitted). The row driver 142 can control the pixels PX of the pixel array 141 row by row in scrolling mode, or it can control all the pixels PX of the pixel array 141 simultaneously in global mode.

[0048] The photoelectric gate driver 143, under the control of the timing controller 146, can transmit the control signal PG to the pixel array 141. The control signal PG can be... Figure 3B and Figure 3A The control signal PG is shown (where the numbers are omitted). Figure 3B The photoelectric gate driver 143 of the ToF sensor 140a transmits the control signal PG to the pixel PX along the row direction D1. The row driver 142 and the photoelectric gate driver 143 are respectively positioned adjacent to the pixel array 141 along the row direction D1. The pixel array 141 can be inserted between the row driver 142 and the photoelectric gate driver 143. Figure 4A Unlike the example shown, in other embodiments, the photoelectric gate driver 143 may be included in the row driver 142.

[0049] Figure 4AThe photoelectric gate driver 143 of the ToF sensor 140b transmits the control signal PG to the pixel PX along the column direction D2. The photoelectric gate driver 143 and the analog processing circuit 144 can be respectively arranged adjacent to the pixel array 141 along the column direction D2. The pixel array 141 can be inserted between the photoelectric gate driver 143 and the analog processing circuit 144. Figure 4B Unlike the example shown, in other embodiments, the photoelectric gate driver 143 may be included in the analog processing circuitry 144. Wiring formed along the row direction D1 or column direction D2, connected to the pixel PX, through which the control signal PG is transmitted, may be provided on / above the pixel array 141.

[0050] Figure 4B and Figure 4A The analog processing circuit 144 in the image can receive, sample, and hold the output signal (or "image signal" or "depth signal") output from the pixel array 141 along the column direction D2 (see reference). Figure 4B and Figure 3A The analog processing circuit 144 controls the output lines through which the output signals OUT1 and OUT2 / OUT1 to OUT4 are transmitted, formed along the column direction D2 and connected to the pixels PX of the pixel array 141. The analog processing circuit 144 performs correlated double sampling (CDS) on the output signals and removes noise included in the output signals. The analog processing circuit 144 performs analog-to-digital conversion operations, converting analog signals to digital signals. The analog processing circuit 144 can generate data (or image data or depth data) using digital signals. The analog processing circuit 144 may be referred to as a "data processing circuit". The analog processing circuit 144 can provide image data to a data buffer 145. The data buffer 145 can store data transmitted from the analog processing circuit 144. The data buffer 145 can output the data "DATA" to the outside of the ToF sensor 140a / 140b (e.g., to an internal component of the electronic device 100 or to the outside of the electronic device 100).

[0051] The timing controller 146 can control components 141 to 145 of the ToF sensors 140a / 140b. The timing controller 146 can control components 141 to 145 of the ToF sensors 140a / 140b under the control of the controller 150. The timing controller 146 can control the line driver 142 and the photogate driver 143 based on the modulation or phase information of the optical signal EL. As described above, with... Figure 3BUnlike the example shown, in other embodiments, controller 150 may be embedded in ToF sensor 140. In this case, timing controller 146 may include controller 150 or perform the functions of controller 150. For example, timing controller 146 (or controller 150) may synchronize pixel array 141, row driver 142, photogate driver 143, light source 110, and optical device 120.

[0052] Figure 1 and Figure 4C It shows Figure 4D A block diagram of a ToF sensor. Each of ToF sensors 140c and 140d can be an example of a ToF sensor 140. The description below will focus on Figure 1 and Figure 4C The ToF sensors 140c and 140d and Figure 4D and Figure 4A The differences between ToF sensors 140a and 140b, and between ToF sensors 140c and 140d.

[0053] Compared to ToF sensors 140a and 140b, each of ToF sensors 140c and 140d may further include a column driver 147. The column driver 147 can control the pixel array 141 under the control of the timing controller 146. The column driver 147 can transmit control signals OG, TX, and SG to pixels PX along the column direction D2. For example, the control signals OG, TX, and SG, connected to pixels PX, are formed along the column direction D2 through their transmission wiring and can be positioned on / above the pixel array 141. In this case, the row driver 142 can transmit control signals RG, TG, and SEL to pixels PX along the row direction D1. For example, the control signals RG, TG, and SEL, connected to pixels PX, are formed along the row direction D1 through their transmission wiring and can be positioned on / above the pixel array 141. Compared to ToF sensors 140a and 140b, because each of ToF sensors 140c and 140d also includes a column driver 147, the direction of driving the photoelectric gate signal PG can be the same as the direction of driving the overflow gate signal OG, the transmission gate signal TX, and the storage gate signal SG.

[0054] and Figure 4B Compared to the ToF sensor 140c, Figure 4CThe ToF sensor 140d can include photo gate drivers 143a and 143b disposed on opposite sides of the pixel array 141 with respect to the column direction D2. The photo gate drivers 143a and 143b can transmit photo gate signals PG to the pixel array 141 in opposite directions and together. The operation of each of the photo gate drivers 143a and 143b can be substantially identical to the operation of the photo gate driver 143. Compared to the ToF sensors 140a to 140c including the photo gate driver 143, the ToF sensor 140d including the photo gate drivers 143a and 143b can address the problem of a resistance-capacitance delay (RC delay) due to resistance and capacitance components of wiring through which the control signal PG is transmitted, and the distribution of the photo gate signal PG along the column direction D2.

[0055] In an embodiment, although not shown, the components 141 to 147 of the ToF sensor 140c / 140d can be implemented and disposed on the same substrate. Alternatively, with reference to Figure 4D and Figure 4C In other embodiments, the pixel array 141 of the components 141 to 147 of the ToF sensor 140c / 140d can be implemented on a first substrate 151, and the remaining components 142 to 147 of the ToF sensor 140c / 140d can be implemented and disposed on a second substrate 152. For example, the first substrate 151 can be stacked on / over the second substrate 152. For example, when the components 141 to 147 of the ToF sensor 140c / 140d are placed on two or more substrates 151 and 152, the complexity of wiring through which the control signals OG, TX, and SG and the output signal OUT are transmitted can be relatively reduced compared to the case where all of the components 141 to 147 of the ToF sensor 140c / 140d are disposed on one substrate.

[0056] Figure 4D and Figure 5A Timing diagrams of light signals and control signals applied to pixels of Figure 5B are shown. Figure 3A and Figure 5A Each of the timing diagrams of

[0057] During the reset interval, the overflow gate signal OG and the reset gate signal RG can be activated. Based on the activated overflow gate signal OG, the overflow transistor OF can remove the charge accumulated by the photoelectric conversion element PCE or the phototransistors PA and PB, or can discharge the charge to the power supply voltage VDD. The reset transistors R1 and R2 can reset the floating diffusion regions FD1 and FD2 based on the reset gate signal RG. All other control signals PGA, PGB, TXA, TXB, SEL, TG, and SG can be deactivated, the light signal EL can not be emitted, and the light signal RL can not be incident on the pixel PXa.

[0058] During the exposure interval, the light signal EL can be emitted to the object 11 (see Figure 5B ), and the light signal RL can be incident on the pixel PXa. The light signal EL of Figure 1 may be modulated by the controller 150 to be similar to a continuous wave. For example, a duty cycle of the ON state and the OFF state of the light signal EL can be about 50%. For example, an interval with a relatively high level of the light signal EL can indicate an ON interval in which the light signal EL is emitted to the object 11, and an interval with a relatively low level of the light signal EL can indicate an OFF interval in which the light signal EL is not emitted to the object 11. The light signal EL of Figure 5A may be modulated by the controller 150 to be similar to a strobe signal (or a pulsed signal). For example, Figure 5B a duty cycle of the ON state and the OFF state of the light signal EL can be less than about 50%.

[0059] During the exposure interval, the photo gate signals PGA and PGB can be synchronized with the light signal EL. The photo gate signal PGA can have the same phase as the phase of the light signal EL. The photo gate signal PGB can have a different phase from the phase of the light signal EL. The photo gate signal PGA can be activated during an interval in which the light signal EL has a relatively high level, and can be deactivated during an interval in which the light signal EL has a relatively low level. The photo gate signal PGB can be deactivated during an interval in which the light signal EL has a relatively high level, and can be activated during an interval in which the light signal EL has a relatively low level. In Figure 5B and Figure 5A , a phase difference between the light signal EL, the photo gate signal PGA, and the photo gate signal PGB (e.g., 0 degree and 180 degree) is merely exemplary. The phototransistors PA and PB can accumulate the charge based on the photo gate signals PGA and PGB, respectively.

[0060] Referring to Figure 5B , during the exposure interval, the overflow gate signal OG can be deactivated. Referring to Figure 5ADuring the exposure interval, the overflow gate signal OG can be deactivated during the interval in which the light signal EL and the photogate signals PGA and PGB are activated, and can be activated during the interval in which the light signal EL and the photogate signals PGA and PGB are deactivated. Compared with the case of Figure 5B , in Figure 5A , the controller 150 can perform the strobe operation for stopping the object scanning operation and the demodulation operation of the ToF sensor 140 during the partial interval of the exposure interval by activating the overflow gate signal OG and deactivating the light signal EL and the photogate signals PGA and PGB during the partial interval. Compared with the case of Figure 5B , in Figure 5A , the ToF sensor 140 is relatively less exposed to external light during the exposure interval.

[0061] During the exposure interval, the transfer gate signals TXA / TXB and the storage gate signal SG can be activated. The transfer transistors TA and TB can transfer the charges accumulated by the respective phototransistors PA and PB to the storage transistors S1 and S2 based on the activated transfer gate signals TXA and TXB. The respective storage transistors S1 and S2 can store the charges transferred through the transfer transistors TA and TB based on the activated storage gate signal SG.

[0062] During the readout interval, the light signal EL can not be emitted to the object 11 and can be deactivated. The overflow gate signal OG can be activated again, and the transfer gate signals TXA / TXB can be deactivated again. The selection signal SEL can be activated, and the reset gate signal RG can be deactivated. In the readout interval, the output signals OUT1 and OUT2 of the pixel PXa can have the reset level before the transfer gate signal TG is activated, and the analog processing circuit 144 can receive and sample the output signals OUT1 and OUT2 having the reset level. During the readout interval, the transfer gate signal TG can be activated and then can be deactivated. Also, the storage gate signal SG can be deactivated and then can be activated. The transfer transistors T1 and T2 can transfer the charges stored in the storage transistors S1 and S2 to the floating diffusion regions FD1 and FD2 based on the activated transfer gate signal TG. The storage transistors S1 and S2 will not store the charges based on the deactivated storage gate signal SG. In the readout interval, as the transfer gate signal TG is activated and then is deactivated, and the storage gate signal SG is deactivated and then is activated, the output signals OUT1 and OUT2 of the pixel PXa can have the signal levels different from the reset level, and the analog processing circuit 144 (see Figure 5B) can receive and sample the output signals OUT1 and OUT2 having the signal levels. As described above, the analog processing circuit 144 can perform the CDS operation and the ADC operation on the reset level and the signal level. Thereafter, when the reset gate signal RG is activated again and the selection signal SEL is deactivated again, the readout operation and the readout interval associated with the pixel PXa can be terminated.

[0063] Figures 4A-4D and 5B The timing chart of the pixel PXa is exemplified in FIGS. 12A and 12B. The control signals PGA, PGB, OG, TXA, TXB, RG, SEL, TG, and SG applied to the pixel PXa are exemplified in FIGS. 13A and 13B. Figure 5A and Figure 5A The control signals PGA, PGB, OG, TXA, TXB, RG, SEL, TG, and SG of the pixel PXa of

[0064] Figure 5B and Figure 6A The timing charts of the light signal and the control signal applied to the pixel of Figure 6B Figure 3B and Figure 6A Each of the timing charts of the pixel PXa of Figure 6B and Figure 6A The light signals EL and RL of the pixel PXa of Figure 6B and Figure 5A The light signals EL and RL of the pixel PXa of Figure 5B and Figure 6A Each of the control signals OG, TXA, TXB, TXC, TXD, RG1, RG2, SEL1, SEL2, TG1, TG2, SG1, and SG2 of the pixel PXa of Figure 6B and Figure 5A Each of the control signals OG, TXA, TXB, RG, SEL, TG, and SG of the pixel PXa of Figure 5B and Figure 6A The differences between the timing charts of the pixel PXa of Figure 6B and Figure 5A

[0065] Compared with the pixel PXa of Figure 5B Figure 3A ​​​The pixel PXb includes four taps TAP1 to TAP4, so four photo-gate signals PGA to PGD can be applied to the pixel PXb. The photo-gate signals PGA to PGD can have different phases (e.g., 0 degrees, 90 degrees, 180 degrees, and 270 degrees) as in the photo-gate signals PGA and PGB, and can not overlap each other in time.

[0066] For example, the pixel PXb can output the output signals OUT1 to OUT4 to the analog processing circuit 144 through four output lines. The control signals OG, TXA, TXB, TXC, TXD, RG1, RG2, SEL1, SEL2, TG1, TG2, SG1, and SG2 can be applied to the pixel PXb during one readout interval as shown in Figure 3B and Figure 6A The control signals OG, TXA, TXB, TXC, TXD, RG1, RG2, SEL1, SEL2, TG1, TG2, SG1, and SG2 can be applied to the pixel PXb during one readout interval as shown in

[0067] As another example, the pixel PXb can output the output signals OUT1 to OUT4 to the analog processing circuit 144 through two output lines. The control signals OG, TXA, TXB, RG1, SEL1, TG1, and SG1 can be applied to the pixel PXb, the control signals TXC, TXD, SEL2, and TG2 can be deactivated, and the control signals RG2 and SG2 can be activated during one readout interval as shown in Figure 6B and Figure 6A The control signals OG, TXA, TXB, TXC, TXD, RG1, RG2, SEL1, SEL2, TG1, TG2, SG1, and SG2 can be applied to the pixel PXb during one readout interval as shown in Figure 6B and Figure 6A The control signals OG, TXA, TXB, TXC, TXD, RG1, RG2, SEL1, SEL2, TG1, TG2, SG1, and SG2 can be applied to the pixel PXb during one readout interval as shown in Figure 6B and Figure 6A The readout intervals for the output signals OUT1 to OUT4 of the pixel PXb as shown in

[0068] Figure 6B is shown in Figures 7A-7IThe example of the one-dimensional light scanning along the column direction and the pixel array scanning performed by the electronic device of FIG. 1 is illustrated. The example is illustrated as the pixel array 141 includes 4x4 pixels PX or 8x4 pixels PX arranged along the row direction D1 and the column direction D2, but the number of pixels PX of the pixel array 141 is not limited to the above example. Figure 1 The pixel PX of FIG. 1 can be Figures 7A-7I and Figure 3A one of the pixels PXa and PXb of FIG. 1. Figure 3B The photo gate driver 143 of the ToF sensor 140a of FIG. 1 can transmit the photo gate signals PGA and PGB / PGA to PGD to the pixels PX of the pixel array 141 along the row direction D1. Figure 4A The direction of the light scanning can correspond to a direction in which the light signals RL are sequentially incident to the pixel block PB. The direction of the light scanning can be the column direction D2, and can correspond to one dimension. The pixel array scanning refers to a series of operations in which the pixels PX of the pixel array 141 sequentially demodulate the light signals RL based on the direction of the light scanning. By controlling the light source 110 and the optical device 120, the controller 150 can sequentially project the light signals EL to a plurality of regions of the object 11 to scan the object 11. The direction in which the photo gate signals PGA and PGB / PGA to PGD are transmitted can correspond to the direction of the light scanning. For example, the directions can be different and can be perpendicular to each other.

[0069] Referring to Figures 7A-7I , the pixel block PB can include the pixels PX arranged in each of the rows R1 to R4, i.e., arranged in one row (alternatively referred to as "bank"). In Figures 7A-7D , only one pixel block PB is illustrated, but the pixel array 141 can be divided into a plurality of pixel blocks PB. In Figures 7A-7D , the 4x4 pixels PX can be divided into a plurality of pixel blocks PB each including 1x4 pixels PX. For example, the pixels PX of the pixel block PB can be disposed in the same row and different columns C1 to C4. Referring to Figures 7A-7D , the pixel block PB can include the pixels PX arranged in a plurality of rows R1 to R4 / R5 to R8. For example, the pixels PX of the pixel block PB can be disposed in different rows R1 to R4 / R5 to R8 and different columns C1 to C4. In Figures 7E-7I , the 8x4 pixels PX can be divided into a plurality of pixel blocks PB each including 4x4 pixels PX. In any case, the pixel block PB can be a unit of dividing the pixel array 141 and can include the pixels PX arranged in one or more rows, and the pixels PX of the pixel block PB can be exposed to the light signals RL together.

[0070] Referring to Figures 7E-7I, the light signal RL can sequentially be incident on the pixels PX arranged in row Rl, the pixels PX arranged in row R2, the pixels PX arranged in row R3, and the pixels PX arranged in row R4. Depending on the direction (e.g., column direction D2) of the light scan performed by the controller 150, the components 142-146 can control (or drive) the pixels PX of the pixel array 141 in units of rows (or in units of pixel blocks) over time. First, the pixels PX arranged in row Rl can be reset during a reset interval RST, can be exposed to the light signal RL to accumulate charge during an exposure interval EXP, and can output the output signals OUT1 and OUT2 / OUT1-OUT4 during a readout interval RO. Referring to Figure 7A The operation of the pixels PX in the reset interval RST, the exposure interval EXP, and the readout interval RO is described. Next, the pixels PX arranged in row R2 can be reset during a reset interval RST, can be exposed to the light signal RL to accumulate charge during an exposure interval EXP, and can output the output signals OUT1 and OUT2 / OUT1-OUT4 during a readout interval RO. The readout interval RO of the pixels PX arranged in row Rl and the reset interval RST of the pixels PX arranged in row R2 can overlap each other, the exposure interval EXP of the pixels PX arranged in row R2 can be located after the readout interval RO of the pixels PX arranged in row Rl, and the readout interval RO of the pixels PX arranged in row Rl can be located between the exposure interval EXP of the pixels PX arranged in row Rl and the exposure interval EXP of the pixels PX arranged in row R2. The readout interval RO of the pixels PX arranged in row R2 can be located after the exposure interval EXP of the pixels PX arranged in row R2. The pixels PX arranged in row R3 and row R4 can be sequentially operated substantially identically to the pixels PX arranged in row Rl and row R2. The pixels PX arranged in row Rl, the pixels PX arranged in row R2, the pixels PX arranged in row R3, and the pixels PX arranged in row R4 can sequentially demodulate the light signal RL along the scan direction of the incidence of the light signal RL.

[0071] Referring to Figure 5A-6BThe frequencies of the photoelectric gate signals PGA and PGB / PGA to PGD applied to the pixels PX arranged in rows R1 and R3 during the exposure interval EXP can be f1 (e.g., approximately 80 MHz), and the frequencies of the photoelectric gate signals PGA and PGB / PGA to PGD applied to the pixels PX arranged in rows R2 and R4 during the exposure interval EXP can be f2 (e.g., approximately 100 MHz). For example, some of the frequencies of the photoelectric gate signals PGA and PGB / PGA to PGD applied to the pixels PX arranged in rows R1 to R4 can be equal, while others can be different. Alternatively, in other embodiments, the frequencies of the photoelectric gate signals PGA and PGB / PGA to PGD can be different. The photoelectric gate driver 143 can adjust (or set) the frequencies of the photoelectric gate signals PGA and PGB / PGA to PGD differently according to rows R1 to R4. Therefore, compared to the case where the frequencies of the photoelectric gate signals PGA and PGB / PGA to PGD are equal regardless of whether rows R1 to R4 are in operation, the ToF sensor 140 can reduce the burden of multi-frame depth sensing in which the pixel array 141 operates multiple times, and can increase the sensing distance.

[0072] Reference Figure 7B ,and Figure 7C Unlike normal readout operations, in other embodiments, pixels PX of pixel array 141 can perform a rolling readout operation. Pixels PX arranged in row R1 can be reset during the reset interval RST and exposed to the light signal RL during the exposure interval EXP to accumulate charge. The reset interval RST of pixels PX arranged in row R2 can overlap with the exposure interval EXP of pixels PX arranged in row R1. Pixels PX arranged in rows R3 and R4 can perform reset and exposure operations, substantially the same as those of pixels PX arranged in rows R1 and R2. When the exposure interval of all pixels PX of pixel array 141 ends, readout operations of all pixels PX of pixel array 141 can be initiated. During readout interval RO, pixels PX arranged in rows R1 to R4 can sequentially output output signals OUT1 and OUT2 / OUT1 to OUT4. The readout interval RO of pixels PX arranged in row R1 can be located after the exposure interval EXP of pixels PX arranged in row R4. The readout interval RO of a pixel PX located in row R2 can be located after the readout interval RO of a pixel PX located in row R1. The readout intervals RO of pixels PX located in rows R1 to R4 can be consecutive.

[0073] Reference Figure 7A ,and Figure 7DIn other embodiments, the pixels PX of the pixel array 141 can perform global readout operations. The readout intervals RO of the pixels PX arranged in the rows R1 to R4 can overlap with each other. The pixels PX arranged in the rows R1 to R4 can output the output signals OUT1 and OUT2 / OUT1 to OUT4 simultaneously during the readout intervals RO overlapping with each other. In Figure 7C the case, the analog processing circuit 144 can be provided in the ToF sensor 140 to overlap with the pixel array 141 in a direction perpendicular to the row direction D1 and the column direction D2. The substrate implementing the pixel array 141 can be three-dimensionally stacked on / over the substrate implementing the analog processing circuit 144. Also, as described with reference to Figure 7D the timing chart of the photo gate driver 143 to which Figure 7B and Figure 7C are applied can adjust the frequencies of the photo gate signals PGA and PGB / PGA to PGD differently according to the rows R1 to R4.

[0074] With reference to Figure 7D , according to the direction of the light scan performed by the controller 150, the components 142 to 146 can control the pixels PX of the pixel array 141 in units of lines R1 to R4 over time. The pixels PX arranged in the rows R1 to R4 of the pixel block PB can be reset during the reset interval RST and can be exposed to the light signal RL during the exposure interval EXP to accumulate charges. After the exposure interval EXP, as in the case of Figure 7E , the pixels PX arranged in the rows R1 to R4 can sequentially output the output signals OUT1 and OUT2 / OUT1 to OUT4 during the readout intervals RO. Next, the pixels PX arranged in the rows R5 to R8 of the next pixel block PB can be reset during the reset interval RST and can be exposed to the light signal RL during the exposure interval EXP to accumulate charges. After the exposure interval EXP, as in the case of Figure 7C , the pixels PX arranged in the rows R5 to R8 can sequentially output the output signals OUT1 and OUT2 / OUT1 to OUT4 during the readout intervals RO. The readout intervals RO of the pixels PX arranged in the rows R1 to R4 and the reset intervals RST of the pixels PX arranged in the rows R5 to R8 can overlap with each other, the exposure intervals EXP of the pixels PX arranged in the rows R5 to R8 can be located after the readout intervals RO of the pixels PX arranged in the rows R1 to R4, and the readout intervals RO of the pixels PX arranged in the rows R1 to R4 can be located between the exposure intervals EXP of the pixels PX arranged in the rows R1 to R4 and the exposure intervals EXP of the pixels PX arranged in the rows R5 to R8.

[0075] In addition to the photo gate driver 143 can adjust the frequencies of the photo gate signals PGA and PGB / PGA to PGD differently according to the rows R1 to R4 as described with reference to Figure 7Cin addition to the frequency of the photogate signals PGA and PGB / PGA to PGD being adjusted differently according to the rows R1 to R4, Figure 7B the timing diagram can be substantially the same as Figure 7F the timing diagram.

[0076] Referring to Figure 7E , the photogate driver 143 can allow the photogate signals PGA and PGB / PGA to PGD to be differently delayed with respect to the light signal EL according to the rows R1 to R4 in the pixel block PB. For example, a time difference between the light signal EL emitted to the object 11 and the photogate signal PGA transmitted to the pixel PX during the exposure interval EXP can be set to values TD1 to TD4 (e.g., 0 ns, 100 ns, 200 ns, 300 ns) according to the rows R1 to R4. For example, a time difference between when the (first) light signal EL is emitted to the object 11 and when the photogate signal PGA for the row R1 is transmitted can be TD1 (e.g., 0 ns), a time difference between when the (second) light signal EL is emitted to the object 11 and when the photogate signal PGA for the row R2 is transmitted can be TD2 (e.g., 100 ns), a time difference between when the (third) light signal EL is emitted to the object 11 and when the photogate signal PGA for the row R3 is transmitted can be TD3 (e.g., 200 ns), and a time difference between when the (fourth) light signal EL is emitted to the object 11 and when the photogate signal PGA for the row R4 is transmitted can be TD4 (e.g., 300 ns). Unlike the example shown in Figure 7G , in other embodiments, some of the time differences between the light signal EL and the photogate signal PGA can be equal. In addition, the time differences between the light signal EL and the photogate signal PGA can vary according to the pixel block PB.

[0077] Referring to Figure 7G , unlike Figure 7H and as shown in Figure 7E , in other embodiments, the pixels PX of the pixel array 141 can perform a rolling readout operation. The pixels PX arranged in the rows R1 to R4 can be reset during the reset interval RST and can be exposed to the light signal RL during the exposure interval EXP to accumulate charge. The reset interval RST of the pixels PX arranged in the rows R5 to R8 can overlap with the exposure interval EXP of the pixels PX arranged in the rows R1 to R4. When the exposure interval of all of the pixels PX of the pixel array 141 ends, a readout operation of all of the pixels PX of the pixel array 141 can be initiated to occur sequentially.

[0078] Referring to Figure 7C , unlike Figure 7I and as shown in Figure 7HAs shown, in other embodiments, pixels PX of pixel array 141 can perform global readout operations. Pixels PX arranged in rows R1 to R8 can simultaneously output output signals OUT1 and OUT2 / OUT1 to OUT4 during mutually overlapping readout intervals RO. Furthermore, as in... Figure 7D or Figure 7F As shown in the example, based on rows R1 to R4 in pixel block PB, an application was performed. Figure 7G and Figure 7H The timing diagram of the photoelectric gate driver 143 can adjust the frequencies of the photoelectric gate signals PGA and PGB / PGA to PGD differently, or can allow the photoelectric gate signals PGA and PGB / PGA to PGD to be delayed differently relative to the optical signal EL.

[0079] Figure 7I It shows the result of Figures 8A-8C An example of one-dimensional optical scanning and pixel array scanning performed along the row direction by an electronic device. The following will primarily describe... Figure 1 The timing diagram and Figures 8A-8C The differences between the timing diagrams. Figures 7A-7I The photoelectric gate driver 143 of the ToF sensor 140b can transmit photoelectric gate signals PGA and PGB / PGA to PGD along the column direction D2. Figure 4B The pixel PX. The light scanning direction can be relative to the reference. Figures 8A-8C The column direction D2 is described in different row directions D1, and can correspond to one dimension. Optical signals RL can be sequentially incident on pixel blocks PB along row direction D1, which is the optical scanning direction. The transmission directions of photoelectric gate signals PGA and PGB / PGA to PGD can correspond to the optical scanning direction. For example, the directions can be different and can be perpendicular to each other. (See reference...) Figures 7A-7I A pixel block PB may include pixels PX arranged in each of columns C1 to C4, that is, pixels PX arranged in a column (or alternatively referred to as a "row"). For example, pixels PX of a pixel block PB may be set in the same columns but different rows R1 to R4. Figures 8A-8C Unlike the example shown, in other embodiments, a pixel block PB may include pixels arranged in multiple columns. For example, pixels PX of a pixel block PB may be located in different rows R1 to R4 and different columns C1 to C4. In any case, a pixel block PB may include pixels PX arranged in one or more columns, and the pixels PX of the pixel block PB may be exposed together to the light signal RL.

[0080] Reference Figures 8A-8C The pixels PX arranged in column C1 can be reset during the reset interval RST, exposed to the light signal RL during the exposure interval EXP to accumulate charge, and output signals OUT1 and OUT2 / OUT1 to OUT4 can be output during the readout interval RO. (As in...) Figure 8AAs in the above description, the pixels PX arranged in column C1 can sequentially output the output signals OUT1 and OUT2 / OUT1-OUT4 during the plurality of readout intervals RO. The readout interval RO of the pixel PX arranged in row R1 and column C1 can be located after the exposure interval EXP of the pixel PX arranged in column C1. The readout interval RO of the pixel PX arranged in row R2 and column C1 can be located after the readout interval RO of the pixel PX arranged in row R1 and column C1. The reset interval RST of the pixels PX arranged in column C2 can be located after the readout interval RO of the pixels PX arranged in column C1. The pixels PX arranged in columns C2-C4 can be sequentially operated substantially identically to the pixels PX arranged in column C1.

[0081] Referring to Figure 7C , unlike the normal readout operation of Figure 8B , in other embodiments, the pixels PX of the pixel array 141 can perform a rolling readout operation. The pixels PX arranged in column C1 can be reset during the reset interval RST and can be exposed to the light signal RL during the exposure interval EXP to accumulate charge. After the exposure interval EXP of the pixels PX arranged in column C1, the pixels PX arranged in column C2 can be reset during the reset interval RST and can be exposed to the light signal RL during the exposure interval EXP to accumulate charge. As in the above description, the pixels PX arranged in columns C3 and C4 can be reset and can be exposed to the light signal RL to accumulate charge. When the exposure interval of all the pixels PX of the pixel array 141 ends, the readout operation of all the pixels PX of the pixel array 141 can be sequentially initiated. In some cases, the reset operation of each column can be performed only by controlling the operation of the overflow gate signal OG in addition to the reset gate signal RG. The global reset operation can be performed immediately before the exposure operation of the entire pixel array, and the reset operation using the overflow gate signal OG can be performed only for each column. As in the above description, the pixels PX arranged in columns C1-C4 can sequentially output the output signals OUT1 and OUT2 / OUT1-OUT4 during the readout intervals RO. Figure 8A

[0082] Referring to Figure 7C , unlike Figure 8C and as shown in Figure 8B , in other embodiments, the pixels PX of the pixel array 141 can perform a global readout operation. The pixels PX arranged in columns C1-C4 can simultaneously output the output signals OUT1 and OUT2 / OUT1-OUT4 during the readout intervals RO overlapping each other.

[0083] In embodiments, as described with reference to Figure 7D , the application of Figure 7B ​The photo-gate driver 143 of the timing chart of FIG. 13 can adjust the frequencies of the photo-gate signals PGA and PGB / PGA to PGD differently according to the rows R1 to R4. In another embodiment, as in Figures 8A-8C the photo-gate driver 143 of the timing chart of FIG. 14 can allow the photo-gate signals PGA and PGB / PGA to PGD to be differently delayed with respect to the light signal EL according to the rows R1 to R4. Figure 7G

[0084] Figures 8A-8C An example of two-dimensional light scanning and pixel array scanning in the row direction and the column direction performed by an electronic device of FIG. 12 is shown. In Figures 9A-9F the controller 150 controls the light source 110 and the optical device 120 to perform one-dimensional light scanning. In Figure 1 the controller 150 controls the light source 110 and the optical device 120 to perform one-dimensional light scanning. In Figures 7A-8C the controller 150 controls the light source 110 and the optical device 120 to perform one-dimensional light scanning. In the controller 150 controls the light source 110 and the optical device 120 to perform one-dimensional light scanning. In

[0085] the controller 150 controls the light source 110 and the optical device 120 to perform one-dimensional light scanning. In Figures 9A-9FAccording to the direction of the light scan performed by the controller 150, components 142 to 146 can control the pixels PX of the pixel array 141. The pixels PX in row R1 and column C1, row R1 and column C2, row R1 and column C3, and row R1 and column C4 can be reset during the reset interval RST, can be sequentially exposed to the laser beam to accumulate charge during the exposure interval EXP, and can output output signals OUT1 and OUT2 / OUT1 to OUT4 during the readout interval RO. For example, the exposure intervals EXP of the pixels PX in row R1 and column C1, row R1 and column C2, row R1 and column C3, and row R1 and column C4 can be non-overlapping and can be sequentially set along the light scan direction. As with the pixels PX in row R1 and column C1, row R1 and column C2, row R1 and column C3, and row R1 and column C1, the remaining pixels PX can perform reset, exposure, and readout operations. However, because the light scanning direction is serpentine, the light scanning directions of pixels PX set in adjacent rows can be opposite to each other, and the directions in which the demodulation operation of the pixels PX is performed can be opposite to each other. For example, the exposure intervals EXP of pixels PX in row R4 and column C4, row R4 and column C3, row R4 and column C2, and row R4 and column C1 can be non-overlapping and can be set sequentially in a direction opposite to the light scanning direction of row R1.

[0086] Reference Figure 9A ,and Figure 9B Unlike normal readout operations, pixels PX of pixel array 141 can perform rolling readout operations. When the exposure interval of all pixels PX of pixel array 141 ends, the readout operation of all pixels PX of pixel array 141 can be initiated. For example, in... Figure 9A As shown in the diagram, pixels PX arranged in rows R1 to R4 can sequentially output output signals OUT1 and OUT2 / OUT1 to OUT4 during the readout interval RO. (See reference...) Figure 7C ,and Figure 9C Unlike other pixel arrays, pixels PX in pixel array 141 can perform global readout operations. The readout intervals RO of pixels PX arranged in rows R1 to R4 can overlap. For example, in Figure 9B In this way, the pixels PX arranged in rows R1 to R4 can simultaneously output output signals OUT1 and OUT2 / OUT1 to OUT4 during the overlapping readout intervals RO.

[0087] Reference Figure 7DThe exposure intervals of the pixels PX can not overlap each other. For example, the ToF sensor 140a / 140b can further include an overflow gate driver (not shown) that transmits an overflow gate signal OG to the pixel array 141 in the column direction D2. As another example, an overflow gate driver that transmits an overflow gate signal OG to the pixel array 141 in the row direction D1 can be integrated into the photo gate driver 143 of the ToF sensor 140b. In the case where the overflow gate signal OG is transmitted in the column direction D2, it is not a problem even if the photo gate signal is transmitted in the row direction D1 or the column direction D2.

[0088] Referring to Figures 9A-9C , the exposure intervals EXP of the pixels PX arranged in the same row R1 / R2 / R3 / R4 can overlap each other. Except for the above-described difference, Figures 9D-9F the timing chart of Figures 9D-9F may be similar, respectively. For example, the photo gate driver 142 of the ToF sensor 140a / 140b can transmit an overflow gate signal OG to the pixels PX in the row direction R1.

[0089] Figures 9A-9C An example of a two-dimensional light scan and a pixel array scan in the row direction and the column direction performed by the electronic device of Figures 10A-10F is shown. The controller 150 can control the light source 110 and the optical device 120 to perform a light scan in two dimensions of the row direction D1 and the column direction D2. The laser beam can sequentially be incident on the pixel PX of the first R1 row, the first C1 column, the pixel PX of the first R1 row, the second C2 column, the pixel PX of the first R1 row, the third C3 column, and the pixel PX of the first R1 row, the fourth C4 column. Then, the laser beam can sequentially be incident on the pixel PX of the second R2 row, the first C1 column, the pixel PX of the second R2 row, the second C2 column, the pixel PX of the second R2 row, the third C3 column, and the pixel PX of the second R2 row, the fourth C4 column. The laser beam can sequentially be incident on the remaining pixels PX as in the above description. For example, the light scan direction can be a zigzag direction, not a serpentine direction described with reference to Figure 1 .

[0090] Referring to Figures 9A-9F, the pixels PX of the first R1 row, the first C1 column, the first R1 row, the first C2 column, the first R1 row, the first C3 column, and the first R1 row, the first C4 column can be reset during the reset interval RST, can be sequentially exposed to the laser beam to accumulate charges during the exposure interval EXP, and can output the output signals OUT1 and OUT2 / OUT1 to OUT4 during the readout interval RO. The remaining pixels PX can perform the reset operation, the exposure operation, and the readout operation as in the pixels PX of the first R1 row, the first C1 column, the first R1 row, the first C2 column, the first R1 row, the first C3 column, and the first R1 row, the first C4 column. In addition to the direction of the light scan, i.e., the zigzag direction, by the controller 150, the components 142 to 146 can control the pixels PX of the pixel array 141. The pixels PX of the first R1 row, the first C1 column, the pixels PX of the first R1 row, the first C2 column, the pixels PX of the first R1 row, the first C3 column, and the pixels PX of the first R1 row, the first C4 column can be reset during the reset interval RST, can be sequentially exposed to the laser beam to accumulate charges during the exposure interval EXP, and can output the output signals OUT1 and OUT2 / OUT1 to OUT4. As in the pixels PX of the first R1 row, the first C1 column, the first R1 row, the first C2 column, the first R1 row, the first C3 column, and the first R1 row, the first C4 column, the remaining pixels PX can perform the reset operation, the exposure operation, and the readout operation. In addition to the direction of the light scan and the direction of controlling the pixels PX, Figure 10A the timing diagrams of Figures 10A-10F may be similar to those of

[0091] Figures 9A-9F shows an example of two-dimensional light scanning in the row direction and the column direction and pixel array scanning performed by the electronic device of Figures 11A-11F In Figure 1 , the size of the laser beam of the light signal RL can correspond to one pixel PX, or can be smaller than the size of one pixel PX. Conversely, in Figures 9A-10F , the size of the laser beam can be larger than the size of one pixel PX, and can correspond to, for example, 2 x 2 pixels PX. The size of the laser beam is not limited to the above example, and can correspond to m x n pixels (m and n are each an integer of 1 or more). In addition to the size of the laser beam, as in Figures 11A-11F , the controller 150 can control the light source 110 and the optical device 120 to perform light scanning in two dimensions of the row direction D1 and the column direction D2. The laser beam can sequentially be incident on the pixels PX of the first R1 row and the first R2 row, the first C1 column and the first C2 column, the pixels PX of the first R1 row and the first R2 row, the first C3 column and the first C4 column, the pixels PX of the first R1 row and the first R2 row, the first C5 column and the first C6 column, and the pixels PX of the first R1 row and the first R2 row, the first C7 column and the first C8 column, and then the laser beam can sequentially be incident on the pixels PX of the first R3 row and the first R4 row, the first C7 column and the first C8 column, the pixels PX of the first R3 row and the first R4 row, the first C5 column and the first C6 column, the pixels PX of the first R3 row and the first R4 row, the first C3 column and the first C4 column, and the pixels PX of the first R3 row and the first R4 row, the first C1 column and the first C2 column. As in the above description, the laser beam can sequentially be incident on the remaining pixels PX. For example, the light scan direction can be a serpentine direction.

[0092] Referring to Figures 9A-9F, the direction of the light scan performed by the controller 150 (i.e., the serpentine direction), the components 142-146 can control the pixels PX of the pixel array 141. The pixels PX arranged in the row R1 and the row R2 can be reset during the reset interval RST and can be sequentially exposed to the laser beam during the exposure interval EXP to accumulate charges. The pixels PX arranged in the row R1 can output the output signals OUT1 and OUT2 / OUT1-OUT4 during the readout interval RO, and then the pixels PX arranged in the row R2 can output the output signals OUT1 and OUT2 / OUT1-OUT4 during the readout interval RO. For example, the exposure intervals EXP of the pixels PX arranged in the column C1-C8 can not overlap with each other and can be sequentially arranged along the light scan direction. As another example, the exposure intervals EXP of the pixels PX arranged in the row R1 and the row R2, the column C1 and the column C2 can overlap with each other, the exposure intervals EXP of the pixels PX arranged in the row R1 and the row R2, the column C3 and the column C4 can overlap with each other, the exposure intervals EXP of the pixels PX arranged in the row R1 and the row R2, the column C5 and the column C6 can overlap with each other, and the exposure intervals EXP of the pixels PX arranged in the row R1 and the row R2, the column C7 and the column C8 can overlap with each other. In the embodiment shown in Figure 11A , the exposure intervals EXP of the pixels PX arranged in the row R1 and the row R2, the column C1 and the column C2, the row R1 and the row R2, the column C3 and the column C4, the row R1 and the row R2, the column C5 and the column C6, and the row R1 and the row R2, the column C7 and the column C8 can not overlap with each other. As in the pixels PX arranged in the row R1 and the row R2, the remaining pixels PX arranged in the row R3 and the row R4 can perform the reset operation, the exposure operation, and the readout operation. The pixels PX arranged in the row R7 and the row R8 can be reset during the reset interval RST and can be sequentially exposed to the laser beam in a direction opposite to the row direction D1 during the exposure interval EXP to accumulate charges. Figure 11A

[0093] Referring to Figure 11A , unlike the normal readout operation of Figure 11B , in other embodiments, the pixels PX of the pixel array 141 can perform a rolling readout operation. When the exposure interval of all the pixels PX of the pixel array 141 ends, the readout operation of all the pixels PX of the pixel array 141 can be initiated. As in Figure 11A , the pixels PX arranged in the row R1 to the row R8 can sequentially output the output signals OUT1 and OUT2 / OUT1-OUT4 during the readout interval RO.

[0094] Referring to Figure 7C , unlike the normal readout operation of​Figure 11C In other embodiments, however, the readout intervals RO of the pixels PX arranged in the rows R1 to R8 can overlap with each other. As in Figure 11B , the pixels PX of the pixel array 141 can perform a global readout operation. The pixels PX arranged in the rows R1 to R8 can output the output signals OUT1 and OUT2 / OUT1 to OUT4 simultaneously during readout intervals RO that overlap with each other. As described with reference to Figure 7D , the ToF sensor 140a / 140b can further include an overflow gate driver (not shown) that transmits an overflow gate signal OG to the pixel array 141 along the column direction D2 or can be integrated into the photogate driver 143 of the ToF sensor 140b.

[0095] With reference to Figures 9A-9C , the exposure intervals of the pixels PX arranged in pairs of rows (e.g., (R1, R2), (R3, R4, (R5, R6), or (R7, R8)) can overlap with each other. Except for the above differences, Figures 11D-11F , the timing diagrams can be similar to those of Figures 11D-11F , respectively. As described with reference to Figures 11A-11C , the photogate driver 142 of the ToF sensor 140a / 140b can transmit an overflow gate signal OG to the pixels PX along the row direction R1.

[0096] Figures 9D-9F An example of a two-dimensional light scan along the row direction and the column direction and a pixel array scan performed by the electronic device of Figures 12A-12F is shown. In Figure 1 Figures 12A-12F , the size of the laser beam can be larger than the size of one pixel PX and can correspond to, for example, 2x2 pixels PX. Except for the size of the laser beam, as Figures 10A to 1 IF , the controller 150 can control the light source 110 and the optical device 120 to perform a light scan in two dimensions of the row direction D1 and the column direction D2. The laser beam can sequentially be incident on the pixels PX of the R1st and R2nd rows, the C1st and C2nd columns, the R1st and R2nd rows, the C3rd and C4th columns, the R1st and R2nd rows, the C5th and C6th columns, and the R1st and R2nd rows, the C7th and C8th columns, and then the laser beam can sequentially be incident on the pixels PX of the R3rd and R4th rows, the C1st and C2nd columns, the R3rd and R4th rows, the C3rd and C4th columns, the R3rd and R4th rows, the C5th and C6th columns, and the R3rd and R4th rows, the C7th and C8th columns. As in the above description, the laser beam can sequentially be incident on the remaining pixels PX. For example, the light scan direction can be a zigzag direction, instead of the serpentine direction described with reference to Figures 11A to 1 IF .

[0097] Referring to Figure 12A , according to a direction of light scanning (i.e., a zigzag direction) performed by the controller 150, the components 142 to 146 can control the pixels PX of the pixel array 141. The pixels PX arranged in the row R1 and the row R2 can be reset during the reset interval RST and can be sequentially exposed to the laser beam during the exposure interval EXP to accumulate charges. The pixels PX arranged in the row R1 can output the output signals OUT1 and OUT2 / OUT1 to OUT4 during the readout interval RO, and then the pixels PX arranged in the row R2 can output the output signals OUT1 and OUT2 / OUT1 to OUT4 during the readout interval RO. The remaining pixels PX, as in the pixels PX arranged in the row R1 and the row R2, can perform the reset operation, the exposure operation, and the readout operation. In addition to the direction of light scanning and the direction of controlling the pixels PX, the timing diagrams of Figures 12A to 12F may be similar to the respective timing diagrams of Figures 11A to 1 IF .

[0098] Referring to Figures 5A to 6B described Figures 7A to 12F the operations of the pixels PX in the reset interval RST, the exposure interval EXP, and the readout interval RO shown in the timing diagrams of Figures 7A to 12F , during the interval corresponding to the dotted line, the overflow transistor OF of the corresponding pixel PX can be turned on by the activated overflow gate signal OF, and the charges accumulated by the phototransistors PA and PB can be removed.

[0099] Figure 13 A cross-sectional view of a semiconductor package module according to an embodiment of the inventive concept is illustrated. In the semiconductor package module 1000, a semiconductor package 1200 can be attached to a package substrate 1100 through an adhesive layer 1110. The semiconductor package 1200 can include a semiconductor chip 1210, a semiconductor chip 1220 mounted under the semiconductor chip 1210, and a semiconductor chip 1230 mounted under the semiconductor chip 1220. The semiconductor chips 1210, 1220, and 1230 can have different functions. The semiconductor chip 1210 and the semiconductor chip 1220 can have the same width. The sidewalls of the semiconductor chip 1210 and the semiconductor chip 1220 can be vertically aligned. The semiconductor chip 1210 and the semiconductor chip 1220 can contact each other. A rerouting pattern 1221 can be disposed under the semiconductor chip 1220. For example, the semiconductor chip 1210 can be a ToF sensor including the ToF sensor 140 described with reference to FIG. 1. For another example, the semiconductor chip 1220 can be a logic chip for driving the semiconductor chip 1210. As another example, the semiconductor chip 1210 can include a ToF sensor including the ToF sensor 140 described with reference to FIG. 1. Figures 1 to 12F For another example, the semiconductor chip 1220 can be a logic chip for driving the semiconductor chip 1210. As another example, the semiconductor chip 1210 can include a ToF sensor including the ToF sensor 140 described with reference to FIG. 1. Figures 1 to 12FThe pixel array 141 of the ToF sensor 140 is described, and the semiconductor chip 1220 can include the remaining components 142 to 146 of the ToF sensor 140. For example, the semiconductor package module 1000 having the semiconductor chips 1210 and 1220 configured to include the ToF sensor can be disposed as Figure 1 part of the electronic device 100 is illustrated.

[0100] Further referring to Figure 13 , the width of the semiconductor chip 1230 can be smaller than the width of the semiconductor chip 1220. The sidewall of the semiconductor chip 1230 can not be vertically aligned with the sidewall of the semiconductor chip 1220. For example, the semiconductor chip 1230 can be a memory chip for storing data generated from the semiconductor chip 1210 and / or the semiconductor chip 1220. The sidewall of the semiconductor chip 1230 can be covered by the molding layer 1240. The logic chip can be bonded to the ToF sensor, and the memory chip can be bonded to the logic chip in a flip-chip bonding scheme. This can provide a fast readout function compared to a case where the memory chip is away from the ToF sensor. In a case where the memory chip is a dynamic random access memory (DRAM), the position and size of the input / output terminals can be standardized to reduce the cost by mass production. In this case, the size of the logic chip and the DRAM chip can be different, and the position of the input / output terminals can not be aligned. The semiconductor chip 1220 capable of being the logic chip can include a rewiring pattern 1221, thereby increasing the degree of freedom of the wiring for connecting the semiconductor chip 1220 and the semiconductor chip 1230. The upper conductive pad 1211 of the semiconductor chip 1210 and the package substrate 1100 can be connected with the wiring 1212.

[0101] As Figure 13 illustrated, a holder 1300 can be disposed on the package substrate 1100. The holder 1300 can be spaced apart from the semiconductor package 1200. The holder 1300 can be attached to the package substrate 1100 by using an adhesive layer 1310. The holder 1300 can have a shape of a closed curve in a plan view. The holder 1300 can be adjacent to and surround the edge of the semiconductor package 1200, and can have a hollow structure. The holder 1300 can be formed of a polymer material such as polyamide. A transparent substrate 1400 can be disposed on the holder 1300. The transparent substrate 1400 can be formed of transparent glass or plastic. The transparent substrate 1400 can be spaced apart from the semiconductor package 1200, and can provide an empty space "S". The solder bumps 1120 can be attached to the lower surface of the package substrate 1100. A plurality of lenses 1500 and 1600 corresponding to the lens part 130, a spacer 1700, and a light-shielding layer 1510 can be attached to the holder 1300 to be disposed on the transparent substrate 1400 above the semiconductor package 1200.

[0102] Figure 14 It shows Figure 1 Examples of applications of electronic devices. Figure 1 The electronic device 100 can be made by Figure 14 Electronic devices implemented or applicable to 2000 Figure 14 Electronic device 2000. Electronic device 2000 may be referred to as a "computing system," "memory system," "electronic system," or "communication system." For example, electronic device 2000 may be a desktop computer, laptop computer, tablet computer, mobile device, smartphone, personal digital assistant (PDA), portable multimedia player (PMP), wearable device, video game console, workstation, server, or device capable of using or supporting mobile industry processor interfaces. The interface protocol proposed by the alliance is applicable to data processing devices, home appliances, black boxes, unmanned aerial vehicles, etc.

[0103] like Figure 14 As shown, the electronic device 2000 may include a system-on-a-chip (SoC) 2100, a display 2220, and an image sensor 2230. The SoC 2100 may also include a DigRF master 2110, a Display Serial Interface (DSI) master 2120, a Camera Serial Interface (CSI) master 2130, and a physical layer (PHY) 2140. The DSI master 2120 can communicate with the DSI device 2225 of the display 2220 via DSI. For example, a serializer SER may be implemented in the DSI master 2120, and a deserializer DES may be implemented in the DSI device 2225. The CSI master 2130 can communicate with the CSI device 2235 of the image sensor 2230 via CSI. For example, a deserializer DES may be implemented in the CSI master 2130, and a serializer SER may be implemented in the CSI device 2235. The image sensor 2230 may be a reference... Figures 1 to 12F The described ToF sensor 140 or semiconductor package module 1000.

[0104] The electronic device 2000 may also include a radio frequency (RF) chip 2240 that communicates with the system-on-chip 2100. The RF chip 2240 may include a physical layer (PHY) 2242, a DigRF slave device 2244, and an antenna 2246. For example, the physical layer 2242 and the physical layer 2140 can be communicated via... The DigRF interface proposed by the consortium exchanges data with each other. The electronic device 2000 can further include a working memory 2250 and an embedded / card storage 2255. The working memory 2250 and the embedded / card storage 2255 can store and output data associated with the system on chip 2100. The embedded storage 2255 can be embedded in the electronic device 2000, and the card storage 2255, which is a removable device, can be mounted on the electronic device 2000. The electronic device 2000 can communicate with external devices / systems through communication modules, such as a wireless broadband (Wibro) 2261, a code division multiple access (CDMA) 2263, a global system for mobile communications (GSM) 2265, a wideband code division multiple access (WCDMA) 2267, a long term evolution (LTE) 2269, a global positioning system (GPS) 2280, or a Bluetooth module 2282. The electronic device 2000 can further include a speaker 2270, a microphone (MIC) 2275, a global positioning system (GPS) device 2280, and a bridge chip 2290.

[0105] The electronic device according to an embodiment of the present inventive concept can sense a relatively distant object with limited power by using an object scanning operation of a light source and an optical device and a demodulation operation based on a scanning direction of a ToF sensor, and can also remove a shadow phenomenon according to a position of a pixel by the object scanning operation and the demodulation operation.

[0106] Although the present inventive concept has been described with reference to exemplary embodiments of the present inventive concept, it will be apparent to those having ordinary skill in the art that various changes and modifications can be made thereto without departing from the spirit and scope of the present inventive concept as set forth in the appended claims.

Claims

1. An electronic device comprising: A time-of-flight sensor, comprising a pixel array; A light source, configured to emit light signals; and An optical device configured to project the light signal onto a region of an object, the region corresponding to a plurality of pixel blocks comprising pixels of the pixel array. Each pixel in the pixel includes: Multiple taps, each tap including a phototransistor, a first transmission transistor connected to the phototransistor, a memory element connected to the first transmission transistor, a second transmission transistor connected to the memory element, a floating diffusion region connected to the second transmission transistor, and a readout circuit connected to the floating diffusion region, and An overflow transistor, disposed adjacent to the phototransistor, has a first terminal connected to the plurality of tapped phototransistors, a second terminal connected to a power supply voltage, and a gate to which an overflow gate signal is applied. The overflow transistor is configured to remove charge from the phototransistor for the remaining time excluding the exposure interval based on the overflow gate signal. The first pixel block among the plurality of pixel blocks includes the first pixel among the pixels, and the first pixel is arranged along a first direction. The second pixel block among the plurality of pixel blocks includes the second pixel among the pixels, and the second pixel is arranged along the first direction. The first pixel block and the second pixel block are arranged along a second direction different from the first direction. The first pixel is configured to operate in response to a photoelectric gate signal having a first frequency synchronized with the optical signal, and The second pixel is configured to operate in response to a photoelectric gate signal having a second frequency synchronized with the optical signal, the second frequency being different from the first frequency.

2. The electronic device according to claim 1, further comprising: A driver configured to transmit, along the second direction, the photoelectric gate signal having the first frequency and the photoelectric gate signal having the second frequency, synchronized with the optical signal, to the phototransistor.

3. The electronic device according to claim 2, wherein, The direction in which the photoelectric gate signal having the first frequency and the photoelectric gate signal having the second frequency are transmitted corresponds to the direction in which the light signal reflected from the object is sequentially incident on the pixel array.

4. The electronic device according to claim 2, wherein, The optical device is configured to control the projection direction of the light signal to perform a one-dimensional optical scan of the object.

5. The electronic device according to claim 1, further comprising: A controller configured to control the first pixel to reset during a first reset interval, accumulate charge during a first exposure interval, and output a first output signal during a first readout interval, and The controller is also configured to control the second pixel to reset during the second reset interval, accumulate charge during the second exposure interval, and output a second output signal during the second readout interval.

6. The electronic device according to claim 5, wherein, The first readout interval occurs between the first exposure interval and the second exposure interval, and The second readout interval occurs after the second exposure interval.

7. The electronic device according to claim 5, wherein, The first readout interval occurs after the second exposure interval, and The second readout interval occurs after the first readout interval.

8. The electronic device according to claim 5, wherein, The first readout interval and the second readout interval overlap in time and occur after the second exposure interval.

9. The electronic device according to claim 5, wherein, The first time difference between when a first light signal in the light signal is emitted to the object during the first exposure interval and when the photogate signal having the first frequency is transmitted to the phototransistor of each first pixel in the first pixel is different from the second time difference between when a second light signal in the light signal is emitted to the object during the second exposure interval and when the photogate signal having the second frequency is transmitted to the phototransistor of each second pixel in the second pixel.

10. The electronic device according to claim 1, in, The optical device controls the projection direction of the light signal to perform a two-dimensional light scan of the object, and The light signal reflected from the object is sequentially incident on the first pixel along the first direction.

11. The electronic device according to claim 10, wherein, The light signal reflected from the object is sequentially incident on the second pixel along a direction selected from the first direction and the direction opposite to the first direction.

12. The electronic device of claim 10, further comprising: A driver configured to transmit the overflow gate signal to the overflow transistor along a direction selected from the first direction and the second direction.

13. An electronic device comprising: A time-of-flight sensor, comprising a pixel array; A light source, configured to emit a first optical signal and a second optical signal; and An optical device configured to project a first optical signal onto a first region of an object corresponding to a first pixel block of the pixel array, and to project a second optical signal onto a second region of the object corresponding to a second pixel block of the pixel array. Wherein, the pixels of the first pixel block are arranged along a first direction, the pixels of the second pixel block are arranged along a first direction, and the first pixel block and the second pixel block are arranged along a second direction. Each pixel in the pixel includes: Multiple taps, each tap including a phototransistor, a first transmission transistor connected to the phototransistor, a memory element connected to the first transmission transistor, a second transmission transistor connected to the memory element, a floating diffusion region connected to the second transmission transistor, and a readout circuit connected to the floating diffusion region, and An overflow transistor, disposed adjacent to the phototransistor, has a first terminal connected to the plurality of tapped phototransistors, a second terminal connected to a power supply voltage, and a gate to which an overflow gate signal is applied. The overflow transistor is configured to remove charge from the phototransistor for the remaining time excluding the exposure interval based on the overflow gate signal. The first pixel is configured to operate in response to a photoelectric gate signal having a first frequency synchronized with the optical signal, and The second pixel is configured to operate in response to a photoelectric gate signal having a second frequency synchronized with the optical signal, the second frequency being different from the first frequency.

14. The electronic device according to claim 13, wherein, The optical device includes one of a microelectromechanical system mirror and a rotating prism.

15. The electronic device according to claim 13, wherein, The light source includes a vertical cavity surface-emitting laser array, and The optical device is a projection optical device.

16. A light detection and ranging system, comprising: A light source, configured to emit light signals; An optical device configured to control the projection direction of the light signal and scan an object with a light signal having a controlled projection direction; A time-of-flight sensor includes a pixel array comprising multiple pixel blocks that demodulate the light signal reflected from the object based on a scanning direction. Each pixel in the plurality of pixel blocks includes: Multiple taps, each tap including a phototransistor, a first transmission transistor connected to the phototransistor, a memory element connected to the first transmission transistor, a second transmission transistor connected to the memory element, a floating diffusion region connected to the second transmission transistor, and a readout circuit connected to the floating diffusion region, and An overflow transistor, disposed adjacent to the phototransistor, has a first terminal connected to the plurality of tapped phototransistors, a second terminal connected to a power supply voltage, and a gate to which an overflow gate signal is applied. The overflow transistor is configured to remove charge from the phototransistor for the remaining time excluding the exposure interval based on the overflow gate signal. The first pixel block among the plurality of pixel blocks includes the first pixel among the pixels, and the first pixel is arranged along a first direction. The second pixel block among the plurality of pixel blocks includes the second pixel among the pixels, and the second pixel is arranged along the first direction. The first pixel block and the second pixel block are arranged along a second direction different from the first direction. The first pixel is configured to operate in response to a photoelectric gate signal having a first frequency synchronized with the optical signal, and The second pixel is configured to operate in response to a photoelectric gate signal having a second frequency synchronized with the optical signal, the second frequency being different from the first frequency.

17. The optical detection and ranging system according to claim 16, wherein, The pixels of each of the plurality of pixel blocks are arranged in at least one row.

18. An electronic device comprising: A time-of-flight sensor, comprising a pixel array; A light source, configured to emit light signals; and An optical device configured to project the light signal onto a region of an object, the region corresponding to a plurality of pixel blocks comprising pixels of the pixel array. Each pixel in the pixel includes: Multiple taps, each tap including a phototransistor, a floating diffusion region, and a readout circuit connected to the floating diffusion region, and An overflow transistor, disposed adjacent to the phototransistor, has a first terminal connected to the plurality of tapped phototransistors, a second terminal connected to a power supply voltage, and a gate to which an overflow gate signal is applied. The overflow transistor is configured to remove charge from the phototransistor for the remaining time excluding the exposure interval based on the overflow gate signal. The time-of-flight sensor includes: A first driver, which is positioned along a first direction starting from the pixel array, is configured to control the overflow transistor, and A second driver, which is disposed along a second direction starting from the pixel array, is configured to control the readout operation of the readout circuit. The first pixel block among the plurality of pixel blocks includes the first pixel among the pixels, and the first pixel is arranged along a first direction. The second pixel block among the plurality of pixel blocks includes the second pixel among the pixels, and the second pixel is arranged along the first direction. The first pixel block and the second pixel block are arranged along a second direction different from the first direction. The first pixel is configured to operate in response to a photoelectric gate signal having a first frequency synchronized with the optical signal, and The second pixel is configured to operate in response to a photoelectric gate signal having a second frequency synchronized with the optical signal, the second frequency being different from the first frequency.

19. The electronic device according to claim 18, wherein, Each of the plurality of taps further includes: a first transfer transistor inserted between the phototransistor and the floating diffusion region; a storage element connected to the first transfer transistor; and a second transfer transistor connected to the storage element. Wherein, the first driver controls the overflow transistor along the first direction, and The time-of-flight sensor further includes a third driver configured to control the first transmission transistor and the storage element along the first direction.

20. An electronic device comprising: A light source, configured to emit light signals; and A semiconductor packaging module includes a first semiconductor chip and a second semiconductor chip mounted below the first semiconductor chip. The first semiconductor chip includes a time-of-flight sensor, which includes a pixel array, wherein each pixel of the pixel array includes: Multiple taps, each tap including a phototransistor, a first transmission transistor connected to the phototransistor, a memory element connected to the first transmission transistor, a second transmission transistor connected to the memory element, a floating diffusion region connected to the second transmission transistor, and a readout circuit connected to the floating diffusion region, and An overflow transistor, disposed adjacent to the phototransistor, has a first terminal connected to the plurality of tapped phototransistors, a second terminal connected to the power supply voltage, and a gate to which an overflow gate signal is applied. The second semiconductor chip includes: a first driver configured to control the overflow transistor via the overflow gate signal to remove charge from the phototransistor for the remaining time excluding the exposure interval; and a second driver configured to control the readout operation of the readout circuit. The electronic device further includes an optical device configured to project the light signal onto a region of an object, the region corresponding to a plurality of pixel blocks of the pixel array. The first pixel block among the plurality of pixel blocks includes the first pixel among the pixels, and the first pixel is arranged along a first direction. The second pixel block among the plurality of pixel blocks includes the second pixel among the pixels, and the second pixel is arranged along the first direction. The first pixel block and the second pixel block are arranged along a second direction different from the first direction. The first pixel is configured to operate in response to a photoelectric gate signal having a first frequency synchronized with the optical signal, and The second pixel is configured to operate in response to a photoelectric gate signal having a second frequency synchronized with the optical signal, the second frequency being different from the first frequency.

21. The electronic device according to claim 20, wherein, The semiconductor packaging module further includes: A packaging substrate on which the first semiconductor chip and the second semiconductor chip are mounted; A retainer, disposed on the packaging substrate and surrounding and spaced apart from the first and second semiconductor chips; and Multiple lenses are attached to the retainer and disposed above the first semiconductor chip and the second semiconductor chip.

22. The electronic device of claim 21, further comprising: A transparent substrate is attached to the retainer and disposed between the plurality of lenses and the first semiconductor chip and the second semiconductor chip.

23. The electronic device according to claim 20, wherein, The semiconductor packaging module further includes a third semiconductor chip, which is mounted below the second semiconductor chip. The third semiconductor chip is configured to store data generated by the first semiconductor chip and the second semiconductor chip.

24. The electronic device according to claim 20, wherein, The optical device includes one of a microelectromechanical system mirror and a rotating prism.

25. The electronic device according to claim 20, wherein, The light source includes a vertical cavity surface-emitting laser array, and The optical device is a projection optical device.

26. The electronic device according to claim 20, wherein, The plurality of taps includes two taps.

27. The electronic device according to claim 20, wherein, The plurality of taps includes four taps.

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