Source / drain epitaxial layer of a transistor

Abstract

The present disclosure relates to source / drain epitaxial layers of transistors. The present disclosure relates to methods for forming source / drain (S / D) epitaxial structures having a hexagonal shape. The method includes forming a fin structure including a first portion and a second portion proximate to the first portion, forming a gate structure on the first portion of the fin structure, and recessing the second portion of the fin structure. The method also includes growing an S / D epitaxial structure on the recessed second portion of the fin structure, wherein growing the S / D epitaxial structure includes exposing the recessed second portion of the fin structure to a precursor and one or more reactant gases to form a portion of the S / D epitaxial structure. Growing the S / D epitaxial structure also includes exposing the portion of the S / D structure to an etch chemistry and exposing the portion of the S / D epitaxial structure to a hydrogen treatment to enhance growth of the S / D epitaxial structure.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductor devices, and more specifically to source / drain epitaxial layers of transistors. Background Technology

[0002] The source / drain epitaxial layers formed in a fin field-effect transistor (FFET) may suffer material loss during subsequent processing operations (e.g., cleaning, etching, and thermal processing). Due to this material loss, the source / drain epitaxial layers undergo size reduction, partially exposing the fin structure. This, in turn, leads to transistor performance degradation, performance variations, and reliability issues. Summary of the Invention

[0003] According to a first aspect of this disclosure, a semiconductor structure is provided, comprising: a substrate; a fin structure on the substrate, the fin structure including a first portion and a second portion above the first portion; an isolation layer on the substrate, the isolation layer covering the bottom sidewall of the second portion of the fin structure and the sidewall of the first portion of the fin structure; and a source / drain (S / D) epitaxial structure grown on the first portion of the fin structure such that the distance between the facets of the S / D epitaxial structure near the apex corner of the second portion of the fin structure is greater than about 2 nm.

[0004] According to a second aspect of this disclosure, a method for forming a semiconductor structure is provided, comprising: forming a fin structure including a first portion and a second portion adjacent to the first portion; forming a gate structure on the first portion of the fin structure; recessing the second portion of the fin structure; and growing a source / drain (S / D) epitaxial structure on the recessed second portion of the fin structure, wherein growing the S / D epitaxial structure comprises: exposing the recessed second portion of the fin structure to a precursor and one or more reactive gases to form a portion of the S / D epitaxial structure; exposing the portion of the S / D epitaxial structure to an etching chemical substance; and exposing the portion of the S / D epitaxial structure to hydrogen treatment to enhance the growth of the S / D epitaxial structure.

[0005] According to a third aspect of this disclosure, a method for forming a semiconductor structure is provided, comprising: forming a fin structure on a substrate; forming a gate structure on a portion of the fin structure; etching a portion of the fin structure adjacent to the gate structure; and growing a source / drain (S / D) epitaxial structure on the etched portion of the fin structure, wherein growing the S / D epitaxial structure comprises: partially growing the S / D epitaxial structure on the etched portion of the fin structure; exposing the partially grown S / D epitaxial structure to an etching chemical substance, wherein the etching chemical substance terminates the surface of the partially grown S / D epitaxial structure with chlorine atoms; and treating the partially grown S / D epitaxial structure with hydrogen to increase the growth rate of the partially grown S / D epitaxial structure in a direction perpendicular to the (111) crystal plane. Attached Figure Description

[0006] The various aspects of this disclosure can be best understood in conjunction with the accompanying drawings, based on the following detailed description.

[0007] Figure 1A and Figure 1B It is an isometric view of a source / drain epitaxial structure formed between two fin structures according to some embodiments.

[0008] Figure 1C This is an isometric view of the source / drain epitaxial structure formed at the end of the fin structure according to some embodiments.

[0009] Figure 1D This is a cross-sectional view of the source / drain epitaxial structure formed at the end of the fin structure according to some embodiments.

[0010] Figure 1E This is an isometric view of a source / drain epitaxial structure formed between two fin structures according to some embodiments, wherein one fin structure has a gate structure formed thereon.

[0011] Figure 2 This is a flowchart of a method for forming a hexagonal source / drain epitaxial structure according to some embodiments.

[0012] Figure 3 and Figure 4 This is an isometric view of an intermediate structure during the fabrication of a source / drain epitaxial structure, according to some embodiments.

[0013] Figures 5-7 This is a cross-sectional view of an intermediate structure during the fabrication of a source / drain epitaxial structure having a hexagonal shape, according to some embodiments. Detailed Implementation

[0014] The following disclosure provides numerous different embodiments or examples for implementing various features of the provided subject matter. Specific examples of components and arrangements are described below to simplify this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, forming a first feature on a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which an additional feature may be formed between the first and second features such that the first and second features do not directly contact each other.

[0015] Furthermore, spatially related terms (such as "below," "below," "lower than," "above," "upper," etc.) may be used herein to readily describe the relationship of one element or feature shown in the figures relative to another element(s) or feature(s). These spatially related terms are intended to cover different orientations of the device in use or operation other than those shown in the figures. The device may be oriented in other ways (rotated 90 degrees or in other orientations), and the spatially related descriptors used herein may be interpreted accordingly.

[0016] As used herein, the term "nominal" refers to the expected or target value set during the design phase of a product or process for the operation of a component or process, and the range of values ​​higher and / or lower than the desired value. This range of values ​​is typically due to minor variations in manufacturing processes or tolerances.

[0017] In some embodiments, the terms "approximately" and "substantially" may refer to a given number of values ​​that vary within 5% of that value (e.g., ±1%, ±2%, ±3%, ±4%, ±5%). These values ​​are merely examples and are not intended to be limiting. The terms "approximately" and "substantially" may refer to a percentage of a value as interpreted by one or more persons skilled in the art in accordance with the teachings herein.

[0018] As used in this article, the term "vertical" refers to something that is nominally perpendicular to the surface of the substrate.

[0019] In a fin-based field-effect transistor (“finFET”), a source / drain (S / D) epitaxial structure is grown in physical contact with the ends of the transistor’s fin structure, such that each end of the fin structure is substantially covered by the side surface of the S / D epitaxial structure. Since the S / D epitaxial structure comprises multiple crystalline epitaxial layers and can have crystallographic orientations with higher growth rates than other crystallographic orientations, the final shape of the S / D epitaxial structure is controlled by the growth rate achieved along each crystallographic orientation. For example, the S / D epitaxial structure is grown into a rhomboid shape because the growth rate in the direction perpendicular to the (100) silicon crystal plane (e.g., GR) is...

[100] ) higher than the growth rate in the direction perpendicular to the (111) silicon crystal plane (e.g., GR

[111] The resulting rhomboid-shaped S / D epitaxial structure forms an edge-shaped top surface at the location where the (111) silicon crystal planes meet. Due to the consideration of width and height in the finFET design, the rhomboid-shaped S / D epitaxial structure is grown so that its edge-shaped top surface covers the apex corner of the end of the fin structure.

[0020] S / D epitaxial structures are susceptible to material loss during subsequent processing (e.g., cleaning, etching, thermal processing, etc.). As a result of these processes, S / D epitaxial structures undergo size reduction, which can leave the apex corners of the fins exposed. This size reduction may not be uniform across each S / D epitaxial structure. For example, some S / D epitaxial structures may suffer greater material loss than others. This non-uniformity of material loss introduced by the process alters the final size of the S / D epitaxial structure and ultimately leads to variations in the overall transistor performance. Furthermore, the exposed ends of the fins become potential defect locations.

[0021] To address the aforementioned challenges, the embodiments described herein relate to methods for forming S / D epitaxial structures with a hexagonal shape. The hexagonal S / D epitaxial structure described herein can be superior to other S / D epitaxial structures (e.g., rhomboid-shaped S / D epitaxial structures) because the hexagonal S / D epitaxial structure is sufficient to cover the ends of the fin structure even after material loss due to subsequent processing operations. In some embodiments, the hexagonal S / D epitaxial structure is grown such that the apex angle of the hexagonal S / D epitaxial structure adjacent to the ends of the fin structure is raised relative to the apex angle of the fin structure. In some embodiments, the angle of the hexagonal S / D epitaxial structure near the apex angle of the fin structure is raised by about 2 nm or more above the apex angle of the fin structure. In some embodiments, the growth of the hexagonal S / D epitaxial structure is achieved by introducing hydrogen treatment during growth. According to some embodiments, hydrogen treatment can increase the growth rate in a direction perpendicular to the (111) silicon crystal plane (e.g., GR).

[111] ).

[0022] According to some embodiments, Figure 1A These are isometric views of hexagonal S / D epitaxial structures 100 (“S / D epitaxial structure 100”) formed on substrate 130 between adjacent fin structures 110 and 120. Figure 1A As shown, the S / D epitaxial structure 100 substantially covers the end surfaces 110s and 120s of the fin structures 110 and 120. Figure 1A Other structural elements shown include isolation layer 140 and S / D spacer 150.

[0023] In some embodiments, fin structures 110 and 120 are ends of individual fin structures 160 separated by S / D epitaxial structures 100. For example, the S / D epitaxial structure 100 is grown on a recessed portion of the individual fin structure 160. Figure 1A In the diagram, the recessed portion of a single fin structure 160 (not shown) is located below the top surface of the isolation layer 140. For example, Figure 1B The one without the S / D spacer 150 is shown. Figure 1A The structure makes the bottom 100b of the S / D epitaxial structure 100 on the recessed portion of a single fin 160 visible. For example... Figure 1B As shown, the S / D epitaxial structure 100 extends through the isolation layer 140 to the end surfaces 110s and 120s of the ends 110 and 120 of the fin structure 160.

[0024] In some embodiments, the S / D epitaxial structure 100 is grown on the fin structure (e.g., Figure 1C On the recessed end of the fin structure 170 shown.

[0025] Based on the above, the S / D epitaxial structure 100 can be used as follows: Figure 1A Between the fin structures shown, in such a way Figure 1B On the recessed middle portion of the single fin structure shown, in such a way Figure 1C The recessed end of the single fin structure shown, or a combination thereof. The aforementioned combinations are not limiting, and other combinations are within the spirit and scope of this disclosure.

[0026] In some embodiments, Figure 1A , Figure 1B and Figure 1C Each fin structure shown may have a gate structure formed thereon. For ease of description, these gate structures are not shown. Figure 1A , Figure 1B and Figure 1C As shown in the figure. This is done by way of example, not limitation. Figure 1E It shows Figure 1AThe structure is illustrated in the figure, wherein an exemplary gate structure 190 is formed on the fin structure 120. In some embodiments, a similar gate structure (not shown) is formed on the fin structure 110. In some embodiments, the gate structure 190 is a sacrificial gate structure, comprising a gate electrode 190a, a gate dielectric 190b, a gate spacer 190c, and a capping layer 190d. In some embodiments, the S / D epitaxial structure 100 is adjacent to the gate spacer 190c of the gate structure 190. The gate spacer 190c electrically isolates the gate electrode 190a from the S / D epitaxial structure 100. In some embodiments, the gate structure 190 is replaced by a metal gate structure after the S / D epitaxial structure 100 is formed. For ease of description only, the gate structure formed on the fin structure will not be shown in the following figures. However, the gate structure on the fin structure presented herein (e.g., gate structure 190) is within the spirit and scope of this disclosure.

[0027] In some embodiments, Figure 1A , Figure 1B and Figure 1C The fin structures 160 and 170 shown comprise a single crystalline material or a stack of crystalline layers in the form of nanosheets. The aforementioned crystalline material (or crystalline nanosheet layers) may include silicon (Si), germanium (Ge), compound semiconductors (e.g., silicon carbide, gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), indium arsenide (InAs), indium antimonide (InSb)), alloy semiconductors (e.g., silicon-germanium SiGe, gallium arsenide phosphide (GaAsP), aluminum indium arsenide (AlInAs), aluminum gallium arsenide (AlGaAs), gallium indium arsenide (GaInAs), gallium indium phosphide (GaInP), gallium indium arsenide (GaInAsP)) or combinations thereof. Similarly, the substrate 130 may comprise a crystalline material similar to or different from the crystalline material of fin structures 110 and 120 or individual fin structures 160 and 170.

[0028] Fin structures can be formed via patterning using any suitable method. For example, fin structures can be patterned using one or more photolithography processes, including dual-patterning or multi-patterning processes. Dual-patterning or multi-patterning processes can combine photolithography and self-alignment processes, thereby allowing the creation of patterns with, for example, smaller pitches than that achievable using a single direct photolithography process. For example, a sacrificial layer formed on a substrate 130 is patterned using a photolithography process. Spacers are formed alongside the patterned sacrificial layer using a self-alignment process. The sacrificial layer is then removed, and the remaining spacers can then be used to pattern the fin structure.

[0029] For illustrative purposes and ease of description, the substrate 130 and fin structure discussed herein will be described in the context of a monolithic crystalline silicon fin structure. Other materials and / or nanosheet layers as described above may be used based on the disclosure herein. These other materials and layers are within the spirit and scope of this disclosure.

[0030] In some embodiments, and with reference to Figure 1C The S / D epitaxial structure 100 has a substantially flat top surface 100t parallel to the silicon crystal plane (100). In some embodiments, the silicon crystal plane (100) is parallel to the xy plane—for example, parallel to the top surface of the substrate 130 and the top surface of the fin structure 170. Compared to a rhomboid-shaped S / D structure, the top surface 100t of the S / D epitaxial structure 100 provides a larger contact area for the S / D contacts formed thereon. Therefore, according to some embodiments, the S / D epitaxial structure 100 provides a lower contact resistance compared to a rhomboid-shaped S / D epitaxial structure.

[0031] The direction perpendicular to the silicon crystal plane (100) is denoted as

[100] , and parallel to the vertical direction z. According to some embodiments, the facet 100f of the S / D epitaxial structure 100 is parallel to the silicon crystal plane (111) or its equivalent crystal plane {111}. In some embodiments, the facet 100f is referred to as the "(111) facet". The direction perpendicular to the silicon crystal plane (111) or its equivalent crystal plane {111} is denoted as

[111] , such as... Figure 1C As shown. In some embodiments, the silicon crystal plane (110) is parallel to the xz plane—for example, parallel to the sidewall surface 170s of the fin structure 170. The direction perpendicular to (110) is denoted as

[110] , and parallel to the yz plane, as shown. Figure 1C As shown.

[0032] In some embodiments, Figure 1D yes Figure 1C A cross-sectional view along line AB. As described above, the S / D epitaxial structure 100 substantially covers the end 170e of the fin structure 170. More specifically, the small facet 100f parallel to the (111) silicon plane forms an angle θ such that the shortest distances d1 and d2 between the top small facet 100f (near the apex of the fin structure) and the apex of the fin structure 170 are greater than about 2 nm (e.g., d1, d2 > 2 nm). According to some embodiments, this ensures that the S / D epitaxial structure 100 still covers the apex of the fin structure 160, even when the S / D structure 100 undergoes a size reduction during one or more subsequent processing operations. Figure 1DAs shown, the top surface 100t of the S / D epitaxial structure 100 is raised relative to the top surface 170t of the fin structure 170. For example, the height difference between 100t and 170t can be as high as about 30 nm. The aforementioned characteristics of the S / D epitaxial structure 100 are also present. Figure 1A , Figure 1B and Figure 1C It is shown in the isometric view.

[0033] In some embodiments, the width W of the S / D epitaxial structure 100 SD The width is substantially similar to that of a rhombus-shaped S / D epitaxial structure. Therefore, the S / D epitaxial structure 100 can achieve a finFET density similar to that of a rhombus-shaped S / D epitaxial structure. In some embodiments, the width W... SD Within the range of approximately 5nm to approximately 100nm. For example... Figure 1D As shown, the width W of the S / D epitaxial structure 100 SD Parallel to the yz plane or Figure 1C The

[110] direction is shown. In some embodiments, the width W SD The S / D epitaxial structure 100, smaller than approximately 5 nm, has d1 and d2 values ​​less than approximately 2 nm. Conversely, the width W... SD An S / D epitaxial structure 100 larger than approximately 100 nm can contact an S / D epitaxial structure from an adjacent finFET, thereby causing an electrical short circuit.

[0034] like Figure 1D As shown, the width Wt of the top surface 100t of the S / D epitaxial structure 100 is parallel to the width W. SD (e.g., parallel to the yz plane or

[110] direction). In some embodiments, the width Wt of the top surface 100t is in the range of about 2 nm to about 80 nm.

[0035] In some embodiments, the angle θ formed between the facets 100f of the S / D epitaxial structure 100 is between approximately 109° and 180°. According to some embodiments, the angle θ is greater than the angle formed by the facets of the rhomboid-shaped S / D epitaxial structure. This is because the angle formed by the facets of the rhomboid-shaped S / D epitaxial structure is limited to a range between approximately 40° and approximately 70°. Due to this constraint, the facets of the rhomboid-shaped S / D epitaxial structure intersect above the top surface 170t of the fin structure 170 and form an edge opposite to the planar top surface 100t. This, in turn, limits the distance between the facets and the apex angles of the fin structure 170 to less than approximately 2 nm, even when the S / D width is substantially equal to W. SD Time (e.g., between approximately 5 nm and approximately 100 nm). For example, in a rhomboid-shaped S / D epitaxial structure, the distance between the facet and the apex of the fin structure 170 (e.g., Figure 1DThe equivalent values ​​of distances d1 and d2 shown are in the range of 0 nm to approximately 2 nm. This means that if the rhomboid-shaped S / D epitaxial structure suffers material loss due to one or more subsequent processing operations, the apex of the fin structure may be exposed.

[0036] As described above, the S / D epitaxial structure 100 is formed on the recessed portion of the fin structure 170. For example, refer to... Figure 1D The S / D epitaxial structure 100 is grown on the recessed portion 170r of the fin structure 170. In the initial stage of epitaxial growth, the S / D epitaxial layer of the S / D epitaxial structure 100 is constrained by the S / D spacer 150. Therefore, the bottom of the S / D epitaxial structure 100 is facetless and grows in the vertical direction (e.g., along the z-direction), while lateral growth is constrained by the S / D spacer 150. In some embodiments, the S / D spacer 150 is formed before the fin structure 170 is recessed, and the S / D spacer 150 has a height 150. H The height is 150. H Within the range of approximately 10 nm to approximately 18 nm. In some embodiments, the fin structure 170 has a recess amount 180 below the top surface of the isolation layer 140, ranging from approximately 5 nm to approximately 10 nm. Once the growth of the S / D epitaxial layer exceeds the limitation of the S / D spacer 150, then as Figure 1D The diagram shows the restoration of lateral growth. In some embodiments, such as... Figure 1D As shown, the height H of the S / D epitaxial structure 100, measured from the top surface of the recessed portion 170r, is... SD In the range of approximately 90nm to approximately 95nm.

[0037] According to some embodiments, Figure 2 This is a flowchart of method 200, which describes... Figure 1C and Figure 1D The manufacturing process of the S / D epitaxial structure 100 shown. Method 200 is not limited to... Figure 1C and Figure 1D The S / D epitaxial structure 100 shown can be used to form Figure 1A and Figure 1B The S / D epitaxial structure 100 is shown. Other manufacturing operations may be performed between the various operations of method 200, and may be omitted for clarity only. These various operations are within the spirit and scope of this disclosure. Furthermore, not all operations are required to perform the disclosure provided herein. Some operations may be performed simultaneously, or in combination with… Figure 2 The different sequences shown are executed in different orders. Embodiments of this disclosure are not limited to method 200. Reference will be made to... Figures 3 to 7 To describe exemplary method 200.

[0038] Reference Figure 2 At that time, method 200 begins with operation 210 and forming the fin structure on a substrate having an isolation layer surrounding the bottom of the fin structure (e.g., Figure 3 The process of the fin structure 300 shown. In some embodiments, the fin structure 300 is similar to... Figure 1C The fin structure 170 shown and Figure 1A and Figure 1B The fin structure 160 is shown. As discussed above with respect to fin structures 170 and 160, fin structure 300 can be monolithic (e.g., made of a single-crystal material) or can include alternating layers of different materials (e.g., alternating epitaxially grown nanosheets). For example, fin structure 300 can be made of crystalline silicon (C-Si) or can include stacks of alternating layers, such as alternating C-Si and crystalline silicon-germanium (SiGe) nanosheets.

[0039] although Figure 3 This includes only a single fin structure, but this is not limiting. For example, as described above, additional fin structures such as fin structure 300 can be formed on substrate 130. For example, groups of two or more fin structures can be formed on different regions of substrate 130 depending on the chip layout.

[0040] Fin structure 300 is separated from adjacent fin structures (not shown) by an isolation layer 140. In some embodiments, isolation layer 140 is a silicon-based dielectric deposited on fin structure 300 and substrate 130, subsequently planarized by a chemical mechanical polishing (CMP) process, and recessed to the height covering the bottom of fin structure 300 by an isotropic etching process. Figure 3 The portion of the fin structure 300 covered by the isolation layer 140 is shown in dashed lines in the following figures. Figure 3 As shown, the fin structure 300 is formed to physically contact the substrate 130, and the insulating layer 140 is formed such that it covers the bottom sidewall surface and bottom end of the fin structure 300. In some embodiments, and after the aforementioned recessing operation, the fin structure 300 has a height H above the recessed insulating layer 140, the height H being in the range of about 30 nm to about 35 nm. Furthermore, the fin structure 300 has a width W in the range of about 3.5 nm to 5 nm.

[0041] In some embodiments, a portion of the fin structure 300 is... Figure 3 The gate structure, represented by shaded region 310, is covered (e.g., masked). By way of example and not limitation, the gate structure covers the middle portion of fin structure 300 and divides fin structure 300 into two exposed ends 300A and 300B, as shown. Figure 3As shown. The shading portion of the fin structure 300 includes the top and sidewall portions of the fin structure 300. Furthermore, a gate structure (as shown in shaded area 310) extends over the isolation layer 140. In some embodiments, the gate structure is... Figure 3 Extending over adjacent fin structures not shown. By way of example and not limitation, adjacent fin structures similar to fin structure 300 may share a single gate structure. In some embodiments, the gate structure represented by shaded region 310 serves as a mask layer for subsequent etching operations.

[0042] Reference Figure 2 At the same time, method 200 continues to operate 220 and on the bottom sidewall surface of fin structure 300 (e.g., on such as Figure 3 The process for forming the S / D spacer 150 on the exposed ends 300A and 300B shown is illustrated. By way of example, and not limitation, the S / D spacer 150 can be formed as follows: S / D spacer material can be blanket-deposited on the ends 300A and 300B, the gate structure represented by the shaded region 310, and the isolation layer 140. Subsequently, an anisotropic etching process is used to etch the S / D spacer material to remove it from the horizontal surface (e.g., a surface parallel to the xy plane, such as the horizontal surfaces of the ends 300A and 300B, the isolation layer 140, and the shaded region 310). As a result, the remaining S / D spacer material on the bottom sidewall surfaces of the ends 300A and 300B forms the S / D spacer 150. In some embodiments, if desired, additional photolithography and etching operations can be used to remove S / D spacer material not removed from the vertical sidewall surfaces of the gate structure.

[0043] As described above, the height of the S / D spacer 150 is in the range of about 3 nm to about 5 nm. By way of example and not limitation, the S / D spacer material may include nitrides that can be selectively etched relative to the fin structure 300 (e.g., silicon) and the isolation layer 140 (e.g., silicon oxide-based dielectric) (e.g., silicon nitride, silicon carbonitride, silicon oxynitride, etc.).

[0044] Reference Figure 2 At the same time, method 200 continues with operation 230 and the process of etching fin structure 300 between S / D spacers 150 to recess fin structure 300 (e.g., recessed ends 300A and 300B) relative to isolation layer 140, as... Figure 4 As shown. In some embodiments, the portion of the fin structure 300 not covered by the gate structure (e.g., shaded region 310) is not recessed, such as... Figure 4As shown. In some embodiments, the etching chemicals used in operation 230 to cause the fin structure 300 to be recessed include chlorine-based or fluorine-based gases that can selectively etch silicon relative to nitrides or oxides. As described above, the fin structure 300 is recessed below the top surface of the isolation layer 140 by a recess amount 200 in the range of about 5 nm to about 10 nm (e.g., Figure 1D (As shown). According to some embodiments, operation 230 forms a recessed opening 400 between the S / D spacers 150, such as... Figure 4 As shown.

[0045] In some embodiments, if the fin structure 300 comprises alternating nanosheets, such as silicon nanosheets and silicon-germanium nanosheets, the etching process can be a dry etching process, a wet etching process, or a combination thereof. In some embodiments, the etching chemicals are selective for Si nanosheets and SiGe nanosheets. In some embodiments, the dry etching process can include an etchant having the following gases: oxygen-containing gas, fluorine-containing gas (e.g., carbon tetrafluoride (CF4), sulfur hexafluoride (SF6), difluoromethane (CH2F2), trifluoromethane (CHF3), and / or hexafluoroethane (C2F6)), chlorine-containing gas (e.g., chlorine (Cl2), chloroform (CHCl3), carbon tetrachloride (CCl4), and / or boron trichloride (BCl3)), bromine-containing gas (e.g., hydrobromic acid (HBr) and / or tribromomethane (CHBr3)), iodine-containing gas, other suitable etching gases, and / or plasma, or a combination thereof. Wet etching processes may include etching in dilute hydrofluoric acid (DHF), potassium hydroxide (KOH) solution, ammonia, a solution containing hydrofluoric acid (HF), nitric acid (HNO3), acetic acid (CH3COOH), or combinations thereof. In some embodiments, the etching chemicals substantially do not etch the isolation layer 140, the S / D spacer 150, and the gate stack (e.g., the shaded region 310).

[0046] In some embodiments, Figure 5 yes Figure 4 The fin structure 300 shown is a cross-sectional view along line CD. Figure 5 In the middle, the unrecessed portion of the fin structure 300 (e.g., the portion of the fin structure 300 that is covered by the gate structure) is located behind the recessed portion 300r of the fin structure 300.

[0047] Reference Figure 2Meanwhile, method 200 continues the process of growing the S / D epitaxial structure 100 on the recessed portion 300r of the fin structure 300 between the S / D spacer 150 and 240. In some embodiments, the S / D epitaxial structure of the n-type finFET includes strained carbon-doped silicon (Si:C), phosphorus-doped silicon (Si:P), or arsenic-doped silicon (Si:As). The S / D epitaxial structure for the p-type finFET includes strained boron-doped SiGe (SiGe:B), boron-doped Ge (Ge:B), or boron-doped germanium-tin (GeSn:B). By way of example and not limitation, the amount of P incorporated into the S / D epitaxial structure of the n-type finFET can be about 3 × 10⁻⁶. 21 atoms / cm -3 Furthermore, the amount of boron incorporated into the S / D epitaxial structure of a p-type finFET can be approximately 1 × 10⁻⁶. 21 atoms / cm -3 In some embodiments, P and B dopants can be incorporated during growth by using, for example, phosphine and diborane, respectively. By way of example, and not limitation, the concentration of C in Si:C can be equal to or less than about 5 atomic percent (at.%). The concentration of Ge in SiGe can be in the range of about 20 at.% to about 40 at.%. Furthermore, the concentration of Sn in GeSn can be in the range of about 5 at.% to about 10 at.%. The foregoing dopants and atomic concentrations are exemplary and not limiting. Therefore, other dopants and atomic concentrations are within the spirit and scope of the embodiments described herein.

[0048] In some embodiments, the S / D epitaxial structure may comprise one or more layers sequentially formed with different dopant and / or atomic concentrations. According to some embodiments, such as Figure 1C and Figure 1D As shown in Figure 100, the S / D epitaxial structure is grown to have a hexagonal shape. By way of example, and not limitation, the S / D epitaxial structure can be deposited by chemical vapor deposition (CVD) at the following temperatures: approximately 680 °C for Si:P and Si:As; between approximately 600 °C and approximately 700 °C for Si:C; approximately 620 °C for SiGe; between approximately 300 °C and approximately 400 °C for GeSn; and between approximately 500 °C and approximately 600 °C for Ge.

[0049] In some embodiments, when H2 and / or N2 are present, SiH4 and / or dichlorosilane (DCS) precursors are used to form Si:C, Si:P, or Si:As S / D epitaxial structures. When H2, N2, helium (He), argon (Ar), or a combination thereof are present, SiH4, silane (Si2H6), or germanane (GeH4) precursors are used to form SiGe S / D epitaxial structures.

[0050] As described above, in the early stages of the growth process, the S / D spacer 150 inhibits the lateral growth of the S / D epitaxial structure and promotes the vertical growth, such as... Figure 6 The S / D epitaxial structure 100 is shown in the figure. Once the S / D epitaxial structure 100 is raised above the S / D spacer 150, the facet begins to form. In some embodiments, and in reference Figure 1C At that time, if the growth rate (GR) along the

[100] direction

[100] ) compared to the growth rate along the

[111] direction (GR)

[111] Much higher (e.g., 5 to 10 times higher) (e.g., GR)

[100] >>GR

[111] If ), a rhomboid-shaped S / D epitaxial structure is formed. On the other hand, if GR

[100] Compared to GR

[111] Much lower (e.g., 5 to 10 times lower) (e.g., GR)

[100] < <GR

[111] This forms a hexagonal S / D epitaxial structure, similar to... Figure 1A -D represents the S / D epitaxial structure 100. In some embodiments, in order to obtain Figure 1A The hexagonal shape of the S / D epitaxial structure 100 shown in -D requires adjustment of the growth conditions of the S / D epitaxial structure 100 in order to accelerate the growth rate along the

[111] direction and suppress or delay the growth rate along the

[100] direction.

[0051] In some embodiments, hydrochloric acid (HCl) vapor is introduced during the growth of the S / D epitaxial structure 100 in method 200 to remove the nuclei of the S / D epitaxial material from the surfaces of the surrounding layers (e.g., the isolation layer 140, the S / D spacer 150, and the gate structure represented by the shaded region 310). Thus, the HCl vapor removes (e.g., etches) any growth of the S / D epitaxial material from the surface outside the recessed end 300r of the fin structure 300. During HCl vapor exposure, chlorine atoms are chemisorbed onto the exposed surfaces of the S / D epitaxial material, and the surfaces of the S / D epitaxial structure become chlorine-terminated (e.g., the surfaces of the S / D epitaxial structure are chemically passivated by chlorine atoms). In some embodiments, the density of chemisorbed chlorine atoms on the {111} surface is higher than on other surfaces, such as the {100} surface. In some embodiments, when the prebody and reactive gas are reintroduced and the growth process resumes, the chlorine-terminated surfaces inhibit the growth of the facet 100f compared to the top surface 100t. In other words, the growth rate (GR) along the

[111] direction was artificially suppressed by chemisorbing chlorine atoms onto the surface of the S / D epitaxial structure.

[111] This is an undesirable side effect of chlorine-terminated surfaces, because, as mentioned above, when GR

[111] (GR

[100] ) greater than GR

[111] At that time, the S / D epitaxial structure grows into a rhomboid shape. Furthermore, for chlorine-terminated surfaces, GR...

[100] and GR

[111] The difference depends on the growth temperature. This means that for S / D epitaxial structures grown at high temperatures, GR...

[100] and GR

[111] The differences are even greater. For example, the GR of Si:C epitaxial layers grown at 700℃

[100] and GR

[111] Compared to GR GeSn epitaxial layers grown at low temperatures (e.g., between about 300°C and about 400°C)

[100] and GR

[111] Large. This effect can produce p-type and n-type S / D epitaxial structures with different widths and small plane angles.

[0052] In some embodiments, in order to form S / D epitaxial structures with consistent width and small planar angles, a hydrogen treatment (“H treatment”) is introduced after exposure to HCl vapor to increase the growth rate (GR) along the

[111] direction.

[111] And promotes the growth of hexagonal S / D epitaxial structures. In some embodiments, the H treatment also increases the growth rate (GR) along the

[110] direction.

[110] ).

[0053] In some embodiments, the H-treatment results in a hydrogen-chlorine exchange process during which chlorine atoms on the surface of the S / D epitaxial structure are replaced by hydrogen atoms to form a hydrogen-terminated (H-terminated) surface (e.g., the surface of the S / D epitaxial structure is chemically passivated by hydrogen atoms). The H-terminated surface results in a favorable growth rate shift between the

[111] and

[100] directions. In some embodiments, the H-treatment includes exposing the chlorine-terminated surface to atomic hydrogen (H2) (e.g., hydrogen gas) or hydrogen radicals generated by a remote hydrogen plasma whose ions have been "stripped" (e.g., by using an ion filter). In some embodiments, undesirable ion bombardment and / or charge transfer may occur if ions are present in the plasma during the H-treatment. In some embodiments, the H-treatment is performed at a process pressure between about 0.1 Torr and about 10 Torr and a process temperature between about 50°C and about 400°C. Radio frequency (RF) or direct current (DC) plasma sources are used within the spirit and scope of this disclosure. In some embodiments, the plasma power may be in the range of about 200 W to about 5 kW.

[0054] In some embodiments, the growth process of the S / D epitaxial structure can be described as follows. The growth process begins with the introduction of precursors and reactive gases. Figure 5 The structure is used to initiate the growth of the S / D epitaxial structure 100, such as... Figure 6 As shown. During this operation, a thicker layer of S / D epitaxial material is formed on the recessed portion 300r, and a thinner layer is formed substantially on the surrounding surfaces, such as the isolation layer 140, the S / D spacer 150, and the surface of the gate structure indicated by the shaded region 310. Subsequently, growth is interrupted and the structure is exposed to HCl vapor to remove the thin layer of S / D epitaxial material from the surrounding surfaces outside the recessed portion 300r. During the HCl vapor exposure, portions of the S / D epitaxial material are also removed (e.g., etched) from the partially fabricated S / D epitaxial structure 100. However, since the thickness of the S / D epitaxial material is thicker on the recessed portion 300r and thinner on other surfaces, sufficient S / D epitaxial material remains on portion 300r after the HCl vapor exposure operation. As described above, after HCl vapor exposure, the exposed surfaces of the partially fabricated S / D epitaxial structure 100 become chlorine-terminated.

[0055] Subsequently, the partially fabricated S / D epitaxial structure 100 is exposed to H treatment comprising molecular hydrogen or non-ionic hydrogen radicals so that the Cl-terminated surface can be converted into an H-terminated surface. In some embodiments, when the precursor and reactive gas are reintroduced to resume the growth of the S / D epitaxial structure 100, the growth rate along

[100] (e.g., GR) is...

[100] In contrast, the H-terminated surface promotes the growth of the facet 100f (e.g., increases the growth rate along the

[111] direction, GR).

[111] Therefore, the growth mode of the S / D epitaxial structure 100 is derived from GR.

[100] >>GR

[111] Transform into GR

[100] < <GR

[111] In some embodiments, due to the H process described above, therefore GR

[111] Become more than GR

[100] Approximately 5 to 10 times.

[0056] The above process operations of precursor exposure, HCl vapor exposure, and H treatment can be repeated in N cycles to produce... Figure 7The hexagonal S / D epitaxial structure 100 is shown. In some embodiments, the H processing time (also referred to as "exposure time") in each cycle N is between about 1 s and about 100 s (e.g., about 10 s). In some embodiments, the exposure time in one cycle may be the same as or different from the exposure time in other cycles. For example, in one cycle, the H processing time may be about 10 s, and in subsequent cycles, the H processing time may be about 10 s, longer than about 10 s, or shorter than about 10 s. Figure 7 The dashed lines in the diagram represent S / D epitaxial structures 100 at different growth stages. When... Figure 1D The values ​​d1 and d2 shown are equal to or greater than approximately 2 nm and W SD The growth process of the S / D epitaxial structure 100 terminates when the wavelength is between approximately 5 nm and approximately 100 nm.

[0057] In some embodiments, process parameters of the H treatment (e.g., exposure time, hydrogen dose, and plasma power) can be used to adjust Figure 1D The angle θ between the small planes 100f is shown. For example, as the exposure time of the H treatment increases in each cycle, the angle θ increases.

[0058] As described above, the precursor exposure, HCl vapor exposure, and H treatment are performed consecutively in N cycles. In some embodiments, N is greater than about 9 (e.g., N>9) to produce Figure 7 The hexagonal S / D epitaxial structure 100 shown is illustrated. Furthermore, each of the N cycles includes an H process with an exposure time between approximately 1 s and approximately 100 s.

[0059] The embodiments described herein relate to S / D epitaxial structures having a hexagonal shape. The hexagonal S / D epitaxial structures described herein have advantages over other S / D epitaxial structures (e.g., rhomboid-shaped S / D epitaxial structures) because the hexagonal S / D epitaxial structure is sufficient to cover the ends of the fin structure even after material loss during subsequent processing operations. In some embodiments, the hexagonal S / D epitaxial structure is grown such that the apex angle of the hexagonal S / D epitaxial structure adjacent to the ends of the fin structure is raised relative to the apex angle of the fin structure. In some embodiments, the angle of the hexagonal S / D epitaxial structure is raised by at least 2 nm above the apex angle of the fin structure. In some embodiments, an H treatment is introduced during the growth of the S / D epitaxial structure to promote the growth of small facets parallel to the (111) silicon crystal plane. In some embodiments, the H treatment is introduced after exposure to HCl vapor. The H treatment can transform the chlorine-terminated surface of the S / D epitaxial structure into a hydrogen-terminated surface, which increases the growth rate in the direction perpendicular to the (111) silicon crystal plane.

[0060] In some embodiments, a structure includes a substrate having a fin structure, the fin structure further including a first portion and a second portion above the first portion. The structure also includes an isolation layer on the substrate, the isolation layer covering the bottom sidewall of the second portion of the fin structure and the sidewall of the first portion of the fin structure. Furthermore, the structure includes an S / D epitaxial structure grown on the first portion of the fin structure such that the distance between the facets of the S / D epitaxial structure near the apex corner of the second portion of the fin structure is greater than about 2 nm.

[0061] In some embodiments, a method includes forming a fin structure including a first portion and a second portion adjacent to the first portion, forming a gate structure on the first portion of the fin structure, and recessing the second portion of the fin structure. The method further includes growing an S / D epitaxial structure on the recessed second portion of the fin structure, wherein growing the S / D epitaxial structure includes exposing the recessed second portion of the fin structure to a precursor and one or more reactive gases to form a portion of the S / D epitaxial structure. Growing the S / D epitaxial structure further includes exposing the portion of the S / D epitaxial structure to an etching chemical and exposing the portion of the S / D epitaxial structure to hydrogen treatment to enhance the growth of the S / D epitaxial structure.

[0062] In some embodiments, a method includes: forming a fin structure on a substrate, forming a gate structure on a portion of the fin structure, and etching a portion of the fin structure adjacent to the gate structure. The method further includes growing an S / D epitaxial structure on the etched portion of the fin structure, wherein growing the S / D epitaxial structure includes partially growing the S / D epitaxial structure on the etched portion of the fin structure. Growing the S / D epitaxial structure further includes exposing the partially grown S / D epitaxial structure to an etching chemical to terminate the surface of the partially grown S / D epitaxial structure with chlorine atoms, and treating the partially grown S / D epitaxial structure with hydrogen to increase the growth rate of the partially grown S / D epitaxial structure in a direction perpendicular to the (111) crystal plane.

[0063] It should be understood that the summary of the detailed description portion, rather than the disclosure portion, is intended to be used to interpret the claims. As contemplated by the inventors(s), the summary of the disclosure portion may set forth one or more embodiments of this disclosure, but not all possible embodiments, and therefore is not intended to limit the dependent claims in any way.

[0064] The foregoing has outlined features of several embodiments, enabling those skilled in the art to better understand various aspects of this disclosure. Those skilled in the art should understand that they can readily use this disclosure as a basis for designing or modifying other processes and structures to achieve the same purpose and / or realize the same advantages of the embodiments described herein. Those skilled in the art should also recognize that such equivalent constructions do not depart from the spirit and scope of this disclosure, and that various changes, substitutions, and modifications can be made herein without departing from the spirit and scope of this disclosure.

[0065] Example 1. A semiconductor structure comprising: a substrate; a fin structure on the substrate, the fin structure including a first portion and a second portion above the first portion; an isolation layer on the substrate, the isolation layer covering a bottom sidewall of the second portion of the fin structure and a sidewall of the first portion of the fin structure; and a source / drain (S / D) epitaxial structure grown on the first portion of the fin structure such that the distance between the facets of the S / D epitaxial structure near the apex of the second portion of the fin structure is greater than about 2 nm.

[0066] Example 2. The semiconductor structure according to Example 1, wherein the small plane near the apex of the second portion of the fin structure is parallel to the (111) crystal plane.

[0067] Example 3. The semiconductor structure according to Example 1, wherein the S / D epitaxial structure has a hexagonal shape.

[0068] Example 4. The semiconductor structure according to Example 1, wherein the top surface of the S / D epitaxial structure is substantially flat and parallel to the top surface of the fin structure.

[0069] Example 5. The semiconductor structure according to Example 1, wherein the side surface of the S / D epitaxial structure is in contact with the side surface of the second portion of the fin structure.

[0070] Example 6. The semiconductor structure according to Example 1, wherein another facet of the S / D epitaxial structure is adjacent to the facet and forms an angle greater than about 70° with the facet.

[0071] Example 7. The semiconductor structure according to Example 1, wherein the width of the S / D epitaxial structure along the direction perpendicular to the (110) crystal plane is between about 5 nm and about 100 nm.

[0072] Example 8. The structure according to Example 1, wherein the S / D epitaxial structure includes a top surface having a width along a direction perpendicular to the (110) crystal plane, the width being in the range of about 2 nm to about 80 nm.

[0073] Example 9. The semiconductor structure according to Example 1 further includes: a spacer on the isolation layer, the spacer abutting the bottom sidewall of the S / D epitaxial structure; and a gate structure on the second portion of the fin structure, wherein the gate structure abuts a portion of the side surface of the S / D epitaxial structure that does not overlap with the side surface of the second portion of the fin structure.

[0074] Example 10. A method for forming a semiconductor structure, comprising: forming a fin structure including a first portion and a second portion adjacent to the first portion; forming a gate structure on the first portion of the fin structure; recessing the second portion of the fin structure; and growing a source / drain (S / D) epitaxial structure on the recessed second portion of the fin structure, wherein growing the S / D epitaxial structure comprises: exposing the recessed second portion of the fin structure to a precursor and one or more reactive gases to form a portion of the S / D epitaxial structure; exposing the portion of the S / D epitaxial structure to an etching chemical substance; and exposing the portion of the S / D epitaxial structure to hydrogen treatment to enhance the growth of the S / D epitaxial structure.

[0075] Example 11. The method according to Example 10, wherein exposing a portion of the S / D epitaxial structure to the etching chemical substance comprises: exposing the fin structure to hydrochloric acid vapor to remove S / D epitaxial material on the surface other than a second portion of the recess of the fin structure.

[0076] Example 12. The method according to Example 10, wherein exposing a portion of the S / D epitaxial structure to the hydrogen treatment comprises: exposing a portion of the S / D epitaxial structure to hydrogen gas or hydrogen radicals generated by an ion-free remote plasma.

[0077] Example 13. The method according to Example 10, wherein exposing a portion of the S / D epitaxial structure to the hydrogen treatment includes: converting the chlorine-terminated surface of the S / D epitaxial structure into a hydrogen-terminated surface.

[0078] Example 14. The method according to Example 10, wherein growing the S / D epitaxial structure includes repeatedly growing the S / D epitaxial structure for more than 9 cycles, and wherein the hydrogen treatment for each cycle includes an exposure time between about 1 second and about 100 seconds.

[0079] Example 15. A method for forming a semiconductor structure, comprising: forming a fin structure on a substrate; forming a gate structure on a portion of the fin structure; etching a portion of the fin structure adjacent to the gate structure; and growing a source / drain (S / D) epitaxial structure on the etched portion of the fin structure, wherein growing the S / D epitaxial structure comprises: partially growing the S / D epitaxial structure on the etched portion of the fin structure; exposing the partially grown S / D epitaxial structure to an etching chemical substance, wherein the etching chemical substance terminates the surface of the partially grown S / D epitaxial structure with chlorine atoms; and treating the partially grown S / D epitaxial structure with hydrogen to increase the growth rate of the partially grown S / D epitaxial structure in a direction perpendicular to the (111) crystal plane.

[0080] Example 16. The method according to Example 15, wherein processing the partially grown S / D epitaxial structure includes: exposing the partially grown S / D epitaxial structure to hydrogen gas or non-ionized hydrogen radicals.

[0081] Example 17. The method according to Example 15, wherein growing the S / D epitaxial structure includes: forming an S / D epitaxial structure having a hexagonal shape with adjacent (111) facets, the adjacent (111) facets forming an angle greater than about 70°.

[0082] Example 18. The method according to Example 15, wherein growing the S / D epitaxial structure includes: growing an S / D epitaxial structure having a hexagonal shape with a top (111) facet, the distance between the top (111) facet and the apex corner of the fin structure covered by the gate structure being greater than about 2 nm.

[0083] Example 19. The method according to Example 15, wherein processing the partially grown S / D epitaxial structure includes: terminating the surface of the partially grown S / D epitaxial structure with hydrogen atoms.

[0084] Example 20. The method according to Example 15, wherein processing the partially grown S / D epitaxial structure includes: converting the chlorine-terminated surface of the partially grown S / D epitaxial structure into a hydrogen-terminated surface.

Claims

1. A semiconductor structure, comprising: a substrate; a fin structure on the substrate, the fin structure including a first portion and a second portion higher than the first portion; an isolation layer on the substrate, the isolation layer covering a bottom sidewall of the second portion of the fin structure and a sidewall of the first portion of the fin structure; and a source / drain (S / D) epitaxial structure grown on the first portion of the fin structure, wherein the S / D epitaxial structure has a hydrogen-terminated surface, a thickness of the S / D epitaxial structure on the hydrogen-terminated surface along a first crystal direction perpendicular to a (111) crystal plane is greater than a thickness along a second crystal direction perpendicular to a (100) crystal plane, and a distance of a facet of the S / D epitaxial structure to a top corner of the second portion of the fin structure is greater than 2 nm. the facet proximate to the top corner of the second portion of the fin structure is parallel to the (111) crystal plane.

2. The semiconductor structure of claim 1, wherein, the S / D epitaxial structure has a hexagonal shape.

3. The semiconductor structure of claim 1, wherein, a top surface of the S / D epitaxial structure is substantially flat and parallel to a top surface of the fin structure.

4. The semiconductor structure of claim 1, wherein, a side surface of the S / D epitaxial structure is in contact with a side surface of the second portion of the fin structure.

5. The semiconductor structure of claim 1, wherein, another facet of the S / D epitaxial structure is adjacent to the facet and forms an angle greater than 70° with the facet.

6. The semiconductor structure of claim 1, wherein, a width of the S / D epitaxial structure along a direction perpendicular to a (110) crystal plane is between 5 nm and 100 nm.

7. The semiconductor structure of claim 1, wherein, the S / D epitaxial structure includes a top surface having a width along a direction perpendicular to a (110) crystal plane, the width being in a range between 2 nm and 80 nm.

8. The semiconductor structure of claim 1, wherein, 9. The semiconductor structure of claim 1, further comprising: a spacer on the isolation layer, the spacer being adjacent to a bottom sidewall of the S / D epitaxial structure; and a gate structure on the second portion of the fin structure, wherein the gate structure is adjacent to a portion of the side surface of the S / D epitaxial structure that does not overlap with the side surface of the second portion of the fin structure.

10. A method for forming a semiconductor structure, comprising: forming a fin structure including a first portion and a second portion proximate to the first portion; forming a gate structure on the first portion of the fin structure; recessing the second portion of the fin structure; and growing a source / drain (S / D) epitaxial structure on the recessed second portion of the fin structure, wherein growing the S / D epitaxial structure includes: exposing the recessed second portion of the fin structure to a precursor and one or more reactant gases to form a portion of the S / D epitaxial structure; exposing the portion of the S / D epitaxial structure to an etch chemistry; exposing the portion of the S / D epitaxial structure to a hydrogen treatment to form a hydrogen-terminated surface; and epitaxially growing an additional portion of the S / D epitaxial structure on the hydrogen-terminated surface along a first crystal direction perpendicular to a (111) crystal plane at a first growth rate and along a second crystal direction perpendicular to a (100) crystal plane at a second growth rate different from the first growth rate. ​ ​ ​ 11. The method of claim 10, wherein, Exposing the portion of the S / D epitaxial structure to the etching chemistry includes exposing the fin structure to hydrochloric acid vapor to remove S / D epitaxial material on surfaces outside of the recessed second portion of the fin structure.

12. The method of claim 10, wherein, Exposing the portion of the S / D epitaxial structure to the hydrogen treatment includes exposing the portion of the S / D epitaxial structure to hydrogen gas or hydrogen radicals generated by an ion-free remote plasma.

13. The method of claim 10, wherein, Exposing the portion of the S / D epitaxial structure to the hydrogen treatment includes converting a chlorine-terminated surface of the S / D epitaxial structure to the hydrogen-terminated surface.

14. The method of claim 10, wherein, Growth of the S / D epitaxial structure includes repeating growth of the S / D epitaxial structure for more than 9 cycles, and wherein the hydrogen treatment for each cycle includes an exposure time between 1 second and 100 seconds.

15. A method for forming a semiconductor structure, comprising: forming a fin structure on a substrate; forming a gate structure on a portion of the fin structure; etching a portion of the fin structure adjacent to the gate structure; and growing a source / drain (S / D) epitaxial structure on the etched portion of the fin structure, wherein growing the S / D epitaxial structure includes: partially growing the S / D epitaxial structure on the etched portion of the fin structure; exposing the partially grown S / D epitaxial structure to an etching chemistry, wherein the etching chemistry removes a portion of the partially grown S / D epitaxial structure and terminates surfaces of the partially grown S / D epitaxial structure with chlorine atoms to form chlorine-terminated surfaces; and treating the partially grown S / D epitaxial structure with hydrogen to replace the chlorine-terminated surfaces with hydrogen-terminated surfaces, wherein the hydrogen-terminated surfaces increase a growth rate of the partially grown S / D epitaxial structure in a direction normal to (111) planes.

16. The method of claim 15, wherein, Treating the partially grown S / D epitaxial structure includes exposing the partially grown S / D epitaxial structure to hydrogen gas or ion-free hydrogen radicals.

17. The method of claim 15, wherein, Growth of the S / D epitaxial structure includes forming an S / D epitaxial structure having a hexagonal shape with adjacent (111) facets forming an angle greater than 70°.

18. The method of claim 15, wherein, Growth of the S / D epitaxial structure includes growing an S / D epitaxial structure having a hexagonal shape with a top (111) facet more than 2 nm from a top corner of the fin structure covered by the gate structure.

19. The method of claim 15, wherein, Treating the partially grown S / D epitaxial structure includes terminating surfaces of the partially grown S / D epitaxial structure with hydrogen atoms.

20. The method of claim 15, wherein, Treating the partially grown S / D epitaxial structure includes increasing a growth rate of the partially grown S / D epitaxial structure in a direction normal to (111) planes greater than a growth rate in a direction normal to (100) planes.

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