Display devices

Abstract

The display device includes at least one emission region that emits light and a transmissive region adjacent to the at least one emission region and that transmits external light. The display device includes a substrate and a circuit element, the circuit element including at least one transistor and a storage capacitor disposed on the substrate. An insulating layer is disposed on the circuit element and includes a contact hole. A first transparent electrode is disposed on the insulating layer and electrically connected to the circuit element through the contact hole. At least one light-emitting diode is disposed on the first transparent electrode and defines at least one emission region. The at least one light-emitting diode includes a PN diode, the PN diode including an inorganic semiconductor-based material. A portion of the first transparent electrode is located in the transmissive region.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority from Korean Patent Application No. 10-2019-0173463, filed on December 23, 2019, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] One or more exemplary embodiments of the present inventive concept relate to a display device, and more particularly, to a light-emitting display device including a region through which external light may pass, and a method of manufacturing the same. Background Art

[0004] Among display devices that display images, light-emitting diode (LED) displays have self-luminous properties compared to liquid crystal displays (LCDs). Therefore, LED displays do not require a separate light source, which reduces the thickness and weight of the display devices. Furthermore, LED displays offer high-quality features such as low power consumption, high brightness, and fast response speeds.

[0005] The light emitting diode display device may have various shapes based on various purposes of the display device and various shapes of electronic devices including the display device. Summary of the Invention

[0006] In an exemplary embodiment of the present inventive concept, a display device may include a transparent display device that can display an image using a light-emitting diode in a display area and / or display an external image (e.g., an image of an external object) passing through the display area. However, a sufficient transmissive area should be provided to display an external image using the transparent display device.

[0007] One or more exemplary embodiments of the present inventive concept include a light-emitting display device that can ensure sufficient transmission area. However, it should be understood that the exemplary embodiments of the present inventive concept described herein should be considered only in a descriptive sense and not for limitation of the present disclosure.

[0008] Additional aspects will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the presented embodiments of the disclosure.

[0009] According to an exemplary embodiment of the present invention, a display device includes at least one emission region that emits light and a transmissive region that is adjacent to the at least one emission region and transmits external light. The display device includes a substrate and a circuit element, the circuit element including at least one transistor and a storage capacitor disposed on the substrate. An insulating layer is disposed on the circuit element and includes a contact hole. A first transparent electrode is disposed on the insulating layer and is electrically connected to the circuit element through the contact hole. At least one light-emitting diode is disposed on the first transparent electrode and defines at least one emission region. The at least one light-emitting diode includes a PN diode, the PN diode including an inorganic semiconductor-based material. A portion of the first transparent electrode is located in the transmissive region.

[0010] The display device may further include a second transparent electrode disposed on the at least one light emitting diode and facing the first transparent electrode, wherein in the transmissive region, the first transparent electrode overlaps the second transparent electrode in a thickness direction of the substrate.

[0011] The display device may further include a transparent insulating layer between the first transparent electrode and the second transparent electrode, wherein in the transmissive region, the transparent insulating layer may directly contact the first transparent electrode and the second transparent electrode.

[0012] The insulating layer may include an opening spaced apart from the contact hole and extending from a top surface to a bottom surface of the insulating layer, wherein at least a portion of the opening may be located in the transmission region.

[0013] The display device may further include an inorganic insulating layer between the substrate and the insulating layer, wherein the first transparent electrode may directly contact the inorganic insulating layer in the opening.

[0014] The at least one light emitting diode may define at least one emission region, and the at least one emission region may be surrounded by the transmission region when viewed in a direction perpendicular to the main surface of the substrate.

[0015] The at least one light emitting diode may include a vertical type light emitting diode.

[0016] At least one light emitting diode may include a first electrode pad electrically connected to a first transparent electrode and a second electrode pad facing a direction opposite to the first electrode pad and spaced apart from the first electrode pad in a thickness direction of the substrate, wherein the display device may further include an adhesive layer comprising metal and located between the first transparent electrode and the first electrode pad in a thickness direction of the substrate.

[0017] The adhesive layer may overlap only with the at least one light emitting diode in a thickness direction of the substrate.

[0018] The first transparent electrode may include a polycrystalline transparent conductive oxide.

[0019] These and / or other aspects will become apparent and more readily understood from the following description of exemplary embodiments, the accompanying drawings, and the claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] The above and other aspects, features and advantages of certain embodiments of the present disclosure will become more apparent from the following description taken in conjunction with the accompanying drawings, in which:

[0021] Figure 1 is a plan view of a display device according to an exemplary embodiment of the present inventive concept;

[0022] Figure 2 is a cross-sectional view of a display area of a display device according to an exemplary embodiment of the present inventive concept;

[0023] Figure 3 is a diagram of a circuit connected to a light emitting diode of a display device according to an exemplary embodiment of the present inventive concept;

[0024] Figure 4 is a plan view of a unit including an emission area and a transmission area of a display device according to an exemplary embodiment of the present inventive concept;

[0025] Figure 5A is a plan view of a unit including a light emitting diode and an electrode of a display device according to an exemplary embodiment of the present inventive concept;

[0026] Figure 5B is a plan view of a unit including a light emitting diode and an electrode of a display device according to an exemplary embodiment of the present inventive concept;

[0027] Figure 6 is along the exemplary embodiment according to the present inventive concept Figure 5A or Figure 5B A cross-sectional view of the display device taken along line VI-VI';

[0028] Figure 7A is a cross-sectional view illustrating a process of manufacturing a display device according to an exemplary embodiment of the present inventive concept;

[0029] Figure 7B is a plan view illustrating a process of manufacturing a display device according to an exemplary embodiment of the present inventive concept;

[0030] Figure 8A and Figure 8B is a cross-sectional view illustrating a process of manufacturing a display device according to an exemplary embodiment of the present inventive concept;

[0031] Figure 8C is a plan view illustrating a process of manufacturing a display device according to an exemplary embodiment of the present inventive concept;

[0032] Figure 9A is a cross-sectional view illustrating a process of manufacturing a display device according to an exemplary embodiment of the present inventive concept;

[0033] Figure 9B is a plan view showing a process of manufacturing a display device according to an embodiment;

[0034] Figure 10 is a plan view of a unit including an emission area and a transmission area of a display device according to an exemplary embodiment of the present inventive concept;

[0035] Figure 11 is a diagram of a circuit connected to a light emitting diode of a display device according to an exemplary embodiment of the present inventive concept;

[0036] Figure 12 is a plan view of a unit including an emission area and a transmission area of a display device according to an exemplary embodiment of the present inventive concept;

[0037] Figure 13 is a plan view of a unit including a light emitting diode and an electrode of a display device according to an exemplary embodiment of the present inventive concept; and

[0038] Figure 14 is along the exemplary embodiment according to the present inventive concept Figure 13 sectional view of the display device taken along line XIV-XIV'. DETAILED DESCRIPTION

[0039] Reference will now be made in detail to the exemplary embodiments of the present invention as illustrated in the accompanying drawings, in which the same reference numerals refer to the same elements throughout. In this regard, exemplary embodiments may have different forms and the present invention should not be construed as being limited to the description of the exemplary embodiments set forth herein. Therefore, the exemplary embodiments described below with reference to the accompanying drawings are only used to explain aspects of the present invention. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items. Throughout the disclosure, the expression "at least one of a, b, and c" means only a, only b, only c, both a and b, both a and c, both b and c, all of a, b, and c, or variations thereof.

[0040] It will be understood that although the terms "first," "second," etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are only used to distinguish one component from another.

[0041] As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise.

[0042] It will be further understood that the terms “include” and / or “comprises” used herein specify the presence of stated features or components, but do not preclude the presence or addition of one or more other features or components.

[0043] It will be understood that when a layer, region, or component is referred to as being "formed on" or "disposed on" another layer, region, or component, the layer, region, or component may be formed or disposed on the other layer, region, or component directly or indirectly. For example, intervening layers, regions, or components may be present. However, when a layer, region, or component is referred to as being "directly formed on" or "disposed directly on" another layer, region, or component, there may not be any intervening layers, regions, or components.

[0044] For the convenience of explanation, the size of the elements in the drawings may be exaggerated or reduced. Therefore, since the size and thickness of the elements in the drawings are arbitrarily shown for the convenience of explanation, the exemplary embodiments of the present inventive concept are not limited thereto.

[0045] When the exemplary embodiments can be implemented differently, specific processes may be performed in a different order than described. For example, two consecutively described processes may be performed substantially simultaneously, or in a reverse order to the described order.

[0046] It will be understood that when a layer, region, or component is referred to as being “connected” to another layer, region, or component, the layer, region, or component may be “directly connected” to the other layer, region, or component, or may be “indirectly connected” to the other layer, region, or component with other layers, regions, or components interposed therebetween. For example, it will be understood that when a layer, region, or component is referred to as being “electrically connected” to another layer, region, or component, the layer, region, or component may be “directly electrically connected” to the other layer, region, or component, or may be “indirectly electrically connected” to the other layer, region, or component with other layers, regions, or components interposed therebetween.

[0047] In this specification, the term "transparent" or "transmittance" may mean that the transmittance of a component in the visible light band is about 50% or more. For example, the transmittance in the visible light band may be about 60% or more.

[0048] Figure 1 is a plan view of a display apparatus 1 according to an exemplary embodiment of the present inventive concept. Figure 2 is a cross-sectional view of a display area of a display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0049] like Figure 1As shown in the exemplary embodiment of FIG, the display device 1 may include a display area DA and a non-display area NDA outside the display area DA. The display area DA is a region in which an image is displayed and may be surrounded by the non-display area NDA. For example, in FIG. Figure 1 In the exemplary embodiment shown in , the display area DA is a substantially square shape, and the non-display area NDA surrounds all four sides of the display area DA. However, the exemplary embodiments of the present invention are not limited thereto, and in other exemplary embodiments, the display area DA may have various different shapes and / or the non-display area NDA may not surround at least one side of the display area DA. The non-display area NDA is an area in which no image is displayed. In an exemplary embodiment, at least one driver and at least one pad may be arranged in the non-display area NDA. The driver provides electrical signals or power to circuit elements and / or light-emitting elements arranged in the display area DA. The pad may be electrically connected to an electronic component, a printed circuit board, or the like.

[0050] refer to Figure 2 In an exemplary embodiment, the display area DA may include a light-emitting area EMA (hereinafter, "emission area") and a transmission area TA. The emission area EMA emits light having a predetermined color. The transmission area TA transmits external light. For example, the transmission area TA is a region having a light-transmitting property, and the transmittance of the transmission area TA in the visible light band may be about 50% or higher, such as about 60% or higher, as described above. The emission area EMA may be adjacent to the transmission area TA (for example, adjacent in a direction parallel to the upper surface of the substrate 100 on which the emission area EMA and the transmission area TA are formed). In an exemplary embodiment, the display area DA may include a plurality of units U. Each unit U of the plurality of units U includes an emission area EMA and a transmission area TA. The unit U may include at least one emission area EMA and at least one transmission area TA.

[0051] External light is light incident on the display device 1 from outside the display device 1. The external light can pass through the transmission area TA of the display device 1. For example, an image of an object arranged on the rear surface 100r of the substrate 100 can be observed by the user 2 located on the front surface 300f of the packaging member 300 through the transmission area TA. The external light can travel from the rear surface 100r of the substrate 100 toward the packaging member 300 and can be recognized by the user 2 located on the front surface 300f of the packaging member 300 through the display device 1.

[0052] At least one light-emitting element (e.g., a light-emitting diode) may be arranged in the emission area EMA. The at least one light-emitting element emits light of a predetermined color to display an image. The light emitted from the emission area EMA is different from the external light transmitted through the transmission area TA. The light emitted from the emission area EMA is light emitted from a display element (e.g., a light-emitting diode) provided in the display layer 200. For example, in an exemplary embodiment, the display area DA may display an image using red light, green light, and / or blue light emitted from the light-emitting diode.

[0053] The user 2 may be located above the front surface 300f of the packaging member 300. The user 2 may observe an image provided by the display device 1 itself (e.g., an image generated by the light-emitting diodes arranged in the emission area EMA) and an image generated by the external light transmitted through the transmission area TA. In an exemplary embodiment, the user 2 may recognize both an image of an object arranged at a position corresponding to the rear surface of the display device 1 (e.g., the rear surface 100r of the substrate 100) generated by the external light transmitted through the transmission area TA and an image generated by the light-emitting diodes in the emission area EMA. In an exemplary embodiment, in an instance in which the display device 1 is turned off, the user 2 may recognize an image of an object adjacent to the rear surface of the display device 1 (e.g., the rear surface 100r of the substrate 100) generated by the light transmitted through the transmission area TA. In an exemplary embodiment, in an instance in which the display device 1 is turned on, the user 2 may recognize both an image of an object adjacent to the rear surface of the display device 1 (e.g., the rear surface 100r of the substrate 100) and an image emitted from the light-emitting diodes.

[0054] like Figure 2 As shown in the exemplary embodiment of , the display device 1 may include a substrate 100, a display layer 200 and an encapsulation member 300 covering the display layer 200. Both the substrate 100 and the encapsulation member 300 may have light-transmitting properties. For example, in an exemplary embodiment, the substrate 100 may include at least one material selected from a transparent glass material and a transparent polymer material. In an exemplary embodiment, the encapsulation member 300 may include a substrate having at least one material selected from a transparent glass material and a transparent polymer material, or a stacked structure having at least one inorganic encapsulation layer and at least one organic encapsulation layer. For example, the encapsulation member 300 may include an organic encapsulation layer arranged between a first inorganic encapsulation layer and a second inorganic encapsulation layer. The organic encapsulation layer may include an organic insulating material. The first inorganic encapsulation layer and the second inorganic encapsulation layer may each include an inorganic insulating material.

[0055] Figure 3 is a diagram of a circuit connected to one of the light emitting diodes provided to the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0056] refer to Figure 3 In an exemplary embodiment, the light emitting diode LED may be electrically connected to a circuit element PC comprising at least two transistors and at least one storage capacitor. Figure 3 As shown in the exemplary embodiment of FIG, the circuit element PC may include seven transistors and one storage capacitor. However, exemplary embodiments of the inventive concept are not limited thereto.

[0057] The first transistor T1 includes a gate electrode, a first electrode, and a second electrode. The gate electrode of the first transistor T1 is connected to the first electrode of the storage capacitor Cst. The first electrode of the first transistor T1 is connected to the first node N1. The second electrode of the first transistor T1 is connected to the third node N3. The first transistor T1 functions as a driving transistor. The first transistor T1 receives a data signal DATA according to the switching operation of the second transistor T2 and supplies current to the light emitting diode LED.

[0058] The second transistor T2 includes a gate electrode, a first electrode, and a second electrode. The gate electrode of the second transistor T2 is connected to a scan line SWL, which is connected to the circuit element PC. The first electrode of the second transistor T2 is connected to a data line DL. The second electrode of the second transistor T2 is connected to the first electrode of the first transistor T1 at a first node N1. The second transistor T2 is turned on in response to a scan signal S[n] transmitted via the scan line SWL. The second transistor T2 performs a switching operation to transmit a data signal DATA transmitted via the data line DL to the first electrode of the first transistor T1.

[0059] The third transistor T3 includes a gate electrode, a first electrode, and a second electrode. The gate electrode of the third transistor T3 is connected to the scan line SWL. The first electrode of the third transistor T3 is connected to the second electrode of the first transistor T1 at a third node N3. The second electrode of the third transistor T3 is connected to the first electrode of the storage capacitor Cst, the second electrode of the fourth transistor T4, and the gate electrode of the first transistor T1 at a second node N2. The third transistor T3 is turned on in response to the scan signal S[n] transmitted via the scan line SWL, thereby diode-connecting the first transistor T1.

[0060] The fourth transistor T4 includes a gate electrode, a first electrode, and a second electrode. The gate electrode of the fourth transistor T4 is connected to the previous scan line SIL. The first electrode of the fourth transistor T4 is connected to the initialization voltage line VL. The second electrode of the fourth transistor T4 is connected to the first electrode of the storage capacitor Cst, the second electrode of the third transistor T3, and the gate electrode of the first transistor T1 at the second node N2. Depending on the direction of current flow, the first electrode and the second electrode of the fourth transistor T4 can be a source electrode and a drain electrode, respectively. The fourth transistor T4 is turned on in response to the previous scan signal S[n-1] transmitted via the previous scan line SIL and performs an initialization operation to initialize the voltage of the gate electrode of the first transistor T1 by transmitting the initialization voltage Vinit to the gate electrode of the first transistor T1.

[0061] The fifth transistor T5 includes a gate electrode, a first electrode, and a second electrode. The gate electrode of the fifth transistor T5 is connected to the emission control line EL. The first electrode of the fifth transistor T5 is connected to the first power voltage line VDDL. The second electrode of the fifth transistor T5 is connected to the first electrode of the first transistor T1 and the second electrode of the second transistor T2 at a first node N1.

[0062] The sixth transistor T6 includes a gate electrode, a first electrode, and a second electrode. The gate electrode of the sixth transistor T6 is connected to the emission control line EL. The first electrode of the sixth transistor T6 is connected to the second electrode of the first transistor T1 and the first electrode of the third transistor T3 at a third node N3. The second electrode of the sixth transistor T6 is connected to the first electrode pad of the light emitting diode LED.

[0063] The fifth transistor T5 and the sixth transistor T6 are simultaneously turned on in response to the emission control signal E[n] transmitted through the emission control line EL, the first power voltage ELVDD is transmitted to the light emitting diode LED, and current flows through the light emitting diode LED.

[0064] The seventh transistor T7 includes a gate electrode, a first electrode, and a second electrode. The gate electrode of the seventh transistor T7 is connected to the previous scan line SIL. The first electrode of the seventh transistor T7 is connected to the second electrode of the sixth transistor T6 and the first electrode pad of the light-emitting diode LED. The second electrode of the seventh transistor T7 is connected to the initialization voltage line VL. Depending on the direction of current flow, the first electrode and the second electrode of the seventh transistor T7 may be a source electrode and a drain electrode, respectively. The seventh transistor T7 is turned on in response to the previous scan signal S[n-1] transmitted via the previous scan line SIL and performs an initialization operation to initialize the light-emitting diode LED by transmitting the initialization voltage Vinit to the first electrode pad of the light-emitting diode LED.

[0065] The storage capacitor Cst includes a first electrode and a second electrode. The first electrode of the storage capacitor Cst is connected to the gate electrode of the first transistor T1, the second electrode of the third transistor T3, and the second electrode of the fourth transistor T4. The second electrode of the storage capacitor Cst is connected to the first power voltage line VDDL.

[0066] The second electrode pad of the light emitting diode LED is connected to a second power source supplying a second power voltage ELVSS.

[0067] Despite Figure 3 In the exemplary embodiment of the present invention, the previous scan line SIL is connected to the gate electrode of the seventh transistor T7, but in other exemplary embodiments, the gate electrode of the seventh transistor T7 may be connected to the scan line SWL or the next scan line. Figure 3 In the exemplary embodiment, the gate electrodes of the first to seventh transistors T1 to T7 are single gate electrodes, but in other exemplary embodiments, at least one gate electrode may be a double gate electrode, etc.

[0068] Figure 4 is a plan view of one unit U including emission areas EA-R, EA-G, and EA-B and a transmissive area TA as a portion of the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0069] refer to Figure 4 In an exemplary embodiment, the plurality of lines may extend in the y direction and the x direction. The x direction and the y direction may be parallel to the upper surface of the substrate 100, and the x direction and the y direction may intersect each other. For example, Figure 4 As shown in the exemplary embodiment of FIG, the x direction may be perpendicular to the y direction. Figure 4 As shown in the exemplary embodiment of FIG, the first data line DL1, the second data line DL2, the third data line DL3, the first power voltage line VDDL, and the second power voltage line VSSL may extend in the y-direction. The scan line SWL, the previous scan line SIL, the emission control line EL, and the initialization voltage line VL may extend in the x-direction intersecting the y-direction.

[0070] The transmission area TA may be defined between adjacent lines among lines extending in the x-direction and adjacent lines among lines extending in the y-direction. Figure 4 As shown in the exemplary embodiment of the present invention, the transmission area TA is disposed between the third data line DL3 and the first power voltage line VDDL extending in the y direction, and between the previous scan line SIL and the initialization voltage line VL extending in the x direction. However, exemplary embodiments of the present inventive concept are not limited thereto.

[0071] In an exemplary embodiment, the first to third data lines DL1, DL2, and DL3 among the lines extending in the y direction may be placed on one side of the transmission area TA (e.g., on the left side in the x direction), and the first power voltage line VDDL and the second power voltage line VSSL among the lines extending in the y direction may be placed on the other side of the transmission area TA (e.g., on the right side in the x direction). This arrangement of the lines can provide a relatively large area of the transmission area TA.

[0072] The transmission area TA is an area through which external light can pass. The transmission area TA may not overlap with the wires described below, the circuit elements connected to the wires, the connection area of the first transparent electrode and the thin film transistor, and the emission area described below. Figure 2 ) may be adjacent to the transmission area TA. For example, the red emission area EA-R, the green emission area EA-G, and the blue emission area EA-B may each be adjacent to the transmission area TA.

[0073] In an exemplary embodiment, each unit U may include a plurality of red emission areas EA-R, a plurality of green emission areas EA-G, and a plurality of blue emission areas EA-B. Figure 4 As shown in the exemplary embodiment of , at least one of the plurality of red emission areas EA-R may be surrounded by the transmission area TA (e.g., in a plan view of a plane defined by the x-direction and the y-direction). Similarly, at least one of the plurality of green emission areas EA-G may be surrounded by the transmission area TA. At least one of the plurality of blue emission areas EA-B may be surrounded by the transmission area TA. For example, Figure 4 As shown in the exemplary embodiment of , the upper and central (eg, upper and central in the y direction) red emission area EA-R, green emission area EA-G, and blue emission area EA-B may be completely surrounded by the transmission area TA.

[0074] The plurality of red emission areas EA-R, the plurality of green emission areas EA-G, and the plurality of blue emission areas EA-B may be arranged between adjacent lines among lines extending in the y direction or between adjacent lines among lines extending in the x direction. Figure 4 As shown in the exemplary embodiment of FIG, each of the plurality of red emission areas EA-R, the plurality of green emission areas EA-G, and the plurality of blue emission areas EA-B is arranged between the third data line DL3 extending in the y direction and the first power voltage line VDDL.

[0075] At least one emission area of each of the plurality of red emission areas EA-R, the plurality of green emission areas EA-G, and the plurality of blue emission areas EA-B may be partially surrounded by the transmissive area TA and may overlap with a line extending in the x-direction or the y-direction. Figure 4 As shown in the exemplary embodiment of FIG, the red emission area EA-R, the green emission area EA-G, and the blue emission area EA-B below (e.g., below in the y direction) may each overlap with the previous scan line SIL extending in the x direction, and the emission areas overlapping with the previous scan line SIL may not be completely surrounded by the transmission area TA. For example, as Figure 4 As shown in the exemplary embodiment of FIG, the lower red emission region EA-R, the lower green emission region EA-G, and the lower blue emission region EA-B may be adjacent to the transmission region TA only at upper sides thereof.

[0076] Figure 5A is a plan view of positions of a light emitting diode LED and electrodes 210 and 230 arranged in one unit U as a part of the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0077] refer to Figure 5A In an exemplary embodiment, at least one first transparent electrode 210 may be arranged between lines extending in the y direction. For example, the first transparent electrode 210 may be provided between the third data line DL3 extending in the y direction and the first power voltage line VDDL. Figure 5A As shown in the exemplary embodiment of the present invention, the three first transparent electrodes 210 can be adjacent to each other between lines extending in the y direction. The central one of the first transparent electrodes 210 (for example, the central one in the x direction) is arranged between the third data line DL3 and the first power voltage line VDDL, and does not overlap with any of the third data line DL3 and the first power voltage line VDDL. The left one of the first transparent electrodes 210 (for example, the left one in the x direction) overlaps with the third data line DL3. The right one of the first transparent electrodes 210 (for example, the right one in the x direction) overlaps with the first power voltage line VDDL.

[0078] Each of the first transparent electrodes 210 may have a length in the y direction and a width in the x direction. In an exemplary embodiment, the length of each first transparent electrode 210 in the y direction may be greater than the width in the x direction.

[0079] At least one light emitting diode may be disposed on each first transparent electrode 210. For example, Figure 5AAs shown in the exemplary embodiment of FIG, a red light emitting diode LED (R) is arranged on the left one of the first transparent electrodes 210, a green light emitting diode LED (G) is arranged on the center one of the first transparent electrodes 210, and a blue light emitting diode LED (B) is arranged on the right one of the first transparent electrodes 210. Two or more light emitting diodes LED that can emit light having the same color can be arranged on each first transparent electrode 210 to prevent one of the light emitting diodes LED from being damaged, deteriorated, or defective. For example, as Figure 5A As shown in the exemplary embodiment of FIG, three light emitting diodes LED are arranged for each first transparent electrode 210 .

[0080] Each first transparent electrode 210 can emit red light, green light or blue light. Figure 5A As shown in FIG, in an exemplary embodiment in which three light emitting diodes LED of the same color are arranged on each first transparent electrode 210, three red emission regions EA-R (see Figure 4 ), three green emission regions EA-B (see Figure 4 ) and three blue emission regions EA-B (see Figure 4 ) can be provided to each unit U. Figure 5A The position of each LED can be Figure 4 corresponds to the emission area (for example, the red emission area EA-R, the green emission area EA-G or the blue emission area EA-B).

[0081] The light emitting diode (LED) includes a PN junction diode ("PN diode") containing an inorganic semiconductor-based material. When a voltage is applied to the PN junction diode in a forward direction, holes and electrons are injected from the PN junction diode, the energy generated from the recombination of the holes and electrons is converted into light energy, and light of a predetermined color can be emitted. In an exemplary embodiment, the light emitting diode (LED) may have a width of several microns to several hundred microns. For example, the width of the light emitting diode (LED) in one direction (e.g., the maximum width of the light emitting diode (LED)) may correspond to about 1 μm to about 100 μm. In an exemplary embodiment, the light emitting diode (LED) may be a micro light emitting diode.

[0082] In an exemplary embodiment, a plurality of red, green, and blue light emitting diodes LED may be covered by a second transparent electrode 230 facing the first transparent electrode 210. The second transparent electrode 230 may be electrically connected to the second power voltage line VSSL through a contact hole CNT. The contact hole CNT may be formed in at least one insulating layer disposed between the second power voltage line VSSL and the second transparent electrode 230. Figure 6 The exemplary embodiment of FIG. 1 describes a specific structure of the second transparent electrode 230 .

[0083] In such Figure 5A In the exemplary embodiment shown in FIG , in which the first to third data lines DL1, DL2, and DL3 among the adjacent lines extending in the y direction are placed on one side of the transmission area TA (e.g., the left side in the x direction), the data signal can be provided to one of the transistors among the circuit elements adjacent to a portion of the first transparent electrode 210 through the data link line DL-C. For example, Figure 3 The circuit element PC described in the embodiment may overlap with a portion of each first transparent electrode 210, and the second transistor T2 (see Figure 3 ) can receive data signals through the data connection line DL-C.

[0084] exist Figure 5A In the exemplary embodiment shown in , the first data line DL1 and the second data line DL2 are connected to the data link line DL-C. Each data link line DL-C may be formed integrally with the relevant data line among the first data line DL1 and the second data line DL2. However, in an alternative embodiment, each data link line DL-C may be formed on a different layer from the relevant data line among the first data line DL1 and the second data line DL2 and connected to the relevant data line through a contact hole.

[0085] Figure 5B is a plan view of positions of a light emitting diode LED and electrodes 210 and 230 arranged in one unit U as a part of the display device 1 according to an exemplary embodiment of the inventive concept. Figure 5B In the exemplary embodiment of FIG. 1 , except for the arrangement of the data lines extending in the y direction, the other structures are similar to those of FIG. 1 . Figure 5A The other structures are the same, so Figure 5B The description of other structures is omitted. Figure 5B In an exemplary embodiment, the first to third data lines DL1, DL2, and DL3 may be spaced apart from each other in the x-direction and may not be arranged adjacent to each other on one side of the transmissive area TA. The left one of the first transparent electrodes 210 (e.g., the left one in the x-direction) is disposed between the third data line DL3 and the second data line DL2. The center one of the first transparent electrodes 210 (e.g., the center one in the x-direction) is disposed between the second data line DL2 and the first data line DL1. The right one of the first transparent electrodes 210 (e.g., the right one in the x-direction) is disposed between the first data line DL1 and the first power voltage line VDDL.

[0086] Figure 6 is along the exemplary embodiment according to the present inventive concept Figure 5A or Figure 5B 1 is a cross-sectional view of the display device 1 taken along line VI-VI′.

[0087] refer to Figure 6 In the exemplary embodiment, the display layer 200 is provided on the substrate 100. The display layer 200 includes a first transparent electrode 210 and a second transparent electrode 230. Each light emitting diode LED is electrically connected to a circuit element PC including a transistor, and the display layer 200 includes the circuit element PC. Figure 2 As described in the exemplary embodiment of the present invention, the display layer 200 may be covered by the packaging member 300. However, for ease of description, Figure 6 The packaging member is omitted in the exemplary embodiment of FIG.

[0088] The substrate 100 may include various materials. For example, in an exemplary embodiment, the substrate 100 may include a transparent glass material containing silicon oxide (SiO2) as a main component, or may include a transparent plastic material. The substrate 100 may include a transparent plastic material having flexibility. In an exemplary embodiment, the plastic material may include an insulating organic material such as at least one compound selected from polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate.

[0089] The circuit element PC may be formed on the substrate 100. Figure 6 As shown in the exemplary embodiment of FIG, the circuit element PC may be arranged outside the transmission area TA of the substrate 100. For example, the circuit element PC may be arranged on one side of the transmission area TA. The circuit element PC may include a first thin film transistor TFT1, a second thin film transistor TFT2, and a storage capacitor Cst. When the circuit element PC has the above reference Figure 3 The exemplary embodiments describe the circuit structure of the embodiment, Figure 6 The first thin film transistor TFT1 can be connected to Figure 3 The first thin film transistor TFT2 corresponds to the first thin film transistor T1, and the second thin film transistor TFT2 can be Figure 3 Corresponding to the sixth transistor T6.

[0090] The buffer layer 201 may be provided between the substrate 100 and the circuit element PC. Figure 6 As shown in the exemplary embodiment of FIG, the lower surface of the buffer layer 201 may directly contact the upper surface of the substrate 100. In the exemplary embodiment, the buffer layer 201 may include an inorganic insulating material such as at least one compound selected from silicon nitride, silicon oxide, and silicon oxynitride. The buffer layer 201 may have a single layer or multilayer structure including the above materials.

[0091] The first thin film transistor TFT1 and the second thin film transistor TFT2 may include a first semiconductor layer ACT1 and a second semiconductor layer ACT2, respectively. In an exemplary embodiment, the first semiconductor layer ACT1 and the second semiconductor layer ACT2 may include amorphous silicon or polycrystalline silicon. However, exemplary embodiments of the present inventive concept are not limited thereto. For example, in another exemplary embodiment, the first semiconductor layer ACT1 and the second semiconductor layer ACT2 may include an organic semiconductor material or an oxide semiconductor material.

[0092] The first gate electrode GE1 may overlap with the channel region of the first semiconductor layer ACT1, and the second gate electrode GE2 may overlap with the channel region of the second semiconductor layer ACT2. In an exemplary embodiment, the first gate electrode GE1 and the second gate electrode GE2 may each include at least one compound selected from the group consisting of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu), and may include a single layer or multiple layers including the above materials.

[0093] The gate insulating layer 203 may be disposed between the first and second gate electrodes GE1 and GE2 and the first and second semiconductor layers ACT1 and ACT2. In an exemplary embodiment, the gate insulating layer 203 may include an inorganic insulating material such as silicon nitride, silicon oxide, and / or silicon oxynitride. The gate insulating layer 203 may include a single layer or a multilayer structure including the above materials.

[0094] A first interlayer insulating layer 205 may be formed on the first gate electrode GE1 and the second gate electrode GE2. Figure 6 As shown in the exemplary embodiment of FIG, the lower surface of the first interlayer insulating layer 205 may directly contact the upper surfaces of the first gate electrode GE1 and the second gate electrode GE2. In an exemplary embodiment, the first interlayer insulating layer 205 may include an inorganic insulating material such as at least one compound selected from silicon nitride, silicon oxide, and silicon oxynitride. The first interlayer insulating layer 205 may include a single layer or a multilayer structure including the above materials.

[0095] The storage capacitor Cst may include a first electrode CE1 and a second electrode CE2 that overlap each other (e.g., overlap each other in the thickness direction of the substrate 100). In an exemplary embodiment, the first gate electrode GE1 of the first thin film transistor TFT1 may be the first electrode CE1 of the storage capacitor Cst. The first interlayer insulating layer 205 may be disposed between the first electrode CE1 and the second electrode CE2. The second interlayer insulating layer 207 may be disposed on the second electrode CE2. For example, Figure 6As shown in the exemplary embodiment of FIG, the lower surface of the second interlayer insulating layer 207 may directly contact the second electrode CE2 and the upper surface of the first interlayer insulating layer 205. In an exemplary embodiment, the second interlayer insulating layer 207 may include an inorganic insulating material such as at least one compound selected from silicon nitride, silicon oxide, and silicon oxynitride. The second interlayer insulating layer 207 may include a single layer or a multilayer structure including the above materials.

[0096] The first source electrode SE1 and the first drain electrode DE1 may be disposed on the second interlayer insulating layer 207 to overlap with the first semiconductor layer ACT1. Similarly, the second source electrode or the second drain electrode DE2 may be disposed on the second interlayer insulating layer 207 to overlap with the second semiconductor layer ACT2. Figure 6 As shown in the exemplary embodiment of FIG. 4 , the second drain electrode DE2 overlaps the second semiconductor layer ACT2 .

[0097] The first source electrode SE1, the first drain electrode DE1, the second drain electrode DE2, and the first power voltage line VDDL may be connected to the reference Figure 5A The first to third data lines DL1, DL2 and DL3 and / or the second power voltage line VSSL (see Figure 5A and Figure 5B ) are located on the same layer and may include the same material as that of the first to third data lines DL1, DL2, and DL3 and / or the second power voltage line VSSL.

[0098] In an exemplary embodiment, the first source electrode SE1, the first drain electrode DE1, and the second drain electrode DE2 may include at least one compound selected from the group consisting of aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), lithium (Li), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W), and copper (Cu), and may include a single-layer or multi-layer structure including the above materials.

[0099] like Figure 6 As shown in the exemplary embodiment of FIG, the circuit element PC may be covered by an organic insulating layer 209. In exemplary embodiments, the organic insulating layer 209 may include a general polymer such as polymethyl methacrylate (PMMA) or polystyrene (PS), a polymer derivative having a phenol group, an acrylic polymer, an imide polymer, an aryl ether polymer, an amide polymer, a fluorine polymer, a paraxylene polymer, a vinyl alcohol polymer, and a blend thereof.

[0100] The organic insulating layer 209 may include a contact hole 209CH and an opening 209OP spaced apart from the contact hole 209CH. In an exemplary embodiment, the opening 209OP of the organic insulating layer 209 may extend from an upper surface (e.g., top surface) to a lower surface (e.g., bottom surface) of the organic insulating layer 209. The circuit element PC is electrically connected to the first transparent electrode 210 through the contact hole 209CH.

[0101] The first transparent electrode 210 may cover the opening 209OP and the contact hole 209CH. A portion (eg, a majority) of the first transparent electrode 210 may be located in the opening 209OP of the organic insulating layer 209. Figure 6 As shown in the exemplary embodiment of the present invention, the lower surface of the first transparent electrode 210 can directly contact the upper surface of the second interlayer insulating layer 207 in the opening 209OP. Another portion of the first transparent electrode 210 can be located on the top surface of the organic insulating layer 209, and the first transparent electrode 210 can be electrically connected to the circuit element PC through the contact hole 209CH. Most of the first transparent electrode 210 can be located in the opening 209OP of the organic insulating layer 209. For example, in an exemplary embodiment, a portion occupying approximately 50% or more of the area of the first transparent electrode 210 (such as a portion occupying approximately 70% or more of the area of the first transparent electrode 210) can be located in the opening 209OP of the organic insulating layer 209. The first edge of the first transparent electrode 210 can be located on the top surface of the organic insulating layer 209, which is spaced apart from the lateral sidewalls of the organic insulating layer 209 that define the opening 209OP.

[0102] The first transparent electrode 210 may include a transparent conductive oxide. In an exemplary embodiment, the first transparent electrode 210 may include a polycrystalline transparent conductive oxide. For example, the first transparent electrode 210 may include polycrystalline indium tin oxide (ITO). Alternatively, the first transparent electrode 210 may include at least one compound selected from polycrystalline indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO).

[0103] The light emitting diode LED is disposed on the first transparent electrode 210. In an exemplary embodiment, at least one light emitting diode LED may be disposed on the first transparent electrode 210 overlapping the opening 209OP of the organic insulating layer 209. Figure 6 As shown in the exemplary embodiment of FIG. 2 , two light emitting diodes LED may be disposed on the first transparent electrode 210 and overlap with the opening 209OP of the organic insulating layer 209 .

[0104] The light emitting diode LED may include a first semiconductor layer 242, a second semiconductor layer 244, and an active layer 243. The active layer 243 is disposed between the first semiconductor layer 242 and the second semiconductor layer 244 (eg, in a thickness direction of the substrate 100).

[0105] In an exemplary embodiment, the first semiconductor layer 242 may include, for example, a p-type semiconductor layer. In an exemplary embodiment, the first semiconductor layer 242 may include a p-type semiconductor layer. x Al y Ga 1-xy The first semiconductor layer 242 may include a semiconductor material having a composition formula of N (0≤x≤1, 0≤y≤1, and 0≤x+y≤1). The first semiconductor layer 242 may include at least one compound selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN, and may be doped with a p-type dopant such as Mg, Zn, Ca, Sr, and Br.

[0106] The second semiconductor layer 244 may include, for example, an n-type semiconductor layer. In an exemplary embodiment, the second semiconductor layer 244 may include an n-type semiconductor layer. x Al y Ga 1-xy The second semiconductor layer 244 may include at least one compound selected from the group consisting of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN, and may be doped with an n-type dopant such as Si, Ge, and Sn.

[0107] The doping types of the first semiconductor layer 242 and the second semiconductor layer 244 are provided as examples, and the exemplary embodiments of the present inventive concept are not limited thereto. For example, in another exemplary embodiment, the first semiconductor layer 242 may include an n-type semiconductor layer, and the second semiconductor layer 244 may include a p-type semiconductor layer.

[0108] The active layer 243 is a region where electrons and holes are recombined. When the electrons and holes are recombined, they transition to a lower energy level and light having a corresponding wavelength can be generated. The active layer 243 may include a layer having In x Al y Ga 1-xy The active layer 243 may be a semiconductor material having a composition formula of N (0≤x≤1, 0≤y≤1, and 0≤x+y≤1) and may have a single quantum well structure or a multiple quantum well (MQW) structure.

[0109] The light-emitting diode (LED) may include a vertical light-emitting diode, and the first electrode pad 241 may be spaced apart from the second electrode pad 245 in the direction in which the first semiconductor layer 242, the active layer 243, and the second semiconductor layer 244 are stacked (e.g., in the thickness direction of the substrate 100). The first electrode pad 241 and the second electrode pad 245 may be exposed in opposite directions, respectively. In embodiments where the light-emitting diode (LED) is a flip-type light-emitting diode, for example, where the first and second electrode pads are exposed to the same surface, since the first and second electrode pads should be connected to electrodes for applying a predetermined voltage to the first and second electrode pads, the alignment process is difficult and the width of the flip-type light-emitting diode is greater than that of the vertical light-emitting diode. Therefore, the transmissive area TA can be reduced. In contrast, since the alignment process of the vertical light-emitting diode is simple and the area of the vertical light-emitting diode on the first transparent electrode 210 is relatively small, the area of the transmissive area TA can be increased. Therefore, forming the light-emitting diode (LED) as a vertical light-emitting diode can provide an increased area of the transmissive area TA.

[0110] The first electrode pad 241 and the second electrode pad 245 of the light emitting diode (LED) may include a metal. In an exemplary embodiment, the first electrode pad 241 and the second electrode pad 245 may include at least one compound selected from tin (Sn), silver (Ag), copper (Cu), and alloys thereof. The first electrode pad 241 and the second electrode pad 245 may include the same material or different materials. In an exemplary embodiment, the first electrode pad 241 and the second electrode pad 245 may include an alloy having a maximum content of tin (Sn) and a content decreasing in the order of silver (Ag) and copper (Cu).

[0111] The first electrode pad 241 may be electrically connected to the first transparent electrode 210, and the second electrode pad 245 may be electrically connected to the second transparent electrode 230. An adhesive layer 215 may be disposed between the first electrode pad 241 and the first transparent electrode 210. For example, Figure 6As shown in the exemplary embodiment of FIG, the lower surface of the adhesive layer 215 may directly contact the upper surface of the first transparent electrode 210, and the upper surface of the adhesive layer 215 may directly contact the lower surface of the first electrode pad 241. The adhesive layer 215 may overlap only with the light-emitting diode (LED). For example, the side edges of the adhesive layer 215 may be coplanar with the side edges of the first semiconductor layer 242, the active layer 243, the second semiconductor layer 244, and the second electrode pad 245 in a direction parallel to the upper surface of the substrate 100, and may not extend beyond the side edges of the first semiconductor layer 242, the active layer 243, the second semiconductor layer 244, and the second electrode pad 245. The adhesive layer 215 may have an area corresponding to the light-emitting diode (LED) (for example, an area in a plane defined by the x-direction and the y-direction). For example, when the light-emitting diode (LED) is projected in a direction perpendicular to the top surface of the substrate 100, the area of the light-emitting diode (LED) may be substantially the same as the area of the adhesive layer 215. Here, when the area of A is referred to as being substantially the same as the area of B, the difference between the area of A and the area of B may be less than about 10% of the area of A or B. More preferably, the difference between the area of A and the area of B may be less than about 8% or about 5% of the area of A or B.

[0112] The adhesive layer 215 may include a metal. In an exemplary embodiment, the adhesive layer 215 may include at least one metal element selected from copper (Cu), silver (Ag), and gold (Au). In an exemplary embodiment, the adhesive layer 215 may include a single layer or a multilayer structure including the above materials.

[0113] In an exemplary embodiment, the second transparent electrode 230 may include at least one of a conductive oxide including indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium oxide (In2O3), indium gallium oxide (IGO), and aluminum zinc oxide (AZO). The second transparent electrode 230 may be electrically connected to the above reference Figure 5A and Figure 5B The second power voltage line VSSL (see Figure 5A or Figure 5B ) may be arranged on the same layer as the first source electrode SE1 or the first drain electrode DE1, or on the same layer as the first transparent electrode 210. For electrical connection between the second transparent electrode 230 and the second power voltage line VSSL, the insulating layers therebetween (e.g., the organic insulating layer 209 and / or the transparent insulating layer 220) may each include a contact hole.

[0114] As mentioned above Figure 5AAs described in the exemplary embodiment of the present invention, unlike the first transparent electrode 210 spaced apart from the adjacent first transparent electrode 210, the second transparent electrode 230 may be formed as one body to completely cover the substrate 100. For example, the second transparent electrode 230 may be formed as one body to cover the display area DA.

[0115] The transparent insulating layer 220 may be disposed between the first transparent electrode 210 and the second transparent electrode 230 (eg, in the thickness direction of the substrate 100 ). The transparent insulating layer 220 may surround and directly contact the lateral side surfaces of the light emitting diode LED.

[0116] The transparent insulating layer 220 may include a transparent organic material. In an exemplary embodiment, the transparent insulating layer 220 may include at least one compound selected from polymethyl methacrylate (PMMA), benzocyclobutene (BCB), polyimide, acrylate, epoxy, and polyester.

[0117] like Figure 6 As shown in the exemplary embodiment of FIG, the transmissive area TA is adjacent to the emissive area EA. However, contrary to the emissive area EA, the transmissive area TA does not include the light emitting diode LED.

[0118] At least one transmission area TA and at least one emission area EA may overlap with the opening 209OP of the organic insulating layer 209. Figure 6 As shown in the exemplary embodiment of FIG, three transmission areas TA and two emission areas EA overlap with the opening 209OP. The transmission area TA may overlap with the first transparent electrode 210 and the second transparent electrode 230 (e.g., overlap in the thickness direction of the substrate 100), and overlap with the transparent insulating layer 220 between the first transparent electrode 210 and the second transparent electrode 230. For example, the transmission area TA may overlap with a stacked structure in which the first transparent electrode 210, the transparent insulating layer 220, and the second transparent electrode 230 are sequentially stacked (e.g., sequentially stacked in the thickness direction of the substrate 100). The transparent insulating layer 220 may directly contact the upper surface of the first transparent electrode 210 and the lower surface of the second transparent electrode 230 in the transmission area TA.

[0119] When viewed in a direction perpendicular to the front surface (or main surface 100f) of the substrate 100, the transmission area TA may completely surround the emission area EA, as described above with reference to FIG. Figure 4 As described. Figure 5A or Figure 5B as well as Figure 6 The exemplary embodiment describes a structure of a display device 1, wherein a display area may include Figure 4The units U are repeatedly arranged in a two-dimensional arrangement structure. In an exemplary embodiment of the present inventive concept having the structure described above, the area occupied by the transmissive region TA in each unit U may be approximately 50% or more of the total area of each unit U (e.g., the total area in a plane defined by the x-direction and the y-direction).

[0120] Figure 7A is a cross-sectional view illustrating a process of manufacturing the display apparatus 1 according to an exemplary embodiment of the inventive concept. Figure 7B is a plan view illustrating a process of manufacturing the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0121] refer to Figure 7A and Figure 7B In an exemplary embodiment, a circuit element PC may be formed on a substrate 100, and the circuit element PC may include a first thin film transistor TFT1, a second thin film transistor TFT2, and a storage capacitor Cst as described above. The buffer layer 201, the gate insulating layer 203, the first interlayer insulating layer 205, and the second interlayer insulating layer 207 may be formed before and during the formation of the circuit element PC. The buffer layer 201, the gate insulating layer 203, the first interlayer insulating layer 205, and the second interlayer insulating layer 207 may be composed of the materials described above. In an exemplary embodiment, the contact hole 209CH and the opening 209OP may be formed by forming an organic insulating layer 209 on the circuit element PC and removing a portion of the organic insulating layer 209. The opening 209OP may extend from the top surface of the organic insulating layer 209 to the bottom surface.

[0122] During the process of forming the circuit element PC, signal lines and power lines may be formed. For example, Figure 7BThe scan line SWL, the previous scan line SIL, the emission control line EL, the initialization voltage line VL, the first to third data lines DL1, DL2, and DL3, the first power voltage line VDDL, and / or the second power voltage line VSSL shown in the exemplary embodiment. In the exemplary embodiment, the scan line SWL, the previous scan line SIL, and the emission control line EL may be located on the same layer as the first gate electrode GE1 of the first thin film transistor TFT1 and may include the same material as the first gate electrode GE1 of the first thin film transistor TFT1. The initialization voltage line VL may be located on the same layer as the second electrode CE2 of the storage capacitor Cst and may include the same material as the second electrode CE2. The first to third data lines DL1, DL2, and DL3, the first power voltage line VDDL, and / or the second power voltage line VSSL may be located on the same layer as the first source electrode SE1 or the first drain electrode DE1 of the first thin film transistor TFT1 and may include the same material as the first source electrode SE1 or the first drain electrode DE1. In exemplary embodiments, the second power voltage line VSSL may be located on the same layer as a first transparent electrode 210 described below, and may include the same material as that of the first transparent electrode 210 .

[0123] Then, the first transparent electrode 210 may be formed. A metal layer 215P is formed on the first transparent electrode 210. The first transparent electrode 210 may be formed by forming a transparent conductive oxide layer and then polymerizing the transparent conductive oxide layer. For example, in an example where a high temperature is applied to the transparent conductive oxide layer, the first transparent electrode 210 including a polycrystalline transparent conductive oxide layer (such as polycrystalline ITO) may be formed.

[0124] Then, a metal layer 215P may be formed. In an exemplary embodiment, the metal layer 215P may include at least one metal selected from copper (Cu), silver (Ag), and gold (Au). For example, the metal layer 215P may include a copper layer.

[0125] Figure 8A and Figure 8B is a cross-sectional view illustrating a process of manufacturing the display apparatus 1 according to an exemplary embodiment of the inventive concept. Figure 8C is a plan view illustrating a process of manufacturing the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0126] refer to Figure 8AIn an exemplary embodiment, the light-emitting diode (LED) may be disposed on the metal layer 215P. For example, the light-emitting diode (LED) may be eutectic-bonded. Since the metal layer 215P overlaps with the first transparent electrode 210 (e.g., overlaps in the thickness direction of the substrate 100) and has an area substantially the same as that of the first transparent electrode 210, the process of mounting the light-emitting diode (LED) (e.g., the process of aligning the light-emitting diode (LED)) can be relatively simple and easy to perform.

[0127] like Figure 8B As shown in the exemplary embodiment of the present invention, the metal layer 215P is then removed by using the light-emitting diode LED as a mask, and the adhesive layer 215 can be formed between the light-emitting diode LED and the first transparent electrode 210 (for example, in the thickness direction of the substrate 100). In an exemplary embodiment, the metal layer 215P can be removed by wet etching or dry etching. The adhesive layer 215 can be arranged only between the first transparent electrode 210 and the light-emitting diode LED through an etching process. For example, the side edges of the adhesive layer 215 can be coplanar with the side edges of the other layers of the light-emitting diode LED in a direction parallel to the upper surface of the substrate 100, and may not extend beyond the side edges of the other layers of the light-emitting diode LED. Since the first transparent electrode 210 includes a polycrystalline transparent conductive material, damage to the first transparent electrode 210 during the etching process can be minimized or prevented.

[0128] like Figure 8C As shown in the exemplary embodiment of FIG, a plurality of light emitting diodes LED can be arranged on each first transparent electrode 210 through the above process. Figure 8C As shown in the exemplary embodiment of FIG, the light emitting diodes LED may be arranged at the same intervals above each first transparent electrode 210 .

[0129] Figure 9A is a cross-sectional view illustrating a process of manufacturing the display apparatus 1 according to an exemplary embodiment of the inventive concept. Figure 9B is a plan view illustrating a process of manufacturing the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0130] refer to Figure 9A In an exemplary embodiment, after the light emitting diode LED is disposed on the adhesive layer 215, the transparent insulating layer 220 and the second transparent electrode 230 are sequentially formed (for example, sequentially formed in the thickness direction of the substrate 100). In an exemplary embodiment, the transparent insulating layer 220 and the second transparent electrode 230 may be formed as one body to completely cover the substrate 100. However, exemplary embodiments of the present inventive concept are not limited thereto. For example, in another exemplary embodiment, the transparent insulating layer 220 may have a thickness that can be aligned with the thickness of the substrate 100. Figure 9B The three first transparent electrodes 210 shown in the exemplary embodiment of FIG. 2 overlap and are arranged in an island type for each unit U. In this embodiment, the transparent insulating layer 220 of one unit U may be spaced apart from the transparent insulating layer 220 of an adjacent unit U (e.g., spaced apart in the x-direction).

[0131] Figure 10 is a plan view of a portion of a display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0132] refer to Figure 10 An exemplary embodiment of Figure 4 As described above, the unit U may include a plurality of vertical lines extending in the y direction and arranged in the x direction, and a plurality of horizontal lines extending in the x direction and arranged in the y direction. Figure 10 As shown in the exemplary embodiment of FIG, the plurality of vertical lines may include, for example, first to third data lines DL1, DL2, and DL3, a first power voltage line VDDL, and a second power voltage line VSSL. The plurality of horizontal lines may include, for example, a scan line SWL, a previous scan line SIL, an emission control line EL, and an initialization voltage line VL. The first to third data lines DL1, DL2, and DL3 may be adjacent to each other and may be spaced apart from the first power voltage line VDDL and the second power voltage line VSSL, with a transmission area TA disposed therebetween. The scan line SWL, the previous scan line SIL, and the emission control line EL may be adjacent to each other and may be spaced apart from the initialization voltage line VL, with a transmission area TA disposed therebetween.

[0133] As above Figure 5A As shown in the exemplary embodiment of FIG. 1 , in the unit U, the light emitting diodes LED are spaced apart from each other by a predetermined interval in the y direction on the first transparent electrode 210. Figure 4 As shown in the exemplary embodiment of FIG, a plurality of red emission areas EA-R are arranged to have a predetermined interval in the y direction, and a plurality of green emission areas EA-G and blue emission areas EA-B are arranged to have a predetermined interval in the y direction. However, in another exemplary embodiment, as shown in FIG. Figure 10 As shown in FIG, the emission region may be disposed biased (offset) on a portion of the first transparent electrode 210. As shown in FIG.

[0134] like Figure 10As shown in the exemplary embodiment of , the red emission area EA-R may be located on the first transparent electrode 210 and arranged on the lower portion of the first transparent electrode 210 (e.g., on the lower portion in the y direction). Similarly, the green emission area EA-G and the blue emission area EA-B may be located on the corresponding first transparent electrode 210, respectively, and arranged on the lower portion of the first transparent electrode 210 (e.g., on the lower portion in the y direction). For example, as Figure 10 As shown in the exemplary embodiment of , the plurality of red emission areas EA-R, the green emission areas EA-G, and the blue emission areas EA-B may each include three emission areas. Each of the plurality of red emission areas EA-R, the green emission areas EA-G, and the blue emission areas EA-B includes a lower emission area (e.g., a lower emission area in the y direction) that overlaps with the previous scan line SIL and is not completely surrounded by the transmission area TA. Each of the plurality of red emission areas EA-R, the green emission areas EA-G, and the blue emission areas EA-B also includes two central emission areas that are arranged upward (e.g., upward in the y direction) relative to the lower emission area on the lower portion of the first transparent electrode 210 and are spaced apart from the lower emission area in the x direction. The central emission area is completely surrounded by the transmission area TA.

[0135] exist Figure 10 In an exemplary embodiment of the present invention, the positions of the emission areas EA-R, EA-G, and EA-B may correspond to the positions of the light emitting diodes. Figure 10 In an exemplary embodiment, each of the red emission areas EA-R can correspond to the position of a light-emitting diode that emits red light, each of the green emission areas EA-G can correspond to the position of a light-emitting diode that emits green light, and each of the blue emission areas EA-B can correspond to the position of a light-emitting diode that emits blue light.

[0136] although Figure 10 The exemplary embodiment has the position of the emission region offset from the lower portion (e.g., the lower portion in the y direction) of the first transparent electrode 210, but the exemplary embodiments of the present inventive concept are not limited thereto. For example, in other exemplary embodiments, the emission region and / or the light emitting diode may be located on the upper portion or the middle portion of the first transparent electrode 210, and the arrangement of the plurality of emission regions may be changed.

[0137] Figure 11 is a diagram of a circuit connected to one of the light emitting diodes provided to the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0138] refer to Figure 11In an exemplary embodiment, the circuit element PC connected to the light emitting diode LED may include a first transistor T1, a second transistor T2, and a storage capacitor Cst.

[0139] The second transistor T2 is connected to the scan line SWL and the data line DL. The second transistor T2, as a switching transistor, is turned on in response to the scan signal S[n] transmitted through the scan line SWL and performs a switching operation of transmitting the data signal DATA transmitted through the data line DL to the first electrode of the first transistor T1.

[0140] The storage capacitor Cst is connected to the second transistor T2 and the first power voltage line VDDL, and stores a voltage corresponding to a difference between a voltage transferred from the second transistor T2 and the first power voltage ELVDD supplied to the first power voltage line VDDL.

[0141] The first transistor T1 is connected to the first power voltage line VDDL and the storage capacitor Cst, and can control the driving current flowing from the first power voltage line VDDL to the second power voltage line ELVSS through the light emitting diode LED in response to the voltage stored in the storage capacitor Cst. The light emitting diode LED can emit light with a predetermined brightness by using the driving current.

[0142] Despite Figure 11 The circuit element PC in the exemplary embodiment includes two transistors and one storage capacitor, but in other exemplary embodiments, the number of transistors and the number of storage capacitors may be variously changed.

[0143] Figure 12 is a plan view of one unit U including emission areas EA-R, EA-G, and EA-B and a transmissive area TA as a portion of the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0144] refer to Figure 12 In an exemplary embodiment, a plurality of lines may extend in the y direction and be arranged in the x direction, and a plurality of lines may extend in the x direction and be arranged in the y direction. Figure 12 As shown in the exemplary embodiment of FIG, the first data line DL1, the second data line DL2, the third data line DL3, the first power voltage line VDDL and the second power voltage line VSSL may extend in the y direction and may be arranged in the x direction. The scan line SWL may extend in the x direction and be arranged in the y direction. Figure 12 In an exemplary embodiment of the present invention, the scan line SWL(n-1) corresponding to the (n-1)th pixel column and the scan line SWL(n) corresponding to the n-th pixel column are adjacent to each other and spaced apart from each other in the y direction.

[0145] The transmission area TA may be defined between adjacent lines among lines extending in the y direction and between adjacent lines among lines extending in the x direction. Figure 12 As shown in the exemplary embodiment of FIG. 2 , the transmission area TA may be disposed between the third data line DL3 and the first power voltage line VDDL and between the two scan lines SWL(n−1) and SWL(n).

[0146] The transmission area TA is an area that does not overlap with the lines described below, the circuit elements connected to the lines, and the emission area. The transmission area TA is an area through which external light can pass. The emission area may be adjacent to the transmission area TA. For example, the red emission area EA-R, the green emission area EA-G, and the blue emission area EA-B may be adjacent to the transmission area TA. Figure 12 As shown in the exemplary embodiment of the present invention, each of the plurality of red emission areas EA-R, green emission areas EA-G, and blue emission areas EA-B may include three emission areas spaced apart from each other at regular intervals in the y direction. Each of the plurality of red emission areas EA-R, green emission areas EA-G, and blue emission areas EA-B may be completely surrounded by the transmissive area TA in a plan view (e.g., in a plane defined by the x-direction and the y-direction). However, exemplary embodiments of the present inventive concept are not limited thereto.

[0147] Figure 13 is a plan view of positions of a light emitting diode LED and electrodes 210 and 230 arranged in one unit U as a part of the display apparatus 1 according to an exemplary embodiment of the inventive concept.

[0148] refer to Figure 13 In an exemplary embodiment, at least one first transparent electrode 210 may be arranged between lines extending in the y direction. Figure 13 As shown in the exemplary embodiment of FIG, three first transparent electrodes 210 are disposed between the third data line DL3 and the first power voltage line VDDL. The three first transparent electrodes 210 are adjacent to each other and include a center one of the first transparent electrodes 210 disposed between the third data line DL3 and the first power voltage line VDDL and not overlapping with any line extending in the y direction, a left one of the first transparent electrodes 210 overlapping with the third data line DL3, and a right one of the first transparent electrodes 210 overlapping with the first power voltage line VDDL.

[0149] At least one light emitting diode LED may be arranged above the first transparent electrode 210. For example, Figure 13As shown in the exemplary embodiment of FIG, three light emitting diodes LED may be arranged for each first transparent electrode 210. The three light emitting diodes LED disposed on each first transparent electrode 210 may be spaced apart at regular intervals in the y direction. However, exemplary embodiments of the present inventive concept are not limited thereto.

[0150] Each light emitting diode (LED) can emit red light, green light, or blue light. A red light emitting diode (LED) (R), a green light emitting diode (LED) (G), or a blue light emitting diode (LED) (B) can be arranged for each first transparent electrode 210. The light emitting diode (LED) may include a PN diode containing a material based on an inorganic semiconductor. The specific materials and dimensions of the light emitting diode (LED) are the same as those described above.

[0151] Figure 13 Some of the first to third data lines DL1, DL2, and DL3 shown in the exemplary embodiment of the present invention may be electrically connected to the first transparent electrode 210 through the data connection line DL-C, as described above with reference to FIG. Figure 5A The exemplary embodiment is described in detail, and the data link line DL-C may transmit a data signal to a transistor electrically connected to a relevant data line.

[0152] refer to Figure 12 and Figure 13 In the exemplary embodiment, although the first to third data lines DL1, DL2, and DL3 are arranged on one side of the transmission area TA or the plurality of first transparent electrodes 210 (for example, arranged on the left side in the x-direction), exemplary embodiments of the present inventive concept are not limited thereto. For example, in another exemplary embodiment, the first to third data lines DL1, DL2, and DL3 may be spaced apart from each other (for example, spaced apart from each other in the x-direction), and the first transparent electrode 210 is between the first to third data lines DL1, DL2, and DL3, as described above with reference to FIG. Figure 5B The exemplary embodiments are described.

[0153] Figure 14 is along the exemplary embodiment according to the present inventive concept Figure 13 1 is a cross-sectional view of the display device 1 taken along line XIV-XIV′.

[0154] refer to Figure 14 , the display layer 200 is arranged on the substrate 100, and the specific structure of the display layer 200 is the same as that of the above reference Figure 6 The structures described in the exemplary embodiments are basically the same.

[0155] The display layer 200 may include a light emitting diode (LED) disposed between the first transparent electrode 210 and the second transparent electrode 230 (e.g., in the thickness direction of the substrate 100). The light emitting diode (LED) may have a stacked structure in which a first semiconductor layer 242, an active layer 243, and a second semiconductor layer 244 are disposed between a first electrode pad 241 and a second electrode pad 245 (e.g., in the thickness direction of the substrate 100).

[0156] Each light emitting diode LED is electrically connected to a circuit element PC including a transistor. The display layer 200 may include a circuit element PC including a first thin film transistor TFT1 and a second thin film transistor TFT2 and a storage capacitor Cst. In an exemplary embodiment, Figure 14 The first thin film transistor TFT1 of the exemplary embodiment may be connected to the reference Figure 11 The first transistor T1 described corresponds to, and Figure 14 The second thin film transistor TFT2 of the exemplary embodiment may be connected to the reference Figure 11 The second transistor T2 described corresponds to In embodiments where the number of thin film transistors and the number of storage capacitors included in the circuit element PC are relatively small, the area of the transmission region TA can be relatively and advantageously increased.

[0157] The first transparent electrode 210 is disposed on the organic insulating layer 209, and a portion (e.g., a majority) of the first transparent electrode 210 may be located in the opening 209OP of the organic insulating layer 209. The first transparent electrode 210 may be connected to the circuit element PC (e.g., the first thin film transistor TFT1) through a contact hole 209CH formed in the organic insulating layer 209. For example, Figure 14 As shown in the exemplary embodiment of FIG. 2 , the first transparent electrode 210 may directly contact the first drain electrode DE1 of the first thin film transistor TFT1 .

[0158] In an exemplary embodiment, the transparent insulating layer 220 may include a transparent organic material. The transparent insulating layer 220 may surround each light emitting diode LED on the first transparent electrode 210. Figure 14 As shown in the exemplary embodiment of FIG, in the cross-sectional view, a portion of the transparent insulating layer 220 is disposed between the light emitting diodes LED.

[0159] Since specific structures and materials of the first transparent electrode 210 , the transparent insulating layer 220 , and the second transparent electrode 230 are the same as those described above, descriptions thereof are omitted for convenience of explanation.

[0160] According to exemplary embodiments of the present inventive concept, a display device may include a relatively large area for a transmissive area TA, and a method for manufacturing a display device may be provided. These advantages are provided as examples, and the scope of exemplary embodiments of the present inventive concept is not limited thereto.

[0161] It should be understood that the exemplary embodiments of the present inventive concept described herein should be considered in a descriptive sense and not for limiting purposes. The description of features or aspects within each exemplary embodiment should typically be considered to be applicable to other similar features or aspects in other exemplary embodiments. Although one or more exemplary embodiments have been described with reference to the accompanying drawings, it will be understood by those skilled in the art that various modifications in form and detail may be made in one or more exemplary embodiments without departing from the spirit and scope as defined by the appended claims.

Claims

1. A display device comprising at least one emissive region that emits light and a transmissive region adjacent to the at least one emissive region, wherein the entire transmissive region transmits external light and does not emit light, the display device comprising: substrate; a circuit element comprising at least one transistor and a storage capacitor disposed on the substrate; an insulating layer disposed on the circuit element and comprising a contact hole; a first transparent electrode disposed on the insulating layer and electrically connected to the circuit element through the contact hole; as well as at least one light-emitting diode disposed on the first transparent electrode and defining the at least one emission region, the at least one light-emitting diode comprising a PN diode comprising an inorganic semiconductor-based material, A portion of the first transparent electrode is located in the transmission area.

2. The display device according to claim 1, further comprising: a second transparent electrode disposed on the at least one light emitting diode and facing the first transparent electrode; In the transmission area, the first transparent electrode overlaps with the second transparent electrode in a thickness direction of the substrate.

3. The display device according to claim 2, further comprising: a transparent insulating layer, disposed between the first transparent electrode and the second transparent electrode, In the transmission area, the transparent insulating layer directly contacts the first transparent electrode and the second transparent electrode.

4. The display device according to claim 1, wherein: The insulating layer includes an opening spaced apart from the contact hole and extending from a top surface to a bottom surface of the insulating layer; and At least a portion of the opening is located in the transmission area.

5. The display device according to claim 4, further comprising: an inorganic insulating layer, disposed between the substrate and the insulating layer, The first transparent electrode directly contacts the inorganic insulating layer in the opening.

6. The display device according to claim 1, wherein: The transmission area surrounds the at least one emission area when viewed in a plan view of a plane defined by a first direction and a second direction parallel to an upper surface of the substrate, the first direction intersecting the second direction.

7. The display device according to claim 1, wherein The at least one light emitting diode includes a vertical light emitting diode.

8. The display device according to claim 7, wherein: the at least one light emitting diode including a first electrode pad electrically connected to the first transparent electrode and a second electrode pad facing a direction opposite to the first electrode pad and spaced apart from the first electrode pad in a thickness direction of the substrate, Wherein the display device further includes an adhesive layer including a metal and provided between the first transparent electrode and the first electrode pad in the direction of the thickness of the substrate.

9. The display device according to claim 8, wherein The adhesive layer overlaps only the at least one light emitting diode in the direction of the thickness of the substrate.

10. The display device according to claim 1, wherein The first transparent electrode includes a polycrystalline transparent conductive oxide.

Images