A non-electrolytic capacitor parallel active power filter system and control method

Abstract

The present invention discloses a non-electrolytic capacitor parallel type active power filter system and control method, belonging to the field of power electronic control. The system includes: a three-phase power grid, a harmonic load, a filter inductor, a two-level converter and a bidirectional Boost active power decoupling circuit. The control method of the system includes: step 1: by controlling the two-level converter, the AC and DC side power exchange is completed to achieve load harmonic compensation; step 2: by controlling the bidirectional Boost active power decoupling circuit, the low-frequency fluctuation power of the DC side of the active power filter is transferred to the auxiliary capacitor, thereby suppressing the low-frequency ripple of the DC side voltage of the active power filter, so that when the DC side voltage fluctuation is small, a small-capacitance film capacitor can be used to replace the traditional electrolytic capacitor, thereby improving the reliability of the system. In addition, the low-pass filter of the DC side voltage control link of the active power filter is omitted, and the response speed of the system is improved.

Description

Technical Field

[0001] The present invention relates to the field of power electronic control, and in particular to a non-electrolytic capacitor parallel type active power filter system and a control method. Background Art

[0002] With the development of power electronics technology, many nonlinear loads such as rectifiers, inverters, uninterruptible power supplies, arc furnaces, etc. in the distribution system are increasing, and the harmonic pollution of the power grid is becoming more and more serious. Harmonics can cause problems such as transformer overheating, protection equipment failure, harmonic resonance and communication network interference. In addition, with the development of science and technology and industry, large-capacity reactive equipment such as high-power motors and transformers have appeared in the power system, resulting in low power factor of the power grid. Low power factor will lead to increased line losses, reduced power grid efficiency, and even grid collapse. Shunt active power filter (SAPF) can effectively solve the harmonic pollution of the power grid, improve the power factor of the power grid, improve the power quality of the power grid, and it is easy to disconnect from the power grid in the event of a fault without affecting the operation of other equipment. It is currently widely used in power systems.

[0003] The load harmonics in the three-phase symmetrical power grid mainly include 6k+1 (k=1,2,…(natural number)) positive sequence harmonics and 6k+5 (k=0,1,…(natural number)) negative sequence harmonics. When SAPF compensates for these harmonics, it will cause 6k (k=1,2,…(natural number)) fluctuations in its DC side voltage. The magnitude of the DC side voltage fluctuation greatly affects the quality of the SAPF output current. In order to suppress the DC side voltage fluctuation, the traditional approach is to connect a large-capacitance electrolytic capacitor in parallel on the SAPF DC side to slow down the fluctuation. However, the electrolytic capacitor has the defects of easy volatility of electrolyte and short life. Especially when the fluctuating voltage is large, the fluctuating current repeatedly charges and discharges the electrolytic capacitor, accelerating the aging of the capacitor. The electrolytic capacitor needs to be replaced frequently, affecting the reliability of the device. At the same time, the large-capacitance electrolytic capacitor greatly affects the response speed of the DC side voltage. In addition, in order to prevent the DC side fluctuating voltage from affecting the SAPF output current, a low-pass filter with a very low cutoff frequency needs to be added, which further reduces the response speed of the system.

[0004] At present, some scholars have introduced a resonant controller to suppress the fluctuation of the SAPF DC side voltage, but the effect is minimal and it will also have a certain impact on the SAPF output current. From the perspective of topological structure, the present invention transfers the SAPF DC side fluctuation power to the auxiliary capacitor based on active power decoupling technology, thereby realizing the suppression of the SAPF DC side voltage fluctuation. The SAPF DC side voltage finally contains only DC components and high-order harmonic components, so that a small-capacitance film capacitor can be used to replace the traditional large-capacitance electrolytic capacitor to increase the reliability of the device; at the same time, the low-pass filter is eliminated in the DC side voltage control link to speed up the response speed of the system. Summary of the invention

[0005] The purpose of the present invention is to overcome the shortcomings of the prior art and propose a non-electrolytic capacitor parallel active power filter system and control method based on active power decoupling technology. The specific technical implementation plan is as follows:

[0006] A non-electrolytic capacitor parallel active power filter system and control method, the system specifically comprising:

[0007] Three-phase power grid, harmonic load, filter inductor, two-level converter and bidirectional Boost active power decoupling circuit; the DC side of the two-level converter adopts a thin film capacitor C d The bidirectional Boost active power decoupling circuit specifically includes: two fully controlled switch tubes T1 and T2, a decoupling inductor L r And a film capacitor C r The T1 and T2 are connected in series, the other end of T2 is connected to the negative pole of the DC bus, and the other end of T1 is connected through the auxiliary capacitor C r Connected to the negative pole of the DC bus, decoupling inductor L r One end is connected to the midpoint of T1 and T2, and the other end is connected to the positive pole of the DC bus to form a bidirectional Boost circuit.

[0008] Furthermore, a non-electrolytic capacitor parallel active power filter system and control method are provided, wherein the control method of the system comprises the following steps:

[0009] Step 1: By controlling the two-level converter, the AC and DC power exchange is completed to achieve load harmonic compensation;

[0010] Step 2: By controlling the bidirectional Boost active power decoupling circuit, the low-frequency fluctuation power on the DC side of the active power filter is transferred to the auxiliary capacitor, thereby suppressing the low-frequency ripple of the DC side voltage of the active power filter.

[0011] Furthermore, the control method of the two-level converter in step 1 includes:

[0012] The d-axis component i of the grid current sd With its given value i sd * The difference is passed through the PI controller to obtain u d * ; After the grid voltage is transformed by Park, the d-axis component u of the grid voltage is obtained sd and the q-axis component u sq ; d-axis component i of grid current sd and the q-axis component i sq After multiplying by ωL, we get u Ld and u Lq ; The q-axis component i of the grid current sq With its given value i sq * The difference is passed through the PI controller to obtain u q * ; will u sd and u Lq Add them together and subtract u from the result. d * The difference is the reference output voltage d-axis component u of the active power filter od * ;Use u sq Subtract u Ld , then subtract u from the result q * The difference is the reference output voltage q-axis component u of the active power filter oq * ; will u od * and u oq * After Clark transformation, the reference output voltage α-axis component u of the active power filter is obtained α * and the β-axis component u β * ; According to u α * and u β * , the two-level converter switch tube is driven based on SVPWM technology.

[0013] Furthermore, the grid current d-axis component given value i is obtained sd * and the q-axis component given value i sq * The method is:

[0014] Active power filter DC side voltage u dcThe difference is sent to the PI controller, and the output of the PI controller is the grid current d-axis component given value i sd * ; The active power filter simultaneously compensates for the harmonics and reactive power in the load current, and the grid current q-axis component given value i sq * is 0.

[0015] Furthermore, the control method of the bidirectional Boost active power decoupling circuit in step 2 includes:

[0016] Using the decoupling inductor current i Lr With its given value i Lr * After the difference passes through multiple PR controllers, we get u Lr ; Use active power filter DC side voltage u dc Subtract u Lr Then the reference output voltage u of the bidirectional Boost circuit is obtained oc * ;Use u oc * Divided by the auxiliary capacitor voltage u r Then the modulation wave u of the bidirectional Boost circuit is obtained rf ; According to u rf , T1 and T2 are driven based on SPWM technology.

[0017] Furthermore, the multi-PR controller of the decoupled inductor current control loop specifically includes:

[0018] A proportional controller, a resonant controller with a resonant frequency of 600π, a resonant controller with a resonant frequency of 1200π, a resonant controller with a resonant frequency of 1800π and a resonant controller with a resonant frequency of 2400π.

[0019] Furthermore, the decoupling inductor current given value i is obtained. Lr * The specific method is:

[0020] The auxiliary capacitor voltage u r The difference is obtained by passing the PI controller. r * ; The active power filter DC side capacitor current i dc After the resonant controller, we get i d * ;change i r * and i d * The sum is the given value of the decoupling inductor current i Lr* .

[0021] Furthermore, the resonance controller specifically includes:

[0022] A resonant controller with a resonant frequency of 600π, a resonant controller with a resonant frequency of 1200π, a resonant controller with a resonant frequency of 1800π and a resonant controller with a resonant frequency of 2400π.

[0023] Compared with the prior art, the present invention has the following advantages:

[0024] 1) The present invention can well suppress the low-frequency ripple of the DC side voltage of the active power filter, thereby replacing the traditional large-capacitance electrolytic capacitor with a small-capacitance film capacitor, improving the response speed of the system and increasing the reliability of the device;

[0025] 2) The present invention suppresses the fluctuation of the DC side voltage of the active power filter based on the active power decoupling technology, eliminates the low-pass filter in the DC side voltage control link, and improves the response speed of the system. In addition, an independent active power decoupling circuit is adopted, and its control is separate from the control of the active power filter, which has the characteristics of simple control and easy implementation. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 This is a control principle diagram of the electrolytic capacitor-free parallel active power filter of the present invention.

[0027] Figure 2 This is the overall circuit topology of the electrolytic capacitor-free parallel active power filter of the present invention.

[0028] Figure 3 This is the change of DC side voltage before and after the active power decoupling circuit is put into operation.

[0029] Figure 4 This is the grid current change before and after the active power decoupling circuit is put into operation.

[0030] Figure 5 This is the FFT analysis of the DC side voltage when active power decoupling control is not enabled.

[0031] Figure 6 FFT analysis of DC side voltage when active power decoupling control is activated.

[0032] Figure 7 This is the FFT analysis of the grid current when active power decoupling control is not enabled.

[0033] Figure 8 This is the FFT analysis of the grid current when active power decoupling control is activated. DETAILED DESCRIPTION

[0034] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments. However, it should be understood that the present invention can be implemented in various forms, and some exemplary and non-limiting embodiments shown in the accompanying drawings and described below are not intended to limit the present invention to the specific embodiments described.

[0035] Figure 2 The circuit topology of the non-electrolytic capacitor parallel SAPF system of the present invention is shown, including a three-phase power grid, a harmonic load, a filter inductor, a two-level converter and a bidirectional Boost active power decoupling circuit; the DC side of the two-level converter adopts a thin film capacitor C d The bidirectional Boost active power decoupling circuit specifically includes: two fully controlled switch tubes T1 and T2, a decoupling inductor L r And a film capacitor C r The T1 and T2 are connected in series, the other end of T2 is connected to the negative pole of the DC bus, and the other end of T1 is connected through the auxiliary capacitor C r Connected to the negative pole of the DC bus, decoupling inductor L r One end is connected to the midpoint of T1 and T2, and the other end is connected to the positive pole of the DC bus to form a bidirectional Boost circuit. The bidirectional Boost active power decoupling circuit is connected in parallel on the DC side of the SAPF. Its control is independent of that of the SAPF and will not affect the operation of the SAPF.

[0036] The working principle of the present invention is as follows:

[0037] The present invention is based on independent bidirectional Boost active power decoupling technology, and transfers the 6-fold, 12-fold, 18-fold and 24-fold frequency fluctuation power on the DC side of SAPF to the auxiliary capacitor C by controlling the bidirectional Boost active power decoupling circuit. r The corresponding order of fluctuation voltage in the DC side voltage of SAPF is eliminated, so that the DC side voltage of SAPF only contains DC components and higher harmonic components with smaller amplitude. Based on this, small-capacitance film capacitors can be used to replace traditional large-capacitance electrolytic capacitors to increase the reliability of the device. At the same time, the low-pass filter is eliminated in the DC side voltage control link to improve the response speed of the system.

[0038] According to Kirchhoff's voltage law, the SAPF three-phase circuit equation can be obtained as follows:

[0039] E1:

[0040] Among them, u N0 Represents the zero-sequence voltage, and its value can be obtained according to the following formula:

[0041] E2:

[0042] Transform E1 from the abc coordinate system to the dq coordinate system, and obtain the mathematical model of SAPF in the dq coordinate system:

[0043] E3:

[0044] The present invention adopts feedback closed-loop control of the grid current, does not require a load harmonic detection link, and controls the grid current into a sine wave with the same phase as the grid voltage.

[0045] Ideally, the grid connection point voltage only contains positive sequence fundamental components. Assuming that the initial phase angle of the A-phase grid voltage is 0, the three-phase voltage at the grid connection point can be expressed as:

[0046] E4:

[0047] Among them, U s For u sx (x=a,b,c). Considering only the 5th, 7th, 11th, 13th, 17th, 19th, 23rd, and 25th harmonics with larger amplitudes in the load current, the expression of the SAPF output three-phase current can be set as:

[0048] E5:

[0049] According to the instantaneous power theory, the three-phase instantaneous power output of SAPF is:

[0050] E6: p ac =p a +p b +p c =u sa i oa +u sb i ob +u sc i oc

[0051] Combining E1, E2 and E3, the instantaneous power on the AC side of the SAPF can be calculated as:

[0052] E7:

[0053] From E7, we can see that the instantaneous power on the SAPF AC side contains 6, 12, 18 and 24 times of fluctuating power. According to the law of conservation of energy, there will also be corresponding times of fluctuating power on the SAPF DC side, resulting in corresponding times of low-frequency ripples on the DC side voltage. In order to suppress the DC side voltage fluctuation, it is necessary to transfer these fluctuating powers to the auxiliary capacitor by controlling the bidirectional Buck-Boost active power decoupling circuit.

[0054] Taking the suppression of the 6-fold frequency fluctuation voltage with the largest amplitude as an example, the auxiliary decoupling capacitor C r The upper voltage is modulated as:

[0055] E8:u r =U r0 +U c sin(6ωt+δ6)

[0056] Among them, U r0 is the auxiliary capacitor voltage u r The DC component, U c for u r The amplitude of the AC component, δ is u r The initial phase angle of the AC component relative to the A-phase grid voltage.

[0057] Based on this, the decoupling capacitor current can be expressed as:

[0058] E9:i cr =6ωC r U c cos(6ωt+δ6)

[0059] In addition, the SAPF DC current measurement can be expressed as:

[0060] E10:i dc =I dc0 +i dc -h

[0061] Among them, I dc0 is i dc The DC component in dc-h is i dc The harmonic components in the stable state can be considered as i dc The harmonic components in are suppressed, that is, i dc-h = 0, then i dc =I dc0 , then according to Kirchhoff's current law:

[0062] E11:i Lr =i cr -i dc =6ωC r U c cos(6ωt+δ6)-I dc0

[0063] Ignoring the loss of the switching device, the instantaneous power in the active power decoupling circuit can be obtained according to E8~E11:

[0064] E12:

[0065] From E12, we can see that there is also a 6-fold frequency fluctuation power in the decoupling circuit at this time. This 6-fold frequency fluctuation power can be used to balance the 6-fold frequency fluctuation power in E4, thereby suppressing the 6-fold frequency fluctuation of the DC side voltage of the SAPF. Similarly, when the bidirectional Boost circuit is controlled to make the auxiliary capacitor voltage contain 12-fold, 18-fold and 24-fold frequency fluctuation components, the corresponding number of fluctuation powers will be generated in the active power decoupling circuit. These fluctuation powers can be used to balance the 12-fold, 18-fold and 24-fold frequency fluctuation power in E4, thereby suppressing the 12-fold, 18-fold and 24-fold frequency fluctuations in the DC side voltage of the SAPF.

[0066] Figure 1 The control principle diagram of the electrolytic capacitor-free parallel SAPF of the present invention specifically includes the following steps:

[0067] Step 1: By controlling the two-level converter, the AC and DC power exchange is completed to achieve load harmonic compensation;

[0068] Step 2: By controlling the bidirectional Boost active power decoupling circuit, the low-frequency fluctuation power on the DC side of the active power filter is transferred to the auxiliary capacitor, thereby suppressing the low-frequency ripple of the DC side voltage of the active power filter.

[0069] Furthermore, the control method of the two-level converter in step 1 includes:

[0070] The d-axis component i of the grid current sd With its given value i sd * The difference is passed through the PI controller to obtain u d * ; After the grid voltage is transformed by Park, the d-axis component u of the grid voltage is obtained sd and the q-axis component u sq ; d-axis component i of grid current sd and the q-axis component i sq After multiplying by ωL, we get u Ld and u Lq ; The q-axis component i of the grid current sq With its given value i sq * The difference is passed through the PI controller to obtain u q * ; will u sd and u Lq Add them together and subtract u from the result. d * The difference is the reference output voltage d-axis component u of the active power filter od * ;Use u sq Subtract uLd , then subtract u from the result q * The difference is the reference output voltage q-axis component u of the active power filter oq * ; will u od * and u oq * After Clark transformation, the reference output voltage α-axis component u of the active power filter is obtained α * and the β-axis component u β * ; According to u α * and u β * , the two-level converter switch tube is driven based on SVPWM technology.

[0071] Furthermore, the grid current d-axis component given value i is obtained sd * and the q-axis component given value i sq * The method is:

[0072] Active power filter DC side voltage u dc The difference is sent to the PI controller, and the output of the PI controller is the grid current d-axis component given value i sd * ; The active power filter simultaneously compensates for the harmonics and reactive power in the load current, and the grid current q-axis component given value i sq * is 0.

[0073] Furthermore, the control method of the bidirectional Boost active power decoupling circuit in step 2 includes:

[0074] Using the decoupling inductor current i Lr With its given value i Lr * After the difference passes through multiple PR controllers, we get u Lr ; Use active power filter DC side voltage u dc Subtract u Lr Then the reference output voltage u of the bidirectional Boost circuit is obtained oc * ;Use u oc * Divided by the auxiliary capacitor voltage u r Then the modulation wave u of the bidirectional Boost circuit is obtained rf ; According to u rf , T1 and T2 are driven based on SPWM technology.

[0075] Furthermore, the multi-PR controller of the decoupled inductor current control loop specifically includes:

[0076] A proportional controller, a resonant controller with a resonant frequency of 600π, a resonant controller with a resonant frequency of 1200π, a resonant controller with a resonant frequency of 1800π and a resonant controller with a resonant frequency of 2400π.

[0077] Furthermore, the decoupling inductor current given value i is obtained. Lr * The specific method is:

[0078] The auxiliary capacitor voltage u r The difference is obtained by passing the PI controller. r * ; The active power filter DC side capacitor current i dc After the resonant controller, we get i d * ;change i r * and i d * The sum is the given value of the decoupling inductor current i Lr * .

[0079] Furthermore, the resonance controller specifically includes:

[0080] A resonant controller with a resonant frequency of 600π, a resonant controller with a resonant frequency of 1200π, a resonant controller with a resonant frequency of 1800π and a resonant controller with a resonant frequency of 2400π.

[0081] The control method is designed according to the above process, and simulation experiments are carried out using Matlab / Simulink to verify the effectiveness of the present invention. The simulation parameters are shown in Table 1.

[0082] Table 1 Simulation parameters

[0083]

[0084] Figure 3 The SAPF DC side voltage u is shown dcChanges: the active power decoupling circuit was not put into operation before 0.1s, the active power decoupling circuit was put into operation at 0.1s, and only the 6-fold frequency fluctuation controller was put into operation from 0.1s to 0.2s, the 6-fold frequency and 12-fold frequency fluctuation controllers were put into operation from 0.2s to 0.3s, and all fluctuation controllers were put into operation after 0.3s. It can be seen that when the active power decoupling circuit is not put into operation, the DC side voltage has a large fluctuation, and the fluctuation amplitude is about 30V; the voltage fluctuation decreases from 0.1s to 0.2s, and the fluctuation amplitude is about 6V; the DC side voltage fluctuation further decreases from 0.2s to 0.3s, and the fluctuation is about 1V at this time; the DC side voltage is almost a straight line from 0.3s to 0.4s, containing only some high-order harmonics, and the fluctuation amplitude is about 0.5V. It can be seen that the SAPF DC side voltage fluctuation suppression method of the present invention can well suppress the SAPF DC side voltage fluctuation, and at the same time accelerate the DC side voltage response speed. In addition, according to the traditional SAPF capacitance value, the DC side capacitance value is about 5000 μF, while the DC side capacitance value of the SAPF system of the present invention is only 50 μF, which is about 1% of the traditional SAPF capacitance value.

[0085] Figure 4 The change of the grid current is shown. The DC side voltage control link does not add a low-pass filter. Before 0.1s, due to the large fluctuation of the DC side voltage, the SAPF injects new harmonic current into the grid, and the grid current is seriously distorted at this time; 0.1s to 0.2s, as the DC side voltage fluctuation decreases, the grid current distortion also decreases; 0.2s to 0.3s, the DC side voltage fluctuation further decreases, and the grid current distortion also further decreases; 0.3s to 0.4s, the grid current is almost close to a sine wave. It can be seen that the degree of voltage fluctuation on the SAPF DC side greatly affects the quality of the grid current. The SAPF DC side voltage fluctuation suppression method of the present invention can eliminate the low-pass filter of the DC side voltage control link and ensure the quality of the grid current.

[0086] Figure 5 The FFT analysis of the DC side voltage of the SAPF when the active power decoupling circuit is not put into use is given. It can be seen that the DC side voltage contains large 6th, 12th, 18th and 24th harmonics, which is consistent with the theoretical analysis.

[0087] Figure 6 The FFT analysis of the SAPF DC side voltage after all fluctuation controllers are put into operation at 0.3s is given. It can be seen that the 6th, 12th, 18th and 24th fluctuations in the DC side voltage are all suppressed at this time, which illustrates the effectiveness of the SAPF DC side voltage low-frequency ripple suppression method of the present invention.

[0088] Figure 7The FFT analysis of the grid current before 0.1s when the active power decoupling circuit is not put into use is given. It can be seen that at this time, due to the large fluctuations in the DC side, the grid current contains a large number of 5th, 7th, 11th, 13th, 17th, 19th, 23rd and 25th harmonics, which is equivalent to the SAPF losing its harmonic compensation capability. The THD of the grid current is 14.14%.

[0089] Figure 8 The FFT analysis of the grid current after all fluctuation controllers are put into operation for 0.3s is given. It can be seen that at this time, since the DC side voltage fluctuation is suppressed, the SAPF will not inject harmonics into the grid current, and can well compensate for the load harmonics, and the grid current THD = 0.46%. This also further illustrates that the ripple suppression method of the present invention can well suppress the voltage ripple on the DC side of the SAPF, eliminating the low-pass filter in the DC side voltage control link.

[0090] The above embodiments are preferred embodiments of the present invention and are possible examples of embodiments, which are presented only for a clear understanding of the principles of the present invention. Many changes and modifications can be made to the above embodiments without departing from the spirit and principles of the technology described in the present invention. For those skilled in the art, several improvements and modifications can be made without departing from the principles of the present invention, and these changes and modifications should also be considered as the scope of protection of the present invention.

Claims

1. A non-electrolytic capacitor parallel active power filter system, characterized in that: The system includes: A three-phase power grid, a harmonic load, a filtering inductor, a two-level converter and a bidirectional Boost active power decoupling circuit; the DC side of the two-level converter uses a thin film capacitor Cd; the bidirectional Boost active power decoupling circuit specifically includes: two fully controlled switch tubes T1 and T2, a decoupling inductor Lr and a thin film capacitor Cr; T1 and T2 are connected in series, the other end of T2 is connected to the negative pole of the DC bus, the other end of T1 is connected to the negative pole of the DC bus through the auxiliary capacitor Cr, one end of the decoupling inductor Lr is connected to the midpoint of T1 and T2, and the other end is connected to the positive pole of the DC bus to form a bidirectional Boost circuit, wherein the control method of the two-level converter includes: The d-axis component i of the grid current sd With its given value i sd * After the difference passes through the PI controller, we get u d * ; After the grid voltage is transformed by Park, the d-axis component u of the grid voltage is obtained sd and the q-axis component u sq ; d-axis component i of grid current sd and the q-axis component i sq After multiplying by ωL, we get u Ld and u Lq ; The q-axis component i of the grid current sq With its given value i sq * After the difference passes through the PI controller, we get u q * ; will u sd and u Lq Add them together and subtract u from the result. d * The difference is the reference output voltage d-axis component u of the active power filter od * ;Use u sq Subtract u Ld , then subtract u from the result q * The difference is the reference output voltage q-axis component u of the active power filter oq * ; will u od * and u oq * After Clark transformation, the reference output voltage α-axis component u of the active power filter is obtained α * and the β-axis component u β * ; According to u α * and u β * , the two-level converter switch tube is driven based on SVPWM technology.

2. A control method for a system as claimed in claim 1, characterized in that: The control method of the system comprises the following steps: Step 1: By controlling the two-level converter, the AC and DC power exchange is completed to achieve load harmonic compensation; Step 2: By controlling the bidirectional Boost active power decoupling circuit, the low-frequency fluctuation power on the DC side of the active power filter is transferred to the auxiliary capacitor, thereby suppressing the low-frequency ripple of the DC side voltage of the active power filter.

3. The control method of a non-electrolytic capacitor parallel active power filter system as claimed in claim 2, characterized in that: The control method of the two-level converter in step 1 includes: The d-axis component i of the grid current sd With its given value i sd * After the difference passes through the PI controller, we get u d * ; After the grid voltage is transformed by Park, the d-axis component u of the grid voltage is obtained sd and the q-axis component u sq ; d-axis component i of grid current sd and the q-axis component i sq After multiplying by ωL, we get u Ld and u Lq ; The q-axis component i of the grid current sq With its given value i sq * After the difference passes through the PI controller, we get u q * ; will u sd and u Lq Add them together and subtract u from the result. d * The difference is the reference output voltage d-axis component u of the active power filter od * ;Use u sq Subtract u Ld , then subtract u from the result q * The difference is the reference output voltage q-axis component u of the active power filter oq * ; will u od * and u oq * After Clark transformation, the reference output voltage α-axis component u of the active power filter is obtained α * and the β-axis component u β * ; According to u α * and u β * , the two-level converter switch tube is driven based on SVPWM technology.

4. The control method of a non-electrolytic capacitor parallel active power filter system as claimed in claim 3, characterized in that: The grid current d-axis component given value i is obtained sd * and the q-axis component given value i sq * The method is: Active power filter DC side voltage u dc The difference is sent to the PI controller, and the output of the PI controller is the grid current d-axis component given value i sd * ; The active power filter simultaneously compensates for the harmonics and reactive power in the load current, and the grid current q-axis component given value i sq * is 0.

5. The control method of a non-electrolytic capacitor parallel active power filter system as claimed in claim 2, characterized in that: The control method of the bidirectional Boost active power decoupling circuit in step 2 includes: Using the decoupling inductor current i Lr With its given value i Lr * After the difference passes through multiple PR controllers, we get u Lr ; Use active power filter DC side voltage u dc Subtract u Lr Then the reference output voltage u of the bidirectional Boost circuit is obtained oc * ;Use u oc * Divided by the auxiliary capacitor voltage u r Then the modulation wave u of the bidirectional Boost circuit is obtained rf ; According to u rf , T1 and T2 are driven based on SPWM technology.

6. The control method of a non-electrolytic capacitor parallel active power filter system as claimed in claim 5, characterized in that: The multi-PR controller specifically includes: A proportional controller, a resonant controller with a resonant frequency of 600π, a resonant controller with a resonant frequency of 1200π, a resonant controller with a resonant frequency of 1800π and a resonant controller with a resonant frequency of 2400π.

7. The control method of a non-electrolytic capacitor parallel active power filter system as claimed in claim 5, characterized in that: The decoupling inductor current given value i is obtained Lr * The specific method is: The auxiliary capacitor voltage u r The difference is obtained by passing the PI controller. r * ; The capacitor current i of the active power filter DC side is dc After the resonant controller, we get i d * ;change i r * and i d * The sum is the given value of the decoupling inductor current i Lr * .

8. The control method of a non-electrolytic capacitor parallel active power filter system as claimed in claim 7, characterized in that: The resonant controller specifically comprises: A resonant controller with a resonant frequency of 600π, a resonant controller with a resonant frequency of 1200π, a resonant controller with a resonant frequency of 1800π and a resonant controller with a resonant frequency of 2400π.

Images