Package structure and method of manufacturing the same

Abstract

This disclosure relates to a packaging structure and a method for manufacturing the same. The packaging structure includes a wiring structure, at least one electronic device, a reinforcing structure, a plurality of conductive vias, and a package body. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The electronic device is electrically connected to the wiring structure. The reinforcing structure is disposed on the surface of the wiring structure and comprises a thermosetting material. The conductive vias are disposed in the reinforcing structure. The package body covers the electronic device.

Description

Technical Field

[0001] This disclosure relates to a packaging structure and a manufacturing method, and to a packaging structure including a reinforcing structure and a manufacturing method thereof. Background Technology

[0002] With the rapid development of the electronics industry and the advancement of semiconductor processing technology, more and more electronic components or devices are integrated into semiconductor package structures to achieve improved electrical performance and additional functions. Therefore, semiconductor package structures may warp during thermal processing. Due to the relatively low rigidity or stiffness of semiconductor package structures, cracks may form on the top surface and extend or grow into the interior of the semiconductor package structure. If cracks reach the semiconductor package structure, the circuit layers within the package may be damaged or broken, potentially leading to open circuits and malfunction of the semiconductor package structure. Consequently, the yield of semiconductor component structures may decrease. Summary of the Invention

[0003] In some embodiments, the package structure includes a wiring structure, at least one electronic device, a reinforcing structure, a plurality of conductive vias, and a package body. The wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer. The electronic device is electrically connected to the wiring structure. The reinforcing structure is disposed on the surface of the wiring structure and includes a thermosetting material. The conductive vias are disposed in the reinforcing structure. The package body covers the electronic device.

[0004] In some embodiments, the manufacturing method includes: (a) providing a wiring structure, wherein the wiring structure includes at least one dielectric layer and at least one circuit layer in contact with the dielectric layer; (b) forming a reinforcing structure on the wiring structure, wherein the reinforcing structure includes a plurality of conductive vias disposed therein; and (c) electrically connecting at least one electronic device to the conductive vias of the reinforcing structure. Attached Figure Description

[0005] Some aspects of embodiments of this disclosure can be readily understood from the following detailed description when read in conjunction with the accompanying drawings. Note that the various structures may not be drawn to scale, and the dimensions of the various structures may be arbitrarily increased or decreased for clarity of discussion.

[0006] Figure 1 A top view of a packaging structure according to some embodiments of the present disclosure is shown.

[0007] Figure 2 It shows along Figure 1 The cross-sectional view of the encapsulation structure taken from line 2-2.

[0008] Figure 3 It shows along Figure 1The cross-sectional view of the packaging structure is shown in line 3-3.

[0009] Figure 4 A cross-sectional view of an example of a packaging structure according to some embodiments of the present disclosure is shown.

[0010] Figure 5 A cross-sectional view of an example of a packaging structure according to some embodiments of the present disclosure is shown.

[0011] Figure 6 A cross-sectional view of an example of a packaging structure according to some embodiments of the present disclosure is shown.

[0012] Figure 7 A cross-sectional view of an example of a packaging structure according to some embodiments of the present disclosure is shown.

[0013] Figure 8 It shows Figure 7 A magnified view of the central area "A".

[0014] Figure 9 A cross-sectional view of an example of a packaging structure according to some embodiments of the present disclosure is shown.

[0015] Figure 10 A cross-sectional view of a component structure according to some embodiments of the present disclosure is shown.

[0016] Figure 11 A cross-sectional view of an example of a packaging structure according to some embodiments of the present disclosure is shown.

[0017] Figure 12 A cross-sectional view of an example of a packaging structure according to some embodiments of the present disclosure is shown.

[0018] Figure 13 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0019] Figure 14 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0020] Figure 15 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0021] Figure 16 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0022] Figure 17 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0023] Figure 18 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0024] Figure 19 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0025] Figure 20 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0026] Figure 21 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0027] Figure 22 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown.

[0028] Figure 23 One or more stages of an example of a method for manufacturing a component structure according to some embodiments of the present disclosure are shown. Detailed Implementation

[0029] The same reference numerals are used throughout the accompanying drawings and detailed description to denote the same or similar parts. Embodiments of this disclosure will be readily understood from the following detailed description taken in conjunction with the accompanying drawings.

[0030] The following disclosure provides several different embodiments or examples for implementing different features of the provided subject matter. Specific examples of components and arrangements are described below to explain certain aspects of this disclosure. Of course, these are merely examples and are not intended to be limiting. For example, in the following description, the formation of a first feature above or on a second feature may include embodiments in which the first and second features are formed or positioned in direct contact, and may also include embodiments in which additional features may be formed or positioned between the first and second features such that the first and second features may not be in direct contact. Furthermore, reference numerals and / or letters may be repeated in various examples. Such repetition is for simplicity and clarity and does not in itself determine the relationship between the various embodiments and / or configurations discussed.

[0031] At least some embodiments of this disclosure provide a packaging structure with improved crack resistance to enhance its reliability or yield. At least some embodiments of this disclosure further provide techniques for manufacturing packaging structures and component structures.

[0032] Figure 1A top view of a package structure 3 according to some embodiments of the present disclosure is shown. Figure 2 It shows along Figure 1 The cross-sectional view of the encapsulation structure 3 taken from line 2-2. Figure 3 It shows along Figure 1 The diagram shows a cross-sectional view of the encapsulation structure 3 taken from line 3-3. The encapsulation structure 3 includes a wiring structure 1, multiple conductive vias 38, a reinforcement structure 37, multiple conductive bumps 20, a first electronic device 24, a second electronic device 26, protective material 32, an encapsulant 34, and multiple solder materials 36. (The last sentence appears to be incomplete and possibly refers to a different encapsulation structure.) Figure 1 As shown, the packaging structure 3 may include a first electronic device 24 and two second electronic devices 26. However, the number of the first electronic device 24 and the second electronic device 26 is not limited in this disclosure.

[0033] like Figure 2 and Figure 3 As shown, the wiring structure 1 has a first surface 11, a second surface 12 opposite to the first surface 11, a side surface 13 extending between the first surface 11 and the second surface 12, and a high-density region 16 (or fine-line region) between the first electronic device 24 and the second electronic device 26. The wiring structure 1 may include at least one dielectric layer 14, at least one circuit layer 15 in contact with the dielectric layer 14, and a plurality of protrusion pads 17. For example, as... Figure 2 and Figure 3 As shown, the wiring structure 1 includes a first dielectric layer 141, a first circuit layer 151, a second dielectric layer 142, a second circuit layer 152, a third dielectric layer 143, a third circuit layer 153, a fourth dielectric layer 144, a fourth circuit layer 154, and a fifth dielectric layer 145. That is, at least one dielectric layer 14 includes the first dielectric layer 141, the second dielectric layer 142, the third dielectric layer 143, the fourth dielectric layer 144, and the fifth dielectric layer 145. At least one circuit layer 15 includes the first circuit layer 151, the second circuit layer 152, the third circuit layer 153, and the fourth circuit layer 154.

[0034] The first dielectric layer 141 may be the topmost or outermost dielectric layer of the wiring structure 1. The first circuit layer 151 may be the topmost or outermost circuit layer of the wiring structure 1. The material of the first circuit layer 151 may include, for example, copper, another conductive metal, or an alloy thereof. The material of the first dielectric layer 141 may include insulating materials, passivating materials, dielectric materials, or solder resist materials, such as, for example, polymers based on benzocyclobutene (BCB) or polyimide (PI). In some embodiments, the first dielectric layer 141 may be made of a photoimageable material. Additionally, the first surface 11 of the wiring structure 1 may be the top surface of the first dielectric layer 141. The first circuit layer 151 is disposed adjacent to the top surface of the first dielectric layer 141. In some embodiments, the first circuit layer 151 is embedded in the first dielectric layer 141 and exposed from the top surface of the first dielectric layer 141. That is, the first dielectric layer 141 covers the first circuit layer 151 and defines a plurality of openings to expose portions of the first circuit layer 151.

[0035] Further, the first circuit layer 151 may include an interconnect portion 15a and a peripheral portion 15b. The interconnect portion 15a is located in the high-density region 16, and the peripheral portion 15b is located outside the high-density region 16 (e.g., in a low-density region). For example, a second electronic device 26 can be electrically connected to a first electronic device 24 through the interconnect portion 15a of the first circuit layer 151. The second electronic device 26 and the first electronic device 24 can be electrically connected to a bonding material 36 on the second surface 12 of the wiring structure 1 through the peripheral portion 15b of the first circuit layer 151. The line width / linespace (L / S) of the traces in the interconnect portion 15a may be smaller than the L / S of the traces in the peripheral portion 15b. For example, the L / S of the traces in the interconnect portion 15a may be less than or equal to about 5 μm / about 5 μm, or less than or equal to about 2 μm / about 2 μm, or less than or equal to about 0.8 μm / about 0.8 μm. The L / S of the trace of the outer portion 15b can be less than or equal to about 10 μm / about 10 μm, or less than or equal to about 7 μm / about 7 μm, or less than or equal to about 5 μm / about 5 μm.

[0036] A first dielectric layer 141 and a first circuit layer 151 may be disposed on a second dielectric layer 142. Furthermore, the second dielectric layer 142 may cover the second circuit layer 152. A portion of the first circuit layer 151 (i.e., the via portion) extends through the second dielectric layer 142 to electrically connect to the second circuit layer 152. The material of the second dielectric layer 142 may be the same as or similar to the material of the first dielectric layer 141. The second circuit layer 152 may also include interconnect portions located in the high-density region 16 and peripheral portions located outside the high-density region 16. In some embodiments, the via portions of the first circuit layer 151 may extend from the peripheral portions, and they may be formed simultaneously and integrally.

[0037] Similarly, a second dielectric layer 142 and a second circuit layer 152 may be disposed on a third dielectric layer 143. Furthermore, the third dielectric layer 143 may cover the third circuit layer 153. A portion of the second circuit layer 152 (i.e., the via portion) extends through the third dielectric layer 143 to electrically connect to the third circuit layer 153. The material of the third dielectric layer 143 may be the same as or similar to the material of the second dielectric layer 142. The third circuit layer 153 may also include interconnect portions located in the high-density region 16 and peripheral portions located outside the high-density region 16. In some embodiments, the via portions of the second circuit layer 152 may extend from the peripheral portions, and they may be formed simultaneously and integrally.

[0038] Similarly, a third dielectric layer 143 and a third circuit layer 153 may be disposed on a fourth dielectric layer 144. Furthermore, the fourth dielectric layer 144 may cover the fourth circuit layer 154. A portion of the third circuit layer 153 (i.e., the via portion) extends through the fourth dielectric layer 144 to electrically connect to the fourth circuit layer 154. The material of the fourth dielectric layer 144 may be the same as or similar to the material of the third dielectric layer 143. The fourth circuit layer 154 may also include interconnect portions located in the high-density region 16 and peripheral portions located outside the high-density region 16.

[0039] A fourth dielectric layer 144 and a fourth circuit layer 154 may be disposed on a fifth dielectric layer 145. A portion of the fourth circuit layer 154 (i.e., the via portion) extends through the fifth dielectric layer 145 to be exposed from the bottom surface of the fifth dielectric layer 145 (e.g., the second surface 12 of the wiring structure 1). The material of the fifth dielectric layer 145 may be the same as or similar to the material of the fourth dielectric layer 144. Figure 2 and Figure 3As shown, the second electronic device 26 can be electrically connected to the first electronic device 24 through the interconnection portion 15a of the circuit layer 15 (including, for example, the interconnection portion 15a of the first circuit layer 151, the second circuit layer 152, the third circuit layer 153, and the fourth circuit layer 154). The second electronic device 26 and the first electronic device 24 can be electrically connected to the bonding material 36 through the via portions of the peripheral portion 15b of the circuit layer 15 (including, for example, the peripheral portion 15b of the first circuit layer 151, the second circuit layer 152, the third circuit layer 153, and the fourth circuit layer 154).

[0040] The protruding pad 17 may be disposed on and protrude from the first dielectric layer 141 (i.e., the topmost or outermost dielectric layer) of the wiring structure 1. The protruding pad 17 may be disposed on and protrude from the first surface 11 of the wiring structure 1, and extend through the first dielectric layer 141 (i.e., the topmost or outermost dielectric layer) to electrically connect to the first circuit layer 151. Figure 2 and Figure 3 As shown, each protruding pad 17 may include a peripheral side surface 171.

[0041] Conductive vias 38 (or conductive pillars) are disposed on the protruding pads 17. Each conductive via 38 may have a peripheral side surface 381. In some embodiments, the peripheral side surface 381 of the conductive via 38 may be substantially coplanar with the peripheral side surface 171 of the protruding pads 17.

[0042] A reinforcing structure 37 may be disposed on the first surface 11 of the wiring structure 1 to cover the peripheral side surface 381 of the conductive via 38 and the peripheral side surface 171 of the protruding pad 17. The reinforcing structure 37 may have a first surface 371, a second surface 372 opposite to the first surface 371, and a side surface 373 extending between the first surface 371 and the second surface 372. The Young's modulus of the reinforcing structure 37 is greater than that of the wiring structure 1. For example, the Young's modulus of the reinforcing structure 37 may be in the range of about 15 GPa to about 29 GPa. In some embodiments, the stress index is defined as the product of the Young's modulus and the coefficient of thermal expansion (CTE). The stress index of the reinforcing structure 37 is greater than that of the wiring structure 1. For example, the stress index of the reinforcing structure 37 may be in the range of about 136 to about 233.

[0043] In some embodiments, the reinforcing structure 37 may include a thermoset material, such as a thermoset polymer. In some embodiments, the reinforcing structure 37 may be a molding compound. The molding compound may include a resin material with or without fillers and may be formed by molding and curing processes. The second surface 372 of the reinforcing structure 37 may directly contact the first surface 11 of the wiring structure 1 and may be lower than the top surface of the protruding pad 17. That is, at least a portion of the conductive via 38 and the protruding pad 17 may be disposed or embedded in the reinforcing structure 37.

[0044] The top surface of the conductive via 38 can be substantially coplanar with the first surface 371 of the reinforcing structure 37. Therefore, the top surface of the conductive via 38 can be exposed from the first surface 371 of the reinforcing structure 37. Furthermore, from a top view, the size of the reinforcing structure 37 can be substantially equal to the size of the wiring structure 1, since it can be cut simultaneously. Further, the side surface 373 of the reinforcing structure 37 can be substantially coplanar with the side surface 13 of the wiring structure 1. In some embodiments, from a top view, the size of the reinforcing structure 37 substantially covers the wiring structure 1.

[0045] Conductive bumps 20 may be disposed on and protrude from the first surface 371 of the reinforcing structure 37. In some embodiments, conductive bumps 20 may be disposed on the top surface of the conductive via 38 and electrically connected to the top surface of the conductive via 38. In some embodiments, conductive bumps 20 may include a first metal layer, a second metal layer, and a third metal layer sequentially disposed on the top surface of the conductive via 38. For example, the first metal layer may include copper, the second metal layer may include nickel, and the third metal layer may include gold.

[0046] First electronic device 24 and second electronic device 26 are arranged side-by-side near the first surface 371 of reinforcing structure 37 and are electrically connected to the circuit layer 15 of wiring structure 1. First electronic device 24 may be a semiconductor device, such as an application-specific integrated circuit (ASIC) die. Figure 2 and Figure 3As shown, the first electronic device 24 may have a first active surface 241, a first back surface 242 opposite to the first active surface 241, and a side surface 243 extending between the first active surface 241 and the first back surface 242. Further, the first electronic device 24 may include a plurality of first electrical contacts 244 disposed adjacent to the first active surface 241. The first electrical contacts 244 may be exposed or protrude from the first active surface 241 for electrical connection. The first electrical contacts 244 may be pads, bumps, studs, pillars, or posts. In some embodiments, the first electrical contacts 244 of the first electronic device 24 may be electrically connected to and bonded to the conductive bump 20 by a variety of bonding materials 245. In other words, the first electronic device 24 may be bonded to the reinforcing structure 37 by flip-chip bonding. For example, the first electrical contacts 244 may include copper, gold, platinum, and / or other suitable materials.

[0047] The second electronic device 26 can be a semiconductor device, such as a high bandwidth memory (HBM) die. Figure 2 and Figure 3 As shown, the second electronic device 26 may have a second active surface 261, a second back surface 262 opposite to the second active surface 261, and a side surface 263 extending between the second active surface 261 and the second back surface 262. Further, the second electronic device 26 may include a plurality of second electrical contacts 264 disposed adjacent to the second active surface 261. The second electrical contacts 264 may be exposed or protrude from the second active surface 261 for electrical connection. The second electrical contacts 264 may be pads, bumps, studs, posts, or pillars. In some embodiments, the second electrical contacts 264 of the second electronic device 26 may be electrically connected to and bonded to the conductive bump 20 by a variety of bonding materials 265. In other words, the second electronic device 26 may be bonded to the reinforcing structure 37 by flip-chip bonding. For example, the second electrical contacts 264 may include copper, gold, platinum, and / or other suitable materials. Figure 2 and Figure 3 As shown, the second electronic device 26 may include a substrate 267, a plurality of memory dies 268, and a package 269. The memory dies 268 may be stacked on the substrate 267. The package 269 may cover the substrate 267 and the memory dies 268. Figure 2 and Figure 3 As shown, the first electronic device 24 and the second electronic device 26 can be electrically connected to the wiring structure 1 through the conductive through-hole 38 in the reinforcing structure 37.

[0048] The protective material 32 (i.e., the underfill) can be disposed in the space between the first electronic device 24 and the reinforcing structure 37 to cover and protect the bonding structure formed by the first electrical contact 244, the conductive bump 20, and the bonding material 245. Further, the protective material 32 can be disposed in the space between the second electronic device 26 and the reinforcing structure 37 to cover and protect the bonding structure formed by the second electrical contact 264, the conductive bump 20, and the bonding material 265. Furthermore, the protective material 32 can extend further into the gap 30 between the side surface 243 of the first electronic device 24 and the side surface 263 of the second electronic device 26. The protective material 32 (i.e., the underfill) can directly contact the reinforcing structure 37.

[0049] The package 34 covers at least a portion of the first surface 371 of the reinforcing structure 37, at least a portion of the first electronic device 24, at least a portion of the second electronic device 26, and the protective material 32. The material of the package 34 may be a molding compound with or without fillers. The material of the main material 374 may be the same as or different from the material of the package 34. The package 34 has a first surface 341 (e.g., a top surface) and side surfaces 343. Figure 2 and Figure 3 As shown, the first surface 341 of the package 34, the first back surface 242 of the first electronic device 24, and the second back surface 262 of the second electronic device 26 are substantially coplanar. In some embodiments, the top surface of the protective material 32 in the gap 30 may be recessed from the first back surface 242 of the first electronic device 24 and / or the second back surface 262 of the second electronic device 26. Therefore, a portion of the package 34 may extend into the gap 30 between the first electronic device 24 and the second electronic device 26. Furthermore, the side surface 343 of the package 34 may be substantially coplanar with the side surface 13 of the wiring structure 1 and the side surface 373 of the reinforcing structure 37.

[0050] Bonding material 36 (e.g., solder ball) may be disposed adjacent to the second surface 12 of the wiring structure 1 for external connection. Figure 2 and Figure 3 As shown, bonding material 36 is disposed on the exposed portion of the fourth circuit layer 154 (i.e., the bottom of the via portion).

[0051] exist Figures 1 to 3In the illustrated embodiment, the reinforcing structure 37 can increase the rigidity or stiffness of the wiring structure 1 and the package structure 3, thereby reducing warpage of the wiring structure 1 and the package structure 3. Therefore, the risk of crack formation in the protective material 32 or the package 34 is low. Furthermore, if a crack forms at the top surface of the protective material 32 in the gap 30 and the crack extends or grows downwards, the crack will be prevented by the reinforcing structure 37. Therefore, the reinforcing structure 37 can prevent cracks from reaching the wiring structure 1 and can protect the interconnect portions 15a of the circuit layer 15 from damage or breakage. Therefore, the reliability and yield of the package structure 3 are improved. Furthermore, the material of the reinforcing structure 37 can be, for example, a polymer such as resin, which is cheaper than a silicon interposer or a glass interposer. Therefore, the cost of the package structure 3 is reduced.

[0052] Figure 4 A cross-sectional view of an example of a packaging structure 3a according to some embodiments of the present disclosure is shown. In addition to the structure of the reinforcing structure 37a, Figure 4 The packaging structure 3a is similar to Figures 1 to 3 3. For example, the packaging structure. Figure 4 As shown, the reinforcing structure 37a may include a main material 374 and at least one embedded element 375 embedded in the main material 374. The main material 374 may be similar to... Figure 2 and Figure 3 The reinforcing structure 37 can be a thermosetting material, such as a thermosetting polymer. In some embodiments, the main material 374 can be a molding compound comprising a resin material with or without fillers, and can be formed by a molding process and a curing process. At least one embedded element 375 can be disposed on the first surface 11 of the wiring structure 1 and can be covered by the main material 374. That is, at least one embedded element 375 may not extend through the main material 374. In some embodiments, the material of at least one embedded element 375 can be a dummy bulk comprising a silicon material or a glass material. The Young's modulus or stress index of at least one embedded element 375 is greater than that of the main material 374, thereby increasing the Young's modulus or stress index of the reinforcing structure 37a.

[0053] Figure 5 A cross-sectional view of an example of the encapsulation structure 3b according to some embodiments of the present disclosure is shown. In addition to the structure of the reinforcing structure 37b, Figure 5 The 3b packaging structure is similar to Figure 4 The packaging structure is 3a. For example... Figure 5 As shown, the reinforcing structure 37b may include a main material 374 and at least one embedded element (e.g., a passive device 39) embedded in the main material 374. Figure 5 The main material 374 can be similar to Figure 4 The main material 374. At least one passive device 39 (e.g., a capacitor) may be covered by the main material 374. Figure 5 As shown, at least one passive device 39 (e.g., a capacitor) may be disposed on and electrically connected to the first surface 11 of the wiring structure 1.

[0054] Figure 6 A cross-sectional view of an example of a packaging structure 3c according to some embodiments of the present disclosure is shown. In addition to the structure of the reinforcing structure 37c, Figure 6 The packaging structure of 3C is similar to Figure 4 The packaging structure is 3a. For example... Figure 6 As shown, the reinforcing structure 37c may include a main material 374 and at least one embedded element (e.g., a bridge die 376) embedded in the main material 374. Figure 6 The main material 374 can be similar to Figure 4 The main material is 374. At least one bridge core 376 may be covered by the main material 374. For example... Figure 6 As shown, at least one bridge die 376 may be attached to the first surface 11 of the wiring structure 1. In some embodiments, the bridge die 376 may include a plurality of electrical contacts 377 disposed adjacent to the top surface of the bridge die 376. The top surface of the electrical contacts 377 may be substantially coplanar with and / or exposed from the top surface of the main material 374 (e.g., the first surface 371 of the reinforcing structure 37c). The electrical contacts 377 may be pads, bumps, studs, posts, or pillars. Some of the conductive bumps 20 may be disposed on the electrical contacts 377 of the bridge die 376. Thus, the first electronic device 24 and the second electronic device 26 are electrically connected to the embedded element (e.g., the bridge die 376). Furthermore, the first electronic device 24 and the second electronic device 26 communicate with each other through the embedded element (e.g., the bridge die 376).

[0055] Figure 7 A cross-sectional view of an example of a packaging structure 3d according to some embodiments of the present disclosure is shown. In addition to the structure of the reinforcing structure 37d, Figure 7 The 3D encapsulation structure is similar to Figure 4 The packaging structure is 3a. For example... Figure 7 As shown, the reinforcing structure 37d may include a main material 374 and at least one embedded element (e.g., an interposer 5) embedded in the main material 374. Figure 7 The main material 374 can be similar to Figure 4 The main material is 374. The interposer 5 can be a silicon interposer or a glass interposer, and can be covered by the main material 374. For example... Figure 7As shown, the interposer 5 can be attached to the first surface 11 of the wiring structure 1. In some embodiments, the interposer 5 may include a body 50, a circuit layer 52, and a plurality of vias 54. The circuit layer 52 may be disposed on the top surface of the body 50. The top surface of the circuit layer 52 may be substantially coplanar with and / or exposed from the top surface of the main material 374 (e.g., the first surface 371 of the reinforcing structure 37d). The circuit layer 52 may include a plurality of pads and a plurality of traces. Some of the conductive bumps 20 may be disposed on the pads of the circuit layer 52 of the embedded element (e.g., the interposer 5). The vias 54 may extend through the body 50 and electrically connect the circuit layer 52 and the protruding pads 17. Thus, the first electronic device 24 and the second electronic device 26 can communicate with the wiring structure 1 through the embedded element (e.g., the interposer 5).

[0056] Figure 8 It shows Figure 7 A magnified view of region "A" in the middle. Intermediate layer 5 may include trench capacitors 56 disposed on the top surface adjacent to intermediate layer 5. For example... Figure 8 As shown, the body 50 may define a plurality of trenches 504. The trench capacitor 56 may include a dielectric layer 561 and a conductor 562. The dielectric layer 561 is disposed on the top surface of the interposer 5 and in the trenches 504. The dielectric layer 561 may not fill the trenches 504 and may define a central hole in each of the trenches 504. A portion of the conductor 562 may extend into the central hole defined by the dielectric layer 561 in the trenches 504. The conductor 562 above the top surface of the interposer 5 may be an electrode.

[0057] Figure 9 A cross-sectional view of an example of a packaging structure 3e according to some embodiments of the present disclosure is shown. In addition to the structure of the reinforcing structure 37e, Figure 9 The 3e packaging structure is similar to Figure 4 The packaging structure is 3a. For example... Figure 9 As shown, the reinforcing structure 37e may include a main material 374 and at least one embedded element (e.g., an interconnecting device 6) embedded in the main material 374. Figure 9 The main material 374 can be similar to Figure 4 The main material is 374. The interconnect device 6 can be a silicon interconnect bridge and can be covered by the main material 374. For example... Figure 9As shown, the interposer 5 can be attached to the first surface 11 of the wiring structure 1. In some embodiments, the interconnect device 6 may include a body 60, an active circuit region 62, a plurality of electrical contacts 63, and a plurality of vias 64. The active circuit region 62 may be disposed on the top surface of the body 60. The electrical contacts 63 may be disposed adjacent to the active circuit region 62. The top surface of the electrical contacts 63 may be substantially coplanar with and / or exposed from the top surface of the main material 374 (e.g., the first surface 371 of the reinforcing structure 37e). The electrical contacts 63 may be pads, bumps, studs, pillars, or supports. Some of the conductive bumps 20 may be disposed on the electrical contacts 63 of the interconnect device 6. Thus, the first electronic device 24 and the second electronic device 26 communicate with each other via embedded elements (e.g., the interconnect device 6). Furthermore, the vias 64 may extend through the body 60 and electrically connect the active circuit region 62 and the protruding pads 17. Therefore, the first electronic device 24 and the second electronic device 26 can communicate with the wiring structure 1 through embedded elements (e.g., interconnection device 6).

[0058] Figure 10 A cross-sectional view of a component structure 4 according to some embodiments of the present disclosure is shown. The component structure 4 may be a semiconductor package structure and may include a substrate 40, a package structure 3, a heat sink 46, and a plurality of external connectors 49. The substrate 40 may include a glass-reinforced epoxy material (e.g., FR4), bismaleimide triazine (BT), epoxy resin, silicon, printed circuit board (PCB) material, glass, ceramic, or photoimaging dielectric (PID) material. The substrate 40 may have a first surface 401 and a second surface 402 opposite to the first surface 401. Figure 10 As shown, the substrate 40 may include a first circuit layer 41, a second circuit layer 42, and a plurality of conductive vias 43. The first circuit layer 41 may be disposed adjacent to a first surface 401 of the substrate 40, and the second circuit layer 42 may be disposed adjacent to a second surface 402 of the substrate 40. The conductive vias 43 may extend through the substrate 40 and electrically connect the first circuit layer 41 and the second circuit layer 42.

[0059] Figure 10 The packaging structure 3 can be with Figures 1 to 3The package structure 3 is the same as or similar to the first circuit layer 41 of the substrate 40 via bonding material 36. A protective material (i.e., underfill) may be further included in the space between the package structure 3 and the substrate 40 to cover and protect the bonding material 36 and the first circuit layer 41. Further, the heat sink 46 may be a cap / hat structure and may define a cavity 461 for accommodating the package structure 3. The material of the heat sink 46 may include metals, such as copper, aluminum, and / or other suitable materials. A portion of the heat sink 46 may be attached to the top surface of the package structure 3 via a thermal material 48 (e.g., thermal interface material, TIM) to dissipate heat generated by the first electronic device 24 and the second electronic device 26. Another portion of the heat sink 46 (e.g., the bottom) may be attached to the first surface 401 of the substrate 40 via an adhesive material. Furthermore, external connectors 49 (e.g., solder balls) are formed or disposed on the second circuit layer 42 for external connections. Note that the package structure 3 may be made of... Figure 4 , 5 The packaging structures 3a, 3b, 3c, 3d, and 3e of 6, 7, and 9 are replaced.

[0060] During manufacturing, when the heat sink 46 is attached to the package structure 3, pressure can be transferred from the heat sink 46 to the package structure 3. Since the reinforcing structure 37 increases the rigidity or stiffness of the wiring structure 1 and the package structure 3, warpage of the wiring structure 1 and the package structure 3 can be reduced. Therefore, the risk of crack formation in the protective material 32 or the package body 34 is low. However, if a crack forms at the top surface of the protective material 32 in the gap 30 and the crack extends or grows downwards, the crack will be prevented by the reinforcing structure 37. Therefore, the reinforcing structure 37 can prevent cracks from reaching the wiring structure 1 and can protect the interconnect portions 15a of the circuit layer 15 from damage or breakage. Thus, the reliability and yield of the component structure 4 are improved.

[0061] Figure 11 A cross-sectional view of an example of a package structure 3f according to some embodiments of the present disclosure is shown. Besides the location of the reinforcing structure 37f and the structure of the protruding pad 21, Figure 11 The 3f packaging structure is similar to Figures 1 to 3 3. For example, the packaging structure. Figure 11 As shown, the reinforcing structure 37f can be disposed on the second surface 12 of the wiring structure 1. The reinforcing structure 37f may have a first surface 371, a second surface 372 opposite to the first surface 371, and a side surface 373 extending between the first surface 371 and the second surface 372. Figure 11 The materials and structure of the reinforced structure 37f can be similar to Figure 2 and Figure 3 The material and structure of the reinforcing structure 37. Further, the conductive via 38f (or conductive post) can be provided on the exposed portion (i.e., the bottom of the via portion) of the fourth circuit layer 154 of the wiring structure 1. The reinforcing structure 37f covers the conductive via 38f. Therefore, the conductive via 38f can be provided or embedded in the reinforcing structure 37f. Furthermore, the bottom surface of the conductive via 38f can be substantially coplanar with the second surface 372 of the reinforcing structure 37f. Therefore, the bottom surface of the conductive via 38f can be exposed from the second surface 372 of the reinforcing structure 37f. Furthermore, from the bottom view, the size of the reinforcing structure 37f can be substantially equal to the size of the wiring structure 1, because it can be cut simultaneously. Further, the side surface 373 of the reinforcing structure 37f can be substantially coplanar with the side surface 13 of the wiring structure 1. Figure 11 As shown, bonding material 36 can be disposed on the bottom surface of conductive via 38f.

[0062] In some embodiments, the protruding pad 21 may be disposed on and protrude from the first dielectric layer 141 (i.e., the topmost or outermost dielectric layer) of the wiring structure 1. The protruding pad 21 may be disposed on and protrude from the first surface 11 of the wiring structure 1, and extend through the first dielectric layer 141 (i.e., the topmost or outermost dielectric layer) to electrically connect to the first circuit layer 151. In some embodiments, the first electrical contact 244 of the first electronic device 24 may be electrically and physically connected to the protruding pad 21 via a plurality of bonding materials 245. The second electrical contact 264 of the second electronic device 26 may be electrically and physically connected to the protruding pad 21 via a plurality of bonding materials 265. Therefore, the first electronic device 24 and the second electronic device 26 may be coupled to and electrically connected to the first surface 11 of the wiring structure 1.

[0063] Figure 12 A cross-sectional view of an example of a packaging structure 3g according to some embodiments of the present disclosure is shown. In addition to the structure of the reinforcing structure 37g, Figure 12 The 3g packaging structure is similar to Figure 11 The packaging structure is 3f. For example... Figure 12 As shown, the reinforcing structure 37g may include a main material 374 and at least one embedded element 375 embedded in the main material 374. The main material 374 may be similar to... Figure 11 The reinforcing structure 37f can be a thermosetting material, such as a thermosetting polymer. At least one embedded element 375 can be disposed on the second surface 12 of the wiring structure 1 and can be covered by a main material 374. In some embodiments, the material of the at least one embedded element 375 can be a dummy material including silicon or glass. In some embodiments, the embedded element 375 can be a passive component (e.g., a capacitor), a bridge die, an interposer, or an interconnect.

[0064] Figures 13 to 23 A method for manufacturing a component structure according to some embodiments of the present disclosure is illustrated. In some embodiments, the method is used for manufacturing... Figures 1 to 3 The packaging structure 3 shown is Figure 10 Component structure 4.

[0065] refer to Figure 13 A carrier 70 is provided. The carrier 70 can be wafer-type or strip-type. The carrier 70 may include a release layer 72 disposed thereon.

[0066] refer to Figure 14 The wiring structure 1' is formed or disposed on the release layer 72 on the carrier 70. Figure 14 The wiring structure 1' can be similar to Figure 2 The wiring structure 1' may have a first surface 11, a second surface 12 opposite to the first surface 11, and a high-density region 16 (or a fine-line region). The wiring structure 1' may include at least one dielectric layer 14, at least one circuit layer 15 in contact with the dielectric layer 14, and a plurality of protruding pads 17. The protruding pads 17 may be disposed on and protrude from the first dielectric layer 141 (i.e., the topmost or outermost dielectric layer) of the wiring structure 1'. The protruding pads 17 may be disposed on and protrude from the first surface 11 of the wiring structure 1', and extend through the first dielectric layer 141 (i.e., the topmost or outermost dielectric layer) to electrically connect to the first circuit layer 151. Each protruding pad 17 may include a peripheral side surface 171.

[0067] refer to Figure 15 Multiple conductive pillars (or conductive vias 38) are formed or disposed on the protruding pads 17 of the wiring structure 1', for example, by electroplating.

[0068] refer to Figure 16A main material 374' or a reinforcing structure 37' can be formed or disposed on the first surface 11 of the wiring structure 1' to cover the peripheral side surface 381 of the conductive pillar (or conductive via 38) and the peripheral side surface 171 of the protruding pad 17. In some embodiments, the main material 374' or the reinforcing structure 37' may include a thermosetting material, such as a thermosetting polymer. In some embodiments, the main material 374' or the reinforcing structure 37' may be a molding compound. The molding compound may include a resin material with or without fillers and can be formed by a molding process and a curing process. The second surface 372 of the main material 374' or the reinforcing structure 37' may directly contact the first surface 11 of the wiring structure 1' and may be lower than the top surface of the protruding pad 17. That is, at least a portion of the conductive pillar (or conductive via 38) and the protruding pad 17 may be disposed or embedded in the main material 374' or the reinforcing structure 37'.

[0069] refer to Figure 17 The main material 374' or reinforcing structure 37' can be thinned, for example, by grinding. Therefore, the top surface of the conductive post (or conductive via 38) can be substantially coplanar with the first surface 371 of the main material 374' or reinforcing structure 37', and one end (e.g., the top surface) of each conductive post (or conductive via 38) can be exposed from the first surface 371 of the main material 374' or reinforcing structure 37'. Simultaneously, the conductive post becomes a conductive via 38 embedded in the main material 374' or reinforcing structure 37'.

[0070] refer to Figure 18 Multiple conductive bumps 20 may be formed or disposed on the first surface 371 of the reinforcing structure 37'. In some embodiments, the conductive bumps 20 may be formed or disposed on the top surface of the conductive via 38.

[0071] refer to Figure 19 The first electronic device 24 and the second electronic device 26 are combined with and electrically connected to the conductive bump 20. Therefore, the first electronic device 24 and the second electronic device 26 are arranged side by side near the first surface 371 of the reinforcing structure 37' and electrically connected to the conductive via 38 of the reinforcing structure 37' and the circuit layer 15 of the wiring structure 1'.

[0072] The first electronic device 24 may have a first active surface 241, a first back surface 242 opposite to the first active surface 241, and a side surface 243 extending between the first active surface 241 and the first back surface 242. Further, the first electronic device 24 may include a plurality of first electrical contacts 244 disposed adjacent to the first active surface 241. In some embodiments, the first electrical contacts 244 of the first electronic device 24 may be electrically connected and physically connected to the conductive bump 20 via a plurality of bonding materials 245. The second electronic device 26 may have a second active surface 261, a second back surface 262 opposite to the second active surface 261, and a side surface 263 extending between the second active surface 261 and the second back surface 262. Further, the second electronic device 26 may include a plurality of second electrical contacts 264 disposed adjacent to the second active surface 261. In some embodiments, the second electrical contacts 264 of the second electronic device 26 may be electrically connected and physically connected to the conductive bump 20 via a plurality of bonding materials 265.

[0073] Then, a protective material 32 (i.e., a bottom filler) can be formed or disposed in the space between the first electronic device 24 and the reinforcing structure 37' to cover and protect the joint structure formed by the first electrical contact 244, the conductive bump 20, and the bonding material 245. Further, the protective material 32 can be disposed in the space between the second electronic device 26 and the reinforcing structure 37' to cover and protect the joint structure formed by the second electrical contact 264, the conductive bump 20, and the bonding material 265. Furthermore, the protective material 32 can extend further into the gap 30 between the side surface 243 of the first electronic device 24 and the side surface 263 of the second electronic device 26.

[0074] refer to Figure 20 An encapsulation 34 is formed or disposed to cover at least a portion of the first surface 371 of the reinforcing structure 37', at least a portion of the first electronic device 24, at least a portion of the second electronic device 26, and the protective material 32. The encapsulation 34 has a first surface 341 (e.g., a top surface). The carrier 50 and the release layer 72 are then removed. As a result, a portion of the fourth circuit layer 154 (i.e., the bottom of the via portion) is exposed from the second surface 12 of the wiring structure 1'.

[0075] refer to Figure 21 Various bonding materials 36 (e.g., solder balls) are formed or disposed on the second surface 12 of the wiring structure 1'. For example... Figure 21 As shown, bonding material 36 is disposed on the exposed portion of the fourth circuit layer 154 (i.e., the bottom of the via portion).

[0076] refer to Figure 22The package 34 thins from its first surface 341. Therefore, the first surface 341 of the package 34, the first back surface 242 of the first electronic device 24, the second back surface 262 of the second electronic device 26, and the top surface of the protective material 32 in the gap 30 can be substantially coplanar with each other.

[0077] In some embodiments, a segmentation process can be performed to cut the package 34, the reinforcing structure 37', and the wiring structure 1', thereby obtaining multiple Figures 1 to 3 The packaging structure shown is 3.

[0078] refer to Figure 23 The encapsulation structure 3 can be electrically connected to the first circuit layer 41 of the substrate 40 via a bonding material 36. The substrate 40 may have a first surface 401 and a second surface 402 opposite to the first surface 401. The substrate 40 may include a first circuit layer 41, a second circuit layer 42, and a plurality of conductive vias 43. The first circuit layer 41 may be disposed adjacent to the first surface 401 of the substrate 40, and the second circuit layer 42 may be disposed adjacent to the second surface 402 of the substrate 40. The conductive vias 43 may extend through the substrate 40 and electrically connect the first circuit layer 41 and the second circuit layer 42.

[0079] Then, a protective material (i.e., underfill) can be formed or disposed in the space between the encapsulation structure 3 and the substrate 40 to cover and protect the bonding material 36 and the first circuit layer 41.

[0080] The heat sink 46 can then be attached to the first electronic device 24, the second electronic device 26, and the substrate 40. In some embodiments, the heat sink 46 may be a cap / hat structure and may define a cavity 461 for accommodating the package structure 3. A portion of the heat sink 46 may be attached to the top surface of the package structure 3 via a thermally conductive material 48 (e.g., a thermal interface material (TIM)). Another portion of the heat sink 46 (e.g., the bottom) may be attached to the substrate 40 via an adhesive material. A plurality of external connectors 49 (e.g., solder balls) may then be formed or disposed on the second circuit layer 42 for external connectivity.

[0081] Then, a dicing process can be performed to cut the substrate 40, thereby obtaining multiple Figure 10 The component structure shown is 4.

[0082] Spatial descriptions, such as "above," "below," "upper," "left," "right," "lower," "top," "bottom," "vertical," "horizontal," "side," "high," "lower," "upper part," "above," "below," etc., are relative to the directions shown in the figures, unless otherwise stated. It should be understood that the spatial descriptions used herein are for illustrative purposes only, and actual embodiments of the structures described herein can be spatially arranged in any orientation or manner, provided that such arrangement does not depart from the advantages of the embodiments of this disclosure.

[0083] As used herein, the terms “approximately,” “substantially,” “essentially,” and “about” are used to describe and indicate small variations. When used in conjunction with an event or situation, these terms can refer to a situation in which the event or situation occurs precisely, or a situation in which the event or situation is close to occurring. For example, when used in conjunction with a numerical value, the terms can refer to a range of variation less than or equal to ±10% of that value, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%. For example, if the difference between the numerical values ​​is less than or equal to ±10% of the average of the numerical values, such as less than or equal to ±5%, less than or equal to ±4%, less than or equal to ±3%, less than or equal to ±2%, less than or equal to ±1%, less than or equal to ±0.5%, less than or equal to ±0.1%, or less than or equal to ±0.05%, then the two numerical values ​​can be considered “substantially” the same or equal.

[0084] If the displacement between two surfaces is no greater than 5 μm, no greater than 2 μm, no greater than 1 μm, or no greater than 0.5 μm, then the two surfaces can be considered coplanar or substantially coplanar.

[0085] As used herein, the singular terms “a,” “an,” and “the” may include plural referents unless the context clearly indicates otherwise.

[0086] As used herein, the terms “conductive,” “conductive,” and “electrical conductivity” refer to the ability to conduct electric current. Conductive materials are generally those that offer little or no obstruction to the flow of electric current. One method of measuring conductivity is the Siemens per meter (S / m). Typically, conductive materials have a conductivity greater than about 10⁴ S / m, for example, at least 10⁵ S / m, or at least 10⁶ S / m. The conductivity of a material can sometimes vary with temperature. Unless otherwise stated, the conductivity of a material is measured at room temperature.

[0087] Additionally, quantities, ratios, and other numerical values ​​are sometimes presented in range format in this document. It should be understood that such range format is used for convenience and brevity, and should be flexibly interpreted to include not only the numerical values ​​explicitly specified as range limits, but also all individual numerical values ​​or subranges included within that range, as if each numerical value and subrange were explicitly specified.

[0088] While this disclosure has been described and illustrated with reference to specific embodiments of the invention, such descriptions and illustrations are not restrictive. Those skilled in the art will understand that various changes and equivalent substitutions may be made without departing from the true spirit and scope of this disclosure as defined by the appended claims. The drawings are not necessarily drawn to scale. Differences may exist between the process reproduction in this disclosure and actual apparatus due to manufacturing processes and tolerances. Other embodiments of this disclosure may exist that are not specifically shown. The specification and drawings should be considered illustrative rather than restrictive. Modifications may be made to adapt particular circumstances, materials, composition, methods, or processes to the objectives, spirit, and scope of this disclosure. All such modifications are intended to fall within the scope of the appended claims. Although the methods disclosed herein have been described with reference to specific operations performed in a particular order, it should be understood that these operations may be combined, subdivided, or reordered to form equivalent methods without departing from the teachings of this disclosure. Therefore, unless specifically indicated herein, the order and grouping of operations are not a limitation of this disclosure.

Claims

1. A packaging structure comprising: A wiring structure includes multiple dielectric layers, multiple circuit layers in contact with the dielectric layers, and multiple protruding pads, wherein the multiple protruding pads are disposed on and protrude from a first surface of the wiring structure. Multiple conductive vias are disposed on the protruding pad; A reinforcing structure is disposed on the first surface of the wiring structure and includes a thermosetting material, wherein at least a portion of the plurality of conductive vias and the plurality of protruding pads are embedded in the reinforcing structure; At least one electronic device is electrically connected to the wiring structure through the conductive via; as well as Encapsulation body that covers the at least one electronic device, The reinforcing structure comprises a main material and at least one embedded element, the at least one embedded element being embedded in the main material. The at least one electronic device comprises a first electronic device and a second electronic device arranged side-by-side, and a portion of the embedded element is located directly below the gap between the side surfaces of the first electronic device and the second electronic device. The material of the at least one embedded element is a dummy bulk, including silicon or glass.

2. The packaging structure according to claim 1, wherein the peripheral surface of the conductive via is coplanar with the peripheral surface of the protruding pad.

3. The packaging structure according to claim 1, wherein the reinforcing structure has a first surface and a second surface opposite to the first surface, the second surface of the reinforcing structure directly contacts the first surface of the wiring structure and is lower than the top surface of the protruding pad, and the top surface of the conductive via is coplanar with the first surface of the reinforcing structure.

4. The packaging structure according to claim 3, wherein the height of the conductive via is less than the thickness of the reinforcing structure.

5. The packaging structure according to claim 3 further includes conductive bumps, wherein the conductive bumps are disposed on the top surface of the conductive via, and the conductive bumps include a first metal layer, a second metal layer and a third metal layer disposed sequentially on the top surface of the conductive via.

6. The packaging structure according to claim 5, wherein the at least one electronic device is electrically connected and bonded to the conductive bump via a plurality of bonding materials.

7. The packaging structure of claim 6, further comprising a bottom filler disposed between the at least one electronic device and the reinforcing structure to cover and protect the bonding structure formed by the conductive bumps and the bonding material, wherein the bottom filler is in direct contact with the reinforcing structure.

8. The packaging structure of claim 7, wherein the bottom filler further extends into the gap between the side surface of the first electronic device and the side surface of the second electronic device.

9. The packaging structure according to claim 1, wherein the reinforcing structure is in direct contact with the wiring structure.

10. The packaging structure of claim 1, wherein, viewed from a top view, the size of the reinforcing structure substantially covers the wiring structure.

11. The packaging structure according to claim 1, wherein the side surface of the reinforcing structure is substantially coplanar with the side surface of the wiring structure.

12. The packaging structure according to claim 1, wherein the primary material comprises a molding compound.

13. The packaging structure according to claim 1, wherein the material of the main material is the same as the material of the package body.

14. The packaging structure of claim 1, wherein the reinforcing structure covers the peripheral side surface of the protruding pad.

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