Communication gateway for transmitting data frames for motor vehicles

Abstract

The present invention relates to a communication gateway (1) for transmitting data frames for a motor vehicle, the gateway being adapted to be connected to a plurality of electronic control units for exchanging data frames, the gateway (1) comprising: - as many management modules (13) as there are electronic control units; - a memory (12) in which a lookup table including an index list is stored, wherein each index of the index list is associated with a memory space, a zero-level addressing table, a first-level addressing table, a second-level addressing table, and an address table for each level; - a space manager (14) for managing the space of the lookup table, the space manager being configured to determine free indexes in the lookup table and, when the memory space of the lookup table is released or filled, modify the bytes stored in each memory area of each addressing table associated with the indexes.

Description

Field of the Invention

[0001] The present invention relates to the field of electronic control units for motor vehicles, and more precisely, to electronic control units connected to a communication bus of a motor vehicle. The object of the present invention is to reduce the backup time for data frames. Prior Art

[0002] In a known manner, a motor vehicle includes a plurality of electronic control units (or ECUs), each electronic control unit allowing the control of at least one item of equipment of the vehicle.

[0003] To this end, the electronic control units are connected to each other via a communication bus, thus allowing them to exchange data frames. The bus can be of the CAN ("Controller Area Network") type, for example, which is known per se to those skilled in the art.

[0004] To address data frames to the receiving electronic control unit, a known practice is to use a routing gateway implemented by one of the electronic control units, through which all data frames pass.

[0005] In known solutions, the management of data frames by the gateway is performed by using a waiting line of the FIFO ("First In First Out") type. In this method, data frames are processed in the order in which they arrive.

[0006] After receiving a data frame and before sending it to at least one electronic control unit that is the recipient of the received data frame, the gateway records a plurality of information related to the data frame in a memory area, and in particular, records a plurality of information related to the payload associated with the data frame.

[0007] To this end, the gateway must first determine the free memory space in the memory area in order to record the information related to the received data frame there.

[0008] To determine the free space, for example, a known practice is for the gateway to check all the memory spaces of the memory area. Over this period of determining the free space, a waiting time is generated and the received data frame cannot be sent, which temporarily pauses the frame exchange between the electronic control units.

[0009] This waiting time can be harmful during the operation of the vehicle or during the execution of diagnostics.

[0010] Specifically, in an existing solution, the known practice is to perform diagnostics by using the so-called UDS ("Unified Diagnostic Services") protocol between an external diagnostic tool and a gateway. In this protocol, the external tool sends requests to one or more electronic control units, and the electronic control units must respond to the external tool within a given time frame. In this case, the waiting time generated by determining the free memory space in the memory area does not allow the electronic control units to respond within the given time frame, which may slow down or distort the diagnostics.

[0011] Therefore, a solution is needed that enables at least partially overcoming this drawback. Summary of the Invention

[0012] The present invention relates to a communication gateway for transmitting data frames for a motor vehicle, the gateway being adapted to be connected to a plurality of electronic control units for exchanging data frames, each of the plurality of electronic control units being connected to the gateway via a communication bus, the gateway comprising:

[0013] - As many management modules as there are electronic control units, each management module being associated with one and only one electronic control unit;

[0014] - A memory in which the following are stored:

[0015] - A lookup table including a list of indexes, each index of the list of indexes being associated with a memory space in which the payload of a data frame received by the gateway and at least one indicator for identifying at least one communication bus as the recipient of the received data frame can be recorded;

[0016] - An addressing table called a "level-zero" addressing table, including a memory area characterized by a memory address;

[0017] - An addressing table called a "level-one" addressing table, including eight memory areas, each memory area being characterized by a memory address;

[0018] - An addressing table called a "level-two" addressing table, including sixty-four memory areas, each memory area being characterized by a memory address,

[0019] Each memory area of each addressing table includes bytes, and each bit of the bytes in the memory area is defined in the following manner:

[0020] - Each bit of the bytes of the memory area of the level-zero addressing table is associated with a memory area of the level-one addressing table;

[0021] - Each bit of each byte of the memory area of the level-one addressing table is associated with a memory area of the level-two addressing table;

[0022] - Each bit of each byte in the memory area of the secondary addressing table is associated with an index in the lookup table;

[0023] - Address tables for each level, for each possible byte value except zero byte, the address tables for each level include the zero-level memory address of the zero-level addressing table, the first-level memory address of the first-level addressing table, and the second-level memory address of the second-level addressing table;

[0024] - A space manager for managing the space of the lookup table, the space manager being configured to:

[0025] - Determine free indexes in the lookup table based on the zero-level addressing table, the first-level addressing table, the second-level addressing table, and the address table;

[0026] - When the memory space of the lookup table is released or filled, modify each byte stored in each memory area of each addressing table associated with the index of the released or newly filled memory space for each of the zero level, the first level, and the second level, so as to indicate respectively that the memory space is free or occupied.

[0027] Since the space manager can quickly determine free indexes in the lookup table by using the zero-level addressing table, the first-level addressing table, the second-level addressing table, and the address table, the gateway enables the information related to the received data frame to be quickly recorded in the lookup table. Therefore, the gateway allows accelerating the transmission of data frames between multiple electronic control units.

[0028] In addition, the space manager is also able to modify each addressing table so as to signal that the index is occupied or free. Therefore, the zero-level, first-level, and second-level addressing tables are always up-to-date.

[0029] Preferably, in the gateway, the zero-level addressing table, the first-level addressing table, and the second-level addressing table are defined in the following manner:

[0030] - For the secondary addressing table:

[0031] - If the bit of the byte in the memory area is at 1, the index itself associated with this bit is associated with free memory space;

[0032] - If the bit of the byte in the memory area is at 0, the index itself associated with this bit is associated with filled memory space;

[0033] - For the first-level addressing table:

[0034] - If the bit of the byte in the memory area is at 1, the byte in the memory area of the secondary addressing table associated with this bit includes at least one bit at 1;

[0035] - If the bit of the byte of the memory area is 0, the byte of the memory area of the secondary addressing table associated with the bit does not include a bit in the state of 1;

[0036] - For the zero - level addressing table:

[0037] - If the bit of the byte of the memory area is 1, the byte of the memory area of the primary addressing table associated with the bit includes at least one bit in the state of 1;

[0038] - If the bit of the byte of the memory area is 0, the byte of the memory area of the primary addressing table associated with the bit does not include a bit in the state of 1.

[0039] According to another embodiment of the present invention, in the gateway, the zero - level addressing table, the primary addressing table, and the secondary addressing table are defined as follows:

[0040] - For the secondary addressing table:

[0041] - If the bit of the byte of the memory area is 0, the index itself associated with the bit is associated with the free memory space;

[0042] - If the bit of the byte of the memory area is 1, the index itself associated with the bit is associated with the filled memory space;

[0043] - For the primary addressing table:

[0044] - If the bit of the byte of the memory area is 0, the byte of the memory area of the secondary addressing table associated with the bit includes at least one bit in the state of 1;

[0045] - If the bit of the byte of the memory area is 1, the byte of the memory area of the secondary addressing table associated with the bit does not include a bit in the state of 1;

[0046] - For the zero - level addressing table:

[0047] - If the bit of the byte of the memory area is 0, the byte of the memory area of the primary addressing table associated with the bit includes at least one bit in the state of 1;

[0048] - If the bit of the byte of the memory area is 1, the byte of the memory area of the primary addressing table associated with the bit does not include a bit in the state of 1.

[0049] The present invention also relates to a vehicle, in particular a motor vehicle, which includes a plurality of electronic control units, and each of the plurality of electronic control units is connected to a communication bus allowing the exchange of data frames and a gateway such as those presented above.

[0050] The present invention also relates to a method for determining free memory space in a memory, implemented by a gateway such as presented above, characterized in that it comprises:

[0051] a) a step of receiving a data frame;

[0052] b) a step of determining a free index in the lookup table based on the zero-level addressing table, the first-level addressing table, the second-level addressing table, and the address table;

[0053] c) a step of using the determined free index to record the payload of the received data frame.

[0054] Thus, since the use of the zero-level addressing table, the first-level addressing table, the second-level addressing table, and the address table reduces the time spent on determining the free index, this method enables the quick recording of information related to the received data frame in the lookup table. Therefore, this method allows accelerating the transmission of data frames between multiple electronic control units.

[0055] Preferably, after the recording step, the method comprises: a step of retrieving, by at least one electronic control unit that is the recipient of the data frame associated with the payload, the payload recorded in the lookup table via the communication bus.

[0056] Advantageously, after the retrieving step, the method comprises: a step of deleting the payload from the lookup table having an index associated with the transmitted payload.

[0057] Thus, each transmitted payload is deleted to free up the memory space that previously stored the transmitted payload, in order to record a new payload therein.

[0058] Preferably, when the memory space of the lookup table is freed or filled, it comprises: a step of modifying the bytes stored in each memory area of each of the zero-level addressing table, the first-level addressing table, and the second-level addressing table associated with the freed memory space to respectively indicate that the memory space is free or occupied.

[0059] Preferably, the step of determining the free index comprises the following sub-steps:

[0060] d) determining a zero-level memory address based on the address table and the zero-level addressing table;

[0061] e) determining a first-level memory address based on the address table and the first-level addressing table;

[0062] f) determining a second-level memory address based on the address table and the second-level addressing table;

[0063] g) Determine the free index i by summing the determined zero-level memory address, first-level memory address, and second-level memory address. x 。

[0064] Advantageously, the zero-level addressing table, first-level addressing table, and second-level addressing table used in this method are defined as follows:

[0065] - For the second-level addressing table:

[0066] - If the bit of the byte of the memory area is 1, the index associated with this bit itself is associated with the free memory space;

[0067] - If the bit of the byte of the memory area is 0, the index associated with this bit itself is associated with the filled memory space;

[0068] - For the first-level addressing table:

[0069] - If the bit of the byte of the memory area is 1, the byte of the memory area of the second-level addressing table associated with this bit includes at least one bit that is 1;

[0070] - If the bit of the byte of the memory area is 0, the byte of the memory area of the second-level addressing table associated with this bit does not include a bit that is 1;

[0071] - For the zero-level addressing table:

[0072] - If the bit of the byte of the memory area is 1, the byte of the memory area of the first-level addressing table associated with this bit includes at least one bit that is 1;

[0073] - If the bit of the byte of the memory area is 0, the byte of the memory area of the first-level addressing table associated with this bit does not include a bit that is 1. BRIEF DESCRIPTION OF THE DRAWINGS

[0074] Other features, details, and advantages will become apparent by reading the following detailed description and by viewing the drawings, in which:

[0075] Figure 1 Shows an embodiment of a gateway and a plurality of electronic control units connected to a communication bus according to the present invention;

[0076] Figure 2 Shows an embodiment of a gateway according to the present invention;

[0077] Figure 3 Shows an embodiment of a lookup table according to the present invention;

[0078] Figure 4Shows an embodiment of a zero - level addressing table, a first - level addressing table, and a second - level addressing table according to the present invention;

[0079] Figure 5 Shows an embodiment of an address table according to the present invention;

[0080] Figure 6 Shows an embodiment of a method according to the present invention;

[0081] Figure 7 Shows an embodiment of the step of determining an idle index in a method according to the present invention;

[0082] Figure 8 Shows an embodiment of a modification step in a method according to the present invention. Detailed implementation mode

[0083] Now an embodiment of a vehicle according to the present invention will be presented.

[0084] Refer to Figure 1 , the vehicle includes a plurality of electronic control units 10, each electronic control unit allowing the implementation of at least one application and / or function of the vehicle, and the electronic control units 10 are connected via a communication bus b1.

[0085] According to the example presented here, the plurality of electronic control units 10 includes eight electronic control units 10. However, the number of electronic control units 10 can obviously be different.

[0086] A gateway 1 is used to ensure the transmission of data frames between the plurality of electronic control units 10, and the gateway 1 is implemented by, for example, one of the electronic control units 10.

[0087] The electronic control unit 10 implementing the gateway 1 is configured to receive, via the communication bus b1, at least one data frame to be sent to at least one other electronic control unit 10.

[0088] The data frame particularly includes an identifier of the data frame, a payload, and information about the length of the payload.

[0089] The gateway 1 particularly allows the implementation of the UDS ("Unified Diagnostic Services") diagnostic communication protocol.

[0090] Refer to Figure 2 , the gateway 1 particularly includes a receiving module 11, a memory 12, a plurality of management modules 13, a space manager 14, and a sending module 15.

[0091] The receiving module 11 is configured to receive, via the electronic control unit 10 including the gateway 1, at least one data frame to be sent, and send the data frame to the memory 12.

[0092] The memory 12 is configured to store a lookup table T c , a so-called "level zero" addressing table T 0 , a so-called "level one" addressing table T 1 , a so-called "level two" addressing table T 2 and an address table T a .

[0093] Refer to Figure 3 , which shows an embodiment of the lookup table T c .

[0094] The lookup table T c includes a list of indices i x , and each index i x has an associated memory space. In each memory space associated with the index i x , the payload DATA of the data frame received by the gateway 1, at least one indicator for determining at least one electronic control unit 10 as the recipient of the received data frame, the length DLC ("data length code"), and the frame identifier ID for identifying the received data frame can be recorded.

[0095] When the associated memory space is free; in other words, when no payload DATA, length DLC, or frame identifier ID is recorded in the memory space associated with the index i x , the index i x is called "free".

[0096] In the case where the plurality of electronic control units 10 includes N electronic control units 10 (N is a natural integer greater than or equal to 2), the indicators are also numbered N.

[0097] In the example presented here, the number of indicators is therefore eight.

[0098] Preferably, and in the following examples, each indicator is represented by one bit. In other words, the group of indicators represented by "DEST" is advantageously represented by one byte, which by definition consists of eight bits.

[0099] Each indicator, i.e., each bit of the group of indicators DEST, is associated with an electronic control unit 10.

[0100] For a data frame whose payload DATA is recorded in the lookup table T c , when the bit of the indicator is 0, this means that the electronic control unit 10 associated with the indicator is not the recipient of the data frame. On the contrary, when the bit of the indicator is 1, this means that the electronic control unit 10 associated with the bit is the recipient of the data frame.

[0101] The length DLC of the data frame allows to define the number of bytes in the payload DATA.

[0102] The data frame identifier ID allows to identify the data frame associated with the index i x associated therewith.

[0103] In particular, the index list i x includes 512 values in the range from 0 to 511. Thus, the lookup table T c can include 512 groups, which include the payload DATA of the received data frame, at least one indicator associated with the received data frame (in particular the indicator group DEST), the length DLC and the frame identifier ID.

[0104] Reference Figure 4 , shows an embodiment of the zero-level addressing table T 0 , the first-level addressing table T 1 and the second-level addressing table T 2 of.

[0105] The zero-level addressing table T 0 includes a memory area.

[0106] The first-level addressing table T 1 includes eight memory areas, each characterized by a memory address, numbered from 0 to 7.

[0107] The second-level addressing table T 2 includes sixty-four memory areas, each characterized by a memory address, numbered from 0 to 63.

[0108] Each memory area of each addressing table includes one byte. Each byte is read from right to left. Thus, for a given byte, the first bit is the bit to the right of the byte, and the last bit is the bit to the left of the byte.

[0109] The memory area byte of the zero-level addressing table T 0 is associated with the memory area of the first-level addressing table T 1 associated therewith.

[0110] In particular, according to the embodiment presented here, the nth (n is a natural integer between 1 and 8) bit of the memory area of the zero-level addressing table T 0 represents the nth memory area of the first-level addressing table T 1 associated therewith.

[0111] The memory area byte of the first-level addressing table T 1 is associated with the memory area of the second-level addressing table T 2 associated therewith.

[0112] More precisely, according to the embodiments presented herein, the first-level addressing table T 1 The k-th (where k is a natural integer between 1 and 8) memory area represents the second-level addressing table T 2 The k-th group of eight consecutive memory areas. In other words, the first memory area of the first-level addressing table T 1 Is associated with the eight initial memory areas of the second-level addressing table T 2 The second memory area of the first-level addressing table T 1 Is associated with the eight memory areas (after the eight initial memory areas) of the second-level addressing table T 2 ..., the eighth memory area of the first-level addressing table T 1 Is associated with the eight last memory areas of the second-level addressing table T 2

[0113] According to the embodiments presented herein, for the bytes in the memory area of the first-level addressing table T 1 The n-th bit of the byte represents the n-th memory area of the eight memory areas of the second-level addressing table T 1 Associated with the memory area of the first-level addressing table T that includes the byte 2

[0114] Each bit of the byte of the memory area of the second-level addressing table T 2 Is associated with the index i of the lookup table T c x

[0115] Regarding the second-level addressing table T 2 If the bit of the byte of the memory area is 1, this means that the index i associated with the bit x Is free, and thus the memory space associated with the index i x Is free. On the other hand, if the bit is 0, this means that the associated index i x Is not free, and thus the memory space associated with the index i x Is filled.

[0116] Conversely, in another embodiment, a bit in 1 represents an index i that is not free x And a bit in 0 represents an index i that is free x

[0117] Regarding the first-level addressing table T 1 If the bit of the byte of the memory area is 1, this means that the byte in the memory area of the second-level addressing table T associated with the bit 2 Includes at least one bit in 1. In other words, this means that at least one index i associated with the memory area of the second-level addressing table T 2 ​​​​​​x is idle.

[0118] On the other hand, if in the first-level addressing table T 1 the bit of the byte is 0, this means that the byte in the memory area of the second-level addressing table T 2 does not include a bit that is 1. In other words, this means that the index i 2 associated with the memory area of the second-level addressing table T x is not idle.

[0119] Finally, regarding the zero-level addressing table T 0 , if the bit of the byte is 1, this means that the byte in the memory area of the first-level addressing table T 1 associated with this bit includes at least one bit that is 1.

[0120] If the bit of the byte of the zero-level addressing table T 0 is 0, this means that the byte in the memory area of the first-level addressing table T 1 associated with this bit does not include a bit that is 1.

[0121] Reference Figure 5 , for each possible byte value except the zero byte, the address tables T at all levels a include the zero-level memory address of the zero-level addressing table T 0 , the first-level memory address of the first-level addressing table T 1 and the second-level memory address of the second-level addressing table T 2 .

[0122] Specifically, the zero byte means that the index i c of the lookup table T x is not idle.

[0123] The gateway 1 includes as many management modules 13 as there are electronic control units 10, and thus, according to the example presented here, the gateway 1 includes eight management modules 13. Each management module 13 is associated with one and only one electronic control unit 10 and is connected to the memory 12.

[0124] The space manager 14 is connected to the memory 12.

[0125] When a data frame is received by the receiving module 11 and information is recorded in the lookup table T c , the space manager 14 is configured to determine the first idle index i c in the lookup table T x , that is, the first idle memory space.

[0126] When information is recorded in the lookup table T cWhen in the memory space, the space manager 14 is configured to modify, for each of level zero, level one, and level two, the bytes stored in each memory area of each addressing table associated with the index i corresponding to the newly occupied memory space, so as to indicate that the memory space is no longer free. x associated with each addressing table, so as to indicate that the memory space is no longer free.

[0127] When the lookup table T c When the memory space of is released, the space manager 14 is configured to modify, for each of level zero, level one, and level two, the bytes stored in each memory area of each addressing table associated with the index i corresponding to the released memory space x so as to indicate that the memory space is free.

[0128] In other words, when deleting the information previously recorded using a given index i x or when recording information using a given index i x the space manager 14 is configured to modify the bytes stored in each memory area of each level-zero, level-one, and level-two addressing table associated with the index i corresponding to the newly occupied or newly released memory space. x associated with each level-zero, level-one, and level-two addressing table.

[0129] In the case of deleting and recording information in the lookup table T c Examples of modifying the content of the memory areas of each level-zero, level-one, and level-two addressing table will be presented in detail in the description of the method.

[0130] The sending module 15 is connected to a plurality of management modules 13 and the communication bus b1, and is configured to send, via the communication bus b1, at least one data frame to be sent from the plurality of management modules 13 to at least one receiving electronic control unit 10.

[0131] Reference Figure 6 Now, an embodiment of the method implemented by the gateway 1 such as presented above will be presented.

[0132] In the following paragraphs, an implementation of the method for the gateway 1, for a plurality of electronic control units 10 including eight electronic control units 10, and for receiving data frames by the gateway 1 will thus be presented. Obviously, the number of electronic control units 10 can be different from eight, and / or the gateway 1 can receive a plurality of data frames, and the following method is repeated for each received data frame.

[0133] The method first includes step E1 of receiving, by the receiving module 11 of the gateway 1, a data frame via the electronic control unit 10 implementing the gateway 1. The electronic control unit 10 has previously received the data frame via the communication bus b1.

[0134] The receiving module 11 then sends the received data frame to the memory 12.

[0135] The memory 12 then receives the data frame sent by the receiving module 11.

[0136] Next, the method includes a step E2 of determining, by the space manager 14, a free index i c in the lookup table T x for recording the payload DATA of the received data frame, at least one indicator enabling determination of at least one electronic control unit 10 that is the recipient of the received data frame, a length DLC associated with the received data frame, and a frame identifier ID.

[0137] An exemplary implementation of the determination step E2 of the method will be described with reference to Figure 7 the following.

[0138] The determination step E2 first includes a sub-step of determining a zero-level memory address.

[0139] To this end, the space manager 14 compares the bytes in the memory area of the zero-level addressing table T 0 with the address table T a for zero level in order to determine the zero-level memory address.

[0140] For example, with reference to Figure 5 and 7 , since the byte in the memory area of the zero-level addressing table T 0 is 10101110, the space manager 14 determines that the zero-level memory address is 64.

[0141] The determination step E2 then includes a sub-step of determining a first-level memory address.

[0142] To this end, the space manager 14 selects the memory area of the first-level addressing table T 0 associated with the first bit in the byte of the memory area of the zero-level addressing table T 1 that is at 1.

[0143] Next, the space manager 14 compares the bytes in the selected memory area with the address table T a for the first level in order to determine the first-level memory address.

[0144] For example, with reference to Figure 5 and 7 , the memory area selected by the space manager 14 corresponds to the second memory area of the first-level addressing table T 1 . Since the byte in the second memory area is 10000000, the space manager 14 determines, according to the address table T a , that the first-level memory address is 56.

[0145] The determination step E2 then includes a sub-step of determining a secondary memory address.

[0146] For this purpose, the space manager 14 selects the secondary addressing table T 1 associated with the first bit that is 1 among the bytes in the selected memory area of the primary addressing table T 2 of the memory area.

[0147] Next, the space manager 14 compares the byte in the selected memory area of the zero-level addressing table T 2 with the address table T a for the secondary level in order to determine the secondary memory address.

[0148] For example, referring to Figure 5 and 7 , the memory area of the secondary addressing table T 2 selected by the space manager 14 corresponds to the sixteenth memory area of the secondary addressing table T 2 . Since the byte in the sixteenth memory area is 00000001, the space manager 14 determines that the secondary memory address is 0 according to the address table T a .

[0149] The determination step E2 then includes a sub-step of determining the free index i x , where the free index i x is equal to the sum of the zero-level memory address, the primary memory address, and the secondary memory address.

[0150] According to the example presented here, the first free index i x is equal to 64 + 56 + 0 = 120.

[0151] Once the free index i x is determined, the method includes step E3 of recording the payload DATA of the received data frame in the memory space associated with the determined free index i x .

[0152] In the recording step E3, it is also possible to determine at least one indicator of at least one electronic control unit that is the recipient of the received data frame, the length DLC of the received data frame, and the frame identifier ID, and these are also recorded using the determined free index i x .

[0153] When the recording step E3 has been executed, the method includes step E4 of modifying the bytes stored in each memory area of each addressing table associated with the index i x corresponding to the newly occupied memory space for each of the zero-level, primary, and secondary levels in order to indicate that the memory space is no longer free.

[0154] According to the examples presented herein, since the memory space associated with index i of value 120 x is newly occupied, the space manager 14 modifies it by imposing a value of 0 on the bits of the memory area of the secondary addressing table T x corresponding to the said index i 2 .

[0155] In addition, if all the bits of the byte of the secondary addressing table T 2 in which the bits have been set to 0 are at 0, the space manager 14 will set the bits of the memory area of the primary addressing table T 2 corresponding to the memory area of the secondary addressing table T 1 in which all the bits are now at 0 to 0.

[0156] Similarly, if all the bits of the byte of the primary addressing table T 1 in which the bits have been set to 0 are at 0, the space manager 14 will set the bits of the memory area of the zero - level addressing table T 1 corresponding to the memory area of the primary addressing table T 0 in which all the bits are now at 0 to 0.

[0157] For example, referring to Figure 8 , the space manager 14 sets the bits in the sixteenth memory area of the secondary addressing table T 2 to 0. Thus, the sixteenth memory area includes bytes that only include bits at 0. The space manager 14 then sets the bits of the second memory area of the primary addressing table T 2 associated with the modified memory area of the secondary addressing table T 1 to 0. Similarly, the second memory area then only includes bits at 0. The space manager 14 then sets the bits of the memory area of the zero - level addressing table T 1 associated with the modified memory area of the primary table T 0 to 0.

[0158] If the communication bus b1 is available, the method includes a retrieval step E5, in which the management module 13 of each electronic control unit 10 that is the recipient of the received data frame retrieves the payload DATA of the received data frame from the lookup table T c .

[0159] To determine the length of the payload DATA to be retrieved, the length DLC recorded in the lookup table T c is used. Specifically, the length DLC recorded in the lookup table T cThe length DLC of the payload DATA of the data frame in [ ] allows each management module 13 of the electronic control unit 10, which is the recipient of the data frame, to know the length DLC of the payload DATA to be retrieved.

[0160] Finally, after retrieving the payload DATA, the management module 13 of each recipient electronic control unit 10 sends the retrieved payload DATA to the associated recipient electronic control unit 10.

[0161] To this end, the payload DATA is sent by the management module 13 of each recipient electronic control unit 10 via the communication bus b1 through the sending module 15 for transmission to at least one associated recipient electronic control unit 10.

[0162] When the payload DATA has been sent to at least one recipient electronic control unit 10, the method then includes deleting the sent payload DATA from the lookup table T x having an index i c associated with the sent payload DATA.

[0163] In this deletion step E6, the length DLC and the frame identifier ID associated with the retrieved payload DATA and related to the data frame are also deleted.

[0164] Therefore, since the above information has been deleted, the index i x is free again.

[0165] Once the index i x is free again, the method includes a second modification step E7, which modifies the bytes stored in each memory area of each addressing table associated with the index i corresponding to the newly freed memory space for each of the zero, first, and second levels, so as to indicate that the index i x is free again. x The space manager 14 therefore modifies it by imposing a value of 1 on the bits of the second-level addressing table T

[0166] corresponding to the index i. x If the bit set to 1 in the memory area of the second-level addressing table T 2 is the only bit in the memory area that is at 1, the space manager 14 sets the bit of the memory area of the first-level addressing table T

[0167] corresponding to the memory area of the second-level addressing table T 2 where the bit was previously set to the value 1 to 1. 2 Similarly, if the first-level addressing table T 1 has a bit in the memory area corresponding to the memory area of the second-level addressing table T

[0168] where the bit was previously set to 1, the space manager 14 sets the bit of the memory area of the first-level addressing table T1 If the bits set to 1 in the memory area are the only bits in the memory area that are at 1, the space manager 14 will use the first-level addressing table T in which the bits are set to the value 1 by the space manager 14 1 The corresponding zero-level addressing table T of the memory area 0 The bits are set to 1

[0169] Therefore, after this step, zero-level, first-level, and second-level addressing tables are defined like those addressing tables shown in reference Figure 7 As shown

[0170] Therefore, advantageously, the method implemented by the gateway 1 enables the free space in the lookup table T c To be determined quickly in order to record information related to the received data frame therein. Therefore, the time between receiving the data frame, recording the information related to the received data frame, and retrieving this data by at least one receiving electronic control unit is very short. Therefore, the transmission of the data frame is accelerated

Claims

1. A communication gateway (1) for transmitting data frames for a motor vehicle, the gateway (1) being adapted to be connected to a plurality of electronic control units (10) for exchanging data frames, each of the plurality of electronic control units (10) being connected to the gateway (1) via a communication bus (b1), the gateway (1) comprising: - As many management modules (13) as there are electronic control units (10), each management module (13) being associated with one and only one electronic control unit (10); - A memory (12), in which the following is stored: - Lookup table (T c ), including an index list, where each index (i x ) of the index list is associated with a memory space, in each of which the payload (DATA) of a data frame received by the gateway (1) and at least one indicator for identifying at least one communication bus (b1) as the recipient of the received data frame can be recorded; - An addressing table called "level zero" addressing table (T 0 ), which includes a memory area characterized by a memory address; - An addressing table called "primary" addressing table (T 1 ), which includes eight memory areas, each of which is characterized by a memory address; - An addressing table called "secondary" addressing table (T 2 ) which includes sixty-four memory areas, each of which is characterized by a memory address, Each memory area of each addressing table comprises bytes, and each bit of the bytes in the memory area is defined in the following manner: - Each bit of each byte in the memory area of the zero-level addressing table (T 0 ) is associated with the memory area of the first-level addressing table (T 1 ); - Each bit of each byte in the memory area of the first-level addressing table (T 1 ) is associated with the memory area of the second-level addressing table (T 2 ); - The memory area of the secondary addressing table (T 2 ) has each bit of each byte associated with the index (i c ) of the lookup table (T x ); - Address table (T a ) for each possible byte value other than zero byte, the address table (T a ) of each level includes the zero-level memory address of the zero-level addressing table (T 0 ), the first-level memory address of the first-level addressing table (T 1 ) and the second-level memory address of the second-level addressing table (T 2 ); - A space manager (14) for managing the space of the lookup table (T c ), and the space manager (14) is configured to: -Based on the zero-level addressing table (T 0 ), the first-level addressing table (T 1 ), the second-level addressing table (T 2 ) and the address table (T a ), determine the free index (i c x ) in the lookup table (T c ) -When the memory space of the lookup table (T c ) is freed or filled, for each of the zero, first, and second levels, modify the bytes stored in each memory area of each addressing table associated with the index (i x ) of the freed or newly filled memory space so as to indicate respectively that the memory space is free or occupied.

2. The gateway (1) according to claim 1, wherein: -For the secondary addressing table (T 2 ): - If the bit of the byte of the memory area is at 1, the index (i x ) itself is associated with the free memory space; - If the bit of the byte of the memory area is at 0, the index (i x ) itself is associated with the filled memory space; -For the first-level addressing table (T 1 ): - If the bit of the byte of the memory area is 1, then the byte of the memory area of the secondary addressing table (T 2 ) includes at least one bit that is 1; - If the bit of the byte of the memory area is 0, the byte of the memory area of the secondary addressing table (T 2 ) does not include a bit that is 1; - For the zero-level addressing table (T 0 ): - If the bit of the byte of the memory area is 1, then the byte of the memory area of the first-level addressing table (T 1 ) includes at least one bit that is 1; - If the bit of the byte of the memory area is 0, then the byte of the memory area of the first-level addressing table (T 1 ) does not include a bit that is 1.

3. The gateway according to claim 1, wherein: -For the secondary addressing table (T 2 ): - If the bit of the byte of the memory area is at 0, the index (i x ) itself is associated with the free memory space; - If the bit of the byte of the memory area is 1, the index (i x ) itself is associated with the filled memory space; -For the first-level addressing table (T 1 ): - If the bit of the byte of the memory area is at 0, then the byte of the memory area of the secondary addressing table (T 2 ) includes at least one bit at 1; - If the bit of the byte of the memory area is 1, the byte of the memory area of the secondary addressing table (T 2 ) does not include a bit that is 1; -For the zero-level addressing table (T 0 ): - If the bit of the byte of the memory area is at 0, then the byte of the memory area of the first-level addressing table (T 1 ) includes at least one bit that is at 1; - If the bit of the byte of the memory area is 1, then the byte of the memory area of the first-level addressing table (T 1 ) does not include a bit that is 1.

4. A vehicle, in particular a motor vehicle, comprising a plurality of electronic control units (10), each of the plurality of electronic control units (10) being connected to a communication bus (b1) allowing the exchange of data frames and the gateway (1) according to any one of claims 1 to 3.

5. A method for determining the free memory space in a memory (12) implemented by the gateway (1) according to any one of claims 1 to 3, characterized in that it comprises: a) A step (E1) of receiving a data frame; b) Determine the step (E2) of the free index (i 0 ) in the lookup table (T 1 ) based on the zero-level addressing table (T 2 ), the first-level addressing table (T a ), the second-level addressing table (T c ) and the address table (T x ); c) Step (E3) of using the determined free index (i x ) to record the payload (DATA) of the received data frame.

6. The method according to claim 5, after the recording step (E3) comprising: Step (E5) of retrieving, by at least one electronic control unit (10) being a recipient of the data frame associated with the payload (DATA), the payload (DATA) recorded in the lookup table (T c ) via the communication bus (b1).

7. The method according to claim 6, after the retrieval step (E5) comprising: Step (E6) of deleting the payload (DATA) from the look-up table (T x ) having an index (i c ) associated with the transmitted payload (DATA).

8. The method according to any one of claims 5 to 7, when the memory space of the lookup table (T c ) is released or filled comprising: Modify each byte stored in each memory area of the zero-level addressing table (T 0 ), the first-level addressing table (T 1 ), and the second-level addressing table (T 2 ) associated with the released memory space to indicate whether the memory space is free or occupied, respectively (step E4).

9. The method according to any one of claims 5 to 7, wherein, Determine the idle index (i x ) of step (E2) includes the following sub-steps: d) Determine the zero-level memory address based on the address table (T a ) and the zero-level addressing table (T 0 ); e) Determine the primary memory address based on the address table (T a ) and the primary addressing table (T 1 ); f) Determine the secondary memory address based on the address table (T a ) and the secondary addressing table (T 2 ); g) Determining the free index (i) by summing the determined zero-level memory address, first-level memory address, and second-level memory address x ) 10. The method according to any one of claims 5 to 7, wherein, The zero-level addressing table (T 0 ), the first-level addressing table (T 1 ), and the second-level addressing table (T 2 ) are defined as follows: -For the secondary addressing table (T 2 ): - If the bit of the byte of the memory area is at 1, the index (i x ) itself is associated with the free memory space; - If the bit of the byte of the memory area is at 0, the index (i x ) itself is associated with the filled memory space; -For the first-level addressing table (T 1 ): - If the bit of the byte of the memory area is 1, then the byte of the memory area of the secondary addressing table (T 2 ) includes at least one bit that is 1; - If the bit of the byte of the memory area is at 0, then the byte of the memory area of the secondary addressing table (T 2 ) does not include a bit at 1; -For the zero-level addressing table (T 0 ): - If the bit of the byte of the memory area is at 1, then the byte of the memory area of the first-level addressing table (T 1 ) includes at least one bit that is at 1; - If the bit of the byte of the memory area is 0, then the byte of the memory area of the first-level addressing table (T 1 ) does not include a bit that is 1.

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