Power amplifiers and power amplifier modules

Abstract

This disclosure provides a power amplifier and a power amplifier module. The power amplifier includes: an amplification circuit including an amplification transistor configured to amplify an input signal and configured to output an output signal; a bias circuit including a bias transistor including an emitter configured to provide a bias current to the base of the amplification transistor and a base to which a control current is input; and an overcurrent protection circuit configured to bypass the control current to ground based on the current level of the output signal.

Description

[0001] This application claims the benefit of priority to Korean Patent Application No. 10-2020-0007301, filed on January 20, 2020, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes. Technical Field

[0002] This disclosure relates to a power amplifier and a power amplifier module. Background Technology

[0003] Mobile communication terminals, such as cellular phones, may employ a power amplifier module for amplifying radio frequency (RF) signals to be transmitted to a base station. The power amplifier module may include an amplifier for amplifying the RF signal and may include bias circuitry for controlling the bias point of the amplifier.

[0004] However, when the load impedance connected to the output terminal decreases, the current level of the output signal may increase excessively, potentially damaging the antenna switch. Therefore, to prevent damage to the antenna switch due to the decrease in load impedance connected to the output terminal, it may be useful to appropriately limit the bias current used to control the amplifier and the control current used to control the bias circuit. Summary of the Invention

[0005] This summary is provided to introduce, in a simplified form, the concept of the alternatives further described in the detailed embodiments below. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to help determine the scope of the claimed subject matter.

[0006] In one general aspect, a power amplifier includes: an amplification circuit including an amplification transistor configured to amplify an input signal and configured to output an output signal; a bias circuit including a bias transistor including an emitter configured to provide a bias current to the base of the amplification transistor and a base to which a control current is input; and an overcurrent protection circuit configured to bypass the control current to ground based on the current level of the output signal.

[0007] The overcurrent protection circuit can be configured to bypass the control current in response to the current level of the output signal being higher than a reference current level.

[0008] The overcurrent protection circuit may include: a first transistor, including a base to which the output signal is input and a collector connected to a drive voltage terminal; and a second transistor, including a base connected to the emitter of the first transistor, a collector connected to the base of the bias transistor, and an emitter connected to ground.

[0009] The overcurrent protection circuit may further include at least one diode-connected transistor disposed between the drive voltage terminal and the collector of the first transistor.

[0010] The first transistor and the second transistor can turn on in response to the current level of the output signal being higher than the reference current level.

[0011] The second transistor can bypass the control current to ground in response to the current level of the output signal being higher than the reference current level.

[0012] The amplifying transistor may include a first amplifying transistor and a second amplifying transistor, the first amplifying transistor and the second amplifying transistor being configured to amplify the input signal sequentially, and the bias transistor may include a first bias transistor and a second bias transistor, the first bias transistor being configured to provide a first bias current to the first amplifying transistor, and the second bias transistor being configured to provide a second bias current to the second amplifying transistor.

[0013] The overcurrent protection circuit can be configured to bypass the control current supplied to the bias transistor corresponding to the first amplifying transistor and the second amplifying transistor, based on the current level of the output signal of one of the amplifying transistors.

[0014] In another general aspect, a power amplifier module includes: a controller integrated circuit (IC) configured to generate a control current; and a power amplifier including: an amplification circuit including an amplifying transistor configured to amplify an input signal and configured to output an output signal; a bias circuit including a bias transistor configured to operate according to the control current to provide a bias current to the amplifying transistor; and an overcurrent protection circuit configured to generate a detection voltage based on the current level of the output signal, wherein the controller IC is configured to change the control current to reduce the level of the bias current in response to the level of the detection voltage being higher than a reference voltage level.

[0015] The overcurrent protection circuit can generate a detection voltage higher than the reference voltage level in response to the current level of the output signal being higher than the reference current level.

[0016] The overcurrent protection circuit may include: a first transistor, including a base to which the output signal is input and a collector connected to a first drive voltage terminal; a second transistor, including a base connected to the emitter of the first transistor, a collector connected to a second drive voltage terminal and an emitter connected to ground; and a sensing resistor disposed between the second drive voltage terminal and the collector of the second transistor.

[0017] The overcurrent protection circuit may further include at least one diode-connected transistor disposed between the first driving voltage terminal and the collector of the first transistor.

[0018] The first transistor and the second transistor can turn on in response to the current level of the output signal being higher than the reference current level.

[0019] The detection resistor can be configured to output the detection voltage based on the current flowing from the second drive voltage terminal into the collector of the second transistor in response to the current level of the output signal being higher than the reference current level.

[0020] The controller IC can be configured to reduce the level of the control current in response to the level of the detected voltage being higher than the reference voltage level.

[0021] The level of the bias current can be reduced according to the level of reduction in the control current.

[0022] In another general aspect, a power amplifier includes: an amplification circuit including an amplification transistor configured to amplify an input signal and configured to output an output signal; a bias circuit including a bias transistor including an emitter configured to provide a bias current to the base of the amplification transistor and a base to which a control current is input; and an overcurrent protection circuit configured to bypass the control current in response to the current level of the output signal being higher than a reference current level.

[0023] The overcurrent protection circuit can be configured to bypass the control current to ground.

[0024] The amplifying transistor may include a first amplifying transistor and a second amplifying transistor configured to amplify the input signal sequentially.

[0025] The bias transistor may include a first bias transistor and a second bias transistor, the first bias transistor being configured to provide a first bias current to the first amplifying transistor, and the second bias transistor being configured to provide a second bias current to the second amplifying transistor.

[0026] Other features and aspects will become apparent from the following detailed description, drawings, and claims. Attached Figure Description

[0027] Figure 1 It is a block diagram of the power amplifier module based on the first example.

[0028] Figure 2 A more detailed diagram of the power amplifier module according to the first example is shown below.

[0029] Figure 3 This is a block diagram of the power amplifier module based on the second example.

[0030] Figure 4 A more detailed diagram of the power amplifier module according to the second example is shown below.

[0031] Throughout the accompanying drawings and detailed embodiments, the same reference numerals refer to the same elements. The drawings may not be drawn to scale, and for clarity, illustration, and convenience, the relative dimensions, scale, and depiction of elements in the drawings may be exaggerated. Detailed Implementation

[0032] The following detailed embodiments are provided to aid the reader in gaining a comprehensive understanding of the methods, apparatus, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatus, and / or systems described herein will become apparent after understanding the disclosure of this application. For example, the order of operations described herein is merely illustrative and is not limited to the order set forth herein; rather, changes that will become apparent after understanding the disclosure of this application are possible, except for operations that must occur in a specific order. Furthermore, for clarity and brevity, descriptions of features known in the art may be omitted.

[0033] The features described herein may be implemented in different forms and should not be construed as being limited to the examples described herein. Rather, the examples described herein have been provided merely to illustrate some of the many feasible ways of implementing the methods, apparatus, and / or systems described herein that will be apparent upon understanding the disclosure of this application.

[0034] Throughout the specification, when an element such as a layer, region, or substrate is described as being "on" another element, "connected" to another element, or "bonded" to another element, the element may be directly "on" another element, directly "connected" to another element, or directly "bonded" to another element, or there may be one or more other elements in between. In contrast, when an element is described as being "directly on" another element, directly "connected" to another element, or "bonded" to another element, there may be no other elements in between.

[0035] As used herein, the term “and / or” includes any one and any combination of any two or more of the relevant listed items.

[0036] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, assemblies, regions, layers, or parts, these components, assemblies, regions, layers, or parts will not be limited by these terms. Rather, these terms are used only to distinguish one component, assembly, region, layer, or part from another. Therefore, without departing from the teaching of the examples described herein, the first component, first assembly, first region, first layer, or first part referred to as the first component, first assembly, first region, first layer, or first part may also be referred to as the second component, second assembly, second region, second layer, or second part.

[0037] For ease of description, spatial relative terms such as “above,” “above,” “below,” and “under” are used herein to describe the relationship between one element and another as shown in the accompanying drawings. Such spatial relative terms are intended to include not only the orientation depicted in the drawings but also the different orientations of the device during use or operation. For example, if the device in the drawings is flipped, an element described as “above” or “above” relative to another element will then be “below” or “under” relative to said other element. Thus, the term “above” encompasses both “above” and “below” orientations depending on the spatial orientation of the device. The device may also be positioned in other ways (e.g., rotated 90 degrees or in other orientations), and the spatial relative terms used herein will be interpreted accordingly.

[0038] The terminology used herein is for the purpose of describing various examples only and is not intended to limit this disclosure. Unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. The terms “comprising,” “including,” and “having” enumerate the presence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not exclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof.

[0039] The shapes shown in the accompanying drawings may vary due to manufacturing techniques and / or tolerances. Therefore, the examples described herein are not limited to the specific shapes shown in the accompanying drawings, but include changes in shape that occur during manufacturing.

[0040] Throughout the specification, when an element is referred to as “including” or “comprising”, unless otherwise specifically stated, it means that it may also include other elements, rather than excluding other elements.

[0041] One or more examples provide a power amplifier module capable of limiting the bias current used to control the amplifier and the control current used to control the bias circuitry based on the current level of the output signal.

[0042] According to one or more examples, a power amplifier may include: an amplification circuit including an amplifying transistor that amplifies an input signal and outputs an output signal; a biasing circuit including a biasing transistor having an emitter that provides a bias current to the base of the amplifying transistor, and the base being input with a control current; and an overcurrent protection circuit that bypasses the control current to ground according to the current level of the output signal.

[0043] It should be noted here that the use of the term “may” in relation to examples or embodiments (e.g., what an example or embodiment may include or implement) means that there exists at least one example or embodiment that includes or implements such a feature, but not all examples and embodiments are limited thereto.

[0044] Figure 1 It is a block diagram of the power amplifier module based on the first example.

[0045] Reference Figure 1 For example, in this example, power amplifier module 10 may include power amplifier 100 and controller integrated circuit (IC) 200.

[0046] The power amplifier 100 can amplify the input signal RFin input through the input terminal IN according to the control current Icon to generate the output signal RFout, and can output the generated output signal RFout through the output terminal OUT.

[0047] For example, power amplifier 100 can amplify the power of input signal RFin to the level required to send power to a base station, thereby outputting an output signal RFout. The output terminal OUT of power amplifier 100 can be connected to a predetermined antenna, and the output signal RFout can be transmitted to the external environment through the antenna.

[0048] The power amplifier 100 may include an amplification circuit (circuit or other hardware) 110 and a bias circuit (circuit or other hardware) 120. The amplification circuit 110 amplifies the input signal RFin, and the bias circuit 120 generates a bias current Ibias based on the control current Icon provided from the controller IC 200, and provides the generated bias current Ibias to the amplification circuit 110. Furthermore, the power amplifier 100 may also include an overcurrent protection circuit (circuit or other hardware) 130, which limits the control current Icon based on the output current of the amplification circuit 110.

[0049] Amplifier circuit 110 may include at least one amplifying transistor. When amplifier circuit 110 includes multiple amplifying transistors, the multiple amplifying transistors may be connected in multiple stages to sequentially amplify the input signal RFin in order to generate an output signal RFout. For example, a matching circuit may be provided between the multiple amplifying transistors connected in multiple stages to match the impedance between the amplifying transistors in the preceding stage and the amplifying transistors in the following stage.

[0050] According to one or more examples, a baseband IC capable of generating a baseband signal and an RF IC capable of modulating the baseband signal into an input signal RFin may be positioned before the input terminal IN of the power amplifier 100. The baseband IC can perform encoding and modulation of communication information according to a predetermined communication mode, and can generate the baseband signal through digital signal processing. The RF IC can also modulate a carrier wave based on information superimposed on the baseband signal to generate the input signal RFin.

[0051] Figure 2 A more detailed diagram of the power amplifier module according to the first example is shown below.

[0052] Reference Figure 2 For example, power amplifier 100 may include amplification circuit 110, bias circuit 120 and overcurrent protection circuit 130.

[0053] Reference Figure 2 For example, the power amplifier 100 can be driven by receiving a first drive voltage Vcc and a second drive voltage Vbat from predetermined terminals. Subsequently, for ease of description, the terminals supplying the first drive voltage Vcc and the second drive voltage Vbat may be referred to as the first drive voltage Vcc terminal and the second drive voltage Vbat terminal, respectively.

[0054] The amplifier circuit 110 can amplify the input signal RFin input through the input terminal IN according to the bias currents Ibias1 and Ibias2 provided by the bias circuit 120, so as to generate the output signal RFout, and can output the generated output signal RFout through the output terminal OUT.

[0055] The amplifier circuit 110 may include a first amplifier circuit 110a and a second amplifier circuit 110b.

[0056] The first amplifier circuit 110a may include a first amplifying transistor PRa having an emitter-grounded mode. The base of the first amplifying transistor PRa may be connected to the input terminal IN, and an input signal RFI may be input to the base of the first amplifying transistor PRa. In one or more examples, the base of the first amplifying transistor PRa may be connected to the input terminal IN via a predetermined capacitor.

[0057] Additionally, the base of the first amplifying transistor PTRA can be connected to the emitter of the first biasing transistor BTRA, and a first bias current Ibias1 can be input accordingly. In one or more examples, the base of the first amplifying transistor PTRA can be connected to the emitter of the first biasing transistor BTRA via a predetermined first ballast resistor Ra.

[0058] The collector of the first amplifying transistor PRa can be connected to the first drive voltage Vcc terminal. In one or more examples, the collector of the first amplifying transistor PRa can be connected to the first drive voltage Vcc terminal via a predetermined inductor.

[0059] The first amplifying transistor PRa can operate according to the first bias current Ibias1 in order to amplify the input signal RFin input through the input terminal IN.

[0060] The second amplification circuit 110b may include a second amplification transistor PTRb having an emitter-grounded mode. The base of the second amplification transistor PTRb may be connected to the collector of the first amplification transistor PTRA to amplify the output signal of the first amplification transistor PTRA. Because the output signal of the first amplification transistor PTRA corresponds to the input signal RFI amplified by the first amplification transistor PTRA, the input signal RFI may be amplified sequentially by the first amplification transistor PTRA and the second amplification transistor PTRb. In one or more examples, the base of the second amplification transistor PTRb may be connected to the collector of the first amplification transistor PTRA via a predetermined capacitor.

[0061] Additionally, the base of the second amplifying transistor PTRb can be connected to the emitter of the second bias transistor BTRb, and a second bias current Ibias2 can be input accordingly. In one or more examples, the base of the second amplifying transistor PTRb can be connected to the emitter of the second bias transistor BTRb via a predetermined second ballast resistor Rb.

[0062] The collector of the second amplifying transistor PTRb can be connected to the output terminal OUT, and can output an output signal RFout. In one or more examples, the collector of the second amplifying transistor PTRb can be connected to the output terminal OUT via a predetermined capacitor.

[0063] The second amplifying transistor PTRb can be operated according to the second bias current Ibias2 in order to amplify the signal output from the first amplifying circuit 110a, and can output the output signal RFout through the output terminal OUT.

[0064] The bias circuit 120 may include a first bias circuit 120a and a second bias circuit 120b.

[0065] The first bias circuit 120a may include a first bias current generating circuit 121a and a first temperature compensation circuit 122a.

[0066] The first bias current generating circuit 121a can operate according to the control current Icon provided from the controller IC 200 to generate a first bias current Ibias1, and can provide the generated first bias current Ibias1 to the first amplifier circuit 110a.

[0067] The first bias current generation circuit 121a may include a first bias transistor BTRa that generates a first bias current Ibias1 based on the control current Icon.

[0068] The base of the first bias transistor BTra can be connected to the controller IC 200, and a control current Icon can be input to the base of the first bias transistor BTra. The collector of the first bias transistor BTra can be connected to the second drive voltage Vbat terminal. The emitter of the first bias transistor BTra can be connected to the base of the first amplifying transistor PTra via a predetermined first ballast resistor Ra to provide a first bias current Ibias1.

[0069] When a first amplifying transistor PTRA is driven with a constant voltage between its base and emitter, the collector current can increase with rising temperature. As power dissipation increases due to the increased collector current, the temperature of the first amplifying transistor PTRA may also rise. Therefore, thermal runaway may occur, with the collector current further increasing. This thermal runaway could lead to breakdown in one or more instances.

[0070] To prevent the aforementioned thermal runaway phenomenon, a first temperature compensation circuit 122a can be provided between the base of the first bias transistor BRa and ground.

[0071] The first temperature compensation circuit 122a may include at least one diode. For example, the first temperature compensation circuit 122a may include at least two diodes Da1 and Da2 connected in series. The at least two diodes Da1 and Da2 of the first temperature compensation circuit 122a may generate a temperature compensation voltage according to the control current Icon provided from the controller IC 200.

[0072] Because the temperature compensation voltages of at least two diodes, Da1 and Da2, decrease with increasing temperature, the base voltage of the first bias transistor, BTRra, also decreases with increasing temperature. This prevents thermal runaway of the first amplifying transistor, PTRra.

[0073] Each of the at least two diodes, Da1 and Da2, may include a diode-connected transistor. Each diode-connected transistor may be connected in such a way that the collector and base of each diode-connected transistor are connected to each other.

[0074] The second bias circuit 120b may include a second bias current generating circuit 121b and a second temperature compensation circuit 122b.

[0075] The second bias current generating circuit 121b can operate according to the control current Icon provided from the controller IC 200 to generate a second bias current Ibias2, and can provide the generated second bias current Ibias2 to the second amplifier circuit 110b.

[0076] The second bias current generating circuit 121b may include a second bias transistor BTRb that generates a second bias current Ibias2 based on the control current Icon.

[0077] The base of the second bias transistor BTRb can be connected to the controller IC 200, and a control current Icon can be input to the base of the second bias transistor BTRb. The collector of the second bias transistor BTRb can be connected to the second drive voltage Vbat terminal. Additionally, the emitter of the second bias transistor BTRb can be connected to the base of the second amplifying transistor PTRb via a predetermined second ballast resistor Rb to provide a second bias current Ibias2.

[0078] When the second amplifying transistor PTRb is driven with a constant voltage between its base and emitter, the collector current can increase with rising temperature. As power consumption increases due to the increased collector current, the temperature of the second amplifying transistor PTRb may also rise. Therefore, thermal runaway may occur, potentially leading to a further increase in the collector current. This thermal runaway can also cause malfunctions.

[0079] To prevent the aforementioned thermal runaway phenomenon, a second temperature compensation circuit 122b can be provided between the base of the second bias transistor BTRb and ground.

[0080] The second temperature compensation circuit 122b may include at least one diode. For example, the second temperature compensation circuit 122b may include at least two diodes Db1 and Db2 connected in series. The at least two diodes Db1 and Db2 of the second temperature compensation circuit 122b may generate a temperature compensation voltage according to the control current Icon provided from the controller IC 200.

[0081] Because the temperature compensation voltages of at least two diodes, Db1 and Db2, decrease with increasing temperature, the base voltage of the second bias transistor, BTRb, also decreases with increasing temperature. This prevents thermal runaway of the second amplifying transistor, PTRb, from occurring.

[0082] Each of at least two diodes, Db1 and Db2, may include a diode-connected transistor. Each diode-connected transistor may be connected in such a way that the collector and base of each diode-connected transistor are connected to each other.

[0083] When the load impedance connected to the output terminal OUT decreases, the current level of the output signal RFout may increase excessively. When the current level of the output signal RFout increases excessively, the power applied to the antenna switch may exceed the breakdown voltage of the antenna switch, potentially damaging it. Therefore, to prevent damage to the antenna switch due to the decrease in load impedance connected to the output terminal OUT, it is helpful to appropriately limit the bias currents Ibias1 and Ibias2 supplied to the amplifying transistors PTRRa and PTRb.

[0084] When the current level of the output signal from the first amplifying transistor PTra is higher than the reference current level, the overcurrent protection circuit 130 of the power amplifier module 10, according to one or more examples, can bypass the control current Icon input to the base of the first bias transistor BTra to ground. Therefore, the control current Icon can be bypassed, and the level of the first bias current Ibias1 can be reduced. Consequently, the current level of the output signal of the first amplifying transistor PTra can also be reduced.

[0085] Reference Figure 2 For example, the overcurrent protection circuit 130 may include a first transistor Q1 and a second transistor Q2, and may also include a first diode-connected transistor DQ1 and a second diode-connected transistor DQ2.

[0086] The base of the first transistor Q1 can be connected to the collector of the first amplifying transistor PTRA, and the output signal of the first amplifying transistor PTRA can be input to the base of the first transistor Q1. Additionally, the base of the first transistor Q1 can be connected to ground via a predetermined resistor Rg.

[0087] The collector of the first transistor Q1 can be connected to the first drive voltage Vcc terminal via a first diode-connected transistor DQ1 and a second diode-connected transistor DQ2. The emitter of the first transistor Q1 can be connected to the base of the second transistor Q2. In one or more examples, the emitter of the first transistor Q1 can be connected to the base of the second transistor Q2 via a predetermined resistor.

[0088] The emitter of the second transistor Q2 can be connected to ground, and the collector of the second transistor Q2 can be connected to the base of the first bias transistor BTBRa.

[0089] The first transistor Q1 can be turned on when the current level of the output signal of the first amplifying transistor PRa is higher than the reference current level. For example, the first transistor Q1 can be operated by receiving the voltage formed across the resistor Rg, depending on the current of the output signal of the first amplifying transistor PRa.

[0090] When the current level of the output signal of the first amplifying transistor PRa is higher than the reference current level, the first transistor Q1 can be turned on. Furthermore, according to the turn-on operation of the first transistor Q1, the second transistor Q2 can be turned on sequentially.

[0091] When the second transistor Q2 is turned on, the control current Icon input to the first bias transistor BTRa can be bypassed to ground through the collector of the second transistor Q2.

[0092] For example, the control current Icon input to the base of the first bias transistor BTRa can be limited to reduce the level of the first bias current Ibias1. Therefore, because the amplification performance of the first amplifying transistor PTRa can be weakened, the current level of the output signal of the first amplifying transistor PTRa can also be reduced.

[0093] Although it has been described that in one or more of the above examples, the overcurrent protection circuit 130 can bypass the control current Icon input to the base of the first bias transistor BTRRa to ground based on the current level of the output signal of the first amplifying transistor PTRRa, according to one or more examples, the overcurrent protection circuit 130 can bypass the control current Icon provided to the base of the second bias transistor BTRb based on the current level of the output signal of the second amplifying transistor PTRb.

[0094] Additionally, although it has been described that in one or more of the above examples, amplifier circuit 110 may include a first amplifier circuit 110a and a second amplifier circuit 110b, and bias circuit 120 may include a first bias circuit 120a and a second bias circuit 120b to sequentially amplify the input signal RFin, amplifier circuit 110 may include one of the first amplifier circuit 110a and the second amplifier circuit 110b, and bias circuit 120 may include one of the first bias circuit 120a and the second bias circuit 120b to amplify the input signal RFin once.

[0095] When the current level of the output signal of the first amplifying transistor PTra is higher than the reference current level, the power amplifier module 10 according to the first example can bypass the control current Icon to ground to reduce the current level of the output signal of the first amplifying transistor PTra. In this example, the amplification circuit 110, the bias circuit 120, and the overcurrent protection circuit 130 can form a closed circuit that can operate unstablely. Therefore, the amplification circuit 110, the bias circuit 120, and the overcurrent protection circuit 130 can be configured as open circuits instead of closed circuits.

[0096] Figure 3 It is based on the block diagram of the power amplifier module in the second example, and Figure 4 A more detailed diagram of the power amplifier module according to the second example is shown below.

[0097] Since the power amplifier module according to the second example is similar to the power amplifier module according to the first example, redundant descriptions are omitted for brevity, and descriptions focusing on the differences are provided.

[0098] Reference Figure 3 and Figure 4 In an example different from the first example, the overcurrent protection circuit 130 may also include a sense resistor Rsen connected to the collector of the second transistor Q2. The collector of the second transistor Q2 can be connected to the second drive voltage Vbat terminal via the sense resistor Rsen.

[0099] When the current level of the output signal of the first amplifying transistor PTra is lower than the reference current level, the second transistor Q2 can be turned off. During this off-state operation of the second transistor Q2, no current flows across the sensing resistor Rsen, thus generating a sensing voltage Vsen lower than the reference voltage level. Therefore, when the current level of the output signal is lower than the reference current level, the overcurrent protection circuit 130 can generate a sensing voltage Vsen lower than the reference voltage level.

[0100] When the current level of the output signal of the first amplifying transistor PTra is higher than the reference current level, the second transistor Q2 can be turned on. During the conduction of the second transistor Q2, a detection voltage Vsen higher than the reference voltage level can be formed across the sensing resistor Rsen by the current flowing into the collector of the second transistor Q2 from the terminal of the second driving voltage Vbat. Therefore, when the current level of the output signal is higher than the reference current level, the overcurrent protection circuit 130 can generate a detection voltage Vsen higher than the reference voltage level.

[0101] The controller IC 200 can change the control current Icon based on the detected voltage Vsen.

[0102] When the second transistor Q2 is turned off and the level of the detected voltage Vsen is lower than the reference voltage level, the controller IC200 can determine that the level of the output current of the first amplifying transistor BTRra is higher than the reference current level. Therefore, a preset level of control current Icon can be generated without changing the level of control current Icon.

[0103] When the second transistor Q2 is turned on and the level of the detected voltage Vsen is higher than the reference voltage level, the controller IC200 can determine that the level of the output current of the first amplifying transistor BTRra is higher than the reference current level. Therefore, the level of the preset control current Icon can be reduced, thereby reducing the level of the first bias current Ibias1.

[0104] For example, the level of the control current Icon input to the base of the first bias transistor BTRa can be reduced to lower the level of the first bias current Ibias1. Therefore, because the amplification performance of the first amplifying transistor PTRa can be weakened, the current level of the output signal of the first amplifying transistor PTRa can be reduced accordingly.

[0105] Compared to the first example, the amplifier circuit 110, bias circuit 120, and overcurrent protection circuit 130 of the second example can be configured as an open circuit instead of a closed circuit for stable operation.

[0106] According to embodiments of this disclosure, the bias current used to control the amplifier and the control current used to control the bias circuit can be limited based on the current level of the output signal to prevent damage to the antenna switch.

[0107] While this disclosure includes specific examples, it will be apparent upon understanding the disclosure of this application that various changes in form and detail may be made to these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered descriptive only and not for limiting purposes. The description of features or aspects in each example is to be considered applicable to similar features or aspects in other examples. Suitable results may be obtained if the described techniques are performed in a different order, and / or if components in the described system, architecture, apparatus, or circuit are combined in a different manner, and / or if components in the described system, architecture, apparatus, or circuit are replaced or added with other components or their equivalents. Therefore, the scope of this disclosure is not limited by the specific embodiments but by the claims and their equivalents, and all variations within the scope of the claims and their equivalents shall be construed as included in this disclosure.

Claims

1. A power amplifier comprising: an amplification circuit including an amplification transistor configured to amplify an input signal and configured to output an output signal; a biasing circuit including a biasing transistor including an emitter configured to provide a bias current into a base of the amplification transistor and a base into which a control current is input; and an overcurrent protection circuit configured to bypass the control current into a ground according to a current level of the output signal, wherein the overcurrent protection circuit includes a first transistor including a base into which the output signal is input and a collector connected to a drive voltage terminal, and a second transistor including a base connected to an emitter of the first transistor, a collector connected to the base of the biasing transistor, and an emitter connected to the ground.

2. The power amplifier of claim 1, wherein, The overcurrent protection circuit is configured to bypass the control current in response to the current level of the output signal being higher than a reference current level.

3. The power amplifier of claim 1, wherein, The overcurrent protection circuit further includes at least one diode-connected transistor disposed between the drive voltage terminal and the collector of the first transistor.

4. The power amplifier of claim 1, wherein, The first transistor and the second transistor are turned on in response to the current level of the output signal being higher than a reference current level.

5. The power amplifier of claim 4, wherein, The second transistor bypasses the control current into the ground in response to the current level of the output signal being higher than the reference current level.

6. The power amplifier of claim 1, wherein, The amplification transistor includes first and second amplification transistors configured to sequentially amplify the input signal, and The biasing transistor includes first and second biasing transistors configured to provide first and second bias currents to the first and second amplification transistors, respectively.

7. The power amplifier of claim 6, wherein, The overcurrent protection circuit is configured to bypass the control current provided to a biasing transistor corresponding to one of the first and second amplification transistors according to a current level of an output signal of the one of the first and second amplification transistors.

8. A power amplifier module comprising: a controller integrated circuit configured to generate a control current; and a power amplifier including an amplification circuit including an amplification transistor configured to amplify an input signal and configured to output an output signal, a biasing circuit including a biasing transistor configured to operate according to the control current to provide a bias current to the amplification transistor, and an overcurrent protection circuit configured to generate a detection voltage according to a current level of the output signal, wherein the controller integrated circuit is configured to change the control current to reduce a level of the bias current in response to a level of the detection voltage being higher than a reference voltage level, and The overcurrent protection circuit includes a first transistor and a second transistor, the first transistor includes a base into which the output signal is input and a collector connected to a first drive voltage terminal, and the second transistor includes a base connected to an emitter of the first transistor, a collector connected to a second drive voltage terminal, and an emitter connected to ground.

9. The power amplifier module of claim 8, wherein, The overcurrent protection circuit generates the detection voltage higher than the reference voltage level in response to a current level of the output signal being higher than a reference current level.

10. The power amplifier module of claim 8, wherein, The overcurrent protection circuit further includes: a detection resistor provided between the second drive voltage terminal and the collector of the second transistor.

11. The power amplifier module of claim 10, wherein, The overcurrent protection circuit further includes at least one diode-connected transistor provided between the first drive voltage terminal and the collector of the first transistor.

12. The power amplifier module of claim 10, wherein, The first transistor and the second transistor are turned on in response to the current level of the output signal being higher than a reference current level.

13. The power amplifier module of claim 12, wherein, The detection resistor is configured to output the detection voltage in accordance with a current flowing from the second drive voltage terminal into the collector of the second transistor in response to the current level of the output signal being higher than the reference current level.

14. The power amplifier module of claim 8, wherein, The controller integrated circuit is configured to decrease a level of the control current in response to a level of the detection voltage being higher than the reference voltage level.

15. The power amplifier module of claim 14, wherein, A level of the bias current is decreased in accordance with the decreased level of the control current.

16. A power amplifier, comprising: an amplification circuit including an amplification transistor configured to amplify an input signal and configured to output an output signal; a bias circuit including a bias transistor including an emitter configured to provide a bias current into a base of the amplification transistor and a base into which a control current is input; and an overcurrent protection circuit configured to bypass the control current in response to a current level of the output signal being higher than a reference current level, wherein the overcurrent protection circuit includes a first transistor and a second transistor, the first transistor includes a base into which the output signal is input and a collector connected to a drive voltage terminal, and the second transistor includes a base connected to an emitter of the first transistor, a collector connected to the base of the bias transistor, and an emitter connected to ground.

17. The power amplifier of claim 16, wherein, The amplification transistor includes a first amplification transistor and a second amplification transistor configured to sequentially amplify the input signal.

18. The power amplifier of claim 17, wherein, The bias transistor includes a first bias transistor configured to provide a first bias current to the first amplification transistor and a second bias transistor configured to provide a second bias current to the second amplification transistor.

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