An OLED pixel arrangement structure and mask

Abstract

The present invention provides an OLED pixel arrangement structure and a mask, comprising a plurality of scan lines and a plurality of data lines, wherein the plurality of scan lines and the plurality of data lines intersect to form a first area, sub-pixels are determined based on the first area, and the sub-pixels include a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel; the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel form a pixel array according to a preset arrangement; sub-pixels of the same type, adjacent to each other, and of a preset type in the pixel array share a driving circuit, and the preset type of sub-pixels are at least one of the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel; the present invention concentrates sub-pixels of the same type and controls them with a single driving circuit, thereby reducing the number of driving transistors, while being able to increase the opening of the mask, and reducing the difficulty of manufacturing small-sized pixels.

Description

Technical Field

[0001] The present invention relates to the field of display screens, and in particular to an OLED pixel arrangement structure and a mask. Background Art

[0002] In recent years, organic light-emitting diodes (OLEDs) have been widely used in smartphones, televisions, mobile wearable devices and microdisplays due to their self-luminescence, high response speed, wide viewing angle, high contrast, low power consumption, light weight, high and low temperature resistance and flexibility.

[0003] OLED displays use red (R), green (G), and blue (B) sub-pixels to display full-color images. The R, G, and B sub-pixels are arranged alternately and repeatedly in a plane. Three adjacent sub-pixels form a pixel unit that can emit any color, that is, the basic image unit. The pixel units are arranged repeatedly in a plane to form the display screen. The smaller the pixel size, the higher the resolution of the display or PPI (Pixel Per Inch, the number of pixels per inch), and the clearer and more detailed the displayed image.

[0004] As people pursue higher and higher resolution of display devices, the pixel size also needs to be smaller and smaller, making the opening of the metal mask (Fine Metal Mask, FMM) used to evaporate the light-emitting layer materials of R, G and B sub-pixels smaller and smaller. However, due to the influence of the FMM manufacturing process, the minimum size of the FMM opening is limited, making it impossible to produce small-sized pixels, and thus it is impossible to obtain a high-resolution OLED display. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide an OLED pixel arrangement structure and a mask to reduce the difficulty of producing small-size pixels.

[0006] In order to solve the above technical problems, a technical solution adopted by the present invention is:

[0007] An OLED pixel arrangement structure includes a plurality of scan lines and a plurality of data lines, wherein the plurality of scan lines and the plurality of data lines intersect to form a first area;

[0008] determining a sub-pixel according to the first area;

[0009] The sub-pixels include a first sub-pixel, a second sub-pixel, a third sub-pixel and a fourth sub-pixel;

[0010] The first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel form a pixel array according to a preset arrangement;

[0011] The sub-pixels of the same type in the pixel array, which are adjacent to each other and are of a preset type, share a driving circuit. The preset type of sub-pixel is at least one of the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel.

[0012] In order to solve the above technical problems, another technical solution adopted by the present invention is:

[0013] A mask plate comprises an opening area and a closed area, wherein the opening area corresponds to a first color sub-pixel in a preset sub-pixel type, and the closed area corresponds to the remaining sub-pixels in the preset sub-pixel type except the first color sub-pixel.

[0014] The beneficial effects of the present invention are as follows: multiple scan lines and multiple data lines form a sub-pixel area, and the sub-pixel types are arranged in a preset order so that sub-pixels of the same type can be close to each other to form an area of ​​the same type. When manufacturing FMM, the opening of the FMM can be expanded according to the size of the area, thereby reducing the production difficulty. At the same time, the sub-pixel area enclosed by the scan lines and the data lines can be set to be smaller, so that the number of sub-pixels per unit area is increased, thereby achieving the effect of improving PPI. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 This is a schematic diagram of an OLED pixel arrangement structure according to an embodiment of the present invention;

[0016] Figure 2 A schematic diagram of a mask according to an embodiment of the present invention;

[0017] Figure 3 This is a schematic diagram of an OLED pixel circuit structure according to an embodiment of the present invention;

[0018] Figure 4 This is a schematic diagram of an OLED pixel circuit structure in the prior art;

[0019] Figure 5 This is a schematic diagram comparing the display effects at different resolutions;

[0020] Description of labels:

[0021] 1. First TFT tube; 2. Second TFT tube; 3. Capacitor; 4. OLED device. DETAILED DESCRIPTION

[0022] To illustrate the technical content, achieved objectives and effects of the present invention in detail, the following description is given in conjunction with the embodiments and accompanying drawings.

[0023] Please refer to Figure 1 , an OLED pixel arrangement structure, comprising a plurality of scan lines and a plurality of data lines, wherein the plurality of scan lines and the plurality of data lines intersect to form a first area;

[0024] determining a sub-pixel according to the first area;

[0025] The sub-pixels include a first sub-pixel, a second sub-pixel, a third sub-pixel and a fourth sub-pixel;

[0026] The first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel form a pixel array according to a preset arrangement;

[0027] The sub-pixels of the same type in the pixel array, which are adjacent to each other and are of a preset type, share a driving circuit. The preset type of sub-pixel is at least one of the first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel.

[0028] From the above description, it can be seen that the beneficial effects of the present invention are: multiple scan lines and multiple data lines form a sub-pixel area, and the sub-pixel types are arranged in a preset order so that sub-pixels of the same type can be close to each other to form an area of ​​the same type. When making FMM, the opening of the FMM can be expanded according to the size of the area, thereby reducing the production difficulty. At the same time, the sub-pixel area enclosed by the scan lines and the data lines can be set to be smaller, so that the number of sub-pixels per unit area is increased, thereby achieving the effect of increasing PPI.

[0029] Furthermore, the pixel array includes a plurality of pixel cycle units evenly distributed, and the pixel cycle unit is a combination of sub-pixels in four rows and four columns;

[0030] The four middle sub-pixels of the pixel cycle unit are the fourth sub-pixels, the four sub-pixels above and below the fourth sub-pixel are the second sub-pixels, the four sub-pixels on the left and right sides of the fourth sub-pixel are the third sub-pixels, and the four sub-pixels at the corners of the pixel cycle unit are the first sub-pixels;

[0031] In one of the pixel recycling units: the fourth sub-pixel shares a driving circuit, the second sub-pixels located on the upper and lower sides share a driving circuit, the third sub-pixels located on the left and right sides share a driving circuit, and each first sub-pixel uses a driving circuit;

[0032] The driving circuit is connected to the scan line, the data line and the supply voltage respectively.

[0033] As can be seen from the above description, the pixel cycle unit is used as the basic structure, and the structure is repeated to obtain a pixel array. The regular arrangement facilitates the production of the corresponding mask; a preset number of adjacent sub-pixels of the same type share a driving circuit, which saves space for the control circuit, reduces the obscured portion of a single sub-pixel, and improves light utilization.

[0034] Further, the first sub-pixel is a G sub-pixel, the second sub-pixel is a W sub-pixel, the third sub-pixel is a B sub-pixel, and the fourth sub-pixel is an R sub-pixel.

[0035] From the above description, it can be seen that the use of RBGW color rendering method can increase the screen brightness and reduce the power consumption of the OLED screen compared to the RBG color rendering method when the same brightness is required.

[0036] Furthermore, the driving circuit is a 2T1C driving circuit.

[0037] From the above description, it can be seen that OLED devices are current devices and cannot store current stably. TFT tubes are required to realize voltage-to-current conversion. In the OLED display, the opening and closing of the driving circuit are controlled by the scan line. During the frequent switching of the scan line, the capacitor can ensure that the voltage of the TFT tube gate is relatively stable. 2T1C is a simple circuit that can realize the normal operation of OLED, which can effectively control costs while meeting display requirements.

[0038] Furthermore, the 2T1C driving circuit includes a first TFT tube, a second TFT tube and an OLED device;

[0039] The gate electrode of the first TFT tube is connected to the scan line, the source electrode of the first TFT tube is connected to the data line, and the drain electrode of the first TFT tube is connected to the gate electrode of the second TFT tube and one end of the OLED device respectively;

[0040] The source of the second TFT tube is connected to the supply voltage, and the drain of the second TFT tube is connected to the other end of the OLED device.

[0041] From the above description, it can be seen that the gate of the first TFT tube is connected to the scan line. When the scan line is turned on, the voltage of the data line is poured into the gate of the second TFT tube, connecting the OLED device to realize the display of the picture.

[0042] Furthermore, the 2T1C driving circuit further includes a capacitor;

[0043] The drain of the first TFT tube is connected to the capacitor and then connected to one end of the OLED device.

[0044] As can be seen from the above description, since there is often voltage in the data line when the OLED display is on, each row of sub-pixels chooses whether to receive voltage from the data line based on whether the scan line in its row is turned on. Since the scan line switches between on and off states, the use of capacitors can improve the voltage stability in a single drive circuit.

[0045] Please refer to Figure 2A mask plate includes an opening area and a closed area, wherein the opening area corresponds to a first color sub-pixel in a preset sub-pixel type, and the closed area corresponds to the remaining sub-pixels in the preset sub-pixel type except the first color sub-pixel.

[0046] From the above description, it can be seen that the mask used to manufacture an OLED pixel arrangement structure in the present invention can increase the opening size of the mask because sub-pixels of the same type are concentrated, thereby reducing the difficulty of manufacturing the mask.

[0047] Furthermore, the opening area and the closed area are rectangular.

[0048] It can be seen from the above description that the rectangular opening area is easy to process.

[0049] Please refer to Figure 1 and Figure 3 , embodiment 1 of the present invention is:

[0050] An OLED pixel arrangement structure includes multiple scan lines and multiple data lines, please refer to Figure 1 In the diagram (a) located at the top, the plurality of scan lines and the plurality of data lines intersect to form a first area, and sub-pixels are determined based on the first area;

[0051] For details, please refer to Figure 1 (a) The upper diagram and Figure 3 , taking the smallest area in the first area as a basic division unit, and determining each sub-pixel according to the basic division unit;

[0052] The sub-pixels include a first sub-pixel, a second sub-pixel, a third sub-pixel, and a fourth sub-pixel;

[0053] The first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel form a pixel array according to a preset arrangement;

[0054] The pixel array includes a plurality of pixel cycle units evenly distributed, and the pixel cycle unit is a combination of sub-pixels in four rows and four columns;

[0055] Please refer to Figure 1 In the diagram (a) at the bottom, the four middle sub-pixels of the pixel cycle unit are the fourth sub-pixels, the four sub-pixels located above and below the fourth sub-pixel are the second sub-pixels, the four sub-pixels located to the left and right of the fourth sub-pixel are the third sub-pixels, and the four sub-pixels at the corners of the pixel cycle unit are the first sub-pixels;

[0056] In a pixel cycle unit: the fourth sub-pixel shares a driving circuit, the second sub-pixels located on the upper and lower sides share a driving circuit, the third sub-pixels located on the left and right sides share a driving circuit, and each first sub-pixel uses a driving circuit; the driving circuits are respectively connected to the scan line, the data line and the supply voltage (OVDD);

[0057] In an optional embodiment, the first sub-pixel is a G sub-pixel, the second sub-pixel is a W sub-pixel, the third sub-pixel is a B sub-pixel, and the fourth sub-pixel is an R sub-pixel;

[0058] Please refer to Figure 3 , the second embodiment of the present invention is:

[0059] An OLED pixel arrangement structure is further defined based on the first embodiment as follows:

[0060] The driving circuit is a 2T1C driving circuit: comprising a first TFT tube 1, a second TFT tube 2, a capacitor 3 and an OLED device 4;

[0061] The gate electrode of the first TFT tube 1 is connected to the scan line, the source electrode of the first TFT tube 1 is connected to the data line, and the drain electrode of the first TFT tube 1 is connected to the gate electrode of the second TFT tube 2 and one end of the OLED device 4, respectively. The drain electrode of the first TFT tube 1 is connected to a capacitor and then to one end of the OLED device 4.

[0062] The source of the second TFT tube 2 is connected to the supply voltage (OVDD), and the drain of the second TFT tube is connected to the other end of the OLED device.

[0063] Please refer to Figure 2 , the third embodiment of the present invention is:

[0064] A mask (FMM, Fine Metal Mask) is used to manufacture an OLED pixel arrangement structure of the first or second embodiment, characterized in that it includes an opening area and a closed area, the opening area corresponding to a first color sub-pixel in a predetermined sub-pixel type, and the closed area corresponding to the remaining sub-pixels in the predetermined sub-pixel type except the first color sub-pixel;

[0065] Wherein, the opening area and the closed area are rectangular;

[0066] A mask in this embodiment can be used to manufacture an OLED pixel arrangement structure described in the first or second embodiment: Figure 2 , for Figure 1 The mask structure corresponding to the pixel arrangement structure shown in (b);

[0067] Figure 2 The white area is the opening area, and the gray area is the closed area. The light-emitting material can be evaporated into the sub-pixel through the opening area; please refer to Figure 2 (a) is a simple schematic diagram of the FMM used for evaporating red luminescent materials; please refer to Figure 2 (b) is a simple schematic diagram of the FMM used for evaporating green luminescent materials; please refer to Figure 2 (c) is a simple schematic diagram of the FMM used for evaporating blue luminescent materials; please refer to Figure 2 (d) is a simple schematic diagram of an FMM for evaporating white luminescent materials; the distances between adjacent openings are equal, and Figure 2 In the formula, Rx=Ry=Gx=Gy=Bx=By=Wx=Wy, and the white light-emitting material corresponding to the W sub-pixel is made by superimposing red light-emitting material, green light-emitting material and blue light-emitting material.

[0068] In summary, the present invention provides an OLED pixel arrangement structure and mask; multiple sub-pixels are separated by data lines and scan lines, and the sub-pixels include four types: R sub-pixels, G sub-pixels, B sub-pixels, and W sub-pixels. A pixel array is formed by a preset four-row and four-column pixel cycle unit. Sub-pixels of the same type are integrated in the middle position and on the upper, lower, left, and right sides of the pixel cycle unit. In a single pixel cycle unit, adjacent sub-pixels of the same type share a driving transistor, while maintaining a one-to-one correspondence between a type of sub-pixel and a driving transistor. Please refer to Figure 5 On high-resolution and high-PPI products, because the pixels are extremely small, the human eye has difficulty distinguishing visual effects above 300PPI. Therefore, the design of shared drive transistors can significantly reduce the number of drive transistors under similar human eye visual effects, allowing more area to be used for light emission and improving the display quality of the display; at the same time, by concentrating sub-pixels of the same type in one area, the opening position can be correspondingly enlarged when making the mask, making the opening production more convenient and reducing the difficulty of producing small-size sub-pixels.

[0069] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's description and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. An OLED pixel arrangement structure comprising a plurality of scan lines and a plurality of data lines, wherein the plurality of scan lines and the plurality of data lines intersect to form a first area, characterized in that: determining a sub-pixel according to the first area; The sub-pixels include a first sub-pixel, a second sub-pixel, a third sub-pixel and a fourth sub-pixel; The first sub-pixel, the second sub-pixel, the third sub-pixel and the fourth sub-pixel form a pixel array according to a preset arrangement; Sub-pixels of the same type in the pixel array, adjacent to each other, and of a predetermined type share a driving circuit, wherein the predetermined type of sub-pixel is at least one of the first sub-pixel, the second sub-pixel, the third sub-pixel, and the fourth sub-pixel; The pixel array comprises a plurality of pixel cycle units evenly distributed, wherein the pixel cycle unit is a combination of four rows and four columns of pixel units; The four middle pixel units of the pixel cycle unit are the fourth sub-pixel, the four pixel units on the upper and lower sides of the fourth sub-pixel are the second sub-pixel, the four pixel units on the left and right sides of the fourth sub-pixel are the third sub-pixel, and the four pixel units at the corners of the pixel cycle unit are the first sub-pixel; In one of the pixel recycling units: the fourth sub-pixel uses one driving circuit, the second sub-pixels located on the upper and lower sides use one driving circuit, the third sub-pixels located on the left and right sides use one driving circuit, and each first sub-pixel uses one driving circuit; The driving circuit is respectively connected to the scan line, the data line and the supply voltage; The driving circuit is a 2T1C driving circuit.

2. The OLED pixel arrangement structure according to claim 1, wherein: The first sub-pixel is a G sub-pixel, the second sub-pixel is a W sub-pixel, the third sub-pixel is a B sub-pixel, and the fourth sub-pixel is an R sub-pixel.

3. The OLED pixel arrangement structure according to claim 1, wherein: The 2T1C driving circuit includes a first TFT tube, a second TFT tube and an OLED device; The gate electrode of the first TFT tube is connected to the scan line, the source electrode of the first TFT tube is connected to the data line, and the drain electrode of the first TFT tube is connected to the gate electrode of the second TFT tube and one end of the OLED device respectively; The source of the second TFT tube is connected to the supply voltage, and the drain of the second TFT tube is connected to the other end of the OLED device.

4. The OLED pixel arrangement structure according to claim 3, wherein: The 2T1C driving circuit further includes a capacitor; The drain of the first TFT tube is connected to the capacitor and then connected to one end of the OLED device.

5. A mask plate used for manufacturing an OLED pixel arrangement structure according to any one of claims 1 to 4, characterized in that: It includes an opening area and a closed area, wherein the opening area corresponds to a first color sub-pixel in a preset sub-pixel type, and the closed area corresponds to the remaining sub-pixels in the preset sub-pixel type except the first color sub-pixel. The mask according to claim 5 , wherein the opening area and the closed area are rectangular.

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