Apparatus and method for brightness control of a display device

Abstract

The display driver includes a signal supply circuit and a control circuit. The signal supply circuit is configured to supply an emission control signal to the display panel. The emission control signal controls a ratio of pixel circuits that emit light to pixel circuits of the display panel. The control circuit is configured to control the emission control signal based on input image data.

Description

TECHNICAL FIELD

[0001] Embodiments disclosed herein relate generally to apparatus and methods for brightness control of a display device. BACKGROUND

[0002] The quality of a displayed image can depend on the dynamic brightness range of a display device. To improve the image quality, the dynamic brightness range can be increased with brightness control of the display device. SUMMARY

[0003] This Summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This Summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to limit the scope of the claimed subject matter.

[0004] In one or more embodiments, a display driver is disclosed. The display driver includes a signal supply circuit and a control circuit. The signal supply circuit is configured to supply an emission control signal to a display panel. The emission control signal controls a ratio of pixel circuits that emit light to pixel circuits of the display panel. The control circuit is configured to control the emission control signal based on input image data.

[0005] In one or more embodiments, a display device is disclosed. The display device includes a display panel and a display driver. The display driver includes a signal supply circuit and a control circuit. The signal supply circuit is configured to supply an emission control signal to the display panel. The emission control signal controls a ratio of pixel circuits that emit light to pixel circuits of the display panel. The control circuit is configured to control the emission control signal based on input image data.

[0006] In one or more embodiments, a method is also disclosed. The method includes supplying an emission control signal to a display panel to control a ratio of pixel circuits that emit light to pixel circuits of the display panel, and controlling the emission control signal based on input image data. BRIEF DESCRIPTION OF DRAWINGS

[0007] The patent or application file contains at least one drawing executed in color. Copies of this patent or patent application publication with color drawing(s) will be provided by the Office upon request and payment of the necessary fee.

[0008] So that the above-recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, can be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only example embodiments and therefore are not to be considered limiting in scope for the disclosure can admit to other equally effective embodiments.

[0009] Figure 1 FIG. 1 illustrates an example configuration of a display device, according to one or more embodiments.

[0010] Figure 2 FIG. 2 illustrates an example configuration of pixel circuitry, according to one or more embodiments.

[0011] Figure 3 FIG. 3 illustrates an example configuration of a pixel, according to one or more embodiments.

[0012] Figure 4 FIG. 4 illustrates an example configuration of image processing circuitry, according to one or more embodiments.

[0013] Figure 5 FIG. 5 illustrates a gamma curve and control points that specify the gamma curve, according to one or more embodiments.

[0014] Figure 6 FIG. 6 illustrates an example configuration of control circuitry, according to one or more embodiments.

[0015] Figure 7 FIG. 7 illustrates an example definition of a partial area, according to one or more embodiments.

[0016] Figure 8 FIG. 8 illustrates an example calculation of a maximum brightness enhancement display brightness value (maximum brightness enhancement DBV) based on a maximum local average picture level (maximum local APL), according to one or more embodiments.

[0017] Figure 9 FIG. 9 illustrates an example calculation of a maximum brightness enhancement DBV based on a global APL, according to one or more embodiments.

[0018] Figure 10 FIG. 10 illustrates generation of a brightness gain for each pixel, according to one or more embodiments.

[0019] Figure 11 FIG. 11 illustrates generation of control points, according to one or more embodiments.

[0020] Figure 12 FIG. 12 illustrates an example method for controlling signal processing circuitry, according to one or more embodiments.

[0021] Figure 13 FIG. 13 illustrates an example operation of a display device, according to one or more embodiments.

[0022] For ease of understanding, the same reference numbers have been used, where possible, to designate identical elements common to the figures. It is contemplated that elements disclosed in one embodiment can be advantageously utilized in other embodiments without specific recitation. The drawings herein are not drawn to scale and should only be used to understand the concepts presented herein. Additionally, for clarity and to avoid obscuring the concepts presented herein, various conceptual depictions of components are shown without specific details. The drawings and discussion are intended to explain the principles of the concepts discussed below, where identical reference numbers indicate identical elements. DETAILED DESCRIPTION

[0023] The following detailed description is merely exemplary in nature and is not intended to limit the disclosure or the application and uses of the disclosure. Furthermore, there is no intention to be bound by any expressed or implied theory presented in the preceding background or the following detailed description.

[0024] A display image can include a region in which luminance is locally high. In such a case, image quality can depend on the luminance dynamic range of the display device. An increased luminance dynamic range can enable displaying a display image having bright portions with increased luminance and dark portions with reduced luminance.

[0025] In one or more embodiments, a signal supply circuit configured to supply at least one signal to a display panel adaptively controls based on input image data to increase a luminance dynamic range. In various embodiments, the signal supply circuit can be configured to generate an emission control signal that controls a ratio of pixels that emit light to a total number of pixels disposed in the display panel. In such embodiments, the emission control signal can be adaptively controlled based on the input image data. In one or more embodiments, when an image corresponding to the input image data includes bright portions, the signal supply circuit can be controlled to increase luminance of the entire display image based on the input image data. In such embodiments, image processing circuitry of the signal supply circuit can be configured to perform image processing to cancel an increase in luminance of pixels in dark portions of the display image. This can effectively increase a contrast ratio of the display image.

[0026] Figure 1An example configuration of a display device 100 is illustrated in accordance with one or more embodiments. The display device 100 can be configured to display an image corresponding to input image data Din received from a host 200. Examples of the host 200 can include an application processor, a central processing unit (CPU), or other processor. The display device 100 includes a display panel 1 and a display driver 2. The display panel 1 can include a self-emissive display panel, such as an organic light-emitting diode (OLED) display panel. In other embodiments, the display panel 1 can be a liquid crystal display panel. In the illustrated embodiment, the display panel 1 includes a display area 3, a scan driver circuit 4, a high-side power terminal 5, and a low-side power terminal 6. The display area 3 includes pixel circuits 7, N scan lines SC[1] to SC[N], N emission lines EM[1] to EM[N], and M data lines D[1] to D[M] are disposed in the display area 3. The scan lines SC[1] to SC[N] and the N emission lines EM[1] to EM[N] are coupled to the scan driver circuit 4, and the data lines D[1] to D[M] are coupled to the display driver 2. The scan lines SC[1] to SC[N] and the emission lines EM[1] to EM[N] extend in a horizontal direction of the display panel 1, while the data lines D[1] to D[M] extend in a vertical direction. Each pixel circuit 7 is coupled to a corresponding scan line SC, emission line EM, and data line D.

[0027] In various embodiments, the high-side power terminal 5 and the low-side power terminal 6 are configured to receive a high-side power voltage ELVDD and a low-side power voltage ELVSS, respectively, from a power management integrated circuit (PMIC) 300. The high-side power voltage ELVDD can be delivered from the high-side power terminal 5 to a corresponding pixel circuit 7 via a high-side power line (not illustrated), and the low-side power voltage ELVSS can be delivered from the low-side power terminal 6 to a corresponding pixel circuit 7 via a low-side power line (not illustrated).

[0028] The pixel circuit 7 can be configured to emit light having a luminance level corresponding to a drive voltage received from the display driver 2. Figure 2An example configuration of the pixel circuit 7 is illustrated. The pixel circuit 7 as illustrated includes PMOS transistors M1-M3, a storage capacitor Cst, and a light emitting element 8. The PMOS transistor M2 has a gate connected to a scan line SC[i] and is connected between a data line D[j] and a gate of the PMOS transistor M1. The PMOS transistor M1 has a source connected to a high-side power node 9a configured to supply a high-side power supply voltage ELVDD and a drain connected to a low-side power node 9b configured to supply a low-side power supply voltage ELVSS via the light emitting element 8 and the PMOS transistor M3. The light emitting element 8 can be an LED, an OLED, or other light emitting element suitable for the type of display panel 1. The PMOS transistor M3 has a gate connected to an emission line EM[i]. The storage capacitor Cst is connected between the gate and the source of the PMOS transistor M1. The pixel circuit 7 can be configured differently than the pixel circuit illustrated in Figure 2 For example, the pixel circuit 7 can be configured as a 5T2C circuit (composed of five thin film transistors (TFTs)) or a 6T1C circuit (composed of six TFTs and one capacitor).

[0029] In one or more embodiments, a write operation to program a drive voltage into the pixel circuit 7 can include asserting the scan line SC[i] into a state in which the emission line EM[i] is deasserted and the drive voltage is supplied to the data line D[j]. This operation effects writing the drive voltage into the storage capacitor Cst. The storage capacitor Cst can be configured to hold a storage voltage corresponding to the drive voltage written therein.

[0030] In one or more embodiments, when the emission line EM[i] is deasserted, the light emitting element 8 is disconnected from the high-side power node 9a and thus does not emit light. In one or more embodiments, when the emission line EM[i] is asserted, the light emitting element 8 emits light having a luminance level corresponding to the storage voltage across the storage capacitor Cst.

[0031] In one or more embodiments, such as the embodiment illustrated in Figure 2 In such embodiments, the low-side power supply voltage ELVSS is set lower than the lowest drive voltage allowed. In one or more embodiments, the low-side power supply voltage ELVSS is set to be lower than the high-side power supply voltage ELVDD. In one or more embodiments, the low-side power supply voltage ELVSS is set to be lower than the high-side power supply voltage ELVDD by a voltage corresponding to the drive voltage range of the display panel 1.

[0032] Figure 3An example configuration of a pixel 10 of the display panel 1 is illustrated in accordance with one or more embodiments. Each pixel 10 includes a plurality of pixel circuits 7 configured to display different colors (e.g., red (R), green (G), or blue (B)). In various embodiments, the pixel circuits 7 configured to display red, green, and blue are used as R sub-pixels, G sub-pixels, and B sub-pixels, respectively. The pixel circuits 7 configured to display red, green, and blue can be referred to as R sub-pixels 7R, G sub-pixels 7G, and B sub-pixels 7B, respectively, hereinafter. Each pixel 10 can include at least one R sub-pixel 7R, at least one G sub-pixel 7G, and at least one B sub-pixel 7B. Each pixel 10 can also include at least one additional sub-pixel configured to display a color other than red, green, and blue. The combination of colors of the sub-pixels of each pixel 10 is not limited to the combinations of colors disclosed herein. For example, each pixel 10 can also include a sub-pixel configured to display white or yellow. The display panel 1 can be configured to fit sub-pixel rendering (SPR). In such embodiments, each pixel 10 can include a plurality of R sub-pixels 7R, a plurality of G sub-pixels 7G, and / or a plurality of B sub-pixels 7B.

[0033] Referring back to Figure 1 In one or more embodiments, the scan driver circuit 4 is configured to drive the scan lines SC[1] to SC[N] and the emission lines EM[1] to EM[N] to select the rows of pixel circuits 7 for which write operations are performed. The scan driver circuit 4 can be configured to, in a write operation for the pixel circuits 7 located in the i-th row, for example, invalidate the emission line EM[i] and validate the scan line SC[i]. The scan driver circuit 4 can be configured to drive the scan lines SC[1] to SC[N] based on the scan control signals SOUT received from the display driver 2.

[0034] In one or more embodiments, the scan control signals SOUT include an emission control signal EM_ctrl. In such embodiments, the scan driver circuit 4 can also be configured to control light emission from the rows of pixel circuits 7 for which write operations are not performed based on the emission control signal EM_ctrl. The emission control signal EM_ctrl can control the ratio of pixel circuits 7 that emit light to the pixel circuits 7 of the entire display panel 1, thereby controlling a display brightness level of the display device 100. In various embodiments, the display brightness level can be the brightness level of the entire image being displayed on the display panel 1.

[0035] In one or more embodiments, the emission control signal EM_ctrl is generated as a pulse width modulation (PWM) signal, and the display brightness level of the display device 100 is controlled by the duty ratio of the emission control signal EM_ctrl. The duty ratio of the emission control signal EM_ctrl can correspond to the ratio of the period during which the emission control signal EM_ctrl is made active to one cycle period of the emission control signal EM_ctrl. In one or more embodiments, for example, when the duty ratio of the emission control signal EM_ctrl increases, the ratio of the number of emission lines EM that are made active to the total number of emission lines EM increases, and the ratio to the pixel circuit 7 of the emission light also increases. Thus, the display brightness level of the display device 100 increases.

[0036] In one or more embodiments, the display driver 2 is configured to drive the display panel 1 based on input image data Din and control data Dctrl received from the host 200 to display an image corresponding to the input image data Din on the display panel 1. The input image data Din can include pixel data that describes a gray scale value of a respective color of each pixel 10 of the display panel 1. The display driver 2 can include an interface circuit 11, a signal supply circuit 12, and a control circuit 13.

[0037] In one or more embodiments, the interface circuit 11 is configured to receive the input image data Din and the control data Dctrl from the host 200. The interface circuit 11 can also be configured to forward the input image data Din to the signal supply circuit 12 and the control data Dctrl to the control circuit 13. In other embodiments, the interface circuit 11 can be configured to process the input image data Din and send the processed input image data Din to the signal supply circuit 12.

[0038] In one or more embodiments, the signal supply circuit 12 is configured to supply various signals to the display panel 1 based at least in part on the control circuit 13. The signal supply circuit 12 can include an image processing circuit 14, a gray scale voltage generator circuit 15, a data driver circuit 16, and a panel interface (I / F) circuit 17.

[0039] In one or more embodiments, the image processing circuit 14 is configured to generate output voltage data Dout by performing image processing on the input image data Din received from the interface circuit 11. The output voltage data Dout describes voltage values of voltage levels that specify a drive voltage to be written into the respective pixel circuit 7 of each pixel 10 of the display panel 1.

[0040] The image processing in the image processing circuit 14 can be controlled based on the control parameter Para_ctrl received from the control circuit 13. In an embodiment in which the display brightness level of the display device 100 depends on the correlation between the input image data Din and the output voltage data Dout, the display brightness level of the display device 100 can be controlled by controlling the image processing with the control parameter Para_ctrl.

[0041] In one or more embodiments, the image processing circuit 14 can be configured to perform IR drop correction by compensating for voltage drops on the power supply lines to mitigate display color irregularities (mura) that can appear in the displayed image on the display panel 1 due to voltage drops on the power supply lines that transport the high-side power supply voltage ELVDD from the high-side power supply terminal 5 to the respective pixel circuits 7. The control parameter Para_ctrl supplied to the image processing circuit 14 can include an amount of IR drop correction. The amount of IR drop can differ between the respective pixel circuits 7 of each pixel 10 and can be determined or calculated individually. The IR drop correction can depend on the position of the pixel 10 of interest and on the total current through the display panel 1. The total current can be the sum of the currents flowing through the pixel circuits 7 of the entire display panel 1. The voltage drop on the power supply lines can reduce the brightness of the displayed image. Furthermore, the amount of reduction of the luminance level of the pixel circuits 7 increases as the total current increases and as the distance from the high-side power supply terminal 5 increases. Therefore, the amount of IR drop correction of the pixel circuits 7 increases as the total current through the display panel 1 increases and as the distance from the high-side power supply terminal 5 increases.

[0042] Figure 4 An example configuration of the image processing circuit is illustrated. In one or more embodiments, the image processing circuit 14 includes a flexible gamma circuit 21 and an IR drop correction circuit 22. In various embodiments, the flexible gamma circuit 21 is configured to generate gamma-processed voltage data Dout_g based on the input image data Din. The gamma-processed voltage data Dout_g can describe voltage values of voltage levels that specify the drive voltages of each pixel circuit 7 of each pixel 10 of the display panel 1. In various embodiments, the gamma-processed voltage data Dout_g can be generated such that the correlation between the luminance level of the light emitted by the pixel circuit 7 and the gray scale values described in the input image data Din is according to a gamma characteristic represented by a gamma value γ. The processing performed by the flexible gamma circuit 21 can be referred to as gamma processing. For example, the gamma value γ can be set to 2.2.

[0043] Figure 5A gamma curve and control points specifying the gamma curve are illustrated in accordance with one or more embodiments. The gamma curve represents the input-output property of the flexible gamma circuit 21, i.e., the correlation between the gray level of the input image data Din and the voltage value of the gamma-processed voltage data Dout g. In the illustrated graph, a first coordinate axis (illustrated as the X-axis) represents the gray level of the input image data Din, and a second coordinate axis (illustrated as the Y-axis) represents the voltage value of the gamma-processed voltage data Dout g. In one embodiment, the flexible gamma circuit 21 can be configured to calculate the voltage value of the gamma-processed voltage data Dout g as the Y-coordinate of a point on the gamma curve, the point having an X-coordinate corresponding to the gray level of the input image data Din.

[0044] In various embodiments, the shape of the gamma curve is specified with a set of control points CP#0 to CP#q, where q is an integer of 2 or more. The gamma curve can be a free-form curve (e.g., a Bezier curve) having a shape specified by the control points CP#0 to CP#q. The positions of the control points CP#0 to CP#q can be represented by coordinates in the above-described coordinate system. In such embodiments, the control parameter Para_ctrl can include data indicating the coordinates of the control points CP#0 to CP#q. The coordinates of the control point CP#i can be referred to hereinafter as (CPXi, CPYi), where CPXi is the coordinate of the control point CP#i on the first coordinate axis or X-axis, and CPYi is the coordinate of the control point CP#i on the second coordinate axis or Y-axis. CPXi and CPYi can be referred to hereinafter as the X-coordinate CPXi and the Y-coordinate CPYi, respectively.

[0045] In one or more embodiments, the flexible gamma circuit 21 is configured to flexibly control the shape of the gamma curve by adjusting the positions of the control points CP#0 to CP#q. In various embodiments, the flexible gamma circuit 21 is configured to adjust the X-coordinates CPX0 to CPXq of the control points CP#0 to CP#q used to generate the voltage values of the gamma-processed voltage data Dout g. This allows the gamma curve to be scaled (i.e., enlarged or reduced) in a direction parallel to the first coordinate axis or X-axis. In one or more embodiments, when the gamma curve is enlarged in a direction parallel to the first coordinate axis or X-axis, this increases the voltage values of the gamma-processed output voltage data Dout g, and correspondingly increases the drive voltage supplied to the pixel circuit 7. In such embodiments, when the gamma curve is enlarged in a direction parallel to the first coordinate axis or X-axis, the luminance level of the pixel circuit 7 is reduced.

[0046] Referring back to Figure 4In one or more embodiments, the IR-drop correction circuit 22 is configured to correct the gamma-processed voltage data Dout_g based on a control parameter Para_ctrl to generate output voltage data Dout. The control parameter Para_ctrl can include an IR-drop compensation gain, and the IR-drop correction circuit 22 can include a multiplier 23. In such embodiments, the multiplier 23 can be configured to generate a voltage value of the output voltage data Dout by multiplying a voltage value of the gamma-processed voltage data Dout_g by the IR-drop compensation gain.

[0047] In one or more embodiments, the grayscale voltage generator circuit 15 is configured to supply (m+1) grayscale voltages V0 to Vm to the data driver circuit 16. In various embodiments, the (m+1) grayscale voltages V0 to Vm have voltage levels that are different from each other. In embodiments in which the grayscale voltage V0 is the highest grayscale voltage and the grayscale voltage Vm is the lowest grayscale value, the intermediate grayscale voltages V1 to V(m-1) can be generated by voltage division of the grayscale voltages V0 and Vm. The display brightness level of the display device 100 can depend on the range of the driving voltage supplied to the pixel circuit 7. The range can have an upper limit of the grayscale voltage V0 and a lower limit of the grayscale voltage Vm. The voltage level of the grayscale voltage V0 can be specified by a V0 command value V0* supplied from the control circuit 13, and the voltage level of the grayscale voltage Vm can be specified by a Vm command value Vm*. In such embodiments, the voltage range of the driving voltage (i.e., the display brightness level of the display device 100) can be controlled by controlling the V0 command value V0* and the Vm command value Vm*.

[0048] In one or more embodiments, the data driver circuit 16 is configured to output a driving voltage to be written into the respective pixel circuit 7 of the respective pixel 10 of the display panel 1 based on the output voltage data Dout from the image processing circuit 14 and the grayscale voltages V0-Vm. The data driver circuit 16 can be configured to select the driving voltage to be written into each pixel circuit 7 from the grayscale voltages V0 to Vm based on the voltage value of the output voltage data Dout associated with each pixel circuit 7. In one or more embodiments, the driving voltage to be written into each pixel circuit 7 is in the range from Vm to V0, and increases as the voltage value of the output voltage data Dout increases.

[0049] In one or more embodiments, the panel interface circuit 17 is configured to generate a scan control signal SOUT to control the scan driver circuit 4 of the display panel 1. In such embodiments, the scan driver circuit 4 can be configured to drive the scan lines SC and the emission lines EM based on the scan control signal SOUT. The scan control signal SOUT can include the emission control signal EM_ctrl described above. In such embodiments, the panel interface circuit 17 can be configured to control the duty cycle of the emission control signal EM_ctrl based on the emission command value emit* received from the control circuit 13. For example, as the emission command value emit* increases, the duty cycle of the emission control signal EM_ctrl can increase. In embodiments in which the display brightness level of the display device 100 is controllable using the emission control signal EM_ctrl, the display brightness level is controllable using the emission command value emit*.

[0050] The panel interface circuit 17 can also be configured to control the high-side power supply voltage ELVDD and the low-side power supply voltage ELVSS by supplying a PMIC control signal PMIC_ctrl to the PMIC 300. In such embodiments, the panel interface circuit 17 can be configured to control the low-side power supply voltage ELVSS based on an ELVSS command value ELVSS* received from the control circuit 13. In one or more embodiments, the low-side power supply voltage ELVSS is set to be lower than the minimum grayscale voltage Vm.

[0051] In one or more embodiments, the control circuit 13 is configured to control the operation of the signal supply circuit 12 based on control data Dctrl received from the host 200. In various embodiments, the control data Dctrl includes a display brightness value (DBV), and the control circuit 13 is configured to control the display brightness level of the display device 100 based on the DBV. The DBV can be generated based on user operations. For example, when an instruction for adjusting the brightness of an image displayed on the display device 100 is manually input to an input device (not illustrated), the host 200 can generate the DBV based on the instruction for adjusting the display brightness level. The input device can be, among other things, a touch panel provided on at least a portion of the display panel 1, a cursor control device, and a mechanical and / or non-mechanical button.

[0052] Figure 6 An example configuration of the control circuit 13 is illustrated. In the illustrated embodiment, the control circuit 13 includes an image analysis circuit 31, a DBV control circuit 32, a brightness control circuit 33, a CP calculation circuit 34, an IR drop correction control circuit 35, and a register circuit 36.

[0053] The image analysis circuit 31 is configured to analyze the input image data Din and generate analysis data corresponding to a display image of the input image data Din. The image analysis circuit 31 can also be configured to generate dispersion data indicative of a dispersion of luminance levels of the pixels 10.

[0054] The DBV control circuit 32 is configured to generate a luminance boost gain G DBV based on the analysis data, and further based on the DBV and the luminance boost gain G DBV to generate a maximum luminance boost DBV. The maximum luminance boost DBV can be a product of the DBV and the luminance boost gain G DBV .

[0055] The luminance control circuit 33 is configured to control the analog operation of the signal supply circuit 12 based on the maximum luminance boost DBV, which can be a product of the DBV and G DBV . The luminance control circuit 33 can include an emission control circuit 33a, a power supply control circuit 33b, and a gamma voltage control circuit 33c. The emission control circuit 33a is configured to generate an emission command value emit* based on the maximum luminance boost DBV. The power supply control circuit 33b is configured to generate an ELVSS command value ELVSS* based on the maximum luminance boost DBV. The gamma voltage control circuit 33c is configured to generate a V0 command value V0* and a Vm command value Vm* based on the maximum luminance boost DBV.

[0056] The CP calculation circuit 34 is configured to generate control points CP#0 to CP#q to be set to the flexible gamma circuit 21 of the image processing circuit 14.

[0057] The IR fall correction control circuit 35 is configured to calculate an IR fall compensation gain based on the dispersion data received from the image analysis circuit 31.

[0058] The register circuit 36 is configured to store one or more register values to control the operation of the control circuit 13. The register circuit 36 can be configured such that the register values are rewritable from an external device, such as the host 200.

[0059] In one or more embodiments, the control circuit 13 is configured to control the analog operation of the signal supply circuit 12 based on the input image data Din. This enables adaptive control of the analog operation depending on the content of the input image data Din. The control circuit 13 can be configured to control the emission control signal EM_ctrl and / or the low-side power supply voltage ELVSS. The emission control signal EM_ctrl can be controlled by generating an emission command value EM* based on the input image data Din. The low-side power supply voltage ELVSS can be controlled by generating an ELVSS command value ELVSS* based on the input image data Din. The control of the analog operation can include control of the voltage range of the drive voltage supplied to the pixel circuit 7 based on the input image data Din. The control of the voltage range of the drive voltage can include control of the highest gray voltage V0 and / or control of the lowest gray voltage Vm. The above-mentioned control of the analog operation can have an influence on the brightness of the entire display image in the display area 3. The highest gray voltage V0 can be controlled by generating a V0 command value V0* based on the input image data Din, and the lowest gray voltage Vm can be controlled by generating a Vm command value Vm* based on the input image data Din.

[0060] The control circuit 13 can be configured to determine or calculate an average picture level (APL) defining a respective partial area in the display area 3 of the display panel 1 based on the input image data Din, and to implement the above-mentioned control of the analog operation based on the calculated APL. The APL calculated for a respective partial area can be referred to as a local APL in the following. In one or more embodiments, the APL of a partial area of interest can be calculated as an average of the maximum values of the gray values of the sub-pixels of all colors (e.g. red, green and blue) of each pixel 10 in the partial area. In one or more embodiments, the control circuit 13 can be configured to implement the above-mentioned control of the analog operation based on the highest local APL among the local APLs calculated for the respective partial areas. This operation can enable brighter display of the image corresponding to the input image data Din on the display panel 1 when the display image contains bright portions.

[0061] Figure 7 An example definition of partial areas is illustrated in accordance with one or more embodiments. As Figure 7 As illustrated in Fig. 2, a plurality of partial areas (denoted by the numbers 20) are respectively associated with the pixels 10 of the display panel 1. Each partial area 20 can be defined to include the pixel 10 corresponding thereto. For example, the partial areas 201 to 204 associated with the pixels 101 to 104 are respectively defined to include the pixels 101 to 104. In the following, the local APL of a partial area 20 associated with a pixel 10 can simply be referred to as the local APL associated with the pixel 10.

[0062] When the corresponding pixel 10 of the partial area 20 is sufficiently distanced from the edge of the display area 3, the partial area 20 can be defined as a rectangular area having a predetermined width and height, with its corresponding pixel 10 located at the geometric center of the rectangular area. In Figure 7 In the example, the partial areas 201 and 202 are illustrated as rectangular areas having a predetermined width and height, with the corresponding pixels 101 and 102 sufficiently distanced from the edges of the display area 3 and located at the geometric centers of the partial areas 201 and 202. When the corresponding pixel 10 of the partial area 20 is located near or on the edge of the display area 3, the partial area 20 can be defined as a portion of the rectangular area having the predetermined width and height described above, with the portion located in the display area 3 and the corresponding pixel 10 of the partial area 20 located at the geometric center of the rectangular area. In one or more embodiments, the pixel 103 corresponding to the partial area 203 is located near the edge of the display area 3, and the pixel 104 corresponding to the partial area 204 is located on the edge of the display area 3. In such embodiments, the partial areas 203 and 204 can be defined as portions of the rectangular areas having the same width and height as the partial areas 201 and 202, respectively, with the portions located in the display area 3 and the pixels 103 and 104 located at the geometric centers of the rectangular areas. Although Figure 7 Only the partial areas 201 to 204 corresponding to the pixels 101 to 104 are illustrated, but partial areas 20 can be defined for all pixels 10 in the display area 3. Although Figure 7 The partial areas 201 to 204 are illustrated as rectangular, but the partial areas 20 can have different shapes.

[0063] In other embodiments, the control circuit 13 can be configured to calculate the APL of the entire display image in the display area 3 of the display panel 1 based on the input image data Din, and to control the analog operation of the signal supply circuit 12 based on the calculated APL. This operation can enable brighter display of the display image corresponding to the input image data Din when the display image is bright. Hereinafter, the APL of the entire display image can be referred to as global APL to distinguish it from the local APL described above.

[0064] In other embodiments, the control circuit 13 can be configured to selectively perform analog operation control based on the highest local APL and selectively perform analog operation control based on the global APL. The control circuit 13 can be configured to control the analog operation of the signal supply circuit 12 based on the highest local APL in a local APL mode, which can also be referred to as a first operation mode. The control circuit 13 can also be configured to control the analog operation of the signal supply circuit 12 based on the global APL in a global APL mode, which can also be referred to as a second operation mode. The selection of the operation mode can be based on a register value stored in the register circuit 36. In other embodiments, the selection of the operation mode can be based on a register value stored in a separate memory that is separate from the control circuit 13.

[0065] In one or more embodiments, the control circuit 13 is configured to increase the luminance of the bright portion of a display image having a bright portion and a dark portion by controlling the analog operation of the signal supply circuit 12. In one or more embodiments, since the analog operation can have an impact on the luminance of the entire display image in the display area 3, the control circuit 13 is also configured to cancel the increase in luminance in the dark portion by control of image processing in the image processing circuit 14. This can effectively improve the contrast of the display image. In various embodiments, when the emission control signal EM_ctrl is controlled to increase the luminosity level of a pixel 10 of interest, the image processing of the pixel 10 of interest can be performed to cancel the increase in the luminosity level of the pixel 10 of interest based on the local APL corresponding to the partial area 20 of the pixel 10 of interest. In one or more embodiments, the control of the image processing in the image processing circuit 14 can be achieved by adjusting the coordinates of the control points CP#0 to CP#q and / or adjusting the IR drop compensation gain.

[0066] In one or more embodiments, the image analysis circuit 31 is configured to analyze the input image data Din to compute one or more characteristic values of a display image corresponding to the input image data Din. The characteristic values can include a local APL of a respective partial area 20, a global APL of the display image, or a dispersion of luminance levels of the pixels 10. The image analysis circuit 31 can be configured to compute, based on the input image data Din, a local APL of a respective partial area 20 defined in the display area 3 of the display panel 1. The image analysis circuit 31 can be configured to compute, based on the input image data Din, a global APL of the display image. The image analysis circuit 31 can be configured to generate analysis data indicative of at least one of the highest local APL among the local APLs of the partial areas 20 and the global APL. The image analysis circuit 31 can also be configured to generate, based on the input image data Din, dispersion data indicative of a dispersion of luminance levels of the pixels 10 in the display image. The dispersion data can be indicative of at least one of a difference between a maximum value and a minimum value of the luminance levels of the pixels 10, a variation of the luminance levels of the pixels 10, a mean absolute deviation of the luminance levels of the pixels 10, and a standard deviation of the luminance levels of the pixels 10.

[0067] In one or more embodiments, the DBV control circuit 32 is configured to generate a luminance boost gain G DBV based on the analysis data, and further based on the DBV and the luminance boost gain G DBV to generate a maximum luminance boost DBV. The maximum luminance boost DBV can be computed as a product of the DBV and the luminance boost gain G DBV . In various embodiments, the maximum luminance boost DBV is used as a parameter for controlling luminance of a portion of the highest luminance in the display image displayed in the display area 3.

[0068] In embodiments in which the analysis data includes the highest local APL, as Figure 8 illustrated in FIG. 3, the DBV control circuit 32 can be configured to generate a luminance boost gain G DBV based on the highest local APL, and further based on the DBV and the luminance boost gain G DBV to generate a highest luminance boost DBV. In such embodiments, the DBV control circuit 32 can include a luminance boost gain table indicative of a correlation between the highest local APL and the luminance boost gain G DBV . The DBV control circuit 32 can also be configured to generate the luminance boost gain G DBV based on the highest local APL by a table lookup of the luminance boost gain table. In one or more embodiments, the luminance boost gain G DBV may increase as the highest local APL increases. Figure 8The diagram shows the highest luminance enhancement DBV calculated as DBV and luminance enhancement gain G. DBV The product of and brightness enhancement gain G DBV This is an embodiment of 3.20.

[0069] In embodiments where the analyzed data includes global APL, such as Figure 9 As shown in the diagram, the DBV control circuit 32 can be configured to generate a luminance enhancement gain G based on the global APL. DBV Furthermore, it is based on DBV and brightness enhancement gain G. DBV Generate the highest brightness enhancement DBV. In such an embodiment, the DBV control circuit 32 may include a brightness enhancement gain table that indicates the global APL and the brightness enhancement gain G. DBV The correlation between them. The DBV control circuit 32 can also be configured to generate the brightness enhancement gain G based on a table lookup of the brightness enhancement gain table using global APL. DBV In one or more embodiments, the brightness enhancement gain G DBV It can increase as the global APL increases. Figure 9 The diagram shows the highest luminance enhancement DBV calculated as DBV and luminance enhancement gain G. DBV The product of and brightness enhancement gain G DBV This is an embodiment of 2.50.

[0070] In embodiments where the display driver 2 has a local APL mode and a global APL mode, the DBV control circuit 32 can be configured to generate a brightness enhancement gain G based on the selection between the local APL mode and the global APL mode. DBV In one or more embodiments, the DBV control circuit 32 can be configured to generate a luminance enhancement gain G based on the highest local APL in a local APL mode. DBV And based on DBV and brightness enhancement gain G DBV Generate the highest brightness enhancement DBV. In one or more embodiments, the DBV control circuit 32 can be configured to generate a brightness enhancement gain G based on the global APL in a global APL mode. DBV Furthermore, it is based on DBV and brightness enhancement gain G. DBV Generate the highest brightness enhancement DBV. The selection between local APL mode and global APL mode can be based on the register value stored in register circuit 36.

[0071] Return to reference Figure 6 In one or more embodiments, the brightness control circuit 33 is configured to control the analog operation of the signal supply circuit 12 based on the maximum brightness enhancement (DBV), wherein the maximum brightness enhancement (DBV) can be DBV and G. DBVproduct of the maximum luminance enhancement DBV and the maximum luminance control point CP#0_max. In one or more embodiments, the luminance control circuit 33 is configured to generate the emission command value emit*, the V0 command value V0*, the Vm command value Vm*, and the ELVSS command value ELVSS* based on the maximum luminance enhancement DBV. As the maximum luminance enhancement DBV increases, the emission command value emit* can be generated to increase the duty cycle of the emission control signal EM_ctrl. In various embodiments, the increase in the duty cycle of the emission control signal EM_ctrl causes an increase in the ratio of the pixel circuits 7 that emit light, thereby increasing the maximum luminance that can be achieved on the display panel 1. As the maximum luminance enhancement DBV increases, the Vm command value Vm* can be generated to decrease the minimum grayscale voltage Vm. In various embodiments, the decrease in the minimum grayscale voltage Vm causes an increase in the maximum current through the light emitting element 8 of the pixel circuit 7, thereby increasing the maximum luminance that can be achieved on the display panel 1. As the maximum luminance enhancement DBV increases, the ELVSS command value ELVSS* can be generated to decrease the low-side power supply voltage ELVSS. The ELVSS command value ELVSS* can be generated such that the low-side power supply voltage ELVSS is lower than the minimum grayscale voltage Vm.

[0072] In one or more embodiments, the luminance control circuit 33 can also be configured to generate the maximum luminance control points CP#0_max to CP#q_max based on the maximum luminance enhancement DBV. The maximum luminance control points CP#0_max to CP#q_max can be a set of control points that represent a shape of a gamma curve that is suitable for a portion of the maximum luminance of the display image displayed in the display area 3. The luminance control circuit 33 can be configured to store a plurality of sets of control points CP#0 to CP#q, and select the maximum luminance control points CP#0_max to CP#q_max from among the sets of control points CP#0 to CP#q stored based on the maximum luminance enhancement DBV.

[0073] In one or more embodiments, the CP calculation circuit 34 is configured to generate the control points CP#0 to CP#q to be set to the flexible gamma circuit 21 of the image processing circuit 14 by modifying the maximum luminance control points CP#0_max to CP#q_max received from the luminance control circuit 33 based on the local APL calculated for each pixel 10. In embodiments in which the analog operation of the signal supply circuit 12 is controlled by the luminance control circuit 33 to increase the luminance of bright portions of the display image, the CP calculation circuit 34 can be configured to generate the control points CP#0 to CP#q to cancel the increase of dark portions of the display image by image processing in the image processing circuit 14. The control points CP#0 to CP#q to be set to the flexible gamma circuit 21 can be calculated for each pixel 10.

[0074] REFERENCE Figure 10In one or more embodiments, the control points CP#0 to CP#q for generating the voltage data Dout_g of the gamma processing of the pixel 10 of interest can be generated based on a brightness gain G_brt of the pixel 10 of interest. In one or more embodiments, the brightness gain G_brt of the pixel 10 of interest represents a degree of reducing the luminosity level of the pixel 10 of interest in the image processing in the image processing circuit 14. In various embodiments, the brightness gain G_brt of the pixel 10 of interest is calculated based on the local APL associated with the pixel 10 of interest and the highest local APL of the display image.

[0075] The CP calculation circuit 34 can include an image enhancement table that describes a correlation of local APLs with respective desired luminosity levels of the local APLs. Further, the CP calculation circuit 34 can be configured to refer to the image enhancement table in generating the brightness gain G_brt of the pixel 10 of interest. In such embodiments, the CP calculation circuit 34 can be configured to generate, by a table lookup of the image enhancement table, a desired luminosity level corresponding to the local APL associated with the pixel 10 of interest and a desired luminosity level corresponding to the highest local APL, and determine the brightness gain G_brt as a ratio of the desired luminosity level corresponding to the local APL associated with the pixel 10 of interest to the desired luminosity level corresponding to the highest local APL. Figure 10 An example is illustrated in the middle where the local APL associated with the pixel 10 of interest is 96, the highest local APL is 224, and the brightness gain G_brt is 0.78.

[0076] Returning to reference Figure 6 In various embodiments, the control points CP#0 to CP#q for generating the voltage data Dout_g of the gamma processing of the pixel 10 of interest are generated based on the brightness gain G_brt and the highest brightness control points CP#0_max to CP#q_max. In one or more embodiments, the X coordinates CPX0 to CPXq of the control points CP#0 to CP#q are calculated by multiplying the X coordinates CPX0_max to CPXq_max of the highest brightness control points CP#0_max to CP#q_max by a coefficient a (> 1) calculated based on the brightness gain G_brt, respectively. In one or more embodiments, the Y coordinates CPY0 to CPYq of the control points CP#0 to CP#q are determined to be the same as the Y coordinates CPY0 to CPYq of the highest brightness control points CP#0_max to CP#q_max, respectively. As Figure 11 As illustrated in the middle, this expands the gamma curve for generating the voltage data Dout_g of the gamma processing by a in the X-axis direction. In one or more embodiments, the coefficient a can be calculated according to the following expression (1):

[0077] (1)

[0078] where γ is a gamma value set to the display device 100. For example, the gamma value γ can be 2.2. In an embodiment in which the coefficient α is calculated according to expression (1), the gamma curve is enlarged α times in a direction parallel to the first coordinate axis or X axis, and this reduces the luminance level of each pixel circuit 7 by G_brt times (< 1). The use of the control points CP#0 to CP#q calculated like this when generating the gamma-processed voltage data Dout_g of the pixel 10 of interest enables the luminance level of the pixel 10 of interest to be reduced while suppressing a change in the gamma characteristic of the display device 100.

[0079] Returning to reference Figure 6 In an embodiment in which the global APL is used to control the analog operation of the signal supply circuit 12, the maximum luminance control points CP#0_max to CP#q_max can be used as the control points CP#0 to CP#q set to the flexible gamma circuit 21 without modification. In an embodiment in which the display device 100 has a global APL mode and a local APL mode, the CP calculation circuit 34 can be configured to output the maximum luminance control points CP#0_max to CP#q_max without modification as the control points CP#0 to CP#q set to the flexible gamma circuit 21 in the global APL mode. In such an embodiment, the CP calculation circuit 34 can also be configured to, in the local APL mode, generate the control points CP#0 to CP#q set to the flexible gamma circuit 21 by modifying the maximum luminance control points CP#0_max to CP#q_max based on the local APL calculated for each pixel 10.

[0080] In one or more embodiments, the IR drop correction control circuit 35 is configured to calculate an IR drop compensation gain based on the discrete data received from the image analysis circuit 31. The IR drop correction control circuit 35 can be configured to select the execution or suppression of IR drop correction based on the discreteness of the luminance level of the pixel 10 indicated by the discrete data. When the IR drop correction is executed, the IR drop compensation gain can be calculated based on the position of the pixel 10 of interest and the total current passing through the display panel 1. When the IR drop correction is suppressed, the IR drop compensation gain is unconditionally set to "1", and the gamma-processed voltage data Dout_g can be output as the output voltage data Dout without modification.

[0081] In one or more embodiments, IR drop correction is suppressed when the dispersion of the luminance levels of the pixels 10 indicated by the discrete data exceeds a predetermined threshold. In embodiments in which the gray scale values of the input image data Din are 8-bit values ranging between 0 and 255, inclusive, the luminance levels of the pixels 10 can be determined as values ranging between 0 and 255, inclusive, and the predetermined threshold can be set as a value between 0 and 255, inclusive. The predetermined threshold can depend on a desired contrast of the displayed image. IR drop correction can reduce contrast while reducing color shifts caused by voltage drops on the power supply lines. In one or more embodiments, when the dispersion of the luminance levels of the pixels 10 exceeds the predetermined threshold and thus the contrast of the displayed image is to be increased, IR drop correction can be suppressed to suppress the reduction in contrast.

[0082] In embodiments in which the discrete data indicates a difference between a maximum value and a minimum value of the luminance levels of the pixels 10 of the displayed image, the performance or suppression of IR drop correction can be selected based on a comparison of the difference between the maximum value and the minimum value to a predetermined threshold. In one or more embodiments, IR drop correction is suppressed when the difference between the maximum value and the minimum value of the luminance levels of the pixels 10 is greater than the predetermined threshold. In one or more embodiments, IR drop correction is performed when the difference between the maximum value and the minimum value of the luminance levels of the pixels 10 is less than the predetermined threshold.

[0083] In one or more embodiments, when the indicated dispersion of the luminance levels of the pixels 10 is large, an inverse correction that causes an effect opposite to IR drop correction can be performed. The inverse correction can be performed to enhance color shifts caused by voltage drops on the power supply lines. The inverse correction can be performed to reduce the luminance levels of the pixels 10 of interest to a greater extent as the total current through the display panel 1 increases. In one or more embodiments, the inverse correction can enhance the contrast of the displayed image. The performance of the inverse correction can be controlled based on a comparison of the difference between a maximum value and a minimum value of the luminance levels of the pixels 10 to a predetermined threshold. For example, the inverse correction can be performed when the difference between the maximum value and the minimum value is greater than the predetermined threshold. In embodiments in which the gray scale values of the input image data Din are 8-bit values ranging between 0 and 255, inclusive, the luminance levels of the pixels 10 can be determined as values ranging between 0 and 255, inclusive, and the predetermined threshold can be set as a value between 0 and 255, inclusive, depending on a desired contrast of the displayed image.

[0084] Figure 12 The method 1200 illustrates steps for controlling the signal supply circuit 12 in one or more embodiments. It should be noted that the order of the steps can be changed from the illustrated order.

[0085] In the illustrated embodiment, at step 1210, an emission control signal EM_ctrl that controls the ratio of the pixel circuits 7 that emit light to the pixel circuits 7 of the entire display panel 1 is supplied from the panel interface circuit 17 to the display panel 1. At step 1220, a low-side power supply voltage ELVSS is supplied from the PMIC 300 to the display panel 1. At step 1230, a grayscale voltage V0 and Vm are generated, which can be a highest grayscale voltage and a lowest grayscale voltage.

[0086] At step 1240, analysis data is generated by the image analysis circuit 31 based on the input image data Din. The analysis data can indicate a local APL of the respective partial area 20 and / or a global APL of the display image. The local APL can be calculated separately for all pixels 10 in the display area 3 of the display panel 1.

[0087] At step 1250, in one or more embodiments, the emission control signal EM_ctrl is controlled based on the analysis data. The duty cycle of the emission control signal EM_ctrl can be controlled based on the analysis data. In one or more embodiments, the emission control signal EM_ctrl is controlled based on the local APL of the respective partial area 20. In some embodiments, the emission control signal EM_ctrl is controlled based on the highest local APL. As the highest local APL increases, the duty cycle of the emission control signal EM_ctrl can increase. This can result in an increase in the duty cycle of the emission control signal EM_ctrl when the image contains bright portions, thereby improving the contrast of the displayed image. In other embodiments, the emission control signal EM_ctrl is controlled based on the global APL.

[0088] At step 1260, the low-side power supply voltage ELVSS is optionally controlled based on the analysis data. The low-side power supply voltage ELVSS can be based on the local APL of the respective partial area 20. In some embodiments, the low-side power supply voltage ELVSS is controlled based on the highest local APL. In other embodiments, the low-side power supply voltage ELVSS is controlled based on the global APL.

[0089] At step 1270, the grayscale voltage V0 and Vm are optionally controlled based on the analysis data. The grayscale voltage V0 and Vm can be based on the local APL of the respective partial area 20. In some embodiments, the grayscale voltage V0 and Vm are controlled based on the highest local APL. In other embodiments, the grayscale voltage V0 and Vm are controlled based on the global APL.

[0090] At step 1280, in one or more embodiments, control points CP#0 to CP#q are determined or computed by the CP computation circuit 34. In embodiments in which control points CP#0 to CP#q are determined or computed for each pixel 10, the control points CP#0 to CP#q are determined or computed based on the local APL associated with the pixel 10. The control points CP#0 to CP#q can be determined or computed based on the local APL associated with the pixel 10 of interest to cancel an increase in luminance level of the pixel 10 of interest caused by the control of the emission control signal EM_ctrl, the low-side power supply voltage ELVSS, and / or the grayscale voltages Vo and Vm.

[0091] At step 1290, IR drop correction is optionally controlled. In one or more embodiments, the IR drop correction control circuit 35 can select the execution or suppression of IR drop correction based on the discretization of the luminance level of the pixel 10.

[0092] Figure 13 An example operation of the display device 100 is illustrated. In one or more embodiments, when the display device 100 is placed in the normal mode, the brightness enhancement gain G DBV is set to “1”, and the analog operation of the image processing and signal supply circuit 12 is controlled based on the DBV. In the example illustrated in Figure 12 , the emission command value emit* is set such that the duty cycle of the emission control signal EM_ctrl is set to 50%, and the gamma curve associated with the DBV is used in the image processing.

[0093] In one or more embodiments, when the display device 100 is placed in the local APL mode, a highest brightness enhancement DBV is computed based on the highest local APL. Further, in embodiments in which the display image contains bright portions as illustrated in Figure 12 , one or more local APLs computed for the bright portions are increased, and the highest local APL is also increased. Thus, the highest brightness enhancement DBV is computed to be greater than the original DBV. In the example illustrated in Figure 12 , the highest brightness enhancement DBV is 150% of the original DBV. In one or more embodiments, the analog operation of the signal supply circuit 12 is controlled based on the highest brightness enhancement DBV. In the example illustrated in Figure 12 , the emission command value emit* is set such that the duty cycle of the emission control signal EM_ctrl is set to 99.7%. This places the display device 100 in a state in which the display device 100 can brightly display the portions of the display image of the highest luminance. In one or more embodiments, the image processing is performed to cancel an increase in luminance caused by the control of the analog operation for the dark portions of the display image based on the local APLs computed for the respective pixels 10. Thus, the dark portions of the display image remain unchanged. In the example illustrated in Figure 12 Figure 12The operation in the partial APL mode illustrated in the middle can effectively improve the contrast.

[0094] While various embodiments have been particularly described herein, those skilled in the art will understand that various modifications can be made to implement the technology disclosed herein.

[0095] Reference Signs

[0096] 1 Display panel

[0097] 2 Display driver

[0098] 3 Display area

[0099] 4 Scan driver circuit

[0100] 5 High-side power supply terminal

[0101] 6 Low-side power supply terminal

[0102] 7 Pixel circuit

[0103] 7B Sub-pixel

[0104] 7G Sub-pixel

[0105] 7R Sub-pixel

[0106] 8 Light emitting element

[0107] 9A High-side power supply node

[0108] 9B Low-side power supply node

[0109] 10 Pixel

[0110] 11 Interface circuit

[0111] 12 Signal supply circuit

[0112] 13 Control circuit

[0113] 14 Image processing circuit

[0114] 15 Gray voltage generator circuit

[0115] 16 Data driver circuit

[0116] 17 Circuit

[0117] 20 Partial area

[0118] 21 Flexible gamma circuit

[0119] 22 IR drop correction circuit

[0120] 23 Multiplier

[0121] 31 image analysis circuit

[0122] 32 DBV control circuit

[0123] 33 brightness control circuit

[0124] 33A emission control circuit

[0125] 33B power supply control circuit

[0126] 33C gamma voltage control circuit

[0127] 34 CP calculation circuit

[0128] 35 IR drop correction control circuit

[0129] 36 register circuit

[0130] 100 display device

[0131] 101 pixel

[0132] 102 pixel

[0133] 103 pixel

[0134] 104 pixel

[0135] 200 host

[0136] 201 partial area

[0137] 202 partial area

[0138] 203 partial area

[0139] 204 partial area

[0140] 300 PMIC

[0141] 1200 method

[0142] 1210 step

[0143] 1220 step

[0144] 1230 step

[0145] 1240 step

[0146] 1250 step

[0147] 1260 step

[0148] 1270 step

[0149] 1280 step

[0150] 1290 step

Claims

1. A display driver, comprising: a signal supply circuit configured to supply an emission control signal to a display panel, the emission control signal controlling a ratio of pixel circuits that emit light to pixel circuits of the display panel; and a control circuit configured to control the emission control signal based on input image data, wherein controlling the emission control signal comprises: determining local average picture levels (APLs) for respective partial areas of a display area of the display panel based on the input image data; determining a highest local APL among the local APLs; generating a highest luminance boost display brightness value (DBV) based at least in part on the highest local APL; generating a first set of control points based on the highest luminance boost DBV to increase luminance of bright portions of a display image corresponding to the input image data, wherein each control point of the first set of control points comprises a first coordinate and a second coordinate of a gamma curve; generating a second set of control points for dark portions of the display image to cancel an increase in luminance of the dark portions by the first coordinate of at least a portion of the control points of the first set of control points multiplied by a coefficient determined from a luminance gain and the second coordinate maintained unchanged.

2. The display driver of claim 1, wherein generating the highest luminance boost DBV is further based on a display brightness value (DBV) received from a device external to the display driver.

3. The display driver of claim 1, wherein each of the respective partial areas is associated with one or more pixels of the display panel.

4. The display driver of claim 3, wherein the signal supply circuit comprises: an image processing circuit configured to generate output voltage data based on the input image data; and a data driver circuit configured to drive the pixel circuits based on the output voltage data, and wherein generating the output voltage data comprises processing a first pixel of the one or more pixels based on a local APL of a respective partial area associated with the first pixel.

5. The display driver of claim 1, wherein the signal supply circuit comprises: an image processing circuit configured to apply an IR drop correction to the input image data to generate output voltage data, wherein the IR drop correction compensates for voltage drops on power supply lines of the display panel; and a data driver circuit configured to drive the pixel circuits based on the output voltage data.

6. The display driver of claim 5, wherein the IR drop correction is based on a discretization of luminance levels of pixels in the display panel.

7. The display driver of claim 5, wherein the IR drop correction is suppressed based on a discretization of luminance levels of pixels in the display panel.

8. The display driver of claim 1, wherein the control circuit is configured to control a low-side power supply voltage supplied to the display panel based on the input image data.

9. The display driver of claim 8, wherein controlling the low-side power supply voltage comprises controlling the low-side power supply voltage based on the local APLs.

10. The display driver of claim 8, wherein controlling the low-side supply voltage comprises controlling the low-side supply voltage based on the highest local APL.

11. The display driver of claim 1, wherein the signal supply circuitry comprises: image processing circuitry configured to: generate output voltage data based on the input image data; and control a voltage range of a drive voltage based on the input image data; and data driver circuitry configured to supply the drive voltage to the pixel circuitry based on the output voltage data.

12. The display driver of claim 11, wherein controlling the voltage range of the drive voltage comprises controlling the voltage range based on the first set of control points and the second set of control points.

13. A display apparatus comprising: a display panel; and a display driver comprising: signal supply circuitry configured to supply emission control signals to the display panel, the emission control signals controlling a ratio of pixel circuitry emitting light to pixel circuitry of the display panel; and control circuitry configured to control the emission control signals based on input image data, wherein controlling the emission control signals comprises: determining local average picture levels (APLs) for respective partial areas of a display area of the display panel based on the input image data; determining a highest local APL among the local APLs; generating a highest brightness enhancement display brightness value (DBV) based at least in part on the highest local APL; generating a first set of control points based on the highest brightness enhancement DBV to increase brightness of bright portions of a display image corresponding to the input image data, wherein each control point of the first set of control points comprises a first coordinate and a second coordinate of a gamma curve; generating a second set of control points for dark portions of the display image to cancel the increase in brightness of the dark portions by the first coordinate of at least a portion of the control points of the first set of control points multiplied by a factor determined from a brightness gain and maintaining the second coordinate unchanged.

14. The display apparatus of claim 13, generating the highest brightness enhancement DBV is further based on a display brightness value (DBV) received from an apparatus external to the display driver.

15. A method comprising: determining local average picture levels (APLs) for respective partial areas of a display area of a display panel based on input image data; determining a highest local APL among the local APLs; generating a highest brightness enhancement display brightness value (DBV) based at least in part on the highest local APL; generating a first set of control points based on the highest brightness enhancement DBV to increase brightness of bright portions of a display image corresponding to the input image data, wherein each control point of the first set of control points comprises a first coordinate and a second coordinate of a gamma curve; generating a second set of control points for dark portions of the display image to cancel the increase in brightness of the dark portions by the first coordinate of at least a portion of the control points of the first set of control points multiplied by a factor determined from a brightness gain and maintaining the second coordinate unchanged. Supplying emission control signals to the display panel with the first set of control points and the second set of control points, the emission control signals controlling a ratio of pixel circuits emitting light to pixel circuits of the display panel.

Images